JP2022017678A - Printed wiring board and manufacturing method thereof - Google Patents

Abstract

To prevent a crack in a solder resist layer.SOLUTION: A printed wiring board includes a base insulation layer 12, a conductor layer 14 formed on the base insulating layer, a solder resist layer 16 that is formed on the base insulating layer and the conductor layer and has an opening 16a that exposes a part of the conductor layer as a conductor pad 14a, and a bump 20 formed on the conductor pad, and the bump includes a base plating layer 24 formed in the opening and on a part of the surface of the solder resist layer, and a top plating layer 28 formed on the base plating layer, and between the surface of the solder resist layer and the side edge of the base plating layer, the side edge of the base plating layer includes a convex-shaped notch 24a with respect to the surface of the solder resist layer.SELECTED DRAWING: Figure 1

Description

The present invention relates to a printed wiring board having plated bumps and a method for manufacturing the printed wiring board.

Patent Document 1 discloses an example of a printed wiring board having a plated bump.

Japanese Unexamined Patent Publication No. 2010-129996

FIG. 4 is a diagram showing an embodiment of a conventional printed wiring board having a plurality of plated bumps. In FIG. 4, in the printed wiring board 51, a solder resist layer 62 is formed on the base insulating layer 61, and a base plating layer 64 is formed on a conductor pad 63 in the opening 62a formed in the solder resist layer 62 to form a base. The top plating layer 65 is formed on the plating layer 64, and the top plating layer 65 is reflowed to form the plating bump 71.

As shown in FIG. 4, at the interface between the surface of the solder resist layer 62 and the side surface of the base plating layer 64, if there is a sharp portion on the side surface of the base plating layer 64, stress is concentrated on that portion. When the stress became larger than the fracture strength of the solder resist layer 62, crack CR originating from the interface was generated in the solder resist layer 62.

The printed wiring board according to the present invention has a base insulating layer, a conductor layer formed on the base insulating layer, and a part of the conductor layer formed on the base insulating layer and the conductor layer. A base comprising a solder resist layer having an opening exposed as a conductor pad and a bump formed on the conductor pad, wherein the bump is formed in the opening and on a portion of the surface of the solder resist layer. It has a plating layer and a top plating layer formed on the base plating layer, and the side surface end portion of the base plating layer is located between the surface of the solder resist layer and the side surface end portion of the base plating layer. A notch having a convex shape is provided with respect to the surface of the solder resist layer.

The method for manufacturing a printed wiring board according to the present invention includes forming a base insulating layer, forming a conductor layer on the base insulating layer, and forming a solder resist layer on the base insulating layer and the conductor layer. To form, to form an opening in the solder resist layer to expose a part of the conductor layer as a conductor pad, and to form on the conductor layer and on the surface of the solder resist layer and the side surface of the opening. Forming a seed layer, including forming a bump on the conductor pad, and forming the bump forms a base plating layer in the opening and on a portion of the surface of the solder resist layer. This includes forming a top plating layer on the base plating layer and removing the seed layer on the surface of the solder resist layer by etching, and when removing the seed layer by etching, the base By selectively etching the side surface end portion of the plating layer exposed from the solder resist layer, the side surface end portion of the base plating layer is provided between the surface of the solder resist layer and the side surface end portion of the base plating layer. Includes forming a convex notch with respect to the surface of the solder resist layer.

It is sectional drawing for demonstrating one Embodiment of the printed wiring board of this invention. It is a figure for demonstrating another embodiment of the printed wiring board of this invention. (A) to (f) are diagrams for explaining each step in one embodiment of the method for manufacturing a printed wiring board according to the present invention, respectively. It is a figure which shows one Embodiment of the printed wiring board which has a conventional plating bump.

<About the printed wiring board of the present invention>
An embodiment of the printed wiring board of the present invention will be described with reference to the drawings. FIG. 1 shows a part of the printed wiring board 10 manufactured by the manufacturing method of one embodiment in an enlarged manner. The printed wiring board 10 may be a board with a core formed by alternately laminating conductor layers having a predetermined circuit pattern on one side or both sides of a core board (not shown) and resin insulating layers. When the conductor layers are formed on both sides of the core substrate, the conductor layers facing each other via the core substrate may be connected to each other via a through-hole conductor (not shown). Alternatively, the printed wiring board 10 may be a coreless substrate obtained by alternately laminating conductor layers and resin insulating layers on a support plate (not shown) instead of the core substrate, and then removing the support plate. ..

In any case, as shown in FIG. 1, the printed wiring board 10 is formed on the base insulating layer 12 which is the outermost layer of at least one resin insulating layer and the base insulating layer 12. A conductor layer 14 having a predetermined circuit pattern, and a solder resist layer 16 formed on the base insulating layer 12 and the conductor layer 14 are provided. In many cases, a plurality of other conductor layers and a resin insulating layer are alternately provided on the lower layer of the base insulating layer 12, but they are omitted in the drawing. However, the printed wiring board 10 may be composed of one base insulating layer 12 and one conductor layer 14.

The base insulating layer 12 can be made of a resin composition containing, for example, an inorganic filler such as silica or alumina and an epoxy resin. The conductor layer 14 is formed of a conductive metal, for example, a metal containing copper as a main component. The solder resist layer 16 has an opening 16a that exposes a part of the conductor layer 14 as a conductor pad 14a. The aspect ratio of the opening 16a, that is, the ratio of the depth to the diameter of the bottom can be 0.5 or less. An underlayer (not shown) may be formed on the conductor pad 14a.

The printed wiring board 10 further includes a plated bump 20 formed on the conductor pad 14a. The plating bump 20 can be used for connection with a power supply or a ground line or a connection with a signal line. The plating bump 20 has a base plating layer 24 formed in the opening 16a and a part of the surface of the solder resist layer 16, and a top plating layer 28 formed on the base plating layer 24. An intermediate layer 26 containing, for example, nickel as a main component is formed on the base plating layer 24. The thickness of the intermediate layer 26 is preferably 7 μm or less. The intermediate layer 26 does not have to be formed.

The base plating layer 24 is formed of a conductive metal, preferably a metal containing copper as a main component. The base plating layer 24 is preferably formed to a height exceeding the surface of the solder resist layer 16 (the surface opposite to the base insulating layer 12). As a result, the plating bump 20 is stably held in the opening 16a. The thickness of the base plating layer 24 from the surface of the solder resist layer 16 is preferably in the range of 3 μm to 20 μm. The top plating layer 28 has a melting point lower than that of the base plating layer 24 and is made of a metal that is melted by a reflow process and shaped into a substantially hemispherical shape as shown in FIG. 1, for example, a metal containing tin as a main component. The thickness of the top plating layer 28 (the vertical distance from the lower end of the top plating layer 28 to the top of the top plating layer on the outer peripheral surface of the plating bump 20) is preferably in the range of 5 μm to 45 μm. By setting the thickness of the top plating layer 28 within this range, good connection reliability is obtained between the plating bump 20 and the connection pad (not shown) of electronic components such as semiconductor chips and memories mounted on the printed wiring board 10. Sex is obtained.

In the printed wiring board according to the present invention, between the surface of the solder resist layer 16 and the side surface end portion of the base plating layer 24, the side surface end portion of the base plating layer 24 is cut in a convex shape with respect to the surface of the solder resist layer 16. The feature is that the notch portion 24a is provided. By providing the notch portion 24a at the side surface end portion of the base plating layer 24, it is possible to eliminate the crack CR generated from the interface between the conventional solder resist layer 16 and the side surface end portion of the base plating layer 24.

FIG. 2 is a diagram for explaining another embodiment of the printed wiring board of the present invention. In the printed wiring board 10 shown in FIG. 2, the bump 20 includes a first bump 20-1 and a second bump 20-2 having a diameter smaller than that of the first bump 20-1. The configurations of the first bump 20-1 and the second bump 20-2 are the same as those of the bump 20 shown in FIG. 1, except that there is a difference between the large diameter and the small diameter. In the printed wiring board 10 shown in FIG. 2, in addition to the first bump 20-1 and the second bump 20-2, a base layer 50 including a gold layer is formed on the conductor layer 14 without forming bumps. It is provided with an opening 16a. A component such as a capacitor can be mounted on the base layer 50, if necessary.

<About the manufacturing method of the printed wiring board of the present invention>
3A to 3F are diagrams for explaining each process of the embodiment of the method for manufacturing a printed wiring board of the present invention, respectively. Each step shown in FIGS. 3A to 3F is shown by exemplifying a step of manufacturing the printed wiring board shown in FIG. 2.

FIG. 3A shows an intermediate in which a conductor layer 14 and a solder resist layer 16 having a predetermined circuit pattern are formed on a base insulating layer 12 by a known method. In many cases, a plurality of other conductor layers and a resin insulating layer are alternately formed in the lower layer of the base insulating layer 12, but they are omitted in the drawing. The plurality of conductor layers and the resin insulating layer can be laminated on the core substrate or on a support plate that can be removed later. However, the printed wiring board 10 may be composed of one resin insulating layer as the base insulating layer 12 and one conductor layer 14, and in this case, the resin insulating layer corresponds to the base insulating layer 12. For the base insulating layer 12, a build-up insulating resin film containing an inorganic filler such as silica or alumina and an epoxy resin can be used. The thickness of the conductor layer 14 is preferably 20 μm or less.

Next, as shown in FIG. 3B, an opening 16a for exposing a part of the conductor layer 14 as a conductor pad 14a is formed in the solder resist layer 16 by a method using a known laser or a method using plasma treatment. do.

Next, as shown in FIG. 3C, a base layer is placed on a part of the conductor layer 14 on which the bump is not formed, with the conductor layer 14 on which the bump is to be formed covered with a mask (not shown). Form 50. The base layer 50 may include a gold layer, and examples thereof include a nickel layer formed on the surface of the conductor pad 14a, a palladium layer formed on the nickel layer, and a gold layer formed on the palladium layer. Can be done. In addition, a nickel layer and a gold layer formed on the nickel layer can be exemplified.

Next, as shown in FIG. 3D, copper is placed on the conductor layer 14, the surface of the solder resist layer 16 and the side surface of the opening 16a by, for example, electroless plating such as electroless copper plating. A seed layer 34 made of is formed.

Next, as shown in FIG. 3 (e), for example, electrolytic plating is performed according to a known method in a state where a part of the conductor layer 14 that does not form a bump is covered with a mask (not shown), and the seed layer is formed. A base plating layer 24 containing, for example, copper as a main component is formed in the opening 16a forming the bump on the 34, and an intermediate layer 26 containing, for example, nickel as a main component is formed on the base plating layer 24. The top plating layer 28 is formed on the surface. The top plating layer 28 has a melting point lower than that of the base plating layer 24 and is made of a metal that is melted by a reflow process and shaped into a substantially hemispherical shape, for example, a metal containing tin as a main component.

Next, as shown in FIG. 3 (f), the exposed portion of the seed layer 34 is removed by etching according to a known method. A feature of one embodiment of the present invention is that in the removal of the seed layer 34 by etching, the side end portion of the exposed portion of the base plating layer 24 made of copper is selectively etched by selectively etching copper. At the point. As a result, between the surface of the solder resist layer 16 and the side surface end portion of the base plating layer 24, a convex notch 24a is formed at the side surface end portion of the base plating layer 24 with respect to the surface of the solder resist layer 16. be able to. A printed wiring board 10 according to an embodiment of the present invention can be obtained.

As shown in FIG. 3 (f), when the printed wiring board 10 is provided with an opening 16a having a base layer 50 that does not form bumps, the base plating layer 24 by etching for removing the seed layer 34 described above is provided. In addition to forming the notch 24a at the side end of the base layer 50, the side surface of the base plating layer 24 electrically connected to the base layer 50 is further etched by the battery reaction between the base layer 50 and the base plating layer 24. Then, between the surface of the solder resist layer 16 and the side surface end portion of the base plating layer 24, a convex notch 24a is formed at the side surface end portion of the base plating layer 24 with respect to the surface of the solder resist layer 16. You can also do it.

Further, during the electrolytic plating process of FIG. 3 (e), the opening of the mask may be hem-lined. As a result, the etching processing time for forming the notch at the side end portion of the base plating layer can be shortened.

10 Printed wiring board 12 Base insulation layer 14 Conductor layer 14a Conductor pad 16 Solder resist layer 16a Opening 20 Plating bump 20-1 First bump 20-2 Second bump 24 Base plating layer 24a Notch 26 Intermediate layer 28 Top Plating layer 34 Seed layer 50 Underlayer

Claims (6)

It's a printed wiring board
With the base insulation layer,
The conductor layer formed on the base insulating layer and
A solder resist layer formed on the base insulating layer and the conductor layer, and having an opening for exposing a part of the conductor layer as a conductor pad.
With a bump formed on the conductor pad,
The bump has a base plating layer formed in the opening and a part of the surface of the solder resist layer, and a top plating layer formed on the base plating layer.
Between the surface of the solder resist layer and the side surface end of the base plating layer, the side surface end of the base plating layer is provided with a notch that is convex with respect to the surface of the solder resist layer. The printed wiring board according to claim 1, which has an intermediate layer between the base plating layer and the top plating layer. The printed wiring board according to claim 1.
Further, the bump comprises a first bump and a second bump having a smaller diameter than the first bump. The printed wiring board according to any one of claims 1 to 3.
Further, the conductor pad on which the bump is not formed is provided, and a corrosion-resistant film made of a metal different from the top plating layer is formed on the conductor pad. It is a manufacturing method of printed wiring boards.
Forming the base insulating layer and
Forming a conductor layer on the base insulating layer and
Forming a solder resist layer on the base insulating layer and the conductor layer,
To form an opening in the solder resist layer to expose a part of the conductor layer as a conductor pad.
Forming a seed layer on the conductor layer and on the surface of the solder resist layer and the side surface of the opening.
Including forming a bump on the conductor pad,
Forming the bumps includes forming a base plating layer in the opening and a part of the surface of the solder resist layer, forming a top plating layer on the base plating layer, and forming the solder resist layer. Includes etching to remove the seed layer on the surface of the
When the seed layer is removed by etching, the side end portion of the base plating layer exposed from the solder resist layer is etched so that the surface of the solder resist layer and the side end portion of the base plating layer are separated from each other. Includes forming a convex notch with respect to the surface of the solder resist layer at the side edge of the base plating layer. The method for manufacturing a printed wiring board according to claim 5.
Further, it includes forming an intermediate layer between the base plating layer and the top plating layer.

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