JP2021072337A - Manufacturing method of printed wiring board - Google Patents

Abstract

To provide a manufacturing method of a printed wiring board that prevents damage such as poor appearance in a second opening forming a base layer of a component mounting pad.SOLUTION: A manufacturing method of a printed wiring board includes forming a first opening 16a that exposes a part of a conductor layer 14 in a solder resist layer, forming a mask layer 50 on the solder resist layer and the first opening 16a, forming a second opening 16b that penetrates the mask layer 50 and the solder resist layer and exposes the remaining conductor layer except the part of the conductor layer, forming a base layer made of a metal different from the conductor layer in the second opening, and removing the mask layer 50.SELECTED DRAWING: Figure 3D

Description

The present invention relates to a method for manufacturing a printed wiring board having plated bumps.

Patent Document 1 discloses bump formation using a plating method.

JP-A-2010-129996

FIG. 1 is a cross-sectional view showing a configuration of an embodiment of a printed wiring board targeted by the manufacturing method of the present invention. In the printed wiring board 10 shown in FIG. 1, a base plating layer 24 made of Cu is formed on a first conductor pad 14a formed in a solder resist layer 16 on a base insulating layer 12 and in a first opening 16a to form a base. A top plating layer 28 made of Sn is formed on the plating layer 24 via an intermediate layer 26 made of Ni to form bumps 20. Further, a second opening 16b is formed in the solder resist layer 16 in addition to the first opening 16a for forming bumps, and a base layer 18 containing Au is formed on the second conductor pad 14b in the second opening 16b. It is formed to form a component mounting pad 40 for mounting a discrete component such as a capacitor.

When the printed wiring board 10 described above is manufactured, the base layer 18 does not exist on the first conductor pad 14a, and the base layer 18 exists only on the second conductor pad 14b. Therefore, when the second opening 16b is opened by using a laser, there is a risk of causing an appearance defect such as scratches on the surface of the solder resist layer 16 around the second opening 16b.

The method for manufacturing a printed wiring board according to the present invention includes forming a base insulating layer, forming a conductor layer on the base insulating layer, and forming a solder resist layer on the base insulating layer and the conductor layer. Forming, forming a first opening in the solder resist layer to expose a part of the conductor layer, and forming a mask layer on the solder resist layer and the first opening. A second opening that penetrates the mask layer and the solder resist layer and exposes the remaining conductor layer except for a part of the conductor layer is formed, and the inside of the second opening is made of a metal different from the conductor layer. Forming a base layer, removing the mask layer, forming a seed layer in the first opening, in the second opening, and on the solder resist layer, and forming the first Including forming a bump in the opening of the above and removing the seed layer, forming the bump forms a base plating layer in the first opening with the same metal as the conductor layer. This includes forming a top plating layer on the base plating layer via an intermediate layer, and reflowing the top plating layer to make it substantially hemispherical.

It is sectional drawing for demonstrating one Embodiment of the printed wiring board which is the object of the manufacturing method of the printed wiring board of this invention. It is sectional drawing for demonstrating another embodiment of the printed wiring board which is the object of the manufacturing method of the printed wiring board of this invention. It is sectional drawing which shows the manufacturing method of the printed wiring board of one Embodiment of this invention. It is sectional drawing which shows the manufacturing method of the printed wiring board of one Embodiment of this invention. It is sectional drawing which shows the manufacturing method of the printed wiring board of one Embodiment of this invention. It is sectional drawing which shows the manufacturing method of the printed wiring board of one Embodiment of this invention. It is sectional drawing which shows the manufacturing method of the printed wiring board of one Embodiment of this invention. It is sectional drawing which shows the manufacturing method of the printed wiring board of one Embodiment of this invention. It is sectional drawing which shows the manufacturing method of the printed wiring board of one Embodiment of this invention. It is sectional drawing which shows the manufacturing method of the printed wiring board of one Embodiment of this invention.

<About the printed wiring board manufactured by the method for manufacturing the printed wiring board of the present invention>
An embodiment of a printed wiring board manufactured according to the method for manufacturing a printed wiring board of the present invention will be described with reference to the drawings. In FIG. 1, a part of the printed wiring board 10 of the embodiment is shown in an enlarged manner. The printed wiring board 10 may be a board with a core formed by alternately laminating conductor layers and resin insulating layers having a predetermined circuit pattern on one side or both sides of a core board (not shown). When the conductor layers are formed on both sides of the core substrate, the conductor layers facing each other via the core substrate may be connected to each other via a through-hole conductor (not shown). Alternatively, the printed wiring board 10 may be a coreless substrate obtained by alternately laminating conductor layers and resin insulating layers on a support plate (not shown) instead of the core substrate, and then removing the support plate. .. In any case, as shown in FIG. 1, the printed wiring board 10 is formed on the base insulating layer 12 which is the outermost one of at least one resin insulating layer and the base insulating layer 12. A conductor layer 14 having a predetermined circuit pattern, and a solder resist layer 16 formed on the base insulating layer 12 and the conductor layer 14 are provided. In many cases, a plurality of other conductor layers and a resin insulating layer are alternately provided in the lower layer of the base insulating layer 12, but they are omitted in the drawing. However, the printed wiring board 10 may be composed of one layer of the base insulating layer 12 and one layer of the conductor layer 14.

The base insulating layer 12 can be made of, for example, a resin composition containing an inorganic filler such as silica or alumina and an epoxy resin. The conductor layer 14 is formed of a conductive metal, for example, a metal containing copper as a main component.

The solder resist layer 16 has a first opening 16a that exposes a part of the conductor layer 14 as a first conductor pad 14a, and a second opening 16a that exposes a further part of the conductor layer 14 as a second conductor pad 14b. It has an opening 16b of.

A first bump 20 is formed on the first conductor pad 14a. The first bump 20 is formed directly on the first conductor pad 14a without a base layer. The first bump 20 is formed of a seed layer 36 made of copper, for example, formed in the first opening 16a, a base plating layer 24 formed on the seed layer 36, and nickel, for example, on the base plating layer 24. It has a substantially hemispherical top plating layer 28 formed via an intermediate layer 26.

The base plating layer 24 is formed of a conductive metal of the same type as the conductor layer 14, for example, a metal containing copper as a main component. The base plating layer 24 is formed to a height exceeding the surface of the solder resist layer 16 (the surface opposite to the base insulating layer 12). As a result, the first bump 20 is stably held in the first opening 16a. The height B1 from the surface of the solder resist layer 16 to the upper end surface 24a of the base plating layer 24 is preferably in the range of 3 μm to 15 μm.

The top plating layer 28 has a melting point lower than that of the base plating layer 24, and is made of a metal that is melted by a reflow treatment and shaped into a substantially hemispherical shape as shown in FIG. 1, for example, a metal containing tin as a main component. The thickness of the top plating layer 28 (the vertical distance A1 from the lower end of the top plating layer 28 to the top of the top plating layer on the outer peripheral surface of the first bump 20) is preferably in the range of 20 μm to 40 μm. By setting the thickness of the top plating layer 28 within this range, it is good between the first bump 20 and the connection pad (not shown) of an electronic component such as a semiconductor chip or memory mounted on the printed wiring board 10. Connection reliability is obtained.

A base layer 18 is formed on the second conductor pad 14b. Examples of the base layer 18 include a nickel layer formed on the surface of the second conductor pad 14b, a palladium layer formed on the nickel layer, and a gold layer formed on the palladium layer. In addition, a nickel layer and a gold layer formed on the nickel layer can be exemplified. The base layer 18 is formed on the second conductor pad 14b in the second opening 16b, and the component mounting pad 40 for mounting a discrete component such as a capacitor is formed.

FIG. 2 is a cross-sectional view for explaining another embodiment of the printed wiring board targeted by the method for manufacturing a printed wiring board of the present invention. In the example shown in FIG. 2, the difference from the example shown in FIG. 1 is that a second bump 22 having a small diameter is formed in addition to the first bump 20 having a large diameter as a bump. The second bump 22 is formed directly on the third conductor pad 14c without a base layer. The second bump 22 is a substantially hemispherical top plating layer 34 formed on the base plating layer 30 via an intermediate layer 32 made of, for example, nickel, and a base plating layer 30 formed in the third opening 16c. And have.

The top plating layer 34 has a melting point lower than that of the base plating layer 30, and is made of a metal that is melted by a reflow treatment and shaped into a substantially hemispherical shape as shown in FIG. 2, for example, a metal containing tin as a main component. The thickness of the top plating layer 34 (the vertical distance A2 from the lower end of the top plating layer 34 to the top of the top plating layer 34 on the outer peripheral surface of the second bump 22) is preferably in the range of 20 μm to 40 μm. By setting the thickness of the top plating layer 34 in this range, it is good between the second bump 22 and the connection pad (not shown) of an electronic component such as a semiconductor chip or memory mounted on the printed wiring board 10. Connection reliability is obtained.

In the printed wiring board 10 of the embodiment shown in FIG. 2, the base plating layer 24 and the base plating layer 30 are formed together, and the upper end surface 24a of the base plating layer 24 and the upper end surface 30a of the base plating layer 30 are mutually formed. It is the same height. Further, the intermediate layer 26 and the intermediate layer 32 are formed together and have the same thickness (height) as each other. The top plating layer 28 and the top plating layer 34 are formed together and the amount of metal plating is adjusted to make the thickness (height) after melting by the reflow treatment the same.

In the example shown in FIG. 2, the first bump 20 can be used for connection with a power supply or a ground wire. The second bump 22 having a diameter smaller than that of the first bump 20 can be used for connection with the signal line.

<About the manufacturing method of the printed wiring board of one Embodiment of this invention>
Hereinafter, a method for manufacturing a printed wiring board according to an embodiment of the present invention for manufacturing the printed wiring board 10 shown in FIG. 1 will be described with reference to FIGS. 3A to 3H. The printed wiring board 10 shown in FIG. 2 is also manufactured by the same manufacturing method by forming the second bump at the time of forming the first bump.

FIG. 3A shows an intermediate in which a conductor layer 14 and a solder resist layer 16 having a predetermined circuit pattern are formed on a base insulating layer 12 by a known method. In many cases, a plurality of other conductor layers and a resin insulating layer are alternately formed in the lower layer of the base insulating layer 12, but they are omitted in the drawing. The plurality of conductor layers and the resin insulating layer can be laminated on the core substrate or on a support plate that can be removed later. However, the printed wiring board 10 may be composed of one resin insulating layer as the base insulating layer 12 and one conductor layer 14, and in this case, the resin insulating layer corresponds to the base insulating layer 12. For the base insulating layer 12, a build-up insulating resin film containing an inorganic filler such as silica or alumina and an epoxy resin can be used.

As shown in FIG. 3B, the solder resist layer 16 is formed with a first opening 16a that exposes a part of the conductor pads 14a of the conductor layer 14. The first opening 16a can be formed by a conventionally known method, for example, a method of opening using a lithography through a mask, a method of opening using a carbon dioxide gas laser, a UV-YAG laser, or the like.

As shown in FIG. 3C, the mask layer 50 is formed on the solder resist layer 16 and the first opening 16a. As the mask layer 50, for example, a PET film can be used.

As shown in FIG. 3D, a second opening 16b is formed which penetrates the mask layer 50 and the solder resist layer 16 and exposes the conductor pad 14b of the conductor layer 14. The second opening 16b can be formed by a conventionally known method, for example, a method of opening using a carbon dioxide gas laser, a UV-YAG laser, or the like. Further, on the second opening 16b, for example, a base layer 18 in which a nickel layer, a palladium layer, and a gold layer are laminated in this order is formed by plating. As described above, the conductor layer 14 and the base layer 18 are made of different metals.

As shown in FIG. 3E, after the mask layer 50 is removed, an electroless plating treatment such as an electroless copper plating treatment is performed, and the surface of the solder resist layer 16 as an intermediate and the first and second openings 16a, The seed layer 36 is formed on the side surface of the 16b, on the conductor pad 14a, and on the base layer 18.

As shown in FIG. 3F, a plating resist 38 having a predetermined pattern, which is made of, for example, a dry film resist and has an opening 38a at a site where the first bump 20 (FIG. 1) is to be formed is formed on the seed layer 36.

As shown in FIG. 3G, among the portions of the seed layer 36 exposed in the opening 38a of the plating resist 38 after the electrolytic plating treatment, on the portion of the solder resist layer 16 in the first opening 16a and The main component is a conductive metal of the same type as the conductor layer 14 forming the first conductor pad 14a, for example, copper, on the remaining portion of the seed layer 36 exposed in the opening 38a of the plating resist 38. The base plating layer 24 is formed.

As shown in FIG. 3G, for example, an electrolytic plating process is further performed to form an intermediate layer 26 made of a nickel layer on the upper end surface 24a of the base plating layer 24 in the opening 38a of the plating resist 38. The thickness of the intermediate layer 26 is preferably 7 μm or less.

As shown in FIG. 3G, for example, an electrolytic plating process is further performed to form a top plating layer 28 on the upper end surface 24a of the base plating layer 24 in the opening 38a of the plating resist 38 with an intermediate layer 26 interposed therebetween. Will be done. The top plating layer 28 has a melting point lower than that of the base plating layer 24 and is made of a metal that is melted by a reflow treatment and shaped into a substantially hemispherical shape, for example, a metal containing tin as a main component. The thickness of the top plating layer 28 is preferably in the range of 20 μm to 40 μm.

As shown in FIG. 3H, the plating resist 38 is peeled off. Further, the portion of the seed layer 36 exposed by removing the plating resist 38 is removed by etching. As a result, a component mounting pad 40 for mounting a discrete component such as a capacitor is formed. After that, a reflow process is performed, and as shown in FIG. 1, the top plating layer 28 is shaped into a substantially hemispherical shape, and a printed wiring board 10 can be obtained.

According to the method for manufacturing a printed wiring board of the present invention described above, the second opening 16b for forming the component mounting pad 40 penetrates the mask layer 50 and the solder resist layer 16 as shown in FIG. 3D. Therefore, it is possible to prevent the occurrence of poor appearance or the like in the second opening 16b forming the base layer 18.

10 Printed wiring board 12 Base insulating layer 14 Conductor layer 14a First conductor pad 14b Second conductor pad 14c Third conductor pad 16 Solder resist layer 16a First opening 16b Second opening 16c Third opening 20th 1 bump 22 2nd bump 24, 30 Base plating layer 28, 34 Top plating layer 36 Seed layer 38 Plating resist 38a Opening 40 Parts mounting pad 50 Mask layer

Claims (6)

It is a manufacturing method of printed wiring boards.
Forming the base insulation layer and
Forming a conductor layer on the base insulating layer and
Forming a solder resist layer on the base insulating layer and the conductor layer,
To form a first opening in the solder resist layer that exposes a part of the conductor layer,
Forming a mask layer on the solder resist layer and the first opening,
To form a second opening that penetrates the mask layer and the solder resist layer and exposes the remaining conductor layers except for some conductor layers.
Forming a base layer made of a metal different from the conductor layer in the second opening, and
Removing the mask layer and
To form a seed layer in the first opening, in the second opening, and on the solder resist layer.
Forming a bump in the first opening and
Removing the seed layer and forming the bumps, including forming the base plating layer in the first opening with the same metal as the conductor layer, and forming an intermediate layer on the base plating layer. It includes forming a top plating layer through the above and reflowing the top plating layer to make it substantially hemispherical. The method for manufacturing a printed wiring board according to claim 1, wherein forming the bump includes forming a first bump and a second bump having a diameter smaller than that of the first bump. .. The method for manufacturing a printed wiring board according to claim 1, wherein the conductor layer and the base plating layer are each formed from a metal containing copper as a main component. The method for manufacturing a printed wiring board according to claim 1, wherein the base layer is formed from a nickel layer, a palladium layer, and a gold layer which are sequentially laminated. The method for manufacturing a printed wiring board according to claim 1, wherein the intermediate layer is formed of a metal containing nickel as a main component. The method for manufacturing a printed wiring board according to claim 1, wherein a PET film is used as the mask layer and a carbon dioxide gas laser is used to penetrate the mask layer and the solder resist layer through the second opening. To open.

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