JP2020119966A - Mounting device - Google Patents

Mounting device Download PDF

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JP2020119966A
JP2020119966A JP2019008997A JP2019008997A JP2020119966A JP 2020119966 A JP2020119966 A JP 2020119966A JP 2019008997 A JP2019008997 A JP 2019008997A JP 2019008997 A JP2019008997 A JP 2019008997A JP 2020119966 A JP2020119966 A JP 2020119966A
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chip
substrate
mounting
recognition
recognition mark
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JP7013399B2 (en
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泰司 田村
Taiji Tamura
泰司 田村
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Toray Engineering Co Ltd
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Toray Engineering Co Ltd
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Priority to JP2019008997A priority Critical patent/JP7013399B2/en
Priority to CN202080009673.7A priority patent/CN113302725A/en
Priority to PCT/JP2020/001153 priority patent/WO2020153203A1/en
Publication of JP2020119966A publication Critical patent/JP2020119966A/en
Priority to US17/381,823 priority patent/US20210351057A1/en
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Abstract

To provide a mounting device that acquires a clear and accurate image of a board recognition mark and a chip recognition mark, obtains accurate position information, and realizes highly accurate alignment in face-up mounting in which the electrode surface of a board and the electrode surface of a chip component face in the same direction.SOLUTION: A mounting device includes elevating and lowering means for elevating and lowering a mounting head in a direction perpendicular to a board S, and recognition mechanism that recognizes chip recognition marks AC1 and AC2 and board recognition marks AS1 and AS2 from the upper side of the mounting head through the mounting head and is movable in the in-plane direction of the board, and a chip holding portion that holds a chip component C by a component of the mounting head has a light-transmitting property, and through holes 41H and 42H for recognizing the chip recognition mark and the board recognition mark are provided.SELECTED DRAWING: Figure 2

Description

本発明はチップ部品を基板に実装する実装装置および実装方法に関する。特に、基板の電極面とチップ部品の電極面が同方向を向くフェイスアップ実装を行なう実装装置および実装方法に係る。 The present invention relates to a mounting device and a mounting method for mounting a chip component on a substrate. In particular, the present invention relates to a mounting apparatus and a mounting method for performing face-up mounting in which an electrode surface of a substrate and an electrode surface of a chip component face the same direction.

配線基板等の基板に半導体チップ等のチップ部品を実装する実装形態として、基板の電極面にチップ部品の電極面を対向させて実装するフェイスダウン実装と、基板の電極面とチップ部品の電極面を同方向にして実装するフェイスアップ実装があることは良く知られている。 As a mounting form for mounting a chip component such as a semiconductor chip on a substrate such as a wiring substrate, face-down mounting in which the electrode face of the chip component is opposed to the electrode face of the substrate, and the electrode face of the substrate and the electrode face of the chip component are mounted. It is well known that there is a face-up implementation that implements in the same direction.

いずれの実装形態においても、基板の所定位置にチップ部品を実装するための高精度な位置合わせが必要であり、位置合わせのための認識マークがチップ部品および基板には付されている。ここで、チップ部品を基板の所定位置に位置合わせするのは、基板の電極とチップ部品の電極の位置関係を所定の精度で実装するためであり、フェイスダウン実装、フェイスアップ実装ともに、基板およびチップ部品において、認識マーク位置は電極位置を基準として配置され、相対位置が明確な電極面側に付されているのが一般的である。 In any of the mounting forms, it is necessary to perform highly accurate alignment for mounting the chip component at a predetermined position on the substrate, and a recognition mark for alignment is attached to the chip component and the substrate. Here, the reason why the chip component is aligned with the predetermined position of the substrate is to mount the positional relationship between the electrode of the substrate and the electrode of the chip component with predetermined accuracy. In the chip component, the recognition mark position is generally arranged on the basis of the electrode position, and is generally attached to the electrode surface side where the relative position is clear.

ここで、図4にフェイスアップ実装の例を示す。チップ部品Cには、図4(a)のように、チップ部品の認識マーク(以下チップ認識マークと記す)として、チップ認識第1マークAC1とチップ認識第2マークAC2が2つ配置されるのが一般的である。(図4の例では対角上の配置)一方、基板Sには、基板の認識マーク(以下基板認識マークと記す)として、基板認識第1マークAS1と基板認識第2マークAS2が2つ配置されるのが一般的である。(図4の例は対角上の配置)そこで、位置合わせに際しては、チップ認識第1マークAC1と基板認識第1マークAS1の位置関係およびチップ認識第1マークAC2と基板認識第2マークAS2の位置関係から、所定実装位置に対する位置ズレ量(基板面内方向の位置及び角度)を求めて、相対位置を補正してから実装している(図4(b))。 Here, FIG. 4 shows an example of face-up mounting. In the chip component C, as shown in FIG. 4A, two chip recognition first marks AC1 and chip recognition second marks AC2 are arranged as chip component recognition marks (hereinafter referred to as chip recognition marks). Is common. (Diagonal arrangement in the example of FIG. 4) On the other hand, on the substrate S, two substrate recognition first marks AS1 and substrate recognition second marks AS2 are arranged as substrate recognition marks (hereinafter referred to as substrate recognition marks). It is generally done. (Diagonal arrangement in the example of FIG. 4) Therefore, in alignment, the positional relationship between the chip recognition first mark AC1 and the substrate recognition first mark AS1 and the chip recognition first mark AC2 and the substrate recognition second mark AS2 are arranged. A positional deviation amount (position and angle in the in-plane direction of the substrate) with respect to a predetermined mounting position is obtained from the positional relationship, and the relative position is corrected before mounting (FIG. 4B).

ところで、フェイスダウン実装、フェイスアップ実装ともに、実装ヘッドが上側から保持したチップ部品を基板に圧着して実装する。このため、基板とチップ部品の電極同士を対向させて実装するフェイスダウン実装では基板認識マークとチップ認識マークを、上下2視野カメラを用いることで同時に直接観察する方法が知られている。一方、基板とチップ部品の電極を同方向として実装するフェイスアップ実装では、チップ部品の電極面が実装ヘッドに密着しているため、チップ認識マークの位置を如何に精度良く掌握するかという課題がある。 By the way, in both the face-down mounting and the face-up mounting, the chip component held from the upper side by the mounting head is pressure-bonded to the substrate for mounting. For this reason, in face-down mounting in which the electrodes of the substrate and the chip component are opposed to each other, a method of directly observing the substrate recognition mark and the chip recognition mark at the same time by using an upper and lower two-view camera is known. On the other hand, in face-up mounting in which the electrodes of the substrate and the chip component are mounted in the same direction, the electrode surface of the chip component is in close contact with the mounting head, so the issue of how to accurately grasp the position of the chip recognition mark is a problem. is there.

この課題に対して、例えば図5(a)に示す上下2視野カメラを利用する方法があり、従来用いられてきた。この手法においては、図5(b)に示すように、チップ部品Cのチップ認識第1マークAC1の位置とチップ認識第1マークAC1に最も近いチップ部品Cの角部CC1の位置関係(ΔX1およびΔY1)を別工程で予め求め(チップ認識第2マークAC2とAC2に最も近いチップ部品Cの角部CC2の位置関係(ΔX2、ΔY2)についても同様)、基板Sの基板認識第1マークAS1とチップ部品Cの角部CC1および基板認識第2マークとチップ部品Cの角部CC2とを上下2視野カメラで観察後、予め求めておいたチップ認識マークとチップ部品の角部の位置関係を演算に使用して基板Sとチップ部品Cの位置合わせを行うものである。この手法では、フェイスダウン実装と同様に上下2視野カメラを用いることが出来るものの、以下の課題が有る。(1)チップ認識マークとチップ部品Cの角部の位置関係を掌握するための装置または工程が別に必要となりコストの上昇または生産性の低下を伴う。(2)チップ部品Cの角部や端部は欠けやすく、また一般的に認識マークよりも角部の認識精度は劣るため、位置合わせの精度が低下する。 To solve this problem, for example, there is a method of using an upper and lower two-view camera shown in FIG. 5A, which has been conventionally used. In this method, as shown in FIG. 5B, the positional relationship between the position of the chip recognition first mark AC1 of the chip component C and the corner CC1 of the chip component C closest to the chip recognition first mark AC1 (ΔX1 and ΔY1) is obtained in advance in a separate process (the same applies to the positional relationship between the chip recognition second mark AC2 and the corner CC2 of the chip component C closest to AC2 (ΔX2, ΔY2)), and the board recognition first mark AS1 of the substrate S is obtained. After observing the corner CC1 of the chip component C and the second mark for recognizing the substrate and the corner CC2 of the chip component C with the upper and lower two-view camera, the previously calculated positional relationship between the chip recognition mark and the corner of the chip component is calculated. Is used to align the substrate S and the chip component C. With this method, although the upper and lower two-view camera can be used as in the face-down mounting, there are the following problems. (1) A separate device or process for grasping the positional relationship between the chip recognition mark and the corners of the chip part C is required, resulting in an increase in cost or a decrease in productivity. (2) The corners and edges of the chip component C are easily chipped, and generally, the corners are less accurately recognized than the recognition marks, so that the alignment accuracy is reduced.

このため、フェイスアップ実装でもチップ部品の認識マークを直接観察して位置合わせできる様に、実装ヘッドのチップ部品を保持する部分にガラスなど透明部材を用いる等の工夫をして、図6に示すように実装ヘッド越しに各認識マークを観察できる手法が提案されている。(例えば特許文献1、特許文献2) Therefore, in order to directly observe and align the recognition mark of the chip component even in the face-up mounting, a device such as a transparent member such as glass is used in a portion of the mounting head for holding the chip component, and the arrangement is shown in FIG. Thus, a method has been proposed in which each recognition mark can be observed through the mounting head. (For example, Patent Documents 1 and 2)

国際公開第2003/041478号公報International Publication No. 2003/041478 特開2017−208522号公報JP, 2017-208522, A

半導体部品の高密度化、多電極化、狭ピッチ化は著しく進んでおり、実装装置においては、大幅なコスト上昇や生産性の低下を伴わずに、従来よりも高精度な位置合わせを行い、実装することが求められる。 The high density, multi-electrode, and narrow pitch of semiconductor parts are progressing remarkably, and in the mounting device, alignment is performed with higher accuracy than before without a significant increase in cost or decrease in productivity. Required to be implemented.

高精度な位置合わせを実現しようとすると、位置合わせ段階において、チップ認識マークと基板認識マークとを明瞭かつ正確に観察して位置情報を得ておく必要がある。ところが、図6に示すような従来の方法では、透明部材42Tで構成されるアタッチメントツール42や透明部材41Tで構成されるヒーター部41を透過して認識することに起因して、明瞭かつ正確な画像が得られないことがある。すなわち、アタッチメントツール42やヒーター部41を構成する透明材42Tや41Tに光学的欠陥や幾何学的公差がある場合、画像の滲み、画像の歪、屈折率の差による位置ずれ等が生じて正確な位置情報が得にくくなるためである。ここで、光学的欠陥は、微小ボイド、不純物混入、加熱による変形などで、幾何学的公差は、表面粗さ、厚み寸法公差、平行度、平面度などである。 In order to realize highly accurate alignment, it is necessary to obtain the position information by observing the chip recognition mark and the substrate recognition mark clearly and accurately in the alignment step. However, in the conventional method as shown in FIG. 6, the attachment tool 42 composed of the transparent member 42T and the heater portion 41 composed of the transparent member 41T are transmitted and recognized, so that the method is clear and accurate. Images may not be obtained. That is, when the transparent material 42T or 41T that constitutes the attachment tool 42 or the heater unit 41 has an optical defect or geometrical tolerance, image blurring, image distortion, positional deviation due to a difference in refractive index, and the like may occur. This is because it becomes difficult to obtain accurate position information. Here, the optical defects are minute voids, inclusion of impurities, deformation due to heating, and the like, and the geometrical tolerances are surface roughness, thickness dimension tolerance, parallelism, flatness, and the like.

以上のように、チップを保持する実装ヘッド部に透明部材を用い、チップ認識マークと基板認識マークとを実装ヘッド越しに観察して位置合わせする方法において、如何に明瞭かつ正確な画像を取得して、高精度な位置情報を得るかということが課題となっている。 As described above, in the method of observing and aligning the chip recognition mark and the board recognition mark through the mounting head by using the transparent member for the mounting head portion that holds the chip, it is possible to obtain a clear and accurate image. Therefore, the issue is whether to obtain highly accurate position information.

本発明は、上記の課題を鑑みてなされたものであり、基板の電極面とチップ部品の電極面が同方向を向くフェイスアップ実装において、基板認識マークとチップ認識マークの明瞭かつ正確な画像を取得し、正確な位置情報を得て、高精度な位置合わせを実現させる実装装置を提供するものである。 The present invention has been made in view of the above problems, in the face-up mounting in which the electrode surface of the substrate and the electrode surface of the chip component face the same direction, a clear and accurate image of the substrate recognition mark and the chip recognition mark, (EN) A mounting apparatus that obtains and obtains accurate position information and realizes highly accurate alignment.

上記の課題を解決するために、請求項1に記載の発明は、
位置合わせ用のチップ認識マークを有するチップ部品と、位置合わせ用の基板認識マークを有する基板とを、前記チップ認識マークと前記基板認識マークが上面を向く姿勢でフェイスアップ実装する実装装置であって、
前記基板を保持する基板ステージと、
前記チップ部品を保持して前記基板に圧着させる実装ヘッドと、
前記基板に対して垂直方向に前記実装ヘッドを昇降させる昇降手段と、
前記実装ヘッドの上側から前記実装ヘッド越しに、前記チップ認識マークと前記基板認識マークを認識し、前記基板の面内方向に移動可能な認識機構とを備え、
前記実装ヘッドの構成要素で前記チップ部品を保持するチップ保持部が、光透過性を有する材料を用い、前記チップ認識マークと前記基板認識マークを認識するための貫通孔を有している実装装置を提供する。
In order to solve the above problems, the invention according to claim 1 is
A mounting device for mounting a chip component having a chip recognition mark for position alignment and a substrate having a substrate recognition mark for position alignment face-up with the chip recognition mark and the substrate recognition mark facing upward. ,
A substrate stage for holding the substrate,
A mounting head that holds the chip component and press-bonds it to the substrate,
An elevating means for elevating and lowering the mounting head in a direction perpendicular to the substrate,
From the upper side of the mounting head, over the mounting head, recognizing the chip recognition mark and the substrate recognition mark, and comprising a recognition mechanism movable in the in-plane direction of the substrate,
A mounting device in which a chip holding portion that holds the chip component by a component of the mounting head uses a material having light transparency and has a through hole for recognizing the chip recognition mark and the substrate recognition mark. I will provide a.

請求項2に記載の発明は、請求項1に記載の実装装置であって、
前記チップを保持する前記チップ保持部は、ガラスまたはセラミックスによって形成され、1mm厚での可視光および赤外光の透過率が50%以上である実装装置を提供する。
The invention described in claim 2 is the mounting apparatus according to claim 1,
The chip holding part for holding the chip is made of glass or ceramics, and provides a mounting device having a transmittance of visible light and infrared light of 50% or more in a thickness of 1 mm.

本発明により、基板の電極面とチップ部品の電極面が同方向を向くフェイスアップ実装において、コストの上昇や生産性の低下を伴わずに、基板認識マークとチップ認識マークの明瞭かつ正確な画像を取得し、正確な位置情報を得て、高精度に位置合わせを行う実装装置の実現が可能となる。 According to the present invention, in face-up mounting in which the electrode surface of the substrate and the electrode surface of the chip component face in the same direction, a clear and accurate image of the substrate recognition mark and the chip recognition mark can be obtained without increasing the cost or decreasing the productivity. It is possible to realize a mounting apparatus that acquires the position information, obtains accurate position information, and performs highly accurate positioning.

本発明の実施形態に係る(a)実装装置の外観を示す図である(b)同実装装置を別の角度から見た外観と構成要素を示す図である。It is a figure which shows the external appearance of the mounting apparatus which concerns on embodiment of this invention. (b) It is a figure which shows the external appearance and the component which looked at the same mounting apparatus from another angle. 本発明の実施形態に係る実装装置で、チップ部品と基板の位置合わせを行うための貫通孔について説明する図で、(a)ヒーター部とアタッチメントツールの貫通孔を個々の認識マークの位置に合わせて設けた例、(b)ヒーター部の貫通孔を仕様寸法範囲を全て対応できるように設け、アタッチメントツールの貫通孔を近接する認識マークを包括する形状で設けた例である。In the mounting apparatus according to the embodiment of the present invention, it is a diagram for explaining the through holes for aligning the chip component and the substrate, (a) aligning the through holes of the heater part and the attachment tool with the positions of the individual recognition marks. (B) Through holes of the heater portion are provided so as to cover the entire specification dimension range, and the through holes of the attachment tool are provided in a shape including adjacent recognition marks. 本発明の実施形態に係る実装装置で、アタッチメントツールに設けた貫通孔について説明する図で、(a)貫通孔を個々の認識マークの位置に合わせて設けた例、(b)貫通孔を近接する認識マークを包括する形状で設けた例である。In the mounting apparatus according to the embodiment of the present invention, it is a diagram for explaining the through holes provided in the attachment tool, (a) an example in which the through holes are provided in accordance with the position of each recognition mark, (b) the through holes are close This is an example in which the recognition marks are included in a shape. フェイスアップ実装について説明するもので、(a)チップ部品が基板から離れた状態を示す図、(b)チップ部品を基板に位置合わせして実装した状態を示す図である。FIGS. 4A and 4B are views for explaining face-up mounting, and FIG. 6A is a diagram showing a state where the chip component is separated from the substrate, and FIG. 6B is a diagram showing a state where the chip component is aligned and mounted on the substrate. (a)フェイスアップ実装の位置合わせに上下2視野カメラを使用している例を示す図、(b)チップ部品の認識マークとチップ部品の角部の距離を示す図である。(A) It is a figure which shows the example which uses the up-and-down two-view camera for the position alignment of face-up mounting, (b) It is a figure which shows the recognition mark of a chip component, and the distance of the corner|angular part of a chip component. 従来のフェイスアップ実装の位置合わせで、実装ヘッド越しに、透明部材を透過して各個々の認識マークを撮像取得する様子を説明する図である。It is a figure explaining a mode that a transparent member is permeate|transmitted and the individual recognition mark is imaged and acquired over the mounting head by the position alignment of the conventional face-up mounting.

本発明の実施形態について図を用いて説明する。図1(a)は本発明の実施形態における実装装置1の外観を示すもので、図1(b)は図1(a)と別の角度から見た外観図であり制御系も含めた構成要素も記している。 An embodiment of the present invention will be described with reference to the drawings. FIG. 1A shows an appearance of a mounting apparatus 1 according to an embodiment of the present invention, and FIG. 1B is an appearance view seen from a different angle from FIG. 1A, and a configuration including a control system. The elements are also noted.

実装装置1は基板Sにチップ部品Cを位置合わせしてフェイスアップ実装する装置であり、位置合わせにはチップ部品Cに記されたチップ認識第1マークAC1、チップ認識第2マークAC2と、基板Sに記された基板認識第1マークAS1、基板認識第2マークAS2を用いる。具体的には、チップ認識第1マークAC1と基板認識第1マークAS1との位置関係、およびチップ認識第2マークAC2と基板認識第2マークAS2の位置関係を許容範囲内に補正した後にチップ部品Cを基板Sに実装するものである。 The mounting device 1 is a device for aligning the chip component C on the substrate S by face-up mounting. For alignment, the chip recognition first mark AC1, the chip recognition second mark AC2, and the substrate The board recognition first mark AS1 and the board recognition second mark AS2 marked S are used. Specifically, after the positional relationship between the chip recognition first mark AC1 and the substrate recognition first mark AS1 and the positional relationship between the chip recognition second mark AC2 and the substrate recognition second mark AS2 are corrected within the allowable range, the chip component is corrected. C is mounted on the substrate S.

なお、チップ部品Cの基板Sへの実装は、一般的に、熱硬化性接着剤を介して行なう。熱硬化性接着剤は、通常、チップ部品Cの電極面(チップ認識マークのある面)とは反対側に設けておくが、基板S側に設けておいてもよい。 The chip component C is generally mounted on the substrate S via a thermosetting adhesive. The thermosetting adhesive is usually provided on the side opposite to the electrode surface of the chip component C (the surface having the chip recognition mark), but it may be provided on the substrate S side.

実装装置1は、基板ステージ2、昇降加圧ユニット3、実装ヘッド4、認識機構5、および制御部10を構成要素としている。 The mounting apparatus 1 includes a substrate stage 2, a lifting/pressurizing unit 3, a mounting head 4, a recognition mechanism 5, and a controller 10.

基板ステージ2は基板Sを保持するとともに、基板Sを面内方向(XY面内)に移動させる機能を有している。ここで、基板Sの保持に際しては真空吸着方式が適しているが、これに限定されるものではなく静電吸着方式を採用してもよい。 The substrate stage 2 has a function of holding the substrate S and moving the substrate S in the in-plane direction (in the XY plane). Here, the vacuum suction method is suitable for holding the substrate S, but the invention is not limited to this and an electrostatic suction method may be adopted.

昇降加圧ユニット3は、実装ヘッド4を基板Sの垂直方向(Z方向)に移動させる機能と、実装ヘッド4を介したチップ部品Cへの加圧力を調整する機能を有しており、実装ヘッド4をZ方向を軸とした回転方向に角度調整する機能を有していることが望ましい。 The lifting/pressurizing unit 3 has a function of moving the mounting head 4 in the vertical direction (Z direction) of the substrate S and a function of adjusting the pressure applied to the chip component C via the mounting head 4. It is desirable to have a function of adjusting the angle of the head 4 in the rotational direction about the Z direction.

実装ヘッド4はチップ部品Cを保持して基板Sに圧着するものである。実装ヘッド4は、ヘッド本体40、ヒーター部41、アタッチメントツール42を構成要素としている。ヘッド本体40は昇降加圧ユニット3と連結しており、下側にヒーター部41を保持配置している。ヒーター部41は発熱機能を有し、アタッチメントツール42を介してチップ部品Cを加熱するものである。また、ヒーター部41は図示していない減圧流路を用いてアタッチメントツール42を吸着保持する機能を有している。アタッチメントツール42はチップ部品Cを吸着保持するチップ保持部であり、チップ部品Cの形状に合わせたものが選定され、ヒーターブ部41に吸着保持される。 The mounting head 4 holds the chip component C and press-bonds it to the substrate S. The mounting head 4 includes a head body 40, a heater unit 41, and an attachment tool 42 as constituent elements. The head main body 40 is connected to the lifting/pressurizing unit 3, and the heater unit 41 is held and arranged on the lower side. The heater section 41 has a heat generating function, and heats the chip component C via the attachment tool 42. Further, the heater unit 41 has a function of sucking and holding the attachment tool 42 by using a depressurized flow path (not shown). The attachment tool 42 is a chip holding part that sucks and holds the chip component C. A tool suitable for the shape of the chip component C is selected and sucked and held by the heater part 41.

本発明において、基板認識マークおよびチップ認識マークは実装ヘッド4越しに観察するものである。このため、実装ヘッド4には基板認識マークおよびチップ認識マークを観察する画像取込部50が進入できる空間が必要であり、本実施形態においては、図1に示すようにヘッド空間40Vを設けている。すなわち、図1の実装装置1においてヘッド本体40は、ヒータ部、側板、天板によって構成される構造となっている。 In the present invention, the board recognition mark and the chip recognition mark are observed through the mounting head 4. Therefore, the mounting head 4 needs a space into which the image capturing unit 50 for observing the board recognition mark and the chip recognition mark can enter. In the present embodiment, a head space 40V is provided as shown in FIG. There is. That is, in the mounting apparatus 1 of FIG. 1, the head body 40 has a structure including a heater portion, side plates, and a top plate.

また、ヒーター部41には基板認識マークおよびチップ認識マークが観察できるような貫通孔41Hを設けている。ここで貫通孔41Hは、図2(a)のように個々の基板認識マークおよびチップ認識マークの位置に合わせて設けてもよいが、チップ部品の形状による交換を不要とするため、図2(b)のようにチップ部品Cの寸法仕様範囲が全て対応できる孔形状とすることが望ましい。 Further, the heater portion 41 is provided with a through hole 41H through which the substrate recognition mark and the chip recognition mark can be observed. Here, the through hole 41H may be provided at the position of each of the substrate recognition mark and the chip recognition mark as shown in FIG. 2A, but since it does not need to be replaced depending on the shape of the chip component, As in b), it is desirable that the hole shape is such that the dimensional specification range of the chip part C can be fully covered.

実装ヘッド4において、チップを保持する部分であるアタッチメントツール42にも、ヒーター部41と同様に、基板認識マークおよびチップ認識マークが観察できるような貫通孔42Hを設けている。貫通孔42Hは、図2(a)のように個々の基板認識マークおよびチップ認識マークの位置に合わせて設けてもよいが、図2(b)のように近接する基板認識マークとチップ認識マークの両方を包含する孔形状であってもよい。図3(a)は、基板認識マークの位置に合わせた貫通孔42HSとチップ認識マークの位置に合わせた貫通孔42HCを別に設けたアタッチメントツール42の例、図3(b)は近接する基板認識マークおよびチップ認識マークを包括する形状で貫通孔42Hを設けたアタッチメント42の例ある。 In the mounting head 4, the attachment tool 42 that holds the chip is also provided with a through hole 42H through which the substrate recognition mark and the chip recognition mark can be observed, like the heater unit 41. The through-hole 42H may be provided so as to match the positions of the individual substrate recognition marks and the chip recognition marks as shown in FIG. 2A, but the adjacent substrate recognition marks and chip recognition marks as shown in FIG. 2B. It may be a hole shape including both of the above. 3A is an example of the attachment tool 42 in which a through hole 42HS aligned with the position of the board recognition mark and a through hole 42HC aligned with the position of the chip recognition mark are separately provided, and FIG. It is an example of the attachment 42 in which a through hole 42H is provided in a shape including a mark and a chip recognition mark.

ここで、アタッチメントツール42およびヒーター部41は光の透過性を有していることが望ましい。仮に、アタッチメントツール42およびヒーター部41が光を非透過である場合、図2の状態において、チップ認識第1マークAC1およびチップ認識第2マークAC2、基板認識第1マークAS1、基板認識第2マークAS2は、を貫通孔42Hおよび貫通孔41Hを通過する光のみで撮像することになるため、光量が十分に得られず、明瞭な画像を得ることが難しくなり、結果として位置合わせ精度に悪影響を及ぼす。一方、アタッチメントツール42およびヒーター部41が光の透過性を有していれば、貫通孔42Hおよび貫通孔41Hを通過する光に加え、貫通孔42Hおよび貫通孔41Hの周辺からも光が通過するので、明瞭な画像を得るために十分な光量を得ることが可能となる。
さらに、透明部材を透過せず、ヒーター部41の貫通孔41Hおよびアタッチメントツール42の貫通孔42Hを通過した画像となるため、透明部材の光学的欠陥や幾何学的公差などの悪影響が無い、明瞭かつ正確な画像を得ることが可能となる。
Here, it is desirable that the attachment tool 42 and the heater portion 41 have light transmissivity. If the attachment tool 42 and the heater unit 41 do not transmit light, the chip recognition first mark AC1 and the chip recognition second mark AC2, the substrate recognition first mark AS1, the substrate recognition second mark in the state of FIG. Since the AS2 images only the light through the through holes 42H and the through holes 41H, it is difficult to obtain a sufficient amount of light and it is difficult to obtain a clear image. As a result, the positioning accuracy is adversely affected. Exert. On the other hand, if the attachment tool 42 and the heater unit 41 have light transmissive properties, in addition to the light passing through the through hole 42H and the through hole 41H, the light also passes through the through hole 42H and the periphery of the through hole 41H. Therefore, it is possible to obtain a sufficient amount of light for obtaining a clear image.
Furthermore, since the image does not pass through the transparent member and passes through the through hole 41H of the heater portion 41 and the through hole 42H of the attachment tool 42, there is no adverse effect such as optical defects and geometrical tolerance of the transparent member. And it becomes possible to obtain an accurate image.

ところで、アタッチメントツール42およびヒーター部41が有している光の透過性とは、図6に示した従来例で必要とされる透明性を意味するものではなく、光の屈折や散乱による濁りがあっても、光の明るさを透過させるものであれば良い。このため、材質もガラスや石英に限られるものではなく、光透過性を有するセラミックスなどであってもよい。ただし、チップ認識マークや基板認識マークを明瞭かつ正確に撮像するのに適した光量を伝達するため、1mm厚での可視光および赤外光の透過率が50%以上ある材料が望ましく、80%以上であれば更に好適である。 By the way, the light transmittance of the attachment tool 42 and the heater portion 41 does not mean the transparency required in the conventional example shown in FIG. Even if it exists, it may be one that transmits the brightness of light. Therefore, the material is not limited to glass or quartz, but may be ceramics having light transmittance. However, in order to transmit a quantity of light suitable for clearly and accurately capturing the chip recognition mark and the board recognition mark, a material having a visible light and infrared light transmittance of 50% or more at a thickness of 1 mm is desirable, and 80%. The above is more preferable.

認識機構5は、アタッチメントツール42、ヒーター部41を経た、実装ヘッド4越しに、基板認識マークおよびチップ認識マークの位置を認識して位置情報を取得するために用いられるものである。本実施形態において、認識機構5は、画像取込部50、光学系52、ならびに光学系52に連結する撮像手段53を構成要素となっている。ここで、画像取込部50は、撮像手段53が取得する認識対象の上部に配置され、認識対象を視野内に納めるものである。画像取込部50は、反射手段510により、光路の方向を変更する機能を有しており、また光学系52は光学レンズを有し、高解像度を得るために画像を拡大する機能を有している。 The recognition mechanism 5 is used for recognizing the positions of the board recognition mark and the chip recognition mark through the attachment tool 42 and the heater unit 41 and over the mounting head 4 to acquire position information. In the present embodiment, the recognition mechanism 5 includes the image capturing unit 50, the optical system 52, and the image pickup unit 53 connected to the optical system 52 as constituent elements. Here, the image capturing unit 50 is arranged above the recognition target acquired by the imaging unit 53, and stores the recognition target within the visual field. The image capturing unit 50 has a function of changing the direction of the optical path by the reflection means 510, and the optical system 52 has an optical lens and has a function of enlarging an image to obtain high resolution. ing.

また、認識機構5は図示していない駆動機構により、ヘッド空間40V内で、基板S(およびチップ部品C)の面内方向に移動することが可能な構成となっている。更に、焦点位置が調整できるように、基板Sの垂直方向(Z方向)の移動も可能であることが望ましい。 The recognition mechanism 5 is configured to be movable in the in-plane direction of the substrate S (and the chip component C) within the head space 40V by a drive mechanism (not shown). Further, it is desirable that the substrate S can be moved in the vertical direction (Z direction) so that the focus position can be adjusted.

実装ヘッド4は独立して基板Sと垂直方向に移動させることが可能な構成となっており、実装ヘッド4が垂直方向に移動しても、ヘッド空間40Vに進入した認識機構5が干渉しない寸法でヘッド空間40Vは設計されている。 The mounting head 4 is configured to be independently movable in the vertical direction with respect to the substrate S, and the recognition mechanism 5 that has entered the head space 40V does not interfere even if the mounting head 4 moves in the vertical direction. Therefore, the head space 40V is designed.

制御部10は、実装装置1の動作を制御するものであり、実装ステージ2、昇降加圧ユニット3、実装ヘッド4、認識機構5と接続している。 The control unit 10 controls the operation of the mounting apparatus 1, and is connected to the mounting stage 2, the lifting/pressurizing unit 3, the mounting head 4, and the recognition mechanism 5.

制御部10は、実体的にはCPUと記憶装置を主要な構成要素とし、必要に応じてインターフェイスを介して各装置と接続されており、プログラムを内蔵することにより、取得データを用いて演算を行ない、演算結果に応じた出力を行なうことも出来る。 The control unit 10 is essentially composed of a CPU and a storage device as main constituent elements, and is connected to each device through an interface as necessary, and by incorporating a program, the acquired data is used to perform an operation. It is also possible to carry out and output according to the calculation result.

制御部10は、実装ステージ2と接続し、実装ステージ2による基板Sの保持および解除の制御や、基板Sの面内方向移動を制御する機能を有している。 The control unit 10 is connected to the mounting stage 2 and has a function of controlling holding and releasing of the substrate S by the mounting stage 2 and controlling in-plane movement of the substrate S.

制御部10は、昇降加圧ユニット3と接続し、実装ヘッド4の基板Sと垂直方向(Z方向)の駆動およびZ方向を軸とした回転方向の駆動、ならびに加圧力を制御する機能を有している。 The control unit 10 is connected to the lifting/pressurizing unit 3 and has a function of driving the mounting head 4 in a direction perpendicular to the substrate S (Z direction) and in a rotational direction about the Z direction, and controlling a pressing force. doing.

制御部10は、実装ヘッド4と接続し、アタッチメントツール42によるチップ部品Cの吸着保持および解除、ヒーター部41の加熱温度を制御する機能を有している。 The control unit 10 is connected to the mounting head 4 and has a function of suction-holding and releasing the chip component C by the attachment tool 42 and controlling a heating temperature of the heater unit 41.

制御部10は、認識機構5と接続し、基板S(およびチップ部品C)の面内方向への駆動および基板Sと垂直方向(Z方向)の駆動を制御するとともに、撮像手段53を制御して画像データを取得する機能を有している。更に、制御部10は画像処理機能を有しており、撮像手段53が取得した画像内における認識マークの位置を求める機能を有している。 The control unit 10 is connected to the recognition mechanism 5 and controls the drive of the substrate S (and the chip component C) in the in-plane direction and the drive in the direction perpendicular to the substrate S (Z direction), and also controls the imaging unit 53. It has a function of acquiring image data. Further, the control unit 10 has an image processing function, and has a function of obtaining the position of the recognition mark in the image acquired by the imaging unit 53.

以上のような構成の実装装置1では、コストの上昇や生産性の低下を伴わずに、チップ部品Cと基板Sの位置合わせに際して、チップ認識マークおよび基板認識マークの明瞭かつ正確な画像を取得し、各認識マークの正確な位置情報が得られるので、高精度に位置合わせを行う実装装置を実現することができる。 In the mounting apparatus 1 having the above-described configuration, a clear and accurate image of the chip recognition mark and the board recognition mark is acquired when the chip component C and the board S are aligned with each other without increasing the cost and decreasing the productivity. However, since accurate position information of each recognition mark can be obtained, it is possible to realize a mounting apparatus that performs highly accurate positioning.

1 実装装置
2 基板ステージ
3 昇降加圧ユニット
4 実装ヘッド
5 認識機構
10 制御部
40 ヘッド本体
40V ヘッド空間
41 ヒーター部
41H 貫通孔(ヒーター部)
41T 透明部材(ヒーター部)
42 アタッチメントツール
42H 貫通孔(アタッチメントツール)
42T 透明部材(アタッチメントツール)
50 画像取込部
52 光学系
53 撮像手段
510 反射手段
C チップ部品
S 基板
AC1、AC2 チップ認識マーク
AS1、AS2 基板認識マーク
DESCRIPTION OF SYMBOLS 1 Mounting device 2 Substrate stage 3 Lifting/pressurizing unit 4 Mounting head 5 Recognition mechanism 10 Control part 40 Head body 40V Head space 41 Heater part 41H Through hole (heater part)
41T Transparent member (heater part)
42 Attachment Tool 42H Through Hole (Attachment Tool)
42T transparent member (attachment tool)
50 Image Capture Unit 52 Optical System 53 Imaging Device 510 Reflecting Device C Chip Component S Substrate AC1, AC2 Chip Recognition Mark AS1, AS2 Substrate Recognition Mark

Claims (2)

位置合わせ用のチップ認識マークを有するチップ部品と、位置合わせ用の基板認識マークを有する基板とを、前記チップ認識マークと前記基板認識マークが上面を向く姿勢でフェイスアップ実装する実装装置であって、
前記基板を保持する基板ステージと、
前記チップ部品を保持して前記基板に圧着させる実装ヘッドと、
前記基板に対して垂直方向に前記実装ヘッドを昇降させる昇降手段と、
前記実装ヘッドの上側から前記実装ヘッド越しに、前記チップ認識マークと前記基板認識マークを認識し、前記基板の面内方向に移動可能な認識機構とを備え、
前記実装ヘッドの構成要素で前記チップ部品を保持するチップ保持部が、光透過性を有する材料を用い、前記チップ認識マークと前記基板認識マークを認識するための貫通孔を有している実装装置。
A mounting device for mounting a chip component having a chip recognition mark for position alignment and a substrate having a substrate recognition mark for position alignment face-up with the chip recognition mark and the substrate recognition mark facing upward. ,
A substrate stage for holding the substrate,
A mounting head that holds the chip component and press-bonds it to the substrate,
An elevating means for elevating and lowering the mounting head in a direction perpendicular to the substrate,
From the upper side of the mounting head, over the mounting head, recognizing the chip recognition mark and the substrate recognition mark, and comprising a recognition mechanism movable in the in-plane direction of the substrate,
A mounting device in which a chip holding portion that holds the chip component by a component of the mounting head uses a material having light transparency and has a through hole for recognizing the chip recognition mark and the substrate recognition mark. ..
請求項1に記載の実装装置であって、
前記チップを保持する前記チップ保持部は、ガラスまたはセラミックスによって形成され、1mm厚での可視光および赤外光の透過率が50%以上である実装装置。
The mounting apparatus according to claim 1, wherein
The chip holder for holding the chip is made of glass or ceramics, and the mounting apparatus has a visible light and infrared light transmittance of 50% or more in a thickness of 1 mm.
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PCT/JP2020/001153 WO2020153203A1 (en) 2019-01-23 2020-01-16 Mounting device and mounting method
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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10145094A (en) * 1996-11-14 1998-05-29 Nec Corp Parts mounting device
JP2017208522A (en) * 2016-05-11 2017-11-24 パナソニックIpマネジメント株式会社 Component mounting device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10145094A (en) * 1996-11-14 1998-05-29 Nec Corp Parts mounting device
JP2017208522A (en) * 2016-05-11 2017-11-24 パナソニックIpマネジメント株式会社 Component mounting device

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