JP2019530091A5 - - Google Patents
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- JP2019530091A5 JP2019530091A5 JP2019515353A JP2019515353A JP2019530091A5 JP 2019530091 A5 JP2019530091 A5 JP 2019530091A5 JP 2019515353 A JP2019515353 A JP 2019515353A JP 2019515353 A JP2019515353 A JP 2019515353A JP 2019530091 A5 JP2019530091 A5 JP 2019530091A5
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- JP
- Japan
- Prior art keywords
- data
- valid
- offset
- memory
- vector
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Links
- 239000013598 vector Substances 0.000 claims 22
- 238000000034 method Methods 0.000 claims 13
- 230000004044 response Effects 0.000 claims 1
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US15/273,366 | 2016-09-22 | ||
| US15/273,366 US10162752B2 (en) | 2016-09-22 | 2016-09-22 | Data storage at contiguous memory addresses |
| PCT/US2017/044227 WO2018057115A1 (en) | 2016-09-22 | 2017-07-27 | Data storage at contiguous memory addresses |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2019530091A JP2019530091A (ja) | 2019-10-17 |
| JP2019530091A5 true JP2019530091A5 (enExample) | 2020-08-20 |
| JP6985377B2 JP6985377B2 (ja) | 2021-12-22 |
Family
ID=59558510
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2019515353A Active JP6985377B2 (ja) | 2016-09-22 | 2017-07-27 | 連続するメモリアドレスにおけるデータ記憶 |
Country Status (8)
| Country | Link |
|---|---|
| US (1) | US10162752B2 (enExample) |
| EP (1) | EP3516774B1 (enExample) |
| JP (1) | JP6985377B2 (enExample) |
| KR (1) | KR102561619B1 (enExample) |
| CN (1) | CN109690956B (enExample) |
| CA (1) | CA3033960A1 (enExample) |
| ES (1) | ES2967320T3 (enExample) |
| WO (1) | WO2018057115A1 (enExample) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111158757B (zh) * | 2019-12-31 | 2021-11-30 | 中昊芯英(杭州)科技有限公司 | 并行存取装置和方法以及芯片 |
| US11281554B2 (en) * | 2020-03-17 | 2022-03-22 | Samsung Electronics Co., Ltd. | System and method for in-memory computation |
Family Cites Families (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0731669B2 (ja) * | 1986-04-04 | 1995-04-10 | 株式会社日立製作所 | ベクトル・プロセツサ |
| JP2000022707A (ja) | 1998-07-03 | 2000-01-21 | Fujitsu Ltd | データ伝送方法、およびデータ伝送システム |
| EP1267580A3 (en) | 2001-05-28 | 2009-06-03 | Panasonic Corporation | Data transfer device |
| US7889765B2 (en) | 2005-11-30 | 2011-02-15 | Time Warner Cable Inc. | Apparatus and methods for utilizing variable rate program streams in a network |
| WO2008127458A2 (en) | 2006-12-06 | 2008-10-23 | Fusion Multisystems, Inc. (Dba Fusion-Io) | Apparatus, system, and method for a shared, front-end, distributed raid |
| JP5262177B2 (ja) * | 2008-02-22 | 2013-08-14 | 富士通株式会社 | ベクトル積の並列処理方法 |
| US9280342B2 (en) * | 2011-07-20 | 2016-03-08 | Oracle International Corporation | Vector operations for compressing selected vector elements |
| US9792117B2 (en) * | 2011-12-08 | 2017-10-17 | Oracle International Corporation | Loading values from a value vector into subregisters of a single instruction multiple data register |
| US9697174B2 (en) * | 2011-12-08 | 2017-07-04 | Oracle International Corporation | Efficient hardware instructions for processing bit vectors for single instruction multiple data processors |
| US9274937B2 (en) | 2011-12-22 | 2016-03-01 | Longitude Enterprise Flash S.A.R.L. | Systems, methods, and interfaces for vector input/output operations |
| CN107729018A (zh) * | 2012-09-28 | 2018-02-23 | 英特尔公司 | 循环向量化方法和设备 |
| US9268571B2 (en) * | 2012-10-18 | 2016-02-23 | Qualcomm Incorporated | Selective coupling of an address line to an element bank of a vector register file |
| US9606961B2 (en) * | 2012-10-30 | 2017-03-28 | Intel Corporation | Instruction and logic to provide vector compress and rotate functionality |
| US11113054B2 (en) * | 2013-09-10 | 2021-09-07 | Oracle International Corporation | Efficient hardware instructions for single instruction multiple data processors: fast fixed-length value compression |
| US10133570B2 (en) * | 2014-09-19 | 2018-11-20 | Intel Corporation | Processors, methods, systems, and instructions to select and consolidate active data elements in a register under mask into a least significant portion of result, and to indicate a number of data elements consolidated |
| US9697176B2 (en) * | 2014-11-14 | 2017-07-04 | Advanced Micro Devices, Inc. | Efficient sparse matrix-vector multiplication on parallel processors |
-
2016
- 2016-09-22 US US15/273,366 patent/US10162752B2/en active Active
-
2017
- 2017-07-27 EP EP17749310.3A patent/EP3516774B1/en active Active
- 2017-07-27 KR KR1020197007881A patent/KR102561619B1/ko active Active
- 2017-07-27 WO PCT/US2017/044227 patent/WO2018057115A1/en not_active Ceased
- 2017-07-27 ES ES17749310T patent/ES2967320T3/es active Active
- 2017-07-27 CA CA3033960A patent/CA3033960A1/en active Pending
- 2017-07-27 JP JP2019515353A patent/JP6985377B2/ja active Active
- 2017-07-27 CN CN201780055220.6A patent/CN109690956B/zh active Active
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