JP2013239099A5 - - Google Patents

Download PDF

Info

Publication number
JP2013239099A5
JP2013239099A5 JP2012113031A JP2012113031A JP2013239099A5 JP 2013239099 A5 JP2013239099 A5 JP 2013239099A5 JP 2012113031 A JP2012113031 A JP 2012113031A JP 2012113031 A JP2012113031 A JP 2012113031A JP 2013239099 A5 JP2013239099 A5 JP 2013239099A5
Authority
JP
Japan
Prior art keywords
page
data
physical
less
written
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2012113031A
Other languages
English (en)
Japanese (ja)
Other versions
JP2013239099A (ja
JP5983019B2 (ja
Filing date
Publication date
Application filed filed Critical
Priority to JP2012113031A priority Critical patent/JP5983019B2/ja
Priority claimed from JP2012113031A external-priority patent/JP5983019B2/ja
Priority to US13/888,038 priority patent/US9483396B2/en
Priority to CN2013101730399A priority patent/CN103425589A/zh
Publication of JP2013239099A publication Critical patent/JP2013239099A/ja
Publication of JP2013239099A5 publication Critical patent/JP2013239099A5/ja
Application granted granted Critical
Publication of JP5983019B2 publication Critical patent/JP5983019B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

JP2012113031A 2012-05-17 2012-05-17 制御装置、記憶装置、記憶制御方法 Expired - Fee Related JP5983019B2 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2012113031A JP5983019B2 (ja) 2012-05-17 2012-05-17 制御装置、記憶装置、記憶制御方法
US13/888,038 US9483396B2 (en) 2012-05-17 2013-05-06 Control apparatus, storage device, and storage control method
CN2013101730399A CN103425589A (zh) 2012-05-17 2013-05-10 控制装置、存储装置以及存储控制方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2012113031A JP5983019B2 (ja) 2012-05-17 2012-05-17 制御装置、記憶装置、記憶制御方法

Publications (3)

Publication Number Publication Date
JP2013239099A JP2013239099A (ja) 2013-11-28
JP2013239099A5 true JP2013239099A5 (enExample) 2015-03-19
JP5983019B2 JP5983019B2 (ja) 2016-08-31

Family

ID=49582285

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2012113031A Expired - Fee Related JP5983019B2 (ja) 2012-05-17 2012-05-17 制御装置、記憶装置、記憶制御方法

Country Status (3)

Country Link
US (1) US9483396B2 (enExample)
JP (1) JP5983019B2 (enExample)
CN (1) CN103425589A (enExample)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6034183B2 (ja) * 2012-12-27 2016-11-30 株式会社東芝 半導体記憶装置
KR101703984B1 (ko) * 2014-07-18 2017-02-09 주식회사 큐램 메모리 처리 방법, 및 메모리 처리 시스템
US10102118B2 (en) * 2014-10-30 2018-10-16 Toshiba Memory Corporation Memory system and non-transitory computer readable recording medium
US11347637B2 (en) 2014-10-30 2022-05-31 Kioxia Corporation Memory system and non-transitory computer readable recording medium
US10331551B2 (en) 2014-12-29 2019-06-25 Toshiba Memory Corporation Information processing device and non-transitory computer readable recording medium for excluding data from garbage collection
FR3045182A1 (fr) * 2015-12-15 2017-06-16 Stmicroelectronics Rousset Procede et dispositif de gestion d'espace memoire
US10289550B1 (en) 2016-12-30 2019-05-14 EMC IP Holding Company LLC Method and system for dynamic write-back cache sizing in solid state memory storage
US10338983B2 (en) 2016-12-30 2019-07-02 EMC IP Holding Company LLC Method and system for online program/erase count estimation
US11069418B1 (en) 2016-12-30 2021-07-20 EMC IP Holding Company LLC Method and system for offline program/erase count estimation
US10403366B1 (en) * 2017-04-28 2019-09-03 EMC IP Holding Company LLC Method and system for adapting solid state memory write parameters to satisfy performance goals based on degree of read errors
US10290331B1 (en) 2017-04-28 2019-05-14 EMC IP Holding Company LLC Method and system for modulating read operations to support error correction in solid state memory
US11029879B2 (en) * 2018-01-29 2021-06-08 Samsung Electronics Co., Ltd Page size synchronization and page size aware scheduling method for non-volatile memory dual in-line memory module (NVDIMM) over memory channel
WO2020129612A1 (ja) * 2018-12-19 2020-06-25 ソニー株式会社 情報処理装置、情報処理方法および情報処理プログラム
CN109918381B (zh) * 2019-03-13 2021-06-11 北京百度网讯科技有限公司 用于存储数据的方法和装置
JP7366795B2 (ja) * 2020-02-14 2023-10-23 キオクシア株式会社 メモリシステムおよび制御方法
KR20220073306A (ko) * 2020-11-26 2022-06-03 에스케이하이닉스 주식회사 스토리지 장치 및 그 동작 방법
US12271615B2 (en) * 2022-03-11 2025-04-08 Samsung Electronics Co., Ltd. Systems and methods for checking data alignment between applications, file systems, and computational storage devices

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05151068A (ja) * 1991-11-29 1993-06-18 Toshiba Corp メモリカード装置
US8108590B2 (en) * 2000-01-06 2012-01-31 Super Talent Electronics, Inc. Multi-operation write aggregator using a page buffer and a scratch flash block in each of multiple channels of a large array of flash memory to reduce block wear
JP4713867B2 (ja) * 2004-09-22 2011-06-29 株式会社東芝 メモリコントローラ，メモリ装置及びメモリコントローラの制御方法
JP5162846B2 (ja) 2005-07-29 2013-03-13 ソニー株式会社 記憶装置、コンピュータシステム、および記憶システム
JP5076411B2 (ja) 2005-11-30 2012-11-21 ソニー株式会社 記憶装置、コンピュータシステム
CN101176074B (zh) * 2005-12-09 2010-12-15 松下电器产业株式会社 非易失性存储器件，写入数据的方法，和读出数据的方法
US7428610B2 (en) * 2006-02-14 2008-09-23 Atmel Corporation Writing to flash memory
JP2008033788A (ja) * 2006-07-31 2008-02-14 Matsushita Electric Ind Co Ltd 不揮発性記憶装置、データ記憶システム、およびデータ記憶方法
US7953954B2 (en) * 2007-01-26 2011-05-31 Micron Technology, Inc. Flash storage partial page caching
JP4537420B2 (ja) 2007-04-02 2010-09-01 株式会社リコー Ｓｉｍｄ型マイクロプロセッサ
JP4356782B2 (ja) 2007-09-12 2009-11-04 ソニー株式会社 メモリ装置、メモリ制御方法、およびプログラム
US20120089765A1 (en) * 2010-10-07 2012-04-12 Huang Shih-Chia Method for performing automatic boundary alignment and related non-volatile memory device
JP5319723B2 (ja) * 2011-03-24 2013-10-16 株式会社東芝 メモリシステムおよびプログラム
US9898402B2 (en) * 2011-07-01 2018-02-20 Micron Technology, Inc. Unaligned data coalescing
US20130031301A1 (en) * 2011-07-29 2013-01-31 Stec, Inc. Backend organization of stored data
US8924631B2 (en) * 2011-09-15 2014-12-30 Sandisk Technologies Inc. Method and system for random write unalignment handling
KR20130096881A (ko) * 2012-02-23 2013-09-02 삼성전자주식회사 플래시 메모리 장치

Similar Documents

Publication Publication Date Title
JP2013239099A5 (enExample)
US20170308329A1 (en) Methods and Systems for Processing PRP/SGL Entries
TWI409633B (zh) 快閃記憶體儲存裝置、其控制器與資料寫入方法
TWI512608B (zh) 包括訓練、資料組織及／或蔭蔽之記憶體系統及方法
US9760433B2 (en) Flash memory control apparatus utilizing buffer to temporarily storing valid data stored in storage plane, and control system and control method thereof
US20150378888A1 (en) Controller, flash memory apparatus, and method for writing data into flash memory apparatus
JP2015506041A5 (enExample)
US20150347012A1 (en) System and method of interleaving data retrieved from first and second buffers
WO2019200142A1 (en) Replay protected memory block command queue
JP2014026635A5 (enExample)
JP2013235531A5 (enExample)
JP2017501504A5 (enExample)
JP2010287303A5 (enExample)
JP2017518574A5 (enExample)
JP2016186828A5 (ja) 記憶装置および記憶制御方法
CN105389268B (zh) 资料储存系统及其运作方法
US9971549B2 (en) Method of operating a memory device
CN105095104A (zh) 数据缓存处理方法及装置
US20130151752A1 (en) Bit-level memory controller and a method thereof
CN104281545B (zh) 一种数据读取方法及设备
KR102384962B1 (ko) 반도체 메모리 장치
AU2015203828B2 (en) Implementing enhanced performance with read before write to phase change memory to avoid write cancellations
JP2011008790A5 (enExample)
JP6332756B2 (ja) データ処理方法、装置、およびシステム
CN106155567A (zh) 存储器装置及其操作方法