JP2019220707A - Liquid crystal display unit - Google Patents

Abstract

To provide a manufacturing method capable of achieving cost reduction in a semiconductor device with a capacitative element which has a high opening ratio and an increase a charge capacity, or to provide a manufacturing method capable of achieving cost reduction in a semiconductor device which can reduce power consumption.SOLUTION: In a method for concurrently manufacturing a transistor and a capacitative element, a channel protective film and a metal oxide film with a channel region included in the transistor, and one electrode of the capacitative element are formed according to a process using a multi-level gradation photomask.SELECTED DRAWING: Figure 3

Description

  The present invention relates to a method for manufacturing a semiconductor device having a transistor, for example.

Transistors used in many flat panel displays typified by liquid crystal display devices and light-emitting display devices are formed of a silicon semiconductor such as amorphous silicon, single crystal silicon, or polycrystalline silicon formed on a glass substrate. . Further, a transistor using the silicon semiconductor is also used for an integrated circuit (IC) and the like.

In recent years, a technique of using a metal oxide having semiconductor characteristics for a transistor instead of a silicon semiconductor has attracted attention. Note that a metal oxide having semiconductor characteristics is referred to as an oxide semiconductor in this specification.

For example, a technology is disclosed in which a transistor including zinc oxide or an In—Ga—Zn-based oxide is manufactured as an oxide semiconductor and the transistor is used for a switching element of a pixel of a display device (Patent Document 1). reference).

JP 2007-123861 A

Display devices sold in the market tend to have a screen size as large as 40 inches or more on a diagonal, and further developments are being made with a view to screen sizes of 120 inches or more on a diagonal. For this reason, the glass substrate used for the display device has been increasing in area to the eighth generation or more.

With an increase in the area of a glass substrate, a photomask used in an exposure apparatus used in a manufacturing process of a display device has been increased, and the price of the photomask has become a problem. For example,
Since the photomask of the 10th generation is as expensive as 100 million yen or more, development of a manufacturing process in which the number of photomasks is reduced is required.

On the other hand, in a liquid crystal display device which is an example of a display device, as the charge capacity of the capacitor is increased, the period during which the orientation of liquid crystal molecules of the liquid crystal element can be kept constant in an electric field is increased. Can be. In a display device for displaying a still image, an increase in the period can reduce the number of times of rewriting image data, and can reduce power consumption.

Therefore, in order to increase the charge capacity of the capacitor, there is a method of increasing the area occupied by the capacitor, specifically, increasing the area where the pair of electrodes overlap. However, in the above display device, when the area of the light-blocking conductive film is increased in order to increase the area where the pair of electrodes overlap, the aperture ratio of the pixel is reduced and the display quality of an image is reduced.

An object of one embodiment of the present invention is to provide a manufacturing method which can reduce cost in a semiconductor device having a high aperture ratio and a capacitor capable of increasing charge capacity. . Another object of one embodiment of the present invention is to provide a manufacturing method capable of reducing cost in a semiconductor device capable of reducing power consumption.

According to one embodiment of the present invention, in a manufacturing process of a channel protection transistor, a metal oxide film having a channel region and a channel protection film are formed by a process using a multi-tone photomask. . Another embodiment of the present invention is a method for simultaneously manufacturing a transistor and a capacitor, in which a metal oxide film and a channel protective film each including a channel region included in the transistor are formed by a process using a multi-tone photomask. And one electrode of a capacitor.

According to one embodiment of the present invention, a gate electrode and a gate insulating film are formed over an insulating surface; a first metal oxide film and a first insulating film are formed over the gate insulating film; A first mask having a region having a first thickness, and a region having a second thickness greater than the first thickness;
A second mask having the same thickness as the first thickness is formed, and the first insulating film and the first metal oxide film are etched using the first mask and the second mask, respectively. A second insulating film and a third insulating film, and a second metal oxide film and a third metal oxide film are formed. Next, after processing the first mask to form a third mask and removing the second mask, the second insulating film is etched using the third mask to form a second metal. A fourth insulating film is formed over the oxide film, and the third insulating film over the third metal oxide film is removed. Next, a fifth insulating film formed of a nitride insulating film is formed over the second metal oxide film, the third metal oxide film, the fourth insulating film, and the gate insulating film. After an opening is formed in the fifth insulating film by etching a part of the insulating film of No. 5, a pair of electrodes in contact with the second metal oxide film and a wiring in contact with the third metal oxide film are formed. Form. Next, a method for manufacturing a semiconductor device in which a light-transmitting conductive film which is connected to one of the pair of electrodes and overlaps with part of the third metal oxide film is formed over the fifth insulating film. is there.

According to one embodiment of the present invention, a gate electrode and a gate insulating film are formed over an insulating surface; a first metal oxide film and a first insulating film are formed over the gate insulating film; A first mask having a region having a first thickness, and a region having a second thickness greater than the first thickness;
A second mask having the same thickness as the first thickness is formed. Next, the first insulating film and the first metal oxide film are etched using the first mask and the second mask,
Forming an insulating film and a third insulating film, and a second metal oxide film and a third metal oxide film. Next, after processing the first mask to form a third mask and removing the second mask, the second insulating film is etched using the third mask to form a second metal. A fourth insulating film is formed over the oxide film, and the third insulating film over the third metal oxide film is removed. Next, a pair of electrodes in contact with the second metal oxide film and a wiring in contact with the third metal oxide film are formed, and the pair of electrodes, a fourth insulating film, a third metal oxide film, A fifth insulating film formed of a nitride insulating film is formed over the wiring. Next, part of the fifth insulating film is etched to form an opening in the fifth insulating film, which is then connected to one of the pair of electrodes and is connected to part of the third metal oxide film. This is a method for manufacturing a semiconductor device in which overlapping light-transmitting conductive films are formed.

Note that after forming the fifth insulating film, an opening is formed in the gate insulating film and the fifth insulating film, a part of the gate electrode is exposed, and a light-transmitting conductive film is formed. A conductive film which is connected to the gate electrode and overlaps with the second metal oxide film may be formed.

A transistor includes a gate electrode, a gate insulating film, a second metal oxide film, a fourth insulating film serving as a channel protective film, and a pair of electrodes. Further, a capacitor is formed using the third metal oxide film, the fifth insulating film, and the light-transmitting conductive film.

Further, the third metal oxide film is in contact with a fifth insulating film formed using a nitride insulating film. Further, the third metal oxide film has conductivity and functions as one electrode of the capacitor.

Further, the second metal oxide film and the third metal oxide film have different hydrogen concentrations, and the third metal oxide film has a higher hydrogen concentration than the second metal oxide film.

Further, the first metal oxide film, the second metal oxide film, and the third metal oxide film have a light-transmitting property. In addition, the first metal oxide film, the second metal oxide film, and the third metal oxide film include at least one of In, Ga, and Zn. In addition, the first metal oxide film, the second metal oxide film, and the third metal oxide film are formed of the same metal element.

Further, a region of the gate insulating film which is in contact with the second metal oxide film and the third metal oxide film is formed using an oxide insulating film. A region of the fourth insulating film which is in contact with the second metal oxide film is formed using an oxide insulating film.

Part of the gate insulating film is formed of a nitride insulating film, and the nitride insulating film and the fifth
Are in contact with each other.

  Further, the fourth insulating film includes an oxide insulating film from which part of oxygen is released by heating.

According to one embodiment of the present invention, cost can be reduced in a method for manufacturing a semiconductor device including a capacitor with a high aperture ratio and an increase in charge capacity. In a method for manufacturing a semiconductor device capable of reducing power consumption, cost can be reduced.

4A and 4B are a block diagram and a circuit diagram illustrating one embodiment of a semiconductor device. FIG. 13 is a top view illustrating one embodiment of a transistor. FIG. 13 is a cross-sectional view illustrating one embodiment of a method for manufacturing a transistor. FIG. 13 is a cross-sectional view illustrating one embodiment of a method for manufacturing a transistor. FIG. 13 is a cross-sectional view illustrating one embodiment of a method for manufacturing a transistor. FIG. 13 is a top view illustrating one embodiment of a transistor. FIG. 13 is a cross-sectional view illustrating one embodiment of a method for manufacturing a transistor. FIG. 13 is a cross-sectional view illustrating one embodiment of a method for manufacturing a transistor. FIG. 4 is a cross-sectional view illustrating one embodiment of a transistor. FIG. 13 is a top view illustrating one embodiment of a transistor. FIG. 4 is a cross-sectional view illustrating one embodiment of a transistor. FIG. 14 illustrates an electronic device. FIG. 4 illustrates temperature dependence of resistivity.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. However, the present invention is not limited to the following description, and it is easily understood by those skilled in the art that the form and details can be variously changed without departing from the spirit and scope of the present invention. Therefore, the present invention is not construed as being limited to the description of the following embodiments and examples. In the embodiments and examples described below, the same portions or portions having similar functions are denoted by the same reference numerals or the same hatch pattern in different drawings, and description thereof is not repeated. I do.

In each drawing described in this specification, the size of each component, the thickness of the film, or the region is
May be exaggerated for clarity. Therefore, it is not necessarily limited to the scale.

In addition, terms such as first, second, and third used in this specification are given in order to avoid confusion of components, and are not limited in number. Therefore, for example, the description can be made by appropriately replacing “first” with “second” or “third”.

In addition, the functions of the “source” and the “drain” may be switched when the direction of current changes in circuit operation. Therefore, in this specification, the terms “source” and “drain” can be used interchangeably.

The voltage refers to a potential difference between two points, and the potential refers to electrostatic energy (electric potential energy) of a unit charge in an electrostatic field at a certain point. However, in general, a potential difference between a potential at a certain point and a reference potential (for example, a ground potential) is simply referred to as a potential or a voltage, and the potential and the voltage are often used as synonyms. For this reason, in this specification, unless otherwise specified, a potential may be read as a voltage or a voltage may be read as a potential.

In this specification, in the case where an etching step is performed after the photolithography step, a mask formed in the photolithography step is removed.

(Embodiment 1)
In this embodiment, it is an object to provide a manufacturing method which can reduce cost in a semiconductor device having a high aperture ratio and a capacitor capable of increasing charge capacity. Another object of one embodiment of the present invention is to provide a manufacturing method capable of reducing cost in a semiconductor device capable of reducing power consumption.

Note that in a transistor including an oxide semiconductor which is a metal oxide having semiconductor characteristics, oxygen vacancies are an example of a defect which leads to poor electrical characteristics of the transistor. For example, in a transistor including an oxide semiconductor film including an oxygen vacancy in the film, the threshold voltage is easily changed in a negative direction, and the transistor is likely to be normally on.
This is because electric charge is generated due to oxygen vacancies contained in the oxide semiconductor film and the resistance is reduced. When a transistor has normally-on characteristics, various problems occur, such as a malfunction easily occurring during operation and an increase in power consumption during non-operation. In addition, there is a problem in that the change in electrical characteristics of the transistor, typically, the amount of change in the threshold voltage is increased due to a change over time or a stress test.

Further, not only oxygen vacancies but also impurities such as silicon and carbon which are constituent elements of an insulating film cause defective electrical characteristics of the transistor. For this reason, when the impurity is mixed into the oxide semiconductor film, the resistance of the oxide semiconductor film is reduced, so that the electrical characteristics of the transistor, typically the threshold voltage, are reduced by a change over time or a stress test. There is a problem that the amount of fluctuation increases.

Therefore, in this embodiment, in addition to the problem to be solved by the invention, in a semiconductor device including a transistor including an oxide semiconductor film, oxygen vacancies in an oxide semiconductor film serving as a channel region and oxide semiconductor film Another object is to reduce the impurity concentration of a semiconductor.

In this embodiment, a method for manufacturing a semiconductor device will be described with reference to drawings as a method for solving one of the above problems. In this embodiment, a metal oxide film having a channel region and a channel protective film are formed by a process using a multi-tone photomask.

FIG. 1A illustrates an example of a semiconductor device. The semiconductor device illustrated in FIG.
Scanning line driving circuit 14, signal line driving circuit 16, and m scanning lines 17, each of which is arranged in parallel or substantially in parallel and whose potential is controlled by scanning line driving circuit 14, Or n signal lines 19 which are arranged substantially in parallel and whose potential is controlled by the signal line driving circuit 16. Further, the pixel section 11 has a plurality of pixels 13 arranged in a matrix. In addition, along the signal line 19, each has a capacitance line 15 which is arranged in parallel or substantially in parallel. Note that the capacitance lines 15 may be arranged in parallel or substantially parallel along the scanning lines 17. Further, the scanning line driving circuit 14 and the signal line driving circuit 16 may be collectively referred to as a driving circuit unit.

Each scanning line 17 is electrically connected to n pixels 13 arranged in any one of the pixels 13 arranged in m rows and n columns in the pixel portion 11. Each signal line 19 has m rows and n rows.
Of the pixels 13 arranged in a column, the pixel 13 is electrically connected to m pixels 13 arranged in any one of the columns. m and n are each an integer of 1 or more. Further, each capacitance line 15 is electrically connected to n pixels 13 arranged in any one of the pixels 13 arranged in m rows and n columns. When the capacitance lines 15 are arranged in parallel or substantially parallel along the signal lines 19, the capacitance lines 15 are arranged in any one of the pixels 13 arranged in m rows and n columns. Electrically connected to the m pixels 13 thus set.

FIGS. 1B and 1C illustrate an example of a circuit configuration that can be used for the pixel 13 in the display device illustrated in FIG. 1A.

The pixel 13 illustrated in FIG. 1B includes a liquid crystal element 21, a transistor 22, and a capacitor 25.

The potential of one of the pair of electrodes of the liquid crystal element 21 is appropriately set according to the specifications of the pixel 13.
The alignment state of the liquid crystal element 21 is set by data to be written. In addition, a plurality of pixels 1
A common potential (common potential) may be applied to one of a pair of electrodes of the liquid crystal element 21 included in each of the liquid crystal elements 3. Alternatively, different potentials may be applied to one of the pair of electrodes of the liquid crystal element 21 for each pixel 13 in each row.

The liquid crystal element 21 is an element that controls transmission or non-transmission of light by an optical modulation action of liquid crystal. Note that the optical modulation action of the liquid crystal is controlled by an electric field (including a horizontal electric field, a vertical electric field, or an oblique electric field) applied to the liquid crystal. The liquid crystal element 21 includes a nematic liquid crystal, a cholesteric liquid crystal, a smectic liquid crystal, a thermotropic liquid crystal, a lyotropic liquid crystal, a ferroelectric liquid crystal, an antiferroelectric liquid crystal, and the like.

As a driving method of the display device having the liquid crystal element 21, for example, a TN mode, a VA mode, and an ASM (Axially Symmetric Aligned Micro-cell) are used.
l) mode, OCB (Optically Compensated Birefrin)
gence) mode, MVA mode, PVA (Patterned Vertical)
Alignment mode, IPS mode, FFS mode, or TBA (Trans)
(verse Bend Alignment) mode or the like. Note that the invention is not limited thereto, and various types of liquid crystal elements and driving methods can be used.

Further, a liquid crystal element may be formed using a liquid crystal composition including a liquid crystal exhibiting a blue phase (Blue Phase) and a chiral agent. A liquid crystal exhibiting a blue phase has a short response time of 1 msec or less and is optically isotropic, so that alignment treatment is not required and viewing angle dependence is small.

In the structure of the pixel 13 illustrated in FIG. 1B, one of a source electrode and a drain electrode of the transistor 22 is electrically connected to the signal line 19, and the other is electrically connected to the other of the pair of electrodes of the liquid crystal element 21. Connected. Further, a gate electrode of the transistor 22 is electrically connected to the scanning line 17. The transistor 22 has a function of controlling writing of a data signal by being turned on or off. Note that as the transistor 22, the transistor described in any of Embodiments 1 to 7 can be used.

In the structure of the pixel 13 illustrated in FIG. 1B, one of a pair of electrodes of a capacitor 25 is electrically connected to a capacitor line 15 to which a potential is supplied, and the other is a pair of electrodes of a liquid crystal element 21. It is electrically connected to the other. Note that the value of the potential of the capacitor line 15 is appropriately set according to the specifications of the pixel 13. The capacitor 25 has a function as a storage capacitor for storing written data.

For example, in the display device including the pixels 13 in FIG. 1B, the pixels 13 in each row are sequentially selected by the scanning line driver circuit 14, the transistors 22 are turned on, and data of a data signal is written.

The pixel 13 to which the data is written enters a holding state when the transistor 22 is turned off. By sequentially performing this for each row, an image can be displayed.

The pixel 13 illustrated in FIG. 1C includes a transistor 33 that performs switching of a display element.
A transistor 22 for controlling driving of the pixel, a transistor 35, a capacitor 25,
A light emitting element 31.

As an example of the light-emitting element 31, there is an element including an anode, a cathode, and an EL layer interposed between the anode and the cathode. As an example of the EL layer, a layer including a material capable of emitting light (fluorescence) from a singlet exciton, a layer including a material capable of emitting light (phosphorescence) from a triplet exciton, and a singlet exciton A layer having a material capable of emitting light (fluorescence) from the substrate and a material capable of emitting light (phosphorescence) from the triplet exciton.

One of a source electrode and a drain electrode of the transistor 33 is electrically connected to a signal line 19 to which a data signal is supplied. Further, a gate electrode of the transistor 22 is electrically connected to the scan line 17 to which a gate signal is supplied.

The transistor 33 has a function of controlling writing of a data signal by being turned on or off.

One of a source electrode and a drain electrode of the transistor 22 is electrically connected to a wiring 37 functioning as an anode line, and the other of the source electrode and the drain electrode of the transistor 22 is electrically connected to one electrode of the light-emitting element 31. Is done. Further, a gate electrode of the transistor 22 is electrically connected to the other of the source electrode and the drain electrode of the transistor 33 and one electrode of the capacitor 25.

The transistor 22 has a function of controlling a current flowing to the light-emitting element 31 by being turned on or off.

One of a source electrode and a drain electrode of the transistor 35 is connected to a wiring 39 to which a data reference potential is applied. The other of the source electrode and the drain electrode of the transistor 35 is connected to one electrode of the light-emitting element 31 and the other of the capacitor 25. Are electrically connected. further,
The gate electrode of the transistor 35 is electrically connected to the scan line 17 to which a gate signal is supplied.

The transistor 35 has a function of adjusting a current flowing to the light-emitting element 31. For example, when the internal resistance of the light emitting element 31 increases due to deterioration or the like of the light emitting element 31, the transistor 35
By monitoring the current flowing through the wiring 39 to which one of the source electrode and the drain electrode is connected, the current flowing through the light emitting element 31 can be corrected. The potential applied to the wiring 39 can be, for example, 0V.

One of a pair of electrodes of the capacitor 25 is electrically connected to the other of the source electrode and the drain electrode of the transistor 33 and the gate electrode of the transistor 22. The other of the pair of electrodes of the capacitor 25 is The other of the electrode and the drain electrode, and the light emitting element 3
1 is electrically connected to one of the electrodes.

In the structure of the pixel 13 illustrated in FIG. 1C, the capacitor 25 has a function as a storage capacitor for storing written data.

One of a pair of electrodes of the light-emitting element 31 is electrically connected to the other of the source electrode and the drain electrode of the transistor 35, the other of the capacitor 25, and the other of the source and drain electrodes of the transistor 22. The other of the pair of electrodes of the light-emitting element 31 is electrically connected to a wiring 41 functioning as a cathode.

As the light emitting element 31, for example, an organic electroluminescent element (also referred to as an organic EL element) or the like can be used. However, the light emitting element 31 is not limited to this, and an inorganic EL element made of an inorganic material may be used.

Note that one of the wiring 37 and the wiring 41 is supplied with the high power supply potential VDD, and the other is supplied with the low power supply potential VSS. In the structure illustrated in FIG. 1C, a high power supply potential VDD is supplied to the wiring 37 and a low power supply potential VSS is supplied to the wiring 41.

In the display device having the pixels 13 in FIG. 1C, the scanning line driving circuit 14 controls the pixels 1 in each row.
3 are sequentially selected, the transistor 22 is turned on, and the data of the data signal is written.

The pixel 13 to which the data is written enters a holding state when the transistor 22 is turned off. Further, the transistor 22 is connected to the capacitor 25, so that written data can be held for a long time. In addition, the amount of current flowing between the source electrode and the drain electrode is controlled by the transistor 33, and the light-emitting element 31 emits light at a luminance corresponding to the amount of current flowing. By sequentially performing this for each row, an image can be displayed.

Note that in this specification and the like, a display element, a display device which is a device including a display element, a light-emitting element, and a light-emitting device which is a device including a light-emitting element use various modes or have various elements. Can be. Examples of a display element, a display device, a light-emitting element, or a light-emitting device include an EL (electroluminescence) element (an EL element containing an organic substance and an inorganic substance, an organic EL element, an inorganic EL element), and a transistor (a transistor that emits light according to current). , Electron-emitting device, liquid crystal device, electronic ink, electrophoresis device, digital micromirror device (D
Some display media, such as MD (Digital Micro Shutter) and DMS (Digital Micro Shutter), have a display medium whose contrast, brightness, reflectance, transmittance, and the like are changed by an electromagnetic effect. An example of a display device using an EL element includes an EL display. As an example of a display device using an electron-emitting device, a field emission display (FED) or SE
D-type flat display (SED: Surface-connection Elec)
Tron-emitter Display). Examples of a display device using a liquid crystal element include a liquid crystal display (a transmissive liquid crystal display, a transflective liquid crystal display, a reflective liquid crystal display, a direct-view liquid crystal display, and a projection liquid crystal display). An example of a display device using electronic ink or an electrophoretic element includes electronic paper.

Next, a specific example of an element substrate of a liquid crystal display device using a liquid crystal element for the pixel 13 will be described. Here, FIG. 2 illustrates a top view of the pixel 13 illustrated in FIG.

In FIG. 2, a conductive film 103 functioning as a scanning line is provided to extend in a direction (horizontal direction in the drawing) substantially orthogonal to a signal line. The conductive film 117a functioning as a signal line is provided so as to extend in a direction substantially perpendicular to the scanning lines (vertical direction in the drawing). The conductive film 117c functioning as a capacitor line is provided to extend in a direction parallel to the signal line. Note that the conductive film 103 serving as a scan line is electrically connected to the scan line driver circuit 14 (see FIG. 1A), and serves as a conductive film 117a serving as a signal line and a capacitor line. The conductive film 117c is electrically connected to the signal line driver circuit 16 (see FIG. 1A).

The transistor 22 is provided in a region where the scanning line and the signal line intersect. The transistor 22 includes a conductive film 103 functioning as a gate electrode and a gate insulating film (not illustrated in FIG. 2).
And a metal oxide film 109a formed over the gate insulating film and having a channel region formed thereon, and conductive films 117a and 117b functioning as source and drain electrodes. Note that the conductive film 103 also functions as a scan line, and a region overlapping with the metal oxide film 109a functions as a gate electrode of the transistor 22. The conductive film 117a also functions as a signal line, and a region overlapping with the metal oxide film 109a functions as a source electrode or a drain electrode of the transistor 22. Further, in FIG. 2, the scanning line has an end located outside the end of the metal oxide film 109a in the top surface shape. Therefore, the scanning line functions as a light-blocking film that blocks light from a light source such as a backlight. As a result, the metal oxide film 109a included in the transistor is not irradiated with light, so that a change in electrical characteristics of the transistor can be suppressed.
Further, since the metal oxide film 109a is formed using a metal oxide having semiconductor characteristics, a channel region is formed in the metal oxide film 109a.

The conductive film 117b is electrically connected to the light-transmitting conductive film 119 which functions as a pixel electrode.

The capacitor 25 includes a metal oxide film 109 c formed over the gate insulating film, a light-transmitting conductive film 119 functioning as a pixel electrode, and a dielectric film formed over the transistor 22. It consists of a body membrane. Since the metal oxide film 109c has a light-transmitting property, the capacitor 25 has a light-transmitting property. In addition, the metal oxide film 109c functioning as one of a pair of electrodes of the capacitor 25 is formed in the conductive film 117 functioning as a capacitor line in the opening 115c.
c.

As described above, since the capacitor 25 has a light-transmitting property, the capacitor 25 is large in the pixel 13 (
(Large area). Therefore, it is possible to increase the aperture ratio and to increase the charge capacity to 50% or more, preferably 55% or more, preferably 60% or more, and to obtain a semiconductor device with an increased charge capacity. For example, in a high-resolution semiconductor device such as a liquid crystal display device, the area of a pixel is reduced, and the area of a capacitor is also reduced. For this reason, in a high-resolution semiconductor device, the charge capacity stored in the capacitor decreases. However, since the capacitor 25 described in this embodiment has a light-transmitting property, by providing the capacitor in a pixel, the aperture ratio can be increased while a sufficient charge capacity is obtained in each pixel. Typically, the pixel density is 200 ppi or more, further 300 ppi or more, and even 500 pp
It can be suitably used for a high-resolution semiconductor device of i or more.

The pixel 13 illustrated in FIG. 2 has a shape in which a side parallel to the conductive film 117a serving as a signal line is shorter than a side parallel to the conductive film 103 serving as a scan line, and a capacitor line. The conductive film 117c functioning as a signal line is provided to extend in a direction parallel to the conductive film 117a functioning as a signal line. As a result, the area of the conductive film 117c occupying the pixel 13 can be reduced, so that the aperture ratio can be increased.

Further, according to one embodiment of the present invention, the aperture ratio can be increased even in a high-resolution display device, so that light from a light source such as a backlight can be used efficiently, and power consumption of the display device is reduced. be able to.

Next, a method for manufacturing an element substrate of a display device will be described with reference to the cross-sectional views taken along dashed lines AB and CD shown in FIG. 2.

As shown in FIG. 3A, a conductive film 102 is formed over a substrate 101. Next, a mask 131 is formed over the conductive film 102 by a photolithography process using a first photomask.

There is no particular limitation on the material of the substrate 101 or the like, but it is necessary that the substrate have at least enough heat resistance to withstand heat treatment performed later. For example, a glass substrate, a ceramic substrate, a quartz substrate, a sapphire substrate, or the like may be used as the substrate 101. Alternatively, a single crystal semiconductor substrate formed using silicon, silicon carbide, or the like, a polycrystalline semiconductor substrate, a compound semiconductor substrate such as silicon germanium, an SOI substrate, or the like can be used. May be used as the substrate 101. When a glass substrate is used as the substrate 101, the sixth generation (1500 mm × 1850 mm) and the seventh generation (1870 m
mx 2200mm), 8th generation (2200mm x 2400mm), 9th generation (2400m
A large-sized display device can be manufactured by using a large-area substrate such as a m × 2800 mm) or a tenth generation (2950 mm × 3400 mm).

Alternatively, a flexible substrate may be used as the substrate 101 and the conductive film 102 may be formed directly over the flexible substrate. Alternatively, a separation layer is provided between the substrate 101 and the conductive film 102, an element portion including a transistor is formed over the separation layer, and the element portion is separated from the substrate 101 in the separation layer.
It may be transferred to another substrate. As a result, the element portion can be provided over a substrate having low heat resistance or a substrate having flexibility.

The conductive film 102 becomes a conductive film 103 which functions as a gate electrode later. Therefore, the conductive film 102 is appropriately formed using a conductive material which can be used for a gate electrode. Conductive film 10
2 is formed using a metal element selected from aluminum, chromium, copper, tantalum, titanium, molybdenum, and tungsten, an alloy containing the above-described metal element as a component, an alloy combining the above-described metal elements, or the like. Can be. Further, a metal element selected from one or more of manganese and zirconium may be used. The conductive film 102 may have a single-layer structure or a stacked structure of two or more layers. For example, a single-layer structure of an aluminum film containing silicon, a two-layer structure in which an aluminum film is stacked on a titanium film, a two-layer structure in which a titanium film is stacked on a titanium nitride film, and a two-layer structure in which a tungsten film is stacked on a titanium nitride film. A layer structure, a two-layer structure in which a tungsten film is stacked on a tantalum nitride film or a tungsten nitride film, a two-layer structure in which a copper film is stacked on a titanium film, a titanium film, and an aluminum film on the titanium film, There is a three-layer structure on which a titanium film is formed. In addition, a film of an element selected from titanium, tantalum, tungsten, molybdenum, chromium, neodymium, scandium,
Alternatively, an alloy film or a nitride film obtained by combining a plurality of them may be used.

In addition, the conductive film 102 is formed using an indium tin oxide film, an indium oxide film containing tungsten oxide, an indium zinc oxide film containing tungsten oxide, an indium oxide film containing titanium oxide, and an indium tin oxide film containing titanium oxide. Alternatively, a film formed using a light-transmitting conductive material such as an indium zinc oxide film or an indium tin oxide film to which silicon oxide is added can be used. Further, a stacked structure of a film formed using the light-transmitting conductive material and a film formed using the above metal element can be employed.

Here, a 100-nm-thick tungsten film is formed as the conductive film 102 by a sputtering method. Next, a mask is formed by a photolithography process.

Next, part of the conductive film 102 is etched using the mask 131, so that the conductive film 103 functioning as a gate electrode is formed. The conductive film 102 can be etched by a dry etching method and / or a wet etching method. After that, the mask 131 is removed (see FIG. 3B).

Here, the tungsten film formed as the conductive film 102 is dry-etched with the use of a mask, so that the conductive film 103 functioning as a gate electrode is formed.

Next, as illustrated in FIG. 3C, the insulating film 105, the insulating film 106, the metal oxide film 108,
An insulating film 110 is formed in order. Next, masks 133 and 135 are formed over the insulating film 110 by a photolithography process using a second photomask. Here, a multi-tone mask is used as the second photomask.

A multi-tone photomask is a mask that can perform exposure with multi-step light amounts, and typically includes a gray-tone mask, a half-tone mask, and the like. In the gray-tone mask, a light-shielding portion and a diffraction grating are formed over a light-transmitting substrate. In the diffraction grating, the interval between light transmission areas such as slits, dots, and meshes is an interval equal to or less than the resolution limit of light used for exposure, and the configuration controls light transmittance. In the halftone mask, a light-shielding portion and a semi-transmissive portion are formed over a light-transmitting substrate. The transmittance of light used for exposure is controlled by the semi-transmissive portion.

By using a multi-tone mask, exposure can be performed with three levels of light amounts: an exposed area, a semi-exposed area, and an unexposed area. As a result, with the use of a multi-tone photomask, a resist mask having a plurality of (typically, two) thicknesses can be formed in one exposure and development step. Can be reduced. Here, by using a multi-tone photomask in the step of forming the metal oxide films 109a and 109b and the insulating film 111c, the number of photomasks can be reduced by one.

The insulating films 105 and 106 are to be gate insulating films later. Further, the insulating film 105
Is preferably formed using a nitride insulating film in order to prevent impurities from diffusing into the metal oxide film 108 from the substrate 101 and the conductive film 103 functioning as a gate electrode. The insulating film 106 is in contact with the metal oxide film 108. In order to reduce an interface state between the insulating film 106 and the metal oxide film 108, the insulating film 106 is preferably formed using an oxide insulating film.

The insulating film 105 may be formed using silicon nitride, silicon nitride oxide, aluminum nitride, aluminum nitride oxide, or the like, and is provided as a stacked layer or a single layer.

The insulating film 106 may be formed using silicon oxide, silicon oxynitride, aluminum oxide, hafnium oxide, gallium oxide, a Ga-Zn-based metal oxide, or the like, and is provided as a stacked layer or a single layer.

Further, as the insulating film 106, a hafnium silicate (HfSiO _x), hafnium silicate to which nitrogen is added _{(HfSi x O y N z)} , hafnium aluminate to which nitrogen is added _{(HfAl x O y N z)} , hafnium oxide, The gate leakage of the transistor can be reduced by using a high-k material such as yttrium oxide.

The total thickness of the insulating films 105 and 106 is preferably greater than or equal to 5 nm and less than or equal to 400 nm, more preferably greater than or equal to 10 nm and less than or equal to 300 nm, and more preferably greater than or equal to 50 nm and less than or equal to 250 nm.

As the insulating film 105 and the insulating film 106, a CVD method, a sputtering method, an evaporation method, a coating method, or the like can be used as appropriate.

By providing the insulating film 105 formed using a nitride insulating film as part of the gate insulating film, impurities from the conductive film 103 functioning as a gate electrode, typically, hydrogen, nitrogen, an alkali metal, or an alkaline earth can be obtained. It is possible to prevent a kind of metal or the like from moving to the metal oxide film 109a.

Further, by providing the insulating film 106 formed of an oxide insulating film on the metal oxide film 109a side as a gate insulating film, defect levels at an interface between the gate insulating film and the metal oxide film 109a can be reduced. It is. As a result, a transistor with less deterioration in electrical characteristics can be obtained.

The metal oxide film 108 is typically formed using an In-Ga oxide film, an In-Zn oxide film, an In-
There is a metal oxide film such as an -M-Zn oxide film (M is Al, Ga, Ti, Y, Zr, La, Ce, or Nd). Note that since the metal oxide film has semiconductor characteristics, it can be referred to as an oxide semiconductor.

Note that when the metal oxide film 108 is an In-M-Zn oxide film and the sum of In and M is 100 atomic%, the atomic ratio of In and M is preferably 25 atomic%.
M is larger than mic%, M is less than 75 atomic%, and more preferably, In is 34 atom%.
mic% and M is less than 66 atomic%.

The energy gap of the metal oxide film 108 is 2 eV or more, preferably 2.5 eV or more, more preferably 3 eV or more. By using a metal oxide with a wide energy gap in this manner, off-state current of a transistor formed later can be reduced.

As the metal oxide film 108, a metal oxide film with low carrier density is used. For example, the metal oxide film 108 has a carrier density of 1 × 10 ¹⁷ / cm ³ or less, preferably 1 × 10 ¹⁷ / cm ^3.
15 pieces / cm ³ or less, more preferably 1 × 10 ¹³ pieces / cm ³ or less, more preferably 1 × 10 ¹³ pieces / cm ³ or less
A metal oxide film of × 10 ¹¹ / cm ³ or less is used.

The thickness of the metal oxide film 108 is from 3 nm to 200 nm, preferably from 3 nm to 10 nm.
0 nm or less, more preferably 3 nm or more and 50 nm or less.

The metal oxide film 108 can be formed by a sputtering method, a coating method, a pulsed laser deposition method, a laser ablation method, or the like.

In the case where the metal oxide film 108 is formed by a sputtering method, an RF power supply, an AC power supply, a DC power supply, or the like can be used as appropriate as a power supply for generating plasma.

As a sputtering gas, a rare gas (typically, argon), oxygen, or a mixed gas of a rare gas and oxygen is used as appropriate. Note that in the case of a mixed gas of a rare gas and oxygen, it is preferable to increase the gas ratio of oxygen to the rare gas.

When the metal oxide film 108 is an In-M-Zn oxide film (M is Al, Ti, Ga, Y, Zr,
In the case of La, Ce, Nd, or Hf), the atomic ratio of the metal element of the sputtering target used for forming the In-M-Zn oxide film is such that the atomic ratio of the metal element is In: M: Z.
When n = x ₁ : y ₁ : z _{1 ,} x ₁ / y ₁ is 1/3 or more and 6 or less, further 1 or more and 6 or less, and z ₁ / y ₁ is 1/3 or more and 6 or less. And more preferably 1 or more and 6 or less. Note that when z ₁ / y ₁ is 1 or more and 6 or less, a CAAC-OS (C Axis Aligned Crystalline Oxid) described later as the metal oxide film 108 is formed.
eSemiconductor) film is easily formed. As typical examples of the atomic ratio of the target metal element, In: M: Zn = 1: 1: 1, In: M: Zn = 3: 1: 2,
In: M: Zn = 5: 5: 6 and the like. Note that each of the atomic ratios of the metal oxide films 108 to be formed includes, as an error, a fluctuation of ± 40% of the atomic ratio of the metal element included in the above target.

In order to obtain a high-purity metal oxide film 108, it is necessary not only to evacuate the chamber to a high vacuum, but also to increase the purity of the sputtering gas. Oxygen gas or argon gas used as a sputtering gas has a dew point of −40 ° C. or lower, preferably −80 ° C. or lower, more preferably −100 ° C.
In the following, it is possible to prevent moisture and the like from being taken into the metal oxide film as much as possible by using a gas which is highly purified to −120 ° C. or less.

The insulating film 110 is preferably an oxide insulating film in order to reduce an interface state at an interface with the metal oxide film 108. Typically, the insulating film 110 may be formed using silicon oxide, silicon oxynitride, aluminum oxide, hafnium oxide, gallium oxide, a Ga-Zn-based metal oxide, or the like, and is provided as a stacked layer or a single layer.

In addition, it is preferable that part or all of the insulating film 110 be formed using an oxide insulating film containing oxygen at a higher proportion than the stoichiometric composition. In an oxide insulating film containing oxygen at a higher proportion than the stoichiometric composition, part of oxygen is released by heating. An oxide insulating film containing more oxygen than oxygen that satisfies the stoichiometric composition is formed using a TDS (Thermal
In Desorption Spectroscopy analysis, the surface temperature was 100 ° C.
The desorption amount of oxygen as converted to oxygen atoms in the heat treatment at 700 to 700 ° C. or 100 to 500 ° C. is 1.0 × 10 ¹⁸ atoms / cm ³ or more, preferably 3.0 × 1
The oxide insulating film has a thickness of 0 ²⁰ atoms / cm ³ or more.

In addition, the insulating film 110 preferably has a small amount of defects. Typically, according to ESR measurement, the spin density of a signal appearing at g = 2.001 derived from a dangling bond of silicon is 1.5 × 10 ¹⁸ spins / cm less than ^3, more 1 × ¹⁰ 18 spins / cm ³ or ^{less, 1 × 10 17 spins / cm} 3 or less, and more preferably below the detection limit.

The thickness of the insulating film 110 is from 30 nm to 500 nm, preferably from 50 nm to 400 nm.
nm or less.

When the insulating film 110 is formed using an oxide insulating film containing more oxygen than oxygen that satisfies the stoichiometric composition, oxygen released from the insulating film 110 by heat treatment can be formed using a metal oxide film. 108. As a result, oxygen vacancies contained in the metal oxide film 108 can be reduced.

  The insulating film 110 can be formed by a sputtering method, a CVD method, or the like.

In the case where the insulating film 110 is formed by a CVD method, a deposition gas containing silicon and an oxidizing gas are preferably used as a source gas. Representative examples of the deposition gas containing silicon include silane, disilane, trisilane, and silane fluoride. As the oxidizing gas,
There are oxygen, ozone, nitrous oxide, nitrogen dioxide and the like.

In the case where the insulating film 110 is formed using an oxide insulating film containing oxygen that exceeds the stoichiometric composition, the substrate placed in a vacuum-evacuated processing chamber of a plasma CVD apparatus has a temperature of 180 ° C. 280 ° C or lower, more preferably maintained at 200 ° C or higher and 240 ° C or lower,
A source gas is introduced into the processing chamber, and the pressure in the processing chamber is set to 100 Pa or more and 250 Pa or less, more preferably 100 Pa or more and 200 Pa or less.
7 W / cm ² or more and 0.5 W / cm ² or less, more preferably 0.25 W / cm ² or more.
A silicon oxide film or a silicon oxynitride film can be formed under a condition of supplying high-frequency power of 35 W / cm ² or less.

By supplying high-frequency power having the above power density in the reaction chamber having the above pressure as a condition for forming the insulating film 110, decomposition efficiency of the source gas in the plasma is increased, oxygen radicals are increased, and oxidation of the source gas proceeds. Therefore, the oxygen content in the insulating film 110 is higher than the stoichiometric composition. On the other hand, in a film formed at the above substrate temperature, the bonding force between silicon and oxygen is weak, so that part of oxygen in the film is eliminated by heat treatment in a later step. As a result, the insulating film 110 which contains oxygen at a higher proportion than the stoichiometric composition and from which part of oxygen is released by heating can be formed.

Note that the insulating film 110 has a multilayer structure of a first insulating film and a second insulating film, and is formed using an oxide insulating film through which oxygen can pass as the first insulating film. An oxide insulating film which contains more oxygen than oxygen that satisfies the stoichiometric composition as a film and part of oxygen is released by heating may be formed. With the stacked structure, in the step of forming the second insulating film, the first insulating film serves as a protective film of the metal oxide film. As a result, the second insulating film can be formed using high-frequency power with a high power density while reducing damage to the metal oxide film.

Alternatively, after an insulating film is formed by a sputtering method, a CVD method, or the like, the insulating film 110 can be formed by adding oxygen to the insulating film. Note that as a method for adding oxygen to the insulating film, there are an ion doping method, an ion implantation method, and the like. Alternatively, oxygen can be added to the insulating film by exposing the insulating film to plasma containing oxygen generated in an oxidizing gas atmosphere.

Here, a 400-nm-thick silicon nitride film is formed as the insulating film 105 by a CVD method. Further, as the insulating film 106, a 50-nm-thick silicon oxynitride film is formed by a CVD method. Further, as the metal oxide film 108, an I-Ga-Zn oxide target (In: Ga: Zn = 1: 1: 1) is formed by a sputtering method with a thickness of 35 nm.
An n-Ga-Zn oxide film is formed. As the insulating film 110, silane with a flow rate of 200 sccm and nitrous oxide with a flow rate of 4000 sccm are used as source gases,
A 400-nm-thick silicon oxynitride film is formed as the insulating film 110 by a plasma CVD method in which Pa and the substrate temperature are set to 220 ° C. and high-frequency power of 1500 W is supplied to the parallel plate electrodes using a high-frequency power supply of 27.12 MHz. . The plasma CVD apparatus has an electrode area of 6
This is a parallel plate type plasma CVD apparatus with a capacity of 000 cm ² , and the supplied power is 0.25 W / cm ² when converted into power per unit area (power density). Further, masks 133 and 135 are formed using a halftone mask.

Next, a part of the insulating film 110 is etched using the masks 133 and 135 to obtain a structure shown in FIG.
As shown in D), insulating films 111a and 111b are formed. Dry etching or /
The insulating film 110 can be etched by using a wet etching method. Next, a part of the metal oxide film 108 is etched using the masks 133 and 135 to form metal oxide films 109a and 109b. The metal oxide film 108 can be etched by a dry etching method and / or a wet etching method.

Here, part of each of the insulating film 110 and the metal oxide film 108 is etched by a dry etching method.

Next, the masks 133 and 135 are processed. Here, processing is performed so that the size of the mask 133 is reduced and the mask 135 is removed. Here, the masks 133 and 135 are subjected to plasma treatment in which the masks 133 and 135 are exposed to plasma generated in an atmosphere containing oxygen.
Process 35. As an atmosphere containing oxygen, there is an atmosphere containing an oxidizing gas such as oxygen, ozone, nitrous oxide, or nitrogen dioxide. Note that the masks 133 and 135 may be exposed to plasma generated with a bias applied to the substrate 101 side. An ashing apparatus is an example of an apparatus for performing such plasma processing.

Here, the masks 133 and 135 are processed by exposing the masks 133 and 135 to plasma generated in an atmosphere containing oxygen.

As a result, as shown in FIG. 3D, a mask 137 in which the mask 133 is retracted can be formed. Further, the mask 135 is removed, and the insulating film 111b is exposed. Note that in FIG. 3D, broken lines correspond to the masks 133 and 135 shown in FIG. 3C, respectively.

Next, part of the insulating film 111a is etched using the mask 137 to form the insulating film 111c and to remove the insulating film 111b as illustrated in FIG. The insulating films 111a and 111b can be etched using a dry etching method and / or a wet etching method. Note that here, the insulating film 111a is etched, and the metal oxide films 109a and 109b are not etched.
It is preferable to use conditions where the etching rates of 9a and 109b are small.

Here, a part of the insulating film 111a is etched and the insulating film 111b is removed by a dry etching method.

As a result, the insulating film 111c functioning as a channel protective film can be formed. Further, since no mask is formed over the insulating film 111b, the insulating film 111b is removed, and the surface of the metal oxide film 109b is exposed. Note that the insulating film 106 is formed using an oxide insulating film similarly to the insulating film 110. Therefore, the insulating film 106 is also etched in this step, and an insulating film 107a whose end is substantially coincident with the metal oxide film 109a is formed between the insulating film 105 and the metal oxide film 109a. Further, between the insulating film 105 and the metal oxide film 109b, an insulating film 107b whose end substantially coincides with the metal oxide film 109b is formed.

Through the above steps, the metal oxide films 109a and 109b including the channel region of the transistor and the insulating film 111c serving as a channel protective film can be formed with one photomask.

Note that in the etching step for forming the insulating film 111c, the metal oxide film 109
In regions a and 109b, the regions exposed to the plasma are damaged, and oxygen vacancies are formed. Thus, the conductivity of the region of the metal oxide film 109a which is not covered with the insulating film 111c and the conductivity of the metal oxide film 109b are increased.

Next, heat treatment is performed. The temperature of the heat treatment is typically higher than or equal to 150 ° C. and lower than the substrate strain point, preferably higher than or equal to 300 ° C. and lower than or equal to 500 ° C., preferably higher than or equal to 320 ° C. and lower than or equal to 470 ° C.

For the heat treatment, an electric furnace, an RTA apparatus, or the like can be used. By using an RTA apparatus, heat treatment can be performed at a temperature equal to or higher than the strain point of the substrate for a short time. Therefore, the heat treatment time can be reduced.

The heat treatment includes nitrogen, oxygen, and ultra-dry air (water content is 20 ppm or less, preferably 1 p.
pm or less, preferably 10 ppb or less) or a rare gas (argon, helium, etc.)
It may be performed under the atmosphere. Note that it is preferable that hydrogen, water, and the like be not contained in the above nitrogen, oxygen, ultra-dry air, or the rare gas.

By the heat treatment, part of oxygen contained in the insulating film 111c is transferred to the metal oxide film 109a, so that oxygen vacancies contained in the metal oxide film 109a can be reduced.

Note that in the case where the insulating film 110 is formed over the metal oxide film 108 while heating, oxygen can be transferred to the metal oxide film 108 and oxygen vacancies contained in the metal oxide film 108 can be compensated. Therefore, the heat treatment need not be performed.

Here, heat treatment is performed at 450 ° C. for one hour in a nitrogen atmosphere, and then heat treatment is performed at 450 ° C. for one hour in a nitrogen and oxygen atmosphere.

Next, as shown in FIG. 4A, the insulating film 105, the insulating film 107, the metal oxide film 109a
, 109b and the insulating film 111c, an insulating film 112 is formed. Next, a mask 139 is formed over the insulating film 112 by a photolithography process using a third photomask.

As the insulating film 112, a nitride insulating film is provided. Silicon nitride,
There are silicon nitride oxide, aluminum nitride, aluminum nitride oxide, and the like. As the nitride insulating film, a nitride insulating film containing hydrogen may be formed.

The thickness of the insulating film 112 is from 10 nm to 400 nm, preferably from 50 nm to 3 nm.
00 nm or less.

The insulating film 112 can be formed by a sputtering method, a CVD method, or the like. Alternatively, after an insulating film is formed by a sputtering method, a CVD method, or the like, hydrogen may be added to the insulating film. Note that as a method for adding hydrogen to the insulating film, an ion doping method, an ion implantation method, or the like can be given. Alternatively, hydrogen can be added to an insulating film by exposing the insulating film to plasma generated in a gas atmosphere containing hydrogen.

Here, a 100-nm-thick silicon nitride film is formed as the insulating film 112 by a plasma CVD method using silane, ammonia, and nitrogen as a source gas.

Oxygen vacancies are formed in the metal oxide films 109a and 109b due to plasma damage generated when the insulating film 112 is formed over the insulating film 111c. Therefore, the metal oxide film 10
In 9a, the conductivity of the region not covered with the insulating film 111c and the metal oxide film 109b is increased. In addition, when a nitride insulating film containing hydrogen is used as the insulating film 112, hydrogen moves from the insulating film 112 to the metal oxide films 109a and 109b. The movement of hydrogen to oxygen vacancies generates electrons serving as carriers. As a result, the metal oxide film 109b has high conductivity and becomes a metal oxide film 109c having conductivity. In addition, the metal oxide film 10
9c functions as one electrode of the capacitive element 25.

Note that the metal oxide film 109a is in contact with the insulating film 113 outside the insulating film 111c. Since the insulating film 111c is an oxide insulating film, the metal oxide film 10 in contact with the insulating film 111c
9a functions as a channel region of the transistor. In the metal oxide film 109a, a region in contact with the insulating film 113 has high conductivity, similarly to the metal oxide film 109c. That is, the metal oxide film 109c functions as a low resistance region. Thus, the on-state current of the transistor can be increased and the field-effect mobility can be increased.

Note that the nitride insulating film also functions as a blocking film for water, hydrogen, and the like.
By providing a nitride insulating film as 12, the intrusion of hydrogen, water, or the like from the outside into the metal oxide film 109a can be prevented.

Both the metal oxide film 109a and the metal oxide film 109c are formed over the gate insulating film, but have different impurity concentrations. Specifically, the impurity concentration of the metal oxide film 109c is higher than that of the metal oxide film 109a. For example, the concentration of hydrogen contained in the metal oxide film 109a is
Less than 5 × 10 ¹⁹ atoms / cm ³ , preferably less than 5 × 10 ¹⁸ atoms / cm ³ , preferably 1 × 10 ¹⁸ atoms / cm ³ or less, more preferably 5 × 10 ¹⁷ atoms / cm ³
ms / cm ³ or less, more preferably 1 × 10 ¹⁶ atoms / cm ³ or less, and the concentration of hydrogen contained in the metal oxide film 109c is 8 × 10 ¹⁹ or more, preferably 1 × 10 ²⁰ a
toms / cm ³ or more, more preferably 5 × 10 ²⁰ or more. In addition, the metal oxide film 1
Compared to 09a, the concentration of hydrogen contained in the metal oxide film 109c is twice, preferably 10 times or more.

The metal oxide film 109c has lower resistivity than the metal oxide film 109a. The resistivity of the metal oxide film 109c is at least 1 × 10 ⁻⁸ times the resistivity of the metal oxide film 109a and 1 × 10 ⁻
It is preferably less than ¹ time, typically 1 × 10 ⁻³ Ωcm or more and less than 1 × 10 ⁴ Ωcm, and more preferably the resistivity is 1 × 10 ⁻³ Ωcm or more and less than 1 × 10 ⁻¹ Ωcm. Good.

Next, heat treatment may be performed. The temperature of the heat treatment is typically 150 ° C. or higher and 40 ° C.
0 ° C. or lower, preferably 300 ° C. or higher and 400 ° C. or lower, preferably 320 ° C. or higher and 370 ° C. or lower.

In the transistor 22, the insulating film 105 formed using a nitride insulating film and the insulating film 112 formed using a nitride insulating film are in contact with each other, and the metal oxide film 1 is provided between the insulating films 105 and 112.
09a and the insulating film 111c are provided. The nitride insulating film has a low diffusion coefficient of hydrogen, water, and oxygen, and has high blocking properties of hydrogen, water, and oxygen. In addition, when the insulating film 111c is formed using an oxide insulating film containing oxygen that exceeds the stoichiometric composition, oxygen in the metal oxide film 109a can be removed in the heat treatment. Can be suppressed. Further, diffusion of oxygen contained in the metal oxide film 109a to the outside can be suppressed. As a result, oxygen vacancies in the metal oxide film 109a can be reduced. Further, diffusion of hydrogen, water, and the like from the outside to the metal oxide film 109a can be suppressed. Therefore, hydrogen, water, and the like in the metal oxide film 109a can be reduced. As a result, a highly reliable transistor can be manufactured.

  Here, heat treatment is performed at 350 ° C for one hour in a nitrogen and oxygen atmosphere.

Next, after part of the insulating film 112 is etched using the mask 139 to remove the mask, as shown in FIG. 4B, the insulating film 11 having openings 115a, 115b, and 115c is formed.
Form 3 In the openings 115a and 115b, a part of the metal oxide film 109a is exposed. In the opening 115c, a part of the metal oxide film 109c is exposed. The insulating film 112 can be etched by a dry etching method and / or a wet etching method. Next, the mask 139 is removed.

  Here, part of the insulating film 112 is etched by a dry etching method.

Next, as shown in FIG. 4C, the exposed portion of the metal oxide film 109a,
A conductive film 116 is formed on the exposed portion of c and on the insulating film 113. Next, by a photolithography process using a fourth photomask, the masks 141a, 141b,
141c is formed.

The conductive film 116 later becomes conductive films 117a and 117b functioning as a pair of electrodes and a conductive film 117c functioning as a capacitor line. Therefore, a conductive material which can be used for an electrode is appropriately used for the conductive film 116. For the conductive film 116, a single metal made of aluminum, titanium, chromium, nickel, copper, yttrium, zirconium, molybdenum, silver, tantalum, or tungsten, or an alloy containing these as a main component is used as a single-layer structure or a stacked structure. For example, a single-layer structure of an aluminum film containing silicon, a two-layer structure of stacking an aluminum film on a titanium film, a two-layer structure of stacking an aluminum film on a tungsten film, and a copper film on a copper-magnesium-aluminum alloy film. A two-layer structure in which a copper film is stacked on a titanium film, a two-layer structure in which a copper film is stacked on a tungsten film, a titanium film or a titanium nitride film, and a stack on the titanium film or the titanium nitride film. A three-layer structure in which an aluminum film or a copper film is stacked and a titanium film or a titanium nitride film is further formed thereon, and a molybdenum film or a molybdenum nitride film, and an aluminum film or a copper film There is a three-layer structure in which a film is stacked and a molybdenum film or a molybdenum nitride film is further formed thereon. Note that a transparent conductive material containing indium oxide, tin oxide, or zinc oxide may be used.

  The conductive film 116 is formed by a sputtering method, a CVD method, an evaporation method, or the like.

Here, as the conductive film 116, a 50-nm-thick tungsten film and a 300-nm-thick copper film are formed by a sputtering method.

Next, part of the conductive film 116 is etched using the masks 141a, 141b, and 141c, so that conductive films 117a and 117b functioning as a pair of electrodes and a conductive film 117c functioning as a capacitor line are formed. The conductive film 116 can be etched using a dry etching method and / or a wet etching method. After this, the masks 141a, 141b,
141c is removed (see FIG. 4D).

Note that an insulating film 113 formed of a nitride insulating film is formed around a region where the metal oxide film 109a and the conductive films 117a and 117b are in contact with each other. Since the diffusion coefficient of copper in the nitride insulating film is small, copper diffusion can be prevented. Therefore, when part or all of the conductive films 117a and 117b are formed of a copper film, the insulating film 113 functions as a copper barrier film. Therefore, diffusion of copper into the channel region is reduced, and variation in electric characteristics of the transistor can be reduced.

In the conductive films 117a and 117b, a conductive material which is easily bonded to oxygen, such as tungsten, titanium, aluminum, copper, molybdenum, chromium, tantalum, or an alloy is used in a region in contact with the metal oxide film 109a. Oxygen in the metal oxide film 109a is extracted to a conductive material which is easily bonded to oxygen. Further, in some cases, tungsten, titanium, aluminum, copper, molybdenum, chromium, or part of a constituent element of tantalum alone or an alloy is mixed into the metal oxide film 109a. As a result, a low-resistance region is formed in the metal oxide film 109a in the vicinity of a region in contact with the conductive films 117a and 117b. Since the low-resistance region has high conductivity, contact resistance between the metal oxide film 109a and the conductive films 117a and 117b can be reduced, and on-state current of the transistor can be increased.

Next, as illustrated in FIG. 5A, a light-transmitting conductive film 118 is formed over the insulating film 113 and the conductive films 117a, 117b, and 117c. Next, a mask 143 is formed over the conductive film 118 by a photolithography process using a fifth photomask.

The conductive film 118 becomes a conductive film 119 which functions as a pixel electrode later. Therefore, the conductive film 118 is appropriately formed using a conductive material which can be used for a pixel electrode. The conductive film 118 includes an indium tin oxide film, an indium oxide film containing tungsten oxide, an indium zinc oxide film containing tungsten oxide, an indium oxide film containing titanium oxide, an indium tin oxide film containing titanium oxide, and indium. A conductive film formed using a light-transmitting conductive material such as a zinc oxide film or an indium tin oxide film to which silicon oxide is added can be used.

  The conductive film 118 is formed by a sputtering method, an evaporation method, an application method, or the like.

Here, an ITO film with a thickness of 100 nm is formed as the conductive film 118 by a sputtering method.

Next, part of the conductive film 118 is etched using the mask 143, so that a conductive film 119 functioning as a pixel electrode is formed. The conductive film 119 is a conductive film 11 functioning as a pair of electrodes.
7b, and is formed so as to overlap with the metal oxide film 109c via the insulating film 113. The conductive film 118 is formed by a dry etching method and / or a wet etching method.
Can be etched. After that, the mask 143 is removed (see FIG. 5B).

  Here, part of the conductive film 118 is etched by a wet etching method.

Through the above steps, the conductive film 103 serving as a gate electrode, the insulating films 105 and 106a serving as gate insulating films, the metal oxide film 109a, the insulating film 111c covering part of the metal oxide film 109a, and the metal oxide film A conductive film 11 in contact with 109a and functioning as a pair of electrodes
The transistor 22 having 7a and 117b can be manufactured. Further, the conductive film 119 which functions as a pixel electrode in contact with the conductive film 117b included in the transistor 22 can be formed. Further, the metal oxide film 109c formed on the insulating film 106b and the insulating film 11
3 and the capacitor 25 having the conductive film 119 can be manufactured. That is, an element substrate including the transistor 22, the conductive film 119 functioning as a pixel electrode, and the capacitor 25 is
It can be manufactured using five photomasks. In this embodiment, since the metal oxide film and the channel protective film are formed using one photomask, the number of photomasks required for manufacturing an element substrate can be reduced.

In the semiconductor device described in this embodiment, a metal oxide film serving as one electrode of a capacitor is formed at the same time as the metal oxide film including the channel region of the transistor. Therefore, the metal oxide film including the channel region of the transistor and the metal oxide film serving as one electrode of the capacitor are formed using the same metal element. In addition, a conductive film functioning as a pixel electrode is used as the other electrode of the capacitor. For these reasons, a step of forming a new conductive film is not required to form a capacitor, and the number of steps for manufacturing a display device can be reduced. In the capacitor, the metal oxide film 109c and the conductive film 119, which are a pair of electrodes, both have a light-transmitting property; thus, the capacitor 25 has a light-transmitting property. As a result, the aperture ratio of the pixel can be increased while increasing the area occupied by the capacitor. Further, a display device with reduced power consumption can be manufactured.

<About metal oxide film>
When hydrogen is added to an oxide semiconductor in which an oxygen vacancy is formed, hydrogen enters an oxygen vacancy site and a donor level is formed in the vicinity of a conduction band. As a result, the oxide semiconductor has higher conductivity,
Turn into a conductor. An oxide semiconductor which is made into a conductor can be referred to as an oxide conductor. In general, an oxide semiconductor has a large energy gap and thus has a property of transmitting visible light.
On the other hand, an oxide conductor is an oxide semiconductor having a donor level near a conduction band. Therefore, the influence of absorption by the donor level is small, and the oxide semiconductor has a light-transmitting property to visible light which is almost equal to that of an oxide semiconductor.

Here, a film formed using an oxide semiconductor (hereinafter, referred to as an oxide semiconductor film (OS)) used for the metal oxide film 109a and a metal oxide film 109c used for the metal oxide film 109c can be used.
The temperature dependence of resistivity in a film formed using an oxide conductor (hereinafter, referred to as an oxide conductor film (OC)) is described with reference to FIGS. In FIG. 13, the horizontal axis indicates the measured temperature, and the vertical axis indicates the resistivity. In addition, a measurement result of the oxide semiconductor film (OS) is indicated by a circle, and a measurement result of the oxide conductor film (OC) is indicated by a square mark.

Note that a sample including an oxide semiconductor film (OS) has an atomic ratio of In: Ga over a glass substrate.
: An In-Ga-Zn oxide film with a thickness of 35 nm is formed by a sputtering method using a sputtering target of Zn: 1: 1: 1.2, and the atomic ratio is In: Ga: Zn = 1: 4.
: 20-nm-thick In— film by a sputtering method using a sputtering target of
After forming a Ga—Zn oxide film and performing heat treatment in a nitrogen atmosphere at 450 ° C., heat treatment in a mixed gas atmosphere of nitrogen and oxygen at 450 ° C., and further forming a silicon oxynitride film by a plasma CVD method, Was made.

In addition, a sample including an oxide conductor film (OC) has an atomic ratio of In: Ga on a glass substrate.
: Zn = 1: 1: 1 by a sputtering method using a sputtering target.
After forming an In-Ga-Zn oxide film with a thickness of 00 nm and performing heat treatment in a nitrogen atmosphere at 450 ° C, heat treatment is performed in a mixed gas atmosphere of nitrogen and oxygen at 450 ° C, and a silicon nitride film is formed by a plasma CVD method. It was made.

As can be seen from FIG. 13, the temperature dependence of the resistivity of the oxide conductor film (OC) is smaller than the temperature dependence of the resistivity of the oxide semiconductor film (OS). Typically, the change rate of the resistivity of the oxide semiconductor film (OC) at 80 K or more and 290 K or less is less than ± 20%. Alternatively, the rate of change in resistivity between 150K and 250K is less than ± 10%.
That is, the oxide conductor is a degenerate semiconductor, and it is assumed that the conduction band edge and the Fermi level match or substantially match. Therefore, the oxide conductor film can be used for a resistor, a wiring, an electrode of a capacitor, a pixel electrode, a common electrode, or the like.

<About oxide semiconductor films and metal oxide films>
Next, one embodiment which can be applied to a metal oxide film and an oxide semiconductor film having semiconductor characteristics is described. Here, an oxide semiconductor film is described as a typical example; however, the structure of the oxide semiconductor film can be applied to a metal oxide film as appropriate.

The oxide semiconductor film is preferably formed using a CAAC-OS film. CAAC-O
The S film has c-axis orientation, and a clear crystal grain boundary (also referred to as a grain boundary) cannot be confirmed. As a result, in the channel-etch transistor, the amount of overetching of the oxide semiconductor film when forming the pair of electrodes is small. As a result, when the oxide semiconductor film is formed using a CAAC-OS film, a channel-etch transistor can be manufactured. Note that in a channel-etched transistor, the distance between a pair of electrodes, that is, the channel length is 0.5 μm to 6.5 μm, preferably greater than 1 μm.
It can be as small as less than μm.

Further, the oxide semiconductor film has a single crystal structure (hereinafter, referred to as a single crystal oxide semiconductor), a polycrystalline structure, (hereinafter, referred to as polycrystalline oxide semiconductor), and a microcrystalline structure. Or an oxide semiconductor (hereinafter, referred to as a microcrystalline oxide semiconductor). The CAAC-OS, a single crystal oxide semiconductor, a polycrystalline oxide semiconductor, and a microcrystalline oxide semiconductor are described below.

<CAAC-OS>
The CAAC-OS film is one of oxide semiconductor films including a plurality of crystal parts. Also, CA
A crystal part included in the AC-OS film has c-axis orientation. In the planar TEM image, CAA
The area of the crystal part included in the C-OS film is 2500 nm ² or more, more preferably 5 μm ² or more, and still more preferably 1000 μm ² or more. Further, in the cross-sectional TEM image, the thin film has a physical part close to that of a single crystal when the crystal part is 50% or more, preferably 80% or more, and more preferably 95% or more.

The CAAC-OS film is formed using a transmission electron microscope (TEM: Transmission Elec).
When observed with a Tron Microscope, clear boundaries between crystal parts, that is, crystal grain boundaries (also referred to as grain boundaries) cannot be confirmed. Therefore, C
It can be said that the AAC-OS film hardly causes a decrease in electron mobility due to a crystal grain boundary.

When the CAAC-OS film is observed with a TEM (cross-sectional TEM observation) in a direction substantially parallel to the sample surface, it can be confirmed that metal atoms are arranged in a layer in the crystal part. Each layer of metal atoms has a shape on which a surface of the CAAC-OS film is formed (also referred to as a formation surface) or a shape reflecting unevenness of an upper surface, and is arranged in parallel with the formation surface or the upper surface of the CAAC-OS film. . In this specification, “parallel” refers to a state where two straight lines are arranged at an angle of −10 ° or more and 10 ° or less. Therefore, a case where the angle is −5 ° to 5 ° is also included. “Vertical” refers to a state in which two straight lines are arranged at an angle of 80 ° or more and 100 ° or less. Therefore, a case where the angle is 85 ° or more and 95 ° or less is also included.

On the other hand, the CAAC-OS film was observed by TEM from a direction substantially perpendicular to the sample surface (plane T
(EM observation), it can be confirmed that metal atoms are arranged in a triangular or hexagonal shape in the crystal part. However, there is no regularity in the arrangement of metal atoms between different crystal parts.

Note that when electron diffraction is performed on the CAAC-OS film, a spot (bright point) indicating orientation is obtained.
Is observed.

From the cross-sectional TEM observation and the planar TEM observation, it is found that the crystal part of the CAAC-OS film has an orientation.

X-ray diffraction (XRD: X-Ray Diffraction) of the CAAC-OS film
When structural analysis is performed with the use of an apparatus, in a case where an out-of-plane method of a CAAC-OS film is analyzed, a peak sometimes appears when the diffraction angle (2θ) is around 31 °. This peak is
Since it belongs to the (00x) plane (x is an integer) of the crystal of the nGaZn oxide, CAAC−
It can be confirmed that the crystal of the OS film has c-axis orientation and the c-axis is oriented substantially perpendicular to the formation surface or the upper surface.

On the other hand, X-rays enter the CAAC-OS film in a direction substantially perpendicular to the c-axis.
In the analysis by the lane method, a peak may appear when 2θ is around 56 °. This peak is attributed to the (110) plane of the InGaZn oxide crystal. In the case of a single crystal oxide semiconductor film of InGaZn oxide, 2θ is fixed to around 56 °, and the normal vector of the sample surface is set to the axis (φ
When the analysis (φ scan) is performed while rotating the sample as (axis), six peaks belonging to a crystal plane equivalent to the (110) plane are observed. In contrast, in the case of a CAAC-OS film, 2
Even when φ scan is performed with θ fixed at around 56 °, a clear peak does not appear.

From the above, in the CAAC-OS film, the orientations of the a-axis and the b-axis are irregular between different crystal parts, but the c-axis has orientation and the c-axis is normal to the formation surface or the upper surface. It can be seen that the direction is parallel to the vector. Therefore, each layer of metal atoms arranged in a layered manner confirmed by the above-described cross-sectional TEM observation is a plane parallel to the a-b plane of the crystal.

Note that a crystal is formed when a CAAC-OS film is formed or when crystallization treatment such as heat treatment is performed. As described above, the c-axis of the crystal is oriented in a direction parallel to a normal vector of a formation surface or an upper surface of the CAAC-OS film. Therefore, for example, when the shape of the CAAC-OS film is changed by etching or the like, the c-axis of the crystal may not be parallel to the normal vector of the formation surface or the upper surface of the CAAC-OS film.

Further, the degree of crystallinity in the CAAC-OS film is not necessarily uniform. For example, CAAC-OS
In the case where the crystal part of the film is formed by crystal growth from the vicinity of the top surface of the CAAC-OS film, a region near the top surface may have higher crystallinity than a region near the formation surface. Also, CA
In the case where an impurity is added to the AC-OS film, the crystallinity of a region to which the impurity is added changes and a region having a partially different crystallinity may be formed.

Note that in analysis of the CAAC-OS film by an out-of-plane method, 2θ was 31 °.
In addition to a nearby peak, a peak may appear when 2θ is around 36 °. A peak at 2θ of about 36 ° indicates that a part of the CAAC-OS film includes a crystal part having no c-axis orientation. The CAAC-OS film shows a peak where 2θ is around 31 ° and 2θ is 36 °.
It is preferable not to show a peak in the vicinity.

The CAAC-OS film is an oxide semiconductor film with a low impurity concentration. The impurities are elements other than the main components of the oxide semiconductor film, such as hydrogen, carbon, silicon, and a transition metal element. In particular, an element such as silicon, which has a stronger binding force with oxygen than a metal element included in the oxide semiconductor film, disturbs the atomic arrangement of the oxide semiconductor film by depriving the oxide semiconductor film of oxygen, and Is a factor that reduces In addition, heavy metals such as iron and nickel, argon, and carbon dioxide have large atomic radii (or molecular radii); therefore, when included in the oxide semiconductor film, the atomic arrangement of the oxide semiconductor film is disturbed and crystallinity is reduced. Is a factor that reduces Note that an impurity contained in the oxide semiconductor film might serve as a carrier trap or a carrier generation source in some cases.

The CAAC-OS film is an oxide semiconductor film with a low density of defect states. For example, oxygen vacancies in the oxide semiconductor film may serve as carrier traps or serve as carrier generation sources by capturing hydrogen.

A low impurity concentration and a low density of defect states (less oxygen vacancies) are referred to as high-purity intrinsic or substantially high-purity intrinsic. An oxide semiconductor film with high purity intrinsic or substantially high purity intrinsic has a small number of carrier generation sources, so that the carrier density can be reduced. Therefore, a transistor including the oxide semiconductor film rarely has negative threshold voltage (is rarely normally on). In addition, an oxide semiconductor film having high purity or substantially high purity has few carrier traps. Therefore, a transistor including the oxide semiconductor film has small change in electric characteristics and high reliability. Note that the charge trapped by the carrier trap in the oxide semiconductor film takes a long time to be released, and may behave as a fixed charge. Thus, a transistor including an oxide semiconductor film with a high impurity concentration and a high density of defect states might have unstable electric characteristics in some cases.

In a transistor using the CAAC-OS film, change in electrical characteristics due to irradiation with visible light or ultraviolet light is small.

<Single-crystal oxide semiconductor>
The single crystal oxide semiconductor film is an oxide semiconductor film having a low impurity concentration and a low density of defect states (less oxygen vacancies). Therefore, the carrier density can be reduced. Therefore, a transistor including a single crystal oxide semiconductor film rarely has normally-on electrical characteristics. In addition, since the single crystal oxide semiconductor film has a low impurity concentration and a low density of defect states, carrier traps may be reduced in some cases. Therefore, a transistor including a single crystal oxide semiconductor film has small change in electric characteristics and high reliability.

Note that the density of the oxide semiconductor film increases as the number of defects decreases. In addition, the oxide semiconductor film
The higher the crystallinity, the higher the density. The oxide semiconductor film has a high density when the concentration of impurities such as hydrogen is low. The single crystal oxide semiconductor film has higher density than the CAAC-OS film. The CAAC-OS film has a higher density than the microcrystalline oxide semiconductor film. Further, the density of the polycrystalline oxide semiconductor film is higher than that of the microcrystalline oxide semiconductor film. Further, the density of the microcrystalline oxide semiconductor film is higher than that of the amorphous oxide semiconductor film.

<Polycrystalline oxide semiconductor>
In the polycrystalline oxide semiconductor film, crystal grains can be confirmed by observation with a high-resolution TEM. The crystal grains contained in the polycrystalline oxide semiconductor film are, for example, 2 nm or more and 300 nm or less, 3 nm or more and 100 nm or less, or 5 nm or more and 50 nm as observed with a high-resolution TEM.
m or less. Further, in the polycrystalline oxide semiconductor film, a crystal grain boundary can be confirmed in an observation image by high-resolution TEM in some cases.

The polycrystalline oxide semiconductor film has a plurality of crystal grains, and the crystal orientation may be different among the plurality of crystal grains. Further, when structural analysis is performed on the polycrystalline oxide semiconductor film using an XRD apparatus, for example, ou of the polycrystalline oxide semiconductor film including a crystal of InGaZnO ₄ is obtained.
In the analysis by the t-of-plane method, a peak where 2θ is around 31 °, a peak where 2θ is around 36 °, or another peak may appear.

Since a polycrystalline oxide semiconductor film has high crystallinity, it may have high electron mobility. Therefore, a transistor including a polycrystalline oxide semiconductor film has high field-effect mobility. Note that in the polycrystalline oxide semiconductor film, impurities may be segregated at crystal grain boundaries. Also,
The crystal grain boundary of the polycrystalline oxide semiconductor film becomes a defect level. In a polycrystalline oxide semiconductor film, a crystal grain boundary might serve as a carrier trap or a carrier generation source; thus, a transistor using a polycrystalline oxide semiconductor film has higher electrical conductivity than a transistor using a CAAC-OS film. In some cases, the characteristics of the transistor vary greatly and the transistor has low reliability.

<Microcrystalline oxide semiconductor>
In a microscopic oxide semiconductor film, a crystal part may not be clearly observed in an image observed with a TEM in some cases. A crystal part included in the microcrystalline oxide semiconductor film often has a size of 1 nm to 100 nm, or 1 nm to 10 nm. In particular, 1 nm or more and 10 n
nanocrystals (nc: nanocrys)
tal) with an nc-OS (nanocrystalline line O).
This is referred to as an “xide semiconductor” film. The nc-OS film is formed of, for example, T
In the observation image by EM, the crystal grain boundary may not be clearly confirmed.

The nc-OS film has a periodic atomic arrangement in a minute region (for example, a region with a thickness of 1 nm to 10 nm, particularly, a region with a thickness of 1 nm to 3 nm). In the nc-OS film, no regularity is observed in crystal orientation between different crystal parts. Therefore, no orientation is observed in the entire film.
Therefore, the nc-OS film cannot be distinguished from an amorphous oxide semiconductor film depending on an analysis method in some cases. For example, for an nc-OS film, XRD using X-rays having a diameter larger than the crystal part is performed.
When a structural analysis is performed using an apparatus, a peak indicating a crystal plane is not detected in the analysis by the out-of-plane method. Further, when electron beam diffraction (also referred to as restricted area electron beam diffraction) using an electron beam having a diameter larger than the crystal part (for example, 50 nm or more) is performed on the nc-OS film, a diffraction pattern such as a halo pattern is obtained. Observed. On the other hand, when the nc-OS film is subjected to electron beam diffraction (also referred to as nanobeam electron beam diffraction) using an electron beam having a probe diameter (for example, 1 nm or more and 30 nm or less) that is close to or smaller than the size of the crystal part. A spot is observed. In addition, when nanobeam electron diffraction is performed on the nc-OS film, a high-luminance region may be observed in a circular shape (in a ring shape). In addition, when nanobeam electron diffraction is performed on the nc-OS film, a plurality of spots may be observed in a ring-shaped region.

The nc-OS film is an oxide semiconductor film having higher regularity than an amorphous oxide semiconductor film. Therefore, the nc-OS film has a lower density of defect states than the amorphous oxide semiconductor film. However, the nc-OS film has no regularity in crystal orientation between different crystal parts. Therefore, nc−
The OS film has a higher density of defect states than the CAAC-OS film.

<Modification 1, base insulating film>
In the transistor described in this embodiment, a base insulating film can be provided between the substrate 101 and the conductive film 103 functioning as a gate electrode as needed. The base insulating film can be formed using silicon oxide, silicon oxynitride, silicon nitride, silicon nitride oxide, gallium oxide, hafnium oxide, yttrium oxide, aluminum oxide, aluminum oxynitride, or the like. Note that as a base insulating film, silicon nitride, gallium oxide,
By using hafnium oxide, yttrium oxide, aluminum oxide, or the like, diffusion of impurities, typically, alkali metal, water, hydrogen, or the like from the substrate 101 to the metal oxide film 109a can be suppressed.

  The base insulating film can be formed by a sputtering method, a CVD method, or the like.

<Modification 2, gate insulating film>
The insulating film 105 formed using a nitride insulating film can have a stacked structure of a first nitride insulating film with few defects and a second nitride insulating film with high hydrogen blocking properties. By providing a nitride insulating film with few defects as the gate insulating film, the withstand voltage of the gate insulating film can be improved. Further, by providing a nitride insulating film having a high hydrogen blocking property as a gate insulating film, transfer of hydrogen from the conductive film 103 and the insulating film 105 serving as gate electrodes to the metal oxide film 109a can be prevented. Can be.

Alternatively, as the insulating film 105 formed using a nitride insulating film, a first nitride insulating film having high impurity blocking properties, a second nitride insulating film having few defects, and a second nitride insulating film having high hydrogen blocking properties are used. A stacked structure in which a nitride insulating film is sequentially stacked from the conductive film 103 functioning as a gate electrode can be used. By providing a first nitride insulating film having high impurity blocking properties as the gate insulating film, impurities from the conductive film 103 functioning as a gate electrode, typically, hydrogen, nitrogen, an alkali metal, or an alkaline earth can be obtained. Metal oxide film 1
09a can be prevented.

Note that the structure, method, and the like described in this embodiment can be combined as appropriate with any of the structures, methods, and the like described in the other embodiments.

(Embodiment 2)
In this embodiment, a method for manufacturing an element substrate of a display device which is different from that in Embodiment 1 will be described with reference to drawings. In this embodiment mode, as in Embodiment Mode 1, a metal oxide film having a channel region and an insulating film functioning as a channel protective film are formed using one photomask. On the other hand, this embodiment is different from Embodiment 1 in the order of manufacturing steps of the conductive film functioning as an electrode and the insulating film functioning as a dielectric film of a capacitor.

A specific example of an element substrate of a liquid crystal display device using a liquid crystal element for the pixel 13 will be described.
Here, FIG. 6 illustrates a top view of the pixel 13 illustrated in FIG.

In FIG. 6, a conductive film 203 functioning as a scanning line is provided so as to extend in a direction substantially perpendicular to the signal line (the horizontal direction in the drawing). The conductive film 213a functioning as a signal line is provided to extend in a direction substantially perpendicular to the scanning lines (vertical direction in the drawing). The conductive film 213c functioning as a capacitor line is provided to extend in a direction parallel to the signal line. Note that the conductive film 203 serving as a scan line is electrically connected to the scan line driver circuit 14 (see FIG. 1A), and serves as a conductive film 213a serving as a signal line and a capacitor line. The conductive film 213c is electrically connected to the signal line driver circuit 16 (see FIG. 1A).

The transistor 22a is provided in a region where the scanning line and the signal line intersect. The transistor 22a includes a conductive film 203 serving as a gate electrode, a gate insulating film (not illustrated in FIG. 6), a metal oxide film 209a in which a channel region is formed over the gate insulating film, a source electrode, and a drain. The conductive films 213a and 213b function as electrodes.
Note that the conductive film 203 also functions as a scan line, and a region overlapping with the metal oxide film 209a functions as a gate electrode of the transistor 22a. The conductive film 213a also functions as a signal line, and a region overlapping with the metal oxide film 209a functions as a source electrode or a drain electrode of the transistor 22a. In FIG. 6, the scanning line has an end located outside the end of the metal oxide film 209a in the top surface shape. Therefore, the scanning line functions as a light-blocking film that blocks light from a light source such as a backlight. As a result, the metal oxide film 209a included in the transistor is not irradiated with light, so that a change in electrical characteristics of the transistor can be suppressed.

The conductive film 213b is electrically connected to the light-transmitting conductive film 221 functioning as a pixel electrode in the opening 219.

The capacitor 25a includes a metal oxide film 209b formed over the gate insulating film, a light-transmitting conductive film 221 functioning as a pixel electrode, and a dielectric film formed using a nitride insulating film provided over the transistor 22a. It consists of a body membrane. Since the metal oxide film 109b has a light-transmitting property, the capacitor 25a has a light-transmitting property. Further, a metal oxide film 209b functioning as one of a pair of electrodes of the capacitor 25a is connected to the conductive film 213c functioning as a capacitor line.

Since the capacitor 25a has a light-transmitting property, the capacitor 25a can be formed large (with a large area) in the pixel 13. Therefore, it is possible to increase the aperture ratio and to increase the charge capacity to 50% or more, preferably 55% or more, preferably 60% or more, and to obtain a semiconductor device with an increased charge capacity. For example, in a high-resolution semiconductor device such as a liquid crystal display device, the area of a pixel is reduced, and the area of a capacitor is also reduced. For this reason,
In a high-resolution semiconductor device, the charge capacity stored in a capacitor is small. However, since the capacitor 25a described in this embodiment has a light-transmitting property, by providing the capacitor in a pixel, the aperture ratio can be increased while a sufficient charge capacity is obtained in each pixel. Typically, the pixel density is 200 ppi or more, more preferably 300 ppi or more, and even 50 ppi or more.
It can be suitably used for a high-resolution semiconductor device of 0 ppi.

The pixel 13 illustrated in FIG. 6 has a shape in which a side parallel to the conductive film 213a functioning as a signal line is shorter than a side parallel to the conductive film 203 functioning as a scan line, and a capacitor line. A conductive film 213c functioning as a signal line is provided to extend in a direction parallel to the conductive film 213a functioning as a signal line. As a result, the area of the conductive film 213c occupying the pixel 13 can be reduced, so that the aperture ratio can be increased.

Further, according to one embodiment of the present invention, the aperture ratio can be increased even in a high-resolution display device, so that light from a light source such as a backlight can be used efficiently, and power consumption of the display device is reduced. be able to.

Next, a method for manufacturing an element substrate of a display device will be described with reference to cross-sectional views taken along dashed lines AB and CD shown in FIG.

Through the same steps as in Embodiment 1, with the use of the first photomask and the second photomask, the conductive film 203 functioning as a gate electrode is formed over the substrate 210 as illustrated in FIG. To form In addition, the insulating films 205 and 207a are formed on the substrate 291 and the conductive film 203.
, 207b. The metal oxide film 20 is formed on the insulating films 207a and 207b, respectively.
9a and 209b are formed. Further, an insulating film 211c functioning as a channel protective film is formed over the metal oxide film 209a. After that, heat treatment is performed.

The substrate 201 can be appropriately selected from the substrates 101 described in Embodiment 1. For the conductive film 203, a material and a manufacturing method similar to those of the conductive film 103 which functions as the gate electrode described in Embodiment 1 can be selected as appropriate. For the insulating film 205, a material and a manufacturing method similar to those of the insulating film 105 described in Embodiment 1 can be appropriately selected. Insulating films 207a, 207
For b, a material and a manufacturing method similar to those of the insulating films 107a and 107b described in Embodiment 1 can be appropriately selected. For the metal oxide films 209a and 209b, a material and a manufacturing method similar to those of the metal oxide films 109a and 109b described in Embodiment 1 can be appropriately selected. For the insulating film 211c functioning as a channel protective film, a material and a manufacturing method similar to those of the insulating film 111c described in Embodiment 1 can be appropriately selected.

Note that in an etching step for forming the insulating film 211c, the metal oxide film 209 is used.
In regions a and 209b, the region exposed to the plasma is damaged, and oxygen vacancies are formed. Therefore, the conductivity of the region of the metal oxide film 209a which is not covered with the insulating film 211c and the conductivity of the metal oxide film 209b are increased.

Next, as illustrated in FIG. 7B, a conductive film 212 is formed over the insulating film 205, the insulating films 207a and 207b, the metal oxide films 209a and 209b, and the insulating film 211c. Next, a mask 23 is formed over the conductive film 212 by a photolithography process using a third photomask.
1a, 231b and 231c are formed.

For the conductive film 212, a material and a manufacturing method similar to those of the conductive film 116 described in Embodiment 1 can be selected as appropriate.

Next, part of the conductive film 212 is etched using the masks 231a, 231b, and 231c, so that conductive films 213a and 213b functioning as a pair of electrodes and a conductive film 213c functioning as a capacitor line are formed. The conductive film 116 can be etched using a dry etching method and / or a wet etching method. After this, the masks 231a, 231b,
231c is removed (see FIG. 7C).

Next, as shown in FIG. 8A, an insulating film 214 is formed over the insulating film 205, the insulating films 207a and 207b, the metal oxide films 209a and 209b, the insulating film 211c, and the conductive films 213a, 213b, and 213c. Form. Next, a mask 233 is formed over the insulating film 214 by a photolithography process using a fourth photomask.

For the insulating film 214, a material and a manufacturing method similar to those of the insulating film 112 described in Embodiment 1 can be selected as appropriate.

Oxygen vacancies are formed in the metal oxide films 209a and 209b due to plasma damage generated when the insulating film 214 is formed over the insulating film 211c. For this reason, the metal oxide film 20
In 9a, the conductivity of the region not covered with the insulating film 211c and the metal oxide film 209b is increased. Further, by using a nitride insulating film containing hydrogen as the insulating film 214, hydrogen is diffused from the insulating film 214 to the metal oxide films 209a and 209b. The movement of hydrogen to oxygen vacancies generates electrons serving as carriers. As a result, the metal oxide film 209b has high conductivity and becomes a conductive metal oxide film 209c. In addition, the metal oxide film 20
9c functions as one electrode of the capacitive element 25.

Note that the metal oxide film 209a is in contact with the insulating film 213 outside the insulating film 211c. Since the insulating film 211c is an oxide insulating film, the metal oxide film 20 in contact with the insulating film 211c
9a functions as a channel region of the transistor. In the metal oxide film 209a, a region in contact with the conductive films 213a and 213b has high conductivity, similarly to the metal oxide film 209c. That is, the metal oxide film 209a functions as a low resistance region. Thus, the on-state current of the transistor can be increased and the field-effect mobility can be increased.

Note that the nitride insulating film also functions as a blocking film for water, hydrogen, and the like.
By providing a nitride insulating film as 14, the entry of hydrogen, water, and the like from the outside to the metal oxide film 209a can be prevented.

Both the metal oxide film 209a and the metal oxide film 209c are formed over the gate insulating film, but have different impurity concentrations. Specifically, the impurity concentration of the metal oxide film 209c is higher than that of the metal oxide film 209a. For example, the concentration of hydrogen contained in the metal oxide film 209a is 5
Less than × 10 ¹⁹ atoms / cm ³ , preferably less than 5 × 10 ¹⁸ atoms / cm ³ ;
Preferably, it is 1 × 10 ¹⁸ atoms / cm ³ or less, more preferably, 5 × 10 ¹⁷ atoms / cm ^3.
s / cm ³ or less, more preferably 1 × 10 ¹⁶ atoms / cm ³ or less, and the concentration of hydrogen contained in the metal oxide film 209c is 8 × 10 ¹⁹ or more, preferably 1 × 10 ²⁰ at.
oms / cm ³ or more, more preferably 5 × 10 ²⁰ or more. In addition, the metal oxide film 20
Compared to 9a, the concentration of hydrogen contained in the metal oxide film 209c is twice, preferably 10 times or more.

Further, the metal oxide film 209c has lower resistivity than the metal oxide film 209a. The resistivity of the metal oxide film 209c is at least 1 × 10 ⁻⁸ times the resistivity of the metal oxide film 209a and 1 × 10 ⁻
It is preferably ¹ or less, typically 1 × 10 ⁻³ Ωcm or more and less than 1 × 10 ⁴ Ωcm, and more preferably the resistivity is 1 × 10 ⁻³ Ωcm or more and less than 1 × 10 ⁻¹ Ωcm. Good.

Next, heat treatment may be performed. The temperature of the heat treatment is typically 150 ° C. or higher and 40 ° C.
0 ° C. or lower, preferably 300 ° C. or higher and 400 ° C. or lower, preferably 320 ° C. or higher and 370 ° C. or lower.

The insulating film 205 formed using a nitride insulating film and the insulating film 214 formed using a nitride insulating film are in contact with each other, and a metal oxide film 209a and an insulating film 211c are provided between the insulating films 205 and 214. The nitride insulating film has a low diffusion coefficient of hydrogen, water, and oxygen, and has high blocking properties of hydrogen, water, and oxygen. In addition, when the insulating film 211c is formed using an oxide insulating film containing oxygen at a higher proportion than the oxygen in the metal oxide film 209a in the heat treatment, Can be suppressed. As a result, oxygen vacancies in the metal oxide film 209a can be reduced. Further, diffusion of hydrogen, water, and the like from the outside to the metal oxide film 209a can be suppressed. Therefore, hydrogen, water, and the like in the metal oxide film 209a can be reduced. As a result, a highly reliable transistor can be manufactured.

Next, as shown in FIG. 8A, a mask 233 is formed by a photolithography step using a fourth photomask. Next, part of the insulating film 214 is etched using the mask 233, so that an insulating film 217 having an opening 219 is formed as illustrated in FIG. In the opening 219, a part of the conductive film 213b is exposed.

Next, as illustrated in FIG. 8C, a light-transmitting conductive film 220 is formed over the exposed portion of the conductive film 213b and the insulating film 217. Next, a mask 235 is formed over the conductive film 220 by a photolithography process using a fifth photomask.

For the conductive film 220, a material and a manufacturing method similar to those of the conductive film 118 described in Embodiment 1 can be selected as appropriate.

Next, part of the conductive film 220 is etched using the mask 235 to form a conductive film 221 functioning as a pixel electrode. After that, the mask 235 is removed (see FIG. 8D).

Through the above steps, the conductive film 203 serving as a gate electrode, the insulating films 205 and 206a serving as gate insulating films, the metal oxide film 209a, and the insulating film serving as a channel protective film covering part of the metal oxide film 209a are provided. The transistor 22a in which the conductive films 213a and 213b function as a pair of electrodes in contact with the metal oxide film 209a and the metal oxide film 211c can be manufactured. Further, the conductive film 221 which functions as a pixel electrode in contact with the conductive film 213b included in the transistor 22a can be formed. Further, the capacitor 25a including the metal oxide film 209c, the insulating film 217, and the conductive film 221 formed over the insulating film 206b can be manufactured. That is, the transistor 22a, the conductive film 221 functioning as a pixel electrode,
And an element substrate having the capacitor 25a can be manufactured using five photomasks.
In this embodiment, since the metal oxide film and the channel protective film are formed using one photomask, the number of photomasks required for manufacturing an element substrate can be reduced.

In the semiconductor device described in this embodiment, a metal oxide film serving as one electrode of a capacitor is formed at the same time as the metal oxide film including the channel region of the transistor. Therefore, the metal oxide film including the channel region of the transistor and the metal oxide film serving as one electrode of the capacitor are formed using the same metal element. In addition, a conductive film functioning as a pixel electrode is used as the other electrode of the capacitor. For these reasons, a step of forming a new conductive film is not required to form a capacitor, and the number of steps for manufacturing a display device can be reduced. In the capacitor, the metal oxide film 109c and the conductive film 119, which are a pair of electrodes, both have a light-transmitting property; thus, the capacitor 25a has a light-transmitting property. As a result, the aperture ratio of the pixel can be increased while increasing the area occupied by the capacitor. Further, a display device with reduced power consumption can be manufactured.

Note that the structure, method, and the like described in this embodiment can be combined as appropriate with any of the structures, methods, and the like described in the other embodiments.

(Embodiment 3)
In this embodiment, a semiconductor device including a transistor which can further reduce the amount of defects in a metal oxide film as compared with Embodiments 1 and 2 will be described with reference to drawings. The transistor described in this embodiment is different from the transistors in Embodiments 1 and 2 in that a multilayer film including a plurality of metal oxide films is provided instead of the metal oxide film. .

FIG. 9 is a cross-sectional view of the transistor 22b and the capacitor 25b included in the semiconductor device.
FIG. 9 is a cross-sectional view taken along one-dot chain lines AB and CD in FIG.

The transistor 22b illustrated in FIG. 9A includes a multilayer film 150a over an insulating film 107a. The multilayer film 150a includes a first metal oxide film 151a in contact with the insulating film 107a, and a first metal oxide film 151a.
And a second metal oxide film 152a in contact with the metal oxide film 151a and the insulating film 111c.

A capacitor 25b illustrated in FIG. 9A includes a multilayer film 150b over an insulating film 107b. The multilayer film 150b includes a first metal oxide film 151b in contact with the insulating film 107b, and a second metal oxide film 152b in contact with the first metal oxide film 151b and the insulating film 113.

The second metal oxide films 152a and 152b are metal oxide films including one or more of the elements included in the first metal oxide films 151a and 151b. Therefore, interface scattering hardly occurs at the interface between the first metal oxide films 151a and 151b and the second metal oxide films 152a and 152b. Therefore, the movement of carriers is not hindered at the interface,
The field-effect mobility of the transistor is increased.

The first metal oxide films 151a and 151b and the second metal oxide films 152a and 152b are typically formed of an In-Ga oxide, an In-Zn oxide, an In-M-Zn oxide (M Al
, Ga, Ti, Y, Zr, La, Ce, or Nd).

Further, the second metal oxide films 152a and 152b are formed of the first metal oxide films 151a and 151b.
1b, the energy at the lower end of the conduction band is closer to the vacuum level. Typically, the energy at the lower end of the conduction band of the second metal oxide films 152a, 152b and the first metal oxide films 151a, 151a,
The difference from the energy at the lower end of the conduction band of 51b is 0.05 eV or more, 0.07 eV or more, 0
. 1 eV or more, or 0.15 eV or more, and 2 eV or less, 1 eV or less, 0.5 eV or less, or 0.4 eV or less. That is, the difference between the electron affinity of the second metal oxide films 152a and 152b and the electron affinity of the first metal oxide films 151a and 151b is 0.05 eV or more, 0.07 eV or more, 0.1 eV or more. Or 0.15 eV or more and 2 eV or less, 1
eV or less, 0.5 eV or less, or 0.4 eV or less.

It is preferable that the first metal oxide films 151a and 151b and the second metal oxide films 152a and 152b contain In because carrier mobility (electron mobility) is increased.

As the second metal oxide films 152a and 152b, Al, Ga, Ti, Y, Zr, La,
Having Ce or Nd at a higher atomic ratio than In may have the following effects. (1) The energy gap of the second metal oxide films 152a and 152b is increased.
(2) The electron affinity of the second metal oxide films 152a and 152b is reduced. (3) The diffusion of impurities from the outside is suppressed. (4) The insulating properties are higher than those of the first metal oxide films 151a and 151b. (5) Since Al, Ga, Y, Zr, La, Ce, or Nd is a metal element having a strong bonding force with oxygen, oxygen deficiency hardly occurs.

When the first metal oxide films 151a and 151b are In-M-Zn oxides and the sum of In and M is 100 atomic%, the atomic ratio of In and M is preferably greater than 25 atomic%. , M is less than 75 atomic%, more preferably In is greater than 34 atomic%, and M is less than 66 atomic%.

When the second metal oxide films 152a and 152b are In-M-Zn oxides and the sum of In and M is 100 atomic%, the atomic ratio of In and M is preferably I
n is less than 50 atomic%, M is more than 50 atomic%, more preferably,
It is assumed that In is less than 25 atomic% and M is greater than 75 atomic%.

Further, the first metal oxide films 151a and 151b and the second metal oxide films 152a and
When 2b is an In-M-Zn oxide M (M is Al, Ga, Ti, Y, Zr, La, Ce, or Nd), compared to the first metal oxide films 151a and 151b, The atomic ratio of M (Al, Ga, Ti, Y, Zr, La, Ce, or Nd) contained in the second metal oxide films 152a and 152b is large, and typically, the first metal oxide The atomic ratio is 1.5 times or more, preferably 2 times or more, and more preferably 3 times or more as compared with the above atoms contained in the films 151a and 151b.

Further, the first metal oxide films 151a and 151b and the second metal oxide films 152a and
When 2b is an In-M-Zn oxide (M is Al, Ga, Ti, Y, Zr, La, Ce, or Nd), the second metal oxide films 152a and 152b are formed of In: M: Zn = x ₁ : y ₁ :
z ₁ [atomic ratio], the first metal oxide films 151 a and 151 b are formed of In: M: Zn = x ₂ : y
Assuming that ₂ : z ₂ [atomic ratio], y ₁ / x ₁ is larger than y ₂ / x ₂ , preferably y
₁ / _{x 1} is 1.5 times more than _y 2 / _{x 2.} More preferably, y ₁ / x ₁ is equal to y ₂
/ X ₂ or more, more preferably y ₁ / x ₁ is more than 3 times greater than y ₂ / x ₂ . At this time, it is preferable that y ₂ be greater than or equal to x _{2 in the} metal oxide film because stable electrical characteristics can be imparted to the transistor 22 b using the metal oxide film.

The first metal oxide films 151a and 151b are formed of In-M-Zn oxides (M is Al, Ga,
In the case of Ti, Y, Zr, La, Ce, or Nd), the first metal oxide films 151a, 151
In the target used for forming the film 1b, the atomic ratio of the metal element is set to In: M: Zn.
= X ₁ : y ₁ : z _{1 ,} x ₁ / y ₁ is 1/3 or more and 6 or less, further 1 or more and 6 or less, z ₁ / y ₁ is 1/3 or more and 6 or less, More preferably, it is 1 or more and 6 or less. Note that when z ₁ / y ₁ is 1 or more and 6 or less, the first metal oxide films 151 a and 15 a
As 1b, a CAAC-OS film is easily formed. As typical examples of the atomic ratio of the target metal element, In: M: Zn = 1: 1: 1, In: M: Zn = 1: 1: 1.2, In
: M: Zn = 3: 1: 2.

The second metal oxide films 152a and 152b are formed of In-M-Zn oxides (M is Al, Ga,
In the case of Ti, Y, Zr, La, Ce, or Nd), the second metal oxide films 152a, 152
In the target used to form 2b, the atomic ratio of metal elements is set to In: M: Zn.
= X ₂ : y ₂ : z _{2 ,} x ₂ / y ₂ <x ₁ / y ₁ and z ₂ / y ₂ is は
It is preferably at least 6 and at most 6, more preferably at least 1 and at most 6. Note that z ₂ / y ₂ is 1 or more and 6
With the following conditions, a CAAC-OS film is easily formed as the second metal oxide films 152a and 152b. A typical example of the atomic ratio of the target metal element is In: M: Zn.
= 1: 3: 2, In: M: Zn = 1: 3: 4, In: M: Zn = 1: 3: 6, In: M:
Zn = 1: 3: 8.

Note that the first metal oxide films 151a and 151b and the second metal oxide films 152a and
Each of the atomic ratios of 2b includes a variation of ± 40% of the above atomic ratio as an error.

The second metal oxide films 152a and 152b are used for forming a film to be the insulating film 111c.
It also functions as a film for alleviating damage to the first metal oxide film 151a.

The thickness of the first metal oxide films 151a and 151b is 3 nm or more and 200 nm or less, preferably 3 nm or more and 100 nm or less, more preferably 3 nm or more and 50 nm or less. Second
The thickness of the metal oxide films 152a and 152b is 3 nm or more and 100 nm or less, preferably 3 nm or less.
nm and 50 nm.

The first metal oxide films 151a and 151b and the second metal oxide films 152a and 152b may have, for example, a non-single-crystal structure. The non-single-crystal structure is, for example, a CAAC-OS (C
Axis Aligned-Crystalline Oxide Semiconductor
octor), a polycrystalline structure, a microcrystalline structure described later, or an amorphous structure.

Note that the first metal oxide films 151a and 151b and the second metal oxide films 152a and
2b, a region having an amorphous structure, a region having a microcrystalline structure, a region having a polycrystalline structure, and CAAC-O
A mixed film having two or more types of the S region and the single crystal structure region may be formed. The mixed film has a single-layer structure including any two or more of an amorphous structure region, a microcrystalline structure region, a polycrystalline structure region, a CAAC-OS region, and a single crystal structure region, for example. There are cases. The mixed film includes, for example, a region having an amorphous structure, a region having a microcrystalline structure, a region having a polycrystalline structure,
In some cases, the semiconductor device has a stacked structure of two or more of OS regions and single-crystal regions.

Here, a second metal oxide film 152a is provided between the first metal oxide film 151a and the insulating film 111c. Therefore, the second metal oxide film 152a and the insulating film 111c
Even when a carrier trap is formed due to impurities and defects, there is a gap between the region where the carrier trap is formed and the first metal oxide film 151a. As a result, electrons flowing through the first metal oxide film 151a are less likely to be captured by the carrier trap, so that the on-state current of the transistor 22b can be increased and the field-effect mobility can be increased. When electrons are captured by the carrier trap, the electrons become negative fixed charges. As a result, the threshold voltage of the transistor changes. However, since there is a gap between the first metal oxide film 151a and a region where a carrier trap is formed, capture of electrons in the carrier trap can be suppressed and variation in threshold voltage can be reduced. can do.

Further, since the second metal oxide film 152a can shield impurities from the outside, the amount of impurities moving from the outside to the first metal oxide film 151a can be reduced. Further, the second metal oxide film 152a does not easily form oxygen vacancies. For these,
The impurity concentration and the amount of oxygen vacancies in the first metal oxide film 151a can be reduced.

Note that the first metal oxide films 151a and 151b and the second metal oxide films 152a and
2b is manufactured so as to form a continuous junction (here, in particular, a structure in which the energy at the lower end of the conduction band changes continuously between the films) instead of simply stacking the films. That is, the stacked structure is such that there is no impurity that forms a defect level such as a trap center or a recombination center at the interface between the films. If impurities are mixed between the stacked first metal oxide films 151a and 151b and the second metal oxide films 152a and 152b, continuity of the energy band is lost and carriers are generated at the interface. They are trapped or recombined and disappear.

In order to form a continuous junction, it is necessary to use a multi-chamber type film forming apparatus (sputtering apparatus) having a load lock chamber and to continuously stack each film without exposure to the atmosphere. Each chamber in the sputtering apparatus is evacuated to a high vacuum (5 × 10 ⁻⁷ Pa to 1 × 1) using an adsorption-type evacuation pump such as a cryopump in order to remove as much water and the like as impurities in the metal oxide film as much as possible. (Up to about ^10-4 Pa). Alternatively, it is preferable to use a combination of a turbo molecular pump and a cold trap so that a gas, particularly a gas containing carbon or hydrogen, does not flow backward from the exhaust system into the chamber.

As illustrated in FIG. 9B, the transistor 22c may include a multilayer 155a, and the capacitor 25c may include a multilayer 155b.

In the multilayer film 155a, a third metal oxide film 153a, a first metal oxide film 151a, and a second metal oxide film 152a are sequentially stacked. In addition, the third metal oxide film 153a
Is in contact with the insulating film 107a, the second metal oxide film 152a is in contact with the insulating film 111c, and the first metal oxide film 151a functions as a channel region.

In the multilayer film 155b, a third metal oxide film 153b, a first metal oxide film 151b, and a second metal oxide film 152b are sequentially stacked. In addition, the third metal oxide film 153b
Is in contact with the insulating film 107b, and the second metal oxide film 152b is in contact with the insulating film 113.

For the third metal oxide films 153a and 153b, a material and a formation method similar to those of the second metal oxide films 152a and 152b can be used as appropriate.

It is preferable that the thickness of each of the third metal oxide films 153a and 153b be smaller than that of each of the first metal oxide films 151a and 151b. When the thickness of the third metal oxide films 153a and 153b is greater than or equal to 1 nm and less than or equal to 5 nm, preferably greater than or equal to 1 nm and less than or equal to 3 nm, the amount of change in the threshold voltage of the transistor can be reduced.

The transistor described in this embodiment includes the insulating film 107a and the first metal oxide film 151a.
Between them, a third metal oxide film 153a is provided. Also, the first metal oxide film 15
A second metal oxide film 152a is provided between 1a and the insulating film 111c. Therefore, even if a carrier trap is formed between the insulating film 107a and the first metal oxide film 151a and between the first metal oxide film 151a and the insulating film 111c due to impurities and defects, the carrier is not removed. There is a gap between the region where the trap is formed and the first metal oxide film 151a. As a result, electrons flowing through the first metal oxide film 151a are less likely to be captured by the carrier trap, so that the on-state current of the transistor 22c can be increased and the field-effect mobility can be increased. When electrons are captured by the carrier trap, the electrons become negative fixed charges. As a result, the threshold voltage of the transistor changes. However, since there is a gap between the first metal oxide film 151a and the region where the carrier trap is formed, capture of electrons in the carrier trap can be suppressed and the threshold voltage of the transistor 22c can be reduced. Fluctuations can be reduced.

Note that the structure, method, and the like described in this embodiment can be combined as appropriate with any of the structures, methods, and the like described in the other embodiments.

(Embodiment 4)
In this embodiment, a method for manufacturing a transistor with high on-state current, high field-effect mobility, small variation in electric characteristics, and a capacitor with a reduced number of photomasks is described.
This will be described with reference to FIGS. Note that in this embodiment, the transistor described in Embodiment 2 and a method for manufacturing the transistor will be described; however, this embodiment can be applied to another embodiment as appropriate. In addition, the description of the configuration overlapping with the second embodiment will be omitted.

FIG. 10 is a top view of the pixel 13, and FIG. 11A is a dashed line AB, CD of FIG.
11B is a cross-sectional view taken along a dashed line EF in FIG.

The transistor 22d is provided in a region where the scanning line and the signal line intersect. The transistor 22d includes a conductive film 203 functioning as a gate electrode, a gate insulating film (not illustrated in FIG. 11), a metal oxide film 209a in which a channel region formed over the gate insulating film is formed,
Conductive films 213a and 213b functioning as source and drain electrodes, metal oxide film 2
09a, an insulating film (not shown in FIG. 11) covering the conductive films 213a and 213b, and a conductive film 243 functioning as a gate electrode. The transistor 22d has an opening 241
Is characterized in that the conductive films 203 and 243 functioning as gate electrodes are connected to each other.

Next, a cross-sectional structure of the transistor 22d will be described with reference to FIGS. FIG. 11 (A
) Is a cross-sectional view of the transistor 22d in the channel length direction and a cross-sectional view of the capacitor 25a.
FIG. 11B is a cross-sectional view of the transistor 22d in the channel direction.

A transistor 22d illustrated in FIGS. 11A and 11B is a channel protection transistor and is formed over a conductive film 203 provided as a gate electrode over the substrate 201 and over the substrate 201 and the conductive film 203. An insulating film 205 to be formed, an insulating film 207a formed over the insulating film 205, a metal oxide film 209a overlapping with the conductive film 203 via the insulating films 205 and 207a, and a metal oxide film 209a formed over the metal oxide film 209a. An insulating film 211c functioning as a channel protective film, and conductive films 213a and 213b having one end located on the insulating film 211c and in contact with the metal oxide film 209a. Further, the insulating film 205, the metal oxide film 209a,
The semiconductor device includes an insulating film 217 formed over the insulating film 211c and the conductive films 213a and 213b, and a conductive film 243 formed over the insulating film 217 and functioning as a gate electrode. Insulating film 205
The insulating film 207a functions as a gate insulating film. Further, the insulating film 211c and the insulating film 2
Reference numeral 17 functions as a gate insulating film.

As illustrated in FIG. 11B, the conductive films 203 and 243 are connected to each other at an opening 241 provided in the insulating films 205 and 217. In the channel width direction of the transistor, the end of the conductive film 243 is located outside the end of the metal oxide film 209a. In addition, the side surface of the metal oxide film 209a faces the conductive film 243 with the insulating film 217 interposed therebetween.
In addition, the conductive film 243 faces the side surface of the metal oxide film 209a in the opening 241.

The conductive film 243 can be formed using a material and a manufacturing method similar to those of the conductive film 221. The opening 241 can be formed at the same time that the opening 219 is formed.
As a result, the transistor 22d can be manufactured using five photomasks without increasing the number of photomasks.

Note that FIG. 11B illustrates a structure in which the conductive film 203 and the conductive film 243 are directly connected to each other. On the other hand, as shown in FIG. 11C, the conductive films 203 and 243 are
May be electrically connected via a.

That is, in the opening 251 provided in the insulating film 205, the conductive films 203 and 253 are connected. In the opening 255 provided in the insulating film 217, the conductive film 2
53 and the conductive film 243 are connected. As a result, the conductive film 203 and the conductive film 253 have a structure in which the same potential is applied.

The conductive film 253 can be formed using a material and a manufacturing method similar to those of the conductive films 213a and 213b. The height of each of the opening 251 and the opening 255 is lower than that of the opening 241 illustrated in FIG. As a result, the conductive films 243, 2 in the respective openings are formed.
It is possible to increase the coverage of the 53. As a result, the yield can be increased.

In FIG. 11B, a metal oxide film 209 is formed in the channel width direction of the transistor.
The side surface a faces the conductive film 243 functioning as a gate electrode. In FIG. 11C, in the channel width direction of the transistor, the side surface of the metal oxide film 209a faces the conductive film 253 having the same potential as the conductive films 203 and 243 functioning as gate electrodes. Therefore, the electric field of the conductive films 203 and 243 affects not only the plane but also the side surfaces of the metal oxide film 209a. As a result, the region where carriers flow in the metal oxide film 209a is not only at the interface between the insulating film 207a and the metal oxide film 209a and the interface between the metal oxide film 209a and the insulating film 211c, but also at the metal oxide film 209a. Because it will be a wide range including the inside of
The amount of carrier movement in the transistor increases. As a result, the on-state current of the transistor is increased and the field-effect mobility is increased. Typically, the field-effect mobility is 10 cm ^2.
/ V · s or more, and more preferably 20 cm ² / V · s or more. Note that the L length of the transistor is 0
. When the thickness is 5 μm or more and 6.5 μm or less, preferably more than 1 μm and less than 6 μm, the field-effect mobility increases remarkably.

In addition, at the end of the metal oxide film 209a processed by etching or the like, a defect is formed due to damage in the processing, and the edge is contaminated by adhesion of impurities or the like. For this reason,
In the case where only one of the conductive film 203 and the conductive film 243 functioning as a gate electrode is formed in a transistor, even when the metal oxide film 209a is intrinsic or substantially intrinsic, a metal oxide film The end of the material film 209a is activated and n
It tends to be a mold region (low resistance region). In addition, the n-type region corresponds to the conductive films 213a and 213.
3, the n-type region becomes a carrier path, and a parasitic channel is formed. As a result, the drain current at the threshold voltage increases stepwise, and the transistor has a threshold voltage that is negatively shifted. However,
As shown in FIGS. 11B and 11C, the conductive films 203 and 24 having the same potential
3, since the conductive film 243 faces the side surface of the metal oxide film 209a in the channel width direction, the electric field of the conductive film 243 also affects the side surface of the metal oxide film 209a. As a result, generation of a parasitic channel on the side surface of the metal oxide film 209a or on an end portion including the side surface and its vicinity is suppressed. As a result, a transistor with excellent electrical characteristics in which the drain current at the threshold voltage rises steeply is obtained.

In addition, since each of the conductive films 203 and 243 has a function of blocking an external electric field, fixed charge provided over the conductive film 243 between the substrate 201 and the conductive film 243 is a metal oxide. It does not affect the film 209a. As a result, a stress test (for example, -GBT (Gate Bias-Temperat where a negative potential is applied to the gate electrode)
ure) and deterioration of the on-state current rise voltage at different drain voltages can be suppressed.

Note that the BT stress test is a kind of accelerated test, and can evaluate a change in characteristics (that is, an aging change) of a transistor caused by long-term use in a short time. In particular, the amount of change in the threshold voltage of the transistor before and after the BT stress test is an important index for examining reliability. It can be said that the smaller the amount of change in the threshold voltage before and after the BT stress test, the higher the reliability of the transistor.

11B and 11C, an opening is provided on one side surface of the metal oxide film 109a in the channel width direction, and the conductive films 203 and 243 are electrically connected in the opening. Alternatively, an opening may be provided on the other side surface, and the conductive film 203 and the conductive film 243 may be electrically connected to each other through the opening. As a result, it is possible to prevent an increase in the resistance value of the conductive film 243 and to prevent the conductive film 243 from being on both sides of the metal oxide film 209a.
Can affect the metal oxide film 209a, and the on-state current of the transistor can be increased and the field-effect mobility can be increased.

Note that the structure, method, and the like described in this embodiment can be combined as appropriate with any of the structures, methods, and the like described in the other embodiments.

(Embodiment 5)
A driver circuit can be manufactured using the transistor and the capacitor described in Embodiments 1 to 4.

Further, the transistor 22d described in Embodiment 4 has high on-state current and high mobility. Therefore, by using a transistor including a transistor which needs to flow a large current, for example, the transistor 22d as a buffer, the channel length and the channel width can be reduced and the area of the transistor can be reduced. It is. As a result, the area of the drive circuit is reduced. In a semiconductor device having a driver circuit in a peripheral portion, typically, a display device, the area of a pixel portion in the display device can be increased by reducing the area of the driver circuit. That is, the frame of the display device can be narrowed.

Note that the structure, method, and the like described in this embodiment can be combined as appropriate with any of the structures, methods, and the like described in the other embodiments.

(Embodiment 6)
In this embodiment, electronic devices on which the semiconductor device described in the above embodiment can be mounted will be described as an example of a semiconductor device.

Examples of the electronic device include a television device (also referred to as a television or a television receiver), a monitor for a computer, a digital camera, a digital video camera, a digital photo frame, and a mobile phone (also referred to as a mobile phone or a mobile phone device). , Portable game consoles,
Examples include portable information terminals, sound reproducing devices, and large game machines such as pachinko machines. FIG. 12 shows specific examples of these electronic devices.

FIG. 12A illustrates an example of a television device. In the television device 7100, a display portion 7103 is incorporated in a housing 7101. Video can be displayed on the display portion 7103, and the display device described in the above embodiment can be used for the display portion 7103. Here, a structure in which the housing 7101 is supported by the stand 7105 is shown.

The television device 7100 can be operated with an operation switch of the housing 7101 or a separate remote controller 7110. Channels and volume can be controlled by operation keys 7109 of the remote controller 7110.
03 can be operated. Further, the remote controller 7110 may be provided with a display portion 7107 for displaying information output from the remote controller.

Note that the television set 7100 is provided with a receiver, a modem, and the like. A receiver can receive general television broadcasts, and can be connected to a wired or wireless communication network via a modem to enable one-way (sender to receiver) or two-way (sender and receiver) It is also possible to perform information communication between users or between recipients.

FIG. 12B illustrates a computer, which includes a main body 7201, a housing 7202, a display portion 7203,
A keyboard 7204, an external connection port 7205, a pointing device 7206, and the like are included. Note that the computer can use the display device described in the above embodiment for the display portion 7203.

FIG. 12C illustrates a portable game machine, which includes two housings, a housing 7301 and a housing 7302, which are connected with a joint portion 7303 so that the portable game machine can be opened or folded. A display portion 7304 is incorporated in the housing 7301, and a display portion 7305 is incorporated in the housing 7302. Also,
A portable game machine illustrated in FIG. 12C includes a speaker portion 7306, a recording medium insertion portion 73, and the like.
07, LED lamp 7308, input means (operation key 7309, connection terminal 7310, sensor 7311 (force, displacement, position, speed, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, chemical substance, voice, Time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient,
Which includes a function of measuring vibration, smell, or infrared light), a microphone 7312), and the like. Needless to say, the structure of the portable game machine is not limited to the above, and the display device described in the above embodiment may be used for at least one or both of the display portion 7304 and the display portion 7305. May be appropriately provided. FIG.
The portable game machine shown in FIG. 2C has a function of reading out a program or data recorded on a recording medium and displaying the program or data on a display unit, and a function of sharing information by performing wireless communication with another portable game machine. Having. Note that the function of the portable game machine illustrated in FIG. 12C is not limited thereto, and the portable game machine can have various functions.

FIG. 12D illustrates an example of a mobile phone. The mobile phone 7400 includes a housing 740
1, an operation button 7403, an external connection port 7404,
A speaker 7405, a microphone 7406, and the like are provided. Note that the mobile phone 7400 is manufactured using the display device described in the above embodiment for the display portion 7402.

A mobile phone 7400 illustrated in FIG. 12D can be provided by touching the display portion 7402 with a finger or the like.
You can enter information. Further, operations such as making a call and creating an e-mail can be performed by touching the display portion 7402 with a finger or the like.

The screen of the display portion 7402 has mainly three modes. The first is a display mode mainly for displaying images, and the second is an input mode mainly for inputting information such as characters. The third is a display + input mode in which the two modes of the display mode and the input mode are mixed.

For example, when making a call or composing a mail, the display portion 7402 may be set to a character input mode mainly for inputting characters, and an input operation of characters displayed on a screen may be performed. In this case, it is preferable to display a keyboard or number buttons on almost the entire screen of the display portion 7402.

In addition, by providing a detection device having a sensor for detecting inclination such as a gyro or an acceleration sensor inside the mobile phone 7400, the orientation (vertical or horizontal) of the mobile phone 7400 is determined.
The screen display of the display portion 7402 can be automatically switched.

The screen mode is switched by touching the display portion 7402 or operating the operation button 7403 of the housing 7401. In addition, switching can be performed according to the type of image displayed on the display portion 7402. For example, if the image signal displayed on the display unit is moving image data, the display mode is switched to the display mode, and if the image signal is text data, the mode is switched to the input mode.

In addition, in the input mode, a signal detected by the optical sensor of the display portion 7402 is detected, and when there is no input by a touch operation on the display portion 7402 for a certain period, the screen mode is switched from the input mode to the display mode. It may be controlled.

The display portion 7402 can function as an image sensor. For example, the display unit 7
Personal identification can be performed by touching the palm 402 with a palm or a finger and imaging a palm print, a fingerprint, or the like.
In addition, when a backlight that emits near-infrared light or a sensing light source that emits near-infrared light is used in the display portion, finger veins, palm veins, and the like can be imaged.

FIG. 12E illustrates an example of a folding computer. The foldable computer 7450 includes a housing 7451L and a housing 7451R which are connected to each other with a hinge 7454. The operation button 7453, the left speaker 7455L, and the right speaker 7
455R and an external connection port 745 (not shown) on the side of the computer 7450.
6 is provided. Note that when the hinge 7454 is folded so that the display portion 7452L provided in the housing 7451L and the display portion 7452R provided in the housing 7451R face each other, the display portion can be protected by the housing.

The display portions 7452L and 7452R can display images and can input information by touching with a finger or the like. For example, an icon indicating an installed program can be touched and selected with a finger to start the program. Alternatively, the image can be enlarged or reduced by changing the interval between the fingers touching two places of the displayed image. Alternatively, the image can be moved by moving a finger touching one portion of the displayed image. In addition, it is also possible to display an image of a keyboard, touch a displayed character or symbol with a finger to select and input information.

In addition, a gyro, an acceleration sensor, a GPS (Global P
positioning system), a fingerprint sensor, and a video camera. For example, by providing a detection device having a sensor for detecting the inclination of a gyro, an acceleration sensor, or the like, the orientation (vertical or horizontal) of the computer 7450 is determined, and the orientation of the screen to be displayed is automatically switched. be able to.

Also, the computer 7450 can be connected to a network. The computer 7450 can display information on the Internet and can be used as a terminal for remotely operating another electronic device connected to the network.

Note that the structure, method, and the like described in this embodiment can be combined as appropriate with any of the structures, methods, and the like described in the other embodiments.

Claims (5)

In a plan view, a light-transmitting pixel electrode, a light-transmitting first metal oxide film having a region overlapping with the pixel electrode, a transistor electrically connected to the pixel electrode, A liquid crystal display device comprising:
The transistor has a channel formation region in a second metal oxide film,
A storage capacitor is formed in a region where the pixel electrode and the first metal oxide film overlap each other,
An auxiliary wiring connected to the first metal oxide film through a connection hole provided in an insulating layer, the auxiliary wiring having a region arranged substantially in parallel with the source wiring in plan view;
The liquid crystal display device, wherein the auxiliary wiring has the same material as the source wiring. In a plan view, a light-transmitting pixel electrode, a light-transmitting first metal oxide film having a region overlapping with the pixel electrode, a transistor electrically connected to the pixel electrode, A liquid crystal display device comprising:
The transistor has a channel formation region in a second metal oxide film,
The pixel electrode and the first metal oxide film overlap with each other via an insulating layer provided over the transistor,
The insulating layer is in contact with the pixel electrode and the first metal oxide film;
A storage capacitor is formed in a region where the pixel electrode and the first metal oxide film overlap each other,
An auxiliary wiring connected to the first metal oxide film and having a region arranged substantially parallel to the source wiring in plan view;
The liquid crystal display device, wherein the auxiliary wiring has the same material as the source wiring. In a plan view, a light-transmitting pixel electrode, a light-transmitting first metal oxide film having a region overlapping with the pixel electrode, a transistor electrically connected to the pixel electrode, A liquid crystal display device comprising:
The transistor has a channel formation region in a second metal oxide film,
The pixel electrode and the first metal oxide film overlap with each other via an insulating layer provided over the transistor,
The insulating layer is in contact with the pixel electrode and the first metal oxide film;
A storage capacitor is formed in a region where the pixel electrode and the first metal oxide film overlap each other,
An auxiliary wiring connected to the first metal oxide film and having a region arranged substantially parallel to the source wiring in plan view;
The auxiliary wiring has the same material as the source wiring,
The liquid crystal display device, wherein the auxiliary wiring is provided so as to be in direct contact with the first metal oxide film. In any one of claims 1 to 3,
The liquid crystal display device, wherein the insulating layer is a nitride insulating film. In any one of claims 1 to 4,
The liquid crystal display device, wherein the second metal oxide film is in contact with the oxide insulating film over a channel formation region.

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