JP6490914B2 - Method for manufacturing semiconductor device - Google Patents

Description

  The present invention relates to a method for manufacturing a semiconductor device including a transistor, for example.

  Transistors used in many flat panel displays typified by liquid crystal display devices and light-emitting display devices are composed of silicon semiconductors such as amorphous silicon, single crystal silicon, or polycrystalline silicon formed on a glass substrate. . In addition, a transistor including the silicon semiconductor is used for an integrated circuit (IC) or the like.

  In recent years, a technique using a metal oxide exhibiting semiconductor characteristics for a transistor instead of a silicon semiconductor has attracted attention. Note that in this specification, a metal oxide exhibiting semiconductor characteristics is referred to as an oxide semiconductor.

  For example, a technique is disclosed in which a transistor using zinc oxide or an In—Ga—Zn-based oxide as an oxide semiconductor is manufactured, and the transistor is used for a switching element of a pixel of a display device or the like (Patent Document 1). reference).

JP 2007-123861 A

  Display devices sold in the market tend to increase in screen size to a diagonal of 40 inches or more, and further developments have been made with a screen size of a diagonal of 120 inches or more in mind. For this reason, in the glass substrate used for a display apparatus, the area increase of the 8th generation or more is progressing.

  Along with the increase in the area of the glass substrate, the photomask used in the exposure apparatus used in the manufacturing process of the display device becomes large, and the price of the photomask becomes a problem. For example, since a 10th generation photomask is expensive at 100 million yen or more, development of a manufacturing process in which the number of photomasks is reduced is required.

  On the other hand, in a liquid crystal display device which is an example of a display device, the larger the charge capacity of a capacitor element, the longer the period during which the orientation of liquid crystal molecules in the liquid crystal element can be kept constant in a situation where an electric field is applied. Can do. In a display device that displays a still image, being able to lengthen the period can reduce the number of times image data is rewritten and can reduce power consumption.

  Therefore, in order to increase the charge capacity of the capacitive element, there is a means of increasing the area occupied by the capacitive element, specifically, increasing the area where the pair of electrodes overlap. However, in the display device, when the area of the conductive film having a light-shielding property is increased in order to increase the area where the pair of electrodes overlap, the aperture ratio of the pixel is reduced and the display quality of the image is deteriorated.

  An object of one embodiment of the present invention is to provide a manufacturing method capable of reducing cost in a semiconductor device including a capacitor that has a high aperture ratio and can increase charge capacity. . Another object of one embodiment of the present invention is to provide a manufacturing method capable of reducing cost in a semiconductor device capable of reducing power consumption.

  One embodiment of the present invention is characterized in that in a manufacturing process of a channel protective transistor, a metal oxide film having a channel region and a channel protective film are formed by a process using a multi-tone photomask. . Another embodiment of the present invention is a method for manufacturing a transistor and a capacitor at the same time, in which a metal oxide film having a channel region included in the transistor and a channel protective film are formed using a multi-tone photomask. And one electrode of the capacitor element.

  According to one embodiment of the present invention, a gate electrode and a gate insulating film are formed over an insulating surface, a first metal oxide film and a first insulating film are formed over the gate insulating film, and the first insulating film is formed over the first insulating film. Forming a first mask having a region having a first thickness and a region having a second thickness greater than the first thickness, and a second mask having the same thickness as the first thickness Then, the first insulating film and the first metal oxide film are etched using the first mask and the second mask, respectively, and the second insulating film, the third insulating film, and the second insulating film are etched. A metal oxide film and a third metal oxide film are formed. Next, the first mask is processed to form a third mask and the second mask is removed, and then the second insulating film is etched using the third mask to obtain the second metal. A fourth insulating film is formed on the oxide film, and the third insulating film on the third metal oxide film is removed. Next, a fifth insulating film formed of a nitride insulating film is formed over the second metal oxide film, the third metal oxide film, the fourth insulating film, and the gate insulating film. After etching part of the insulating film 5 to form an opening in the fifth insulating film, a pair of electrodes in contact with the second metal oxide film and a wiring in contact with the third metal oxide film are formed. Form. Next, a method for manufacturing a semiconductor device in which a light-transmitting conductive film which is connected to one of the pair of electrodes and overlaps with part of the third metal oxide film is formed over the fifth insulating film. is there.

  According to one embodiment of the present invention, a gate electrode and a gate insulating film are formed over an insulating surface, a first metal oxide film and a first insulating film are formed over the gate insulating film, and the first insulating film is formed over the first insulating film. Forming a first mask having a region having a first thickness and a region having a second thickness greater than the first thickness, and a second mask having the same thickness as the first thickness To do. Next, the first insulating film and the first metal oxide film are etched using the first mask and the second mask, respectively, so that the second insulating film, the third insulating film, and the second insulating film are etched. The metal oxide film and the third metal oxide film are formed. Next, the first mask is processed to form a third mask and the second mask is removed, and then the second insulating film is etched using the third mask to obtain the second metal. A fourth insulating film is formed on the oxide film, and the third insulating film on the third metal oxide film is removed. Next, a pair of electrodes in contact with the second metal oxide film and a wiring in contact with the third metal oxide film are formed, the pair of electrodes, the fourth insulating film, the third metal oxide film, and A fifth insulating film formed of a nitride insulating film is formed on the wiring. Next, part of the fifth insulating film is etched to form an opening in the fifth insulating film, and then connected to one of the pair of electrodes and part of the third metal oxide film This is a method for manufacturing a semiconductor device in which overlapping conductive films having a light-transmitting property are formed.

  Note that after forming the fifth insulating film, an opening is formed in the gate insulating film and the fifth insulating film, a part of the gate electrode is exposed, and a light-transmitting conductive film is formed. A conductive film which is connected to the gate electrode and overlaps with the second metal oxide film may be formed.

  In addition, a transistor includes a gate electrode, a gate insulating film, a second metal oxide film, a fourth insulating film functioning as a channel protective film, and a pair of electrodes. In addition, a capacitor element is formed using the third metal oxide film, the fifth insulating film, and the light-transmitting conductive film.

  The third metal oxide film is in contact with the fifth insulating film formed of the nitride insulating film. The third metal oxide film has conductivity and functions as one electrode of the capacitor.

  In addition, the second metal oxide film and the third metal oxide film have different hydrogen concentrations, and the third metal oxide film has a higher hydrogen concentration than the second metal oxide film.

  In addition, the first metal oxide film, the second metal oxide film, and the third metal oxide film have a light-transmitting property. The first metal oxide film, the second metal oxide film, and the third metal oxide film include at least one of In, Ga, and Zn. The first metal oxide film, the second metal oxide film, and the third metal oxide film are composed of the same metal element.

  The gate insulating film, which is in contact with the second metal oxide film and the third metal oxide film, is formed using an oxide insulating film. In addition, the fourth insulating film, which is in contact with the second metal oxide film, is formed using the oxide insulating film.

  A part of the gate insulating film is formed of a nitride insulating film, and the nitride insulating film and the fifth insulating film are in contact with each other.

  The fourth insulating film includes an oxide insulating film from which part of oxygen is released by heating.

  According to one embodiment of the present invention, cost can be reduced in a method for manufacturing a semiconductor device including a capacitor that has a high aperture ratio and can increase charge capacity. Cost can be reduced in a method for manufacturing a semiconductor device capable of reducing power consumption.

10A and 10B are a block diagram and a circuit diagram illustrating one embodiment of a semiconductor device. FIG. 10 is a top view illustrating one embodiment of a transistor. FIG. 10 is a cross-sectional view illustrating one embodiment of a method for manufacturing a transistor. FIG. 10 is a cross-sectional view illustrating one embodiment of a method for manufacturing a transistor. FIG. 10 is a cross-sectional view illustrating one embodiment of a method for manufacturing a transistor. FIG. 10 is a top view illustrating one embodiment of a transistor. FIG. 10 is a cross-sectional view illustrating one embodiment of a method for manufacturing a transistor. FIG. 10 is a cross-sectional view illustrating one embodiment of a method for manufacturing a transistor. FIG. 10 is a cross-sectional view illustrating one embodiment of a transistor. FIG. 10 is a top view illustrating one embodiment of a transistor. FIG. 10 is a cross-sectional view illustrating one embodiment of a transistor. It is a figure explaining an electronic device. The figure explaining the temperature dependence of resistivity.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. However, the present invention is not limited to the following description, and it will be easily understood by those skilled in the art that modes and details can be variously changed without departing from the spirit and scope of the present invention. Therefore, the present invention should not be construed as being limited to the description of the embodiments and examples below. In the following embodiments and examples, the same portions or portions having similar functions are denoted by the same reference numerals or the same hatch patterns in different drawings, and description thereof is not repeated. To do.

  Note that in each drawing described in this specification, the size, the film thickness, or the region of each component is exaggerated for clarity in some cases. Therefore, it is not necessarily limited to the scale.

  Further, the terms such as first, second, and third used in this specification are given for avoiding confusion between components, and are not limited numerically. Therefore, for example, the description can be made by appropriately replacing “first” with “second” or “third”.

  Further, the functions of “source” and “drain” may be interchanged when the direction of current changes during circuit operation. Therefore, in this specification, the terms “source” and “drain” can be used interchangeably.

  Further, the voltage refers to a potential difference between two points, and the potential refers to electrostatic energy (electric potential energy) possessed by a unit charge in an electrostatic field at a certain point. However, generally, a potential difference between a potential at a certain point and a reference potential (for example, ground potential) is simply referred to as a potential or a voltage, and the potential and the voltage are often used as synonyms. Therefore, in this specification, unless otherwise specified, the potential may be read as a voltage, or the voltage may be read as a potential.

  In this specification, in the case where an etching step is performed after a photolithography step, the mask formed in the photolithography step is removed.

(Embodiment 1)
An object of one embodiment of the present invention is to provide a manufacturing method capable of reducing cost in a semiconductor device including a capacitor that has a high aperture ratio and can increase charge capacity. Another object of one embodiment of the present invention is to provide a manufacturing method capable of reducing cost in a semiconductor device capable of reducing power consumption.

  Note that in a metal oxide, a transistor including an oxide semiconductor that is a metal oxide having semiconductor characteristics includes oxygen vacancies as an example of defects that lead to poor electrical characteristics of the transistor. For example, in a transistor including an oxide semiconductor film in which oxygen vacancies are included in the film, the threshold voltage is likely to fluctuate in the negative direction, which tends to be normally on. This is because electric charges are generated due to oxygen vacancies in the oxide semiconductor film and resistance is reduced. When the transistor has a normally-on characteristic, various problems such as an operation failure easily occurring during operation or a high power consumption during non-operation occur. In addition, there is a problem that the electrical characteristics of the transistor, typically the amount of variation in the threshold voltage, increases due to a change with time and a stress test.

  In addition to oxygen vacancies, impurities such as silicon and carbon, which are constituent elements of the insulating film, cause defective electrical characteristics of the transistor. For this reason, when the impurities are mixed into the oxide semiconductor film, the resistance of the oxide semiconductor film is reduced, and the electrical characteristics of the transistor, typically the threshold voltage, is reduced by aging and stress tests. There is a problem that the amount of fluctuation increases.

  Therefore, in this embodiment, in addition to the problem to be solved by the invention, in a semiconductor device including a transistor including an oxide semiconductor film, oxygen vacancies in the oxide semiconductor film which is a channel region, and the oxide semiconductor film It is an object to reduce the impurity concentration of silicon.

  In this embodiment, as a method for solving one of the above problems, a method for manufacturing a semiconductor device will be described with reference to drawings. In this embodiment, a metal oxide film having a channel region and a channel protective film are formed by a process using a multi-tone photomask.

  FIG. 1A illustrates an example of a semiconductor device. In the semiconductor device illustrated in FIG. 1A, the pixel portion 11, the scan line driver circuit 14, and the signal line driver circuit 16 are arranged in parallel or substantially in parallel, and the potential is applied by the scan line driver circuit 14. There are m scanning lines 17 to be controlled, and n signal lines 19, each of which is arranged in parallel or substantially in parallel and whose potential is controlled by the signal line driving circuit 16. Further, the pixel portion 11 has a plurality of pixels 13 arranged in a matrix. In addition, along the signal line 19, each of the capacitor lines 15 is arranged in parallel or substantially in parallel. The capacitor lines 15 may be arranged in parallel or substantially in parallel along the scanning lines 17. The scanning line driving circuit 14 and the signal line driving circuit 16 may be collectively referred to as a driving circuit unit.

  Each scanning line 17 is electrically connected to n pixels 13 arranged in one of the pixels 13 arranged in m rows and n columns in the pixel unit 11. Each signal line 19 is electrically connected to m pixels 13 arranged in any column among the pixels 13 arranged in m rows and n columns. m and n are both integers of 1 or more. In addition, each capacitor line 15 is electrically connected to n pixels 13 arranged in any row among the pixels 13 arranged in m rows and n columns. When the capacitor lines 15 are arranged along the signal lines 19 in parallel or substantially in parallel, the capacitor lines 15 are arranged in any column among the pixels 13 arranged in m rows and n columns. The m pixels 13 thus connected are electrically connected.

  1B and 1C illustrate an example of a circuit configuration that can be used for the pixel 13 of the display device illustrated in FIG.

  A pixel 13 illustrated in FIG. 1B includes a liquid crystal element 21, a transistor 22, and a capacitor 25.

  One potential of the pair of electrodes of the liquid crystal element 21 is appropriately set according to the specification of the pixel 13. The alignment state of the liquid crystal element 21 is set according to written data. Further, a common potential (common potential) may be applied to one of the pair of electrodes of the liquid crystal element 21 included in each of the plurality of pixels 13. Further, a different potential may be applied to one of the pair of electrodes of the liquid crystal element 21 for each pixel 13 in each row.

  The liquid crystal element 21 is an element that controls transmission or non-transmission of light by an optical modulation action of liquid crystal. Note that the optical modulation action of the liquid crystal is controlled by an electric field applied to the liquid crystal (including a horizontal electric field, a vertical electric field, or an oblique electric field). Examples of the liquid crystal element 21 include nematic liquid crystal, cholesteric liquid crystal, smectic liquid crystal, thermotropic liquid crystal, lyotropic liquid crystal, ferroelectric liquid crystal, and antiferroelectric liquid crystal.

  As a driving method of a display device having the liquid crystal element 21, for example, a TN mode, a VA mode, an ASM (Axial Symmetrical Aligned Micro-cell) mode, an OCB (Optically Compensated Birefringence) mode, an MVA mode, and a PVA (Apatent mode) are used. , IPS mode, FFS mode, or TBA (Transverse Bend Alignment) mode may be used. However, the present invention is not limited to this, and various liquid crystal elements and driving methods thereof can be used.

  In addition, a liquid crystal element may be formed using a liquid crystal composition including a liquid crystal exhibiting a blue phase and a chiral agent. A liquid crystal exhibiting a blue phase has a response speed as short as 1 msec or less and is optically isotropic. Therefore, alignment treatment is unnecessary and viewing angle dependency is small.

  In the structure of the pixel 13 illustrated in FIG. 1B, one of the source electrode and the drain electrode of the transistor 22 is electrically connected to the signal line 19, and the other is electrically connected to the other of the pair of electrodes of the liquid crystal element 21. Connected. Further, the gate electrode of the transistor 22 is electrically connected to the scanning line 17. The transistor 22 has a function of controlling data writing of the data signal by being turned on or off. Note that the transistor 22 described in any of Embodiments 1 to 7 can be used as the transistor 22.

  In the structure of the pixel 13 illustrated in FIG. 1B, one of the pair of electrodes of the capacitor 25 is electrically connected to the capacitor line 15 to which a potential is supplied, and the other is the pair of electrodes of the liquid crystal element 21. It is electrically connected to the other. Note that the value of the potential of the capacitor line 15 is appropriately set according to the specifications of the pixel 13. The capacitor 25 has a function as a storage capacitor for storing written data.

  For example, in the display device including the pixels 13 in FIG. 1B, the pixels 13 in each row are sequentially selected by the scan line driver circuit 14, the transistors 22 are turned on, and data signal data is written.

  The pixel 13 to which data has been written is brought into a holding state when the transistor 22 is turned off. By sequentially performing this for each row, an image can be displayed.

  A pixel 13 illustrated in FIG. 1C includes a transistor 33 that performs switching of a display element, a transistor 22 that controls driving of the pixel, a transistor 35, a capacitor 25, and a light-emitting element 31.

  As an example of the light-emitting element 31, there is an element having an anode, a cathode, and an EL layer sandwiched between the anode and the cathode. As an example of an EL layer, a layer having a material capable of emitting light (fluorescence) from singlet excitons, a layer having a material capable of emitting light (phosphorescence) from triplet excitons, and a singlet exciton And a layer having a material capable of emitting light (fluorescence) from a triplet and a material capable of emitting light (phosphorescence) from triplet excitons.

  One of the source electrode and the drain electrode of the transistor 33 is electrically connected to a signal line 19 to which a data signal is supplied. Further, the gate electrode of the transistor 22 is electrically connected to the scanning line 17 to which a gate signal is applied.

  The transistor 33 has a function of controlling data writing of the data signal by being turned on or off.

  One of a source electrode and a drain electrode of the transistor 22 is electrically connected to a wiring 37 functioning as an anode line, and the other of the source electrode and the drain electrode of the transistor 22 is electrically connected to one electrode of the light-emitting element 31. Is done. Further, the gate electrode of the transistor 22 is electrically connected to the other of the source electrode and the drain electrode of the transistor 33 and one electrode of the capacitor 25.

  The transistor 22 has a function of controlling a current flowing through the light-emitting element 31 by being turned on or off.

  One of a source electrode and a drain electrode of the transistor 35 is connected to a wiring 39 to which a data reference potential is applied, and the other of the source electrode and the drain electrode of the transistor 35 is one electrode of the light emitting element 31 and the other of the capacitor element 25. Are electrically connected to the electrodes. Further, the gate electrode of the transistor 35 is electrically connected to the scanning line 17 to which a gate signal is applied.

  The transistor 35 has a function of adjusting a current flowing through the light emitting element 31. For example, when the internal resistance of the light emitting element 31 increases due to deterioration or the like of the light emitting element 31, the current flowing through the wiring 39 to which one of the source electrode and the drain electrode of the transistor 35 is connected is monitored. The flowing current can be corrected. The potential applied to the wiring 39 can be set to 0 V, for example.

  One of the pair of electrodes of the capacitor 25 is electrically connected to the other of the source electrode and the drain electrode of the transistor 33 and the gate electrode of the transistor 22, and the other of the pair of electrodes of the capacitor 25 is the source of the transistor 35. The other of the electrode and the drain electrode and one electrode of the light emitting element 31 are electrically connected.

  In the structure of the pixel 13 illustrated in FIG. 1C, the capacitor 25 has a function as a storage capacitor for storing written data.

  One of the pair of electrodes of the light-emitting element 31 is electrically connected to the other of the source and drain electrodes of the transistor 35, the other of the capacitor 25, and the other of the source and drain electrodes of the transistor 22. Further, the other of the pair of electrodes of the light emitting element 31 is electrically connected to the wiring 41 functioning as a cathode.

  As the light emitting element 31, for example, an organic electroluminescence element (also referred to as an organic EL element) or the like can be used. However, the light emitting element 31 is not limited to this, and an inorganic EL element made of an inorganic material may be used.

  Note that one of the wiring 37 and the wiring 41 is supplied with the high power supply potential VDD, and the other is supplied with the low power supply potential VSS. In the structure illustrated in FIG. 1C, a high power supply potential VDD is supplied to the wiring 37 and a low power supply potential VSS is supplied to the wiring 41.

  In the display device including the pixels 13 in FIG. 1C, the pixels 13 in each row are sequentially selected by the scan line driver circuit 14, the transistors 22 are turned on, and data signals are written.

  The pixel 13 to which data has been written is brought into a holding state when the transistor 22 is turned off. Further, since the transistor 22 is connected to the capacitor 25, the written data can be held for a long time. Further, the amount of current flowing between the source electrode and the drain electrode is controlled by the transistor 33, and the light emitting element 31 emits light with luminance corresponding to the amount of flowing current. By sequentially performing this for each row, an image can be displayed.

  Note that in this specification and the like, a display element, a display device that includes a display element, a light-emitting element, and a light-emitting device that includes a light-emitting element have various modes or have various elements. Can do. As an example of a display element, a display device, a light-emitting element, or a light-emitting device, an EL (electroluminescence) element (an EL element including an organic substance and an inorganic substance, an organic EL element, an inorganic EL element), a transistor (a transistor that emits light in response to current) , Electron emitting elements, liquid crystal elements, electronic ink, electrophoretic elements, digital micromirror devices (DMD), DMS (digital micro shutter), etc., due to the electromagnetic action, contrast, brightness, reflectance, transmittance, etc. Some have display media that vary. An example of a display device using an EL element is an EL display. As an example of a display device using an electron-emitting device, there is a field emission display (FED), a SED type flat display (SED: Surface-Conduction Electron-Emitter Display), or the like. As an example of a display device using a liquid crystal element, there is a liquid crystal display (a transmissive liquid crystal display, a transflective liquid crystal display, a reflective liquid crystal display, a direct view liquid crystal display, a projection liquid crystal display) and the like. An example of a display device using electronic ink or an electrophoretic element is electronic paper.

  Next, a specific example of an element substrate of a liquid crystal display device using a liquid crystal element for the pixel 13 will be described. Here, FIG. 2 shows a top view of the pixel 13 shown in FIG.

  In FIG. 2, the conductive film 103 functioning as a scanning line is provided so as to extend in a direction substantially orthogonal to the signal line (left-right direction in the figure). The conductive film 117a functioning as a signal line is provided so as to extend in a direction substantially perpendicular to the scanning line (vertical direction in the figure). The conductive film 117c functioning as a capacitor line is provided so as to extend in a direction parallel to the signal line. Note that the conductive film 103 functioning as a scan line is electrically connected to the scan line driver circuit 14 (see FIG. 1A) and functions as a conductive film 117a functioning as a signal line and a capacitor line. The conductive film 117c is electrically connected to the signal line driver circuit 16 (see FIG. 1A).

  The transistor 22 is provided in a region where the scanning line and the signal line intersect. The transistor 22 includes a conductive film 103 functioning as a gate electrode, a gate insulating film (not shown in FIG. 2), a metal oxide film 109a in which a channel region formed over the gate insulating film is formed, a source electrode, and a drain The conductive films 117a and 117b function as electrodes. Note that the conductive film 103 also functions as a scan line, and a region overlapping with the metal oxide film 109 a functions as a gate electrode of the transistor 22. The conductive film 117a also functions as a signal line, and a region overlapping with the metal oxide film 109a functions as a source electrode or a drain electrode of the transistor 22. In FIG. 2, the scanning line has an end portion located outside the end portion of the metal oxide film 109a in the top surface shape. Therefore, the scanning line functions as a light shielding film that blocks light from a light source such as a backlight. As a result, the metal oxide film 109a included in the transistor is not irradiated with light, so that variation in electrical characteristics of the transistor can be suppressed. In addition, since the metal oxide film 109a is formed using a metal oxide having semiconductor characteristics, a channel region is formed in the metal oxide film 109a.

  The conductive film 117b is electrically connected to a light-transmitting conductive film 119 that functions as a pixel electrode.

  The capacitor 25 includes a metal oxide film 109 c formed over the gate insulating film, a light-transmitting conductive film 119 functioning as a pixel electrode, and a dielectric insulating film formed over the transistor 22. It consists of a body membrane. Since the metal oxide film 109c has a light-transmitting property, the capacitor 25 has a light-transmitting property. In addition, the metal oxide film 109c that functions as one of the pair of electrodes of the capacitor 25 is connected to the conductive film 117c that functions as a capacitor line in the opening 115c.

  Thus, since the capacitor 25 has a light-transmitting property, the capacitor 25 can be formed large (in a large area) in the pixel 13. Therefore, while increasing the aperture ratio, it is possible to obtain 50% or more, preferably 55% or more, preferably 60% or more, and obtain a semiconductor device having an increased charge capacity. For example, in a semiconductor device with high resolution, for example, a liquid crystal display device, the area of a pixel is reduced and the area of a capacitor element is also reduced. For this reason, in a semiconductor device with high resolution, the charge capacity stored in the capacitor element is reduced. However, since the capacitor 25 described in this embodiment has a light-transmitting property, by providing the capacitor in a pixel, the aperture ratio can be increased while obtaining a sufficient charge capacity in each pixel. Typically, it can be suitably used for a high-resolution semiconductor device having a pixel density of 200 ppi or more, further 300 ppi or more, and further 500 ppi or more.

  2 has a shape in which the side parallel to the conductive film 117a functioning as a signal line is shorter than the side parallel to the conductive film 103 functioning as a scanning line, and the capacitor line A conductive film 117c functioning as a signal line is provided so as to extend in a direction parallel to the conductive film 117a functioning as a signal line. As a result, the area of the conductive film 117c occupying the pixel 13 can be reduced, so that the aperture ratio can be increased.

  Further, according to one embodiment of the present invention, since the aperture ratio can be increased even in a high-resolution display device, light from a light source such as a backlight can be efficiently used, and power consumption of the display device can be reduced. be able to.

  Next, a method for manufacturing an element substrate of a display device will be described with reference to a cross-sectional view taken along dashed line AB and a cross-sectional view taken along dashed line CD in FIG.

  As shown in FIG. 3A, a conductive film 102 is formed over the substrate 101. Next, a mask 131 is formed over the conductive film 102 by a photolithography process using a first photomask.

  There is no particular limitation on the material or the like of the substrate 101, but it is necessary to have at least heat resistance enough to withstand subsequent heat treatment. For example, a glass substrate, a ceramic substrate, a quartz substrate, a sapphire substrate, or the like may be used as the substrate 101. In addition, a single crystal semiconductor substrate formed using silicon, silicon carbide, or the like, a polycrystalline semiconductor substrate, a compound semiconductor substrate such as silicon germanium, an SOI substrate, or the like can be applied, and a semiconductor element can be formed over these substrates. A substrate provided with may be used as the substrate 101. When a glass substrate is used as the substrate 101, the sixth generation (1500 mm × 1850 mm), the seventh generation (1870 mm × 2200 mm), the eighth generation (2200 mm × 2400 mm), the ninth generation (2400 mm × 2800 mm), the tenth generation. By using a large area substrate such as a generation (2950 mm × 3400 mm), a large display device can be manufactured.

  Alternatively, a flexible substrate may be used as the substrate 101, and the conductive film 102 may be formed directly over the flexible substrate. Alternatively, after a separation layer is provided between the substrate 101 and the conductive film 102 and an element portion having a transistor is formed over the separation layer, the element portion is separated from the substrate 101 in the separation layer and transferred to another substrate. Good. As a result, the element portion can be provided over a substrate having low heat resistance or a flexible substrate.

  The conductive film 102 later becomes the conductive film 103 functioning as a gate electrode. Therefore, the conductive film 102 is appropriately formed using a conductive material that can be used as a gate electrode. The conductive film 102 is formed using a metal element selected from aluminum, chromium, copper, tantalum, titanium, molybdenum, tungsten, an alloy including any of the above metal elements, or an alloy combining any of the above metal elements. can do. Alternatively, a metal element selected from one or more of manganese and zirconium may be used. The conductive film 102 may have a single-layer structure or a stacked structure including two or more layers. For example, a single-layer structure of an aluminum film containing silicon, a two-layer structure in which an aluminum film is stacked on a titanium film, a two-layer structure in which a titanium film is stacked on a titanium nitride film, and a two-layer structure in which a tungsten film is stacked on a titanium nitride film A layer structure, a two-layer structure in which a tungsten film is stacked on a tantalum nitride film or a tungsten nitride film, a two-layer structure in which a copper film is stacked on a titanium film, a titanium film, and an aluminum film is stacked on the titanium film; There is a three-layer structure on which a titanium film is formed. Alternatively, aluminum may be a film of an element selected from titanium, tantalum, tungsten, molybdenum, chromium, neodymium, and scandium, or an alloy film or a nitride film in combination of a plurality of elements.

  The conductive film 102 includes an indium tin oxide film, an indium oxide film containing tungsten oxide, an indium zinc oxide film containing tungsten oxide, an indium oxide film containing titanium oxide, and an indium tin oxide film containing titanium oxide. Alternatively, a film formed of a light-transmitting conductive material such as an indium zinc oxide film or an indium tin oxide film to which silicon oxide is added can be used. Alternatively, a stacked structure of a film formed using the above light-transmitting conductive material and a film formed using the above metal element can be employed.

  Here, as the conductive film 102, a tungsten film with a thickness of 100 nm is formed by a sputtering method. Next, a mask is formed by a photolithography process.

  Next, part of the conductive film 102 is etched using the mask 131, so that the conductive film 103 functioning as a gate electrode is formed. The conductive film 102 can be etched using a dry etching method and / or a wet etching method. After that, the mask 131 is removed (see FIG. 3B).

  Here, the tungsten film formed as the conductive film 102 is dry-etched using a mask to form the conductive film 103 functioning as a gate electrode.

  Next, as illustrated in FIG. 3C, an insulating film 105, an insulating film 106, a metal oxide film 108, and an insulating film 110 are formed in this order. Next, masks 133 and 135 are formed over the insulating film 110 by a photolithography process using a second photomask. Here, a multi-tone mask is used as the second photomask.

  A multi-tone photomask is a mask that can be exposed with multiple levels of light, and typically includes a gray-tone mask, a half-tone mask, and the like. In the gray tone mask, a light shielding portion and a diffraction grating are formed on a light-transmitting substrate. In the diffraction grating, the interval between light transmission regions such as slits, dots, and meshes is equal to or less than the resolution limit of light used for exposure, and the light transmittance is controlled by this configuration. In the halftone mask, a light shielding portion and a semi-transmissive portion are formed on a light-transmitting substrate. The transmissivity of light used for exposure is controlled by the semi-transmissive portion.

  By using a multi-tone mask, it is possible to perform exposure with three levels of light amounts of an exposed area, a semi-exposed area, and an unexposed area. As a result, by using a multi-tone photomask, a resist mask having a plurality of (typically two types) thicknesses can be formed by one exposure and development process. Can be reduced. Here, one photomask can be reduced by using a multi-tone photomask in the formation process of the metal oxide films 109a and 109b and the insulating film 111c.

  The insulating film 105 and the insulating film 106 later become gate insulating films. The insulating film 105 is preferably formed using a nitride insulating film in order to prevent impurities from diffusing from the substrate 101 and the conductive film 103 functioning as a gate electrode to the metal oxide film 108. The insulating film 106 is in contact with the metal oxide film 108. In order to reduce the interface state between the insulating film 106 and the metal oxide film 108, the insulating film 106 is preferably formed using an oxide insulating film.

  The insulating film 105 may be formed using silicon nitride, silicon nitride oxide, aluminum nitride, aluminum nitride oxide, or the like, and is provided as a stacked layer or a single layer.

  The insulating film 106 may be formed using silicon oxide, silicon oxynitride, aluminum oxide, hafnium oxide, gallium oxide, a Ga—Zn-based metal oxide, or the like, and is provided as a stacked layer or a single layer.

Further, as the insulating film 106, hafnium silicate (HfSiO _x ), hafnium silicate added with nitrogen (HfSi _x O _y N _z ), hafnium aluminate added with nitrogen (HfAl _x O _y N _z ), hafnium oxide, By using a high-k material such as yttrium oxide, gate leakage of the transistor can be reduced.

  The total thickness of the insulating film 105 and the insulating film 106 is 5 nm to 400 nm, more preferably 10 nm to 300 nm, and more preferably 50 nm to 250 nm.

  For the insulating film 105 and the insulating film 106, a CVD method, a sputtering method, an evaporation method, a coating method, or the like can be used as appropriate.

  By providing the insulating film 105 formed using a nitride insulating film as part of the gate insulating film, impurities from the conductive film 103 functioning as a gate electrode, typically hydrogen, nitrogen, alkali metal, or alkaline earth A similar metal or the like can be prevented from moving to the metal oxide film 109a.

  In addition, by providing the gate insulating film with the insulating film 106 formed using an oxide insulating film on the metal oxide film 109a side, it is possible to reduce defect levels at the interface between the gate insulating film and the metal oxide film 109a. It is. As a result, a transistor with little deterioration in electrical characteristics can be obtained.

  The metal oxide film 108 is typically an In—Ga oxide film, an In—Zn oxide film, or an In—M—Zn oxide film (M is Al, Ga, Ti, Y, Zr, La, There are metal oxide films such as Ce or Nd). Note that since the metal oxide film has semiconductor characteristics, it can also be referred to as an oxide semiconductor.

  Note that when the metal oxide film 108 is an In-M-Zn oxide film, when the sum of In and M is 100 atomic%, the atomic ratio of In to M is preferably greater than 25 atomic%. Is less than 75 atomic%, more preferably, In is greater than 34 atomic% and M is less than 66 atomic%.

  The energy gap of the metal oxide film 108 is 2 eV or more, preferably 2.5 eV or more, more preferably 3 eV or more. In this manner, by using a metal oxide having a wide energy gap, off-state current of a transistor to be formed later can be reduced.

As the metal oxide film 108, a metal oxide film with low carrier density is used. For example, the metal oxide film 108 has a carrier density of 1 × 10 ¹⁷ pieces / cm ³ or less, preferably 1 × 10 ¹⁵ pieces / cm ³ or less, more preferably 1 × 10 ¹³ pieces / cm ³ or less, more preferably A metal oxide film of 1 × 10 ¹¹ pieces / cm ³ or less is used.

  The thickness of the metal oxide film 108 is 3 nm to 200 nm, preferably 3 nm to 100 nm, more preferably 3 nm to 50 nm.

  The metal oxide film 108 can be formed by a sputtering method, a coating method, a pulse laser deposition method, a laser ablation method, or the like.

  When the metal oxide film 108 is formed by a sputtering method, an RF power supply device, an AC power supply device, a DC power supply device, or the like can be used as appropriate as a power supply device for generating plasma.

  As the sputtering gas, a rare gas (typically argon), oxygen, a rare gas, and a mixed gas of oxygen are used as appropriate. Note that in the case of a mixed gas of a rare gas and oxygen, it is preferable to increase the gas ratio of oxygen to the rare gas.

When the metal oxide film 108 is an In-M-Zn oxide film (M is Al, Ti, Ga, Y, Zr, La, Ce, Nd, or Hf), an In-M-Zn oxide film is formed. As for the atomic ratio of the metal element of the sputtering target used for the above, when the atomic ratio of the metal element is In: M: Zn = x ₁ : y ₁ : z _{1 ,} x ₁ / y ₁ is 1/3 or more It is preferably 6 or less, more preferably 1 or more and 6 or less, and z ₁ / y ₁ is preferably 1/3 or more and 6 or less, and more preferably 1 or more and 6 or less. Note that by setting z ₁ / y ₁ to 1 or more and 6 or less, a CAAC-OS (C Axis Crystalline Oxide Semiconductor) film described later can be easily formed as the metal oxide film 108. Typical examples of the atomic ratio of the target metal element include In: M: Zn = 1: 1: 1, In: M: Zn = 3: 1: 2, In: M: Zn = 5: 5: 6, and the like. There is. Note that the atomic ratio of the metal oxide film 108 to be formed includes a variation of plus or minus 40% of the atomic ratio of the metal element included in the target as an error.

  In order to obtain the metal oxide film 108 with high purity, it is necessary to not only evacuate the chamber to a high vacuum but also to increase the purity of the sputtering gas. As the oxygen gas or argon gas used as the sputtering gas, a gas having a dew point of −40 ° C. or lower, preferably −80 ° C. or lower, more preferably −100 ° C. or lower, more preferably −120 ° C. or lower is used. Thus, moisture and the like can be prevented from being taken into the metal oxide film as much as possible.

  The insulating film 110 is preferably an oxide insulating film in order to reduce interface states at the interface with the metal oxide film 108. The insulating film 110 is typically formed using silicon oxide, silicon oxynitride, aluminum oxide, hafnium oxide, gallium oxide, a Ga—Zn-based metal oxide, or the like, and is provided as a stacked layer or a single layer.

Further, part or all of the insulating film 110 is preferably formed using an oxide insulating film containing more oxygen than oxygen that satisfies the stoichiometric composition. Part of oxygen is released by heating from the oxide insulating film containing oxygen in excess of that in the stoichiometric composition. An oxide insulating film containing more oxygen than that in the stoichiometric composition is subjected to heat treatment at a surface temperature of 100 ° C. to 700 ° C., or 100 ° C. to 500 ° C. in TDS (Thermal Desorption Spectroscopy) analysis. The oxide insulating film has an oxygen desorption amount of 1.0 × 10 ¹⁸ atoms / cm ³ or more, preferably 3.0 × 10 ²⁰ atoms / cm ³ or more in terms of oxygen atoms.

The insulating film 110 preferably has a small amount of defects. Typically, the ESR measurement shows that the spin density of a signal appearing at g = 2.001 derived from a dangling bond of silicon is 1.5 × 10 ^18. It is preferably less than spins / cm ³ , further 1 × 10 ¹⁸ spins / cm ³ or less, 1 × 10 ¹⁷ spins / cm ³ or less, and further preferably lower than the lower limit of detection.

  The thickness of the insulating film 110 is 30 nm to 500 nm, preferably 50 nm to 400 nm.

  When the insulating film 110 is formed using an oxide insulating film containing oxygen in excess of the stoichiometric composition, oxygen released from the insulating film 110 by heat treatment is converted into a metal oxide film. 108. As a result, oxygen vacancies contained in the metal oxide film 108 can be reduced.

  The insulating film 110 can be formed by a sputtering method, a CVD method, or the like.

  In the case where the insulating film 110 is formed by a CVD method, it is preferable to use a deposition gas and an oxidation gas containing silicon as a source gas. Typical examples of the deposition gas containing silicon include silane, disilane, trisilane, and fluorinated silane. Examples of the oxidizing gas include oxygen, ozone, dinitrogen monoxide, and nitrogen dioxide.

In the case where the insulating film 110 is formed using an oxide insulating film containing oxygen in excess of the stoichiometric composition, a substrate placed in a processing chamber evacuated in a plasma CVD apparatus is heated to 180 ° C. The temperature is maintained at 280 ° C. or lower, more preferably 200 ° C. or higher and 240 ° C. or lower, and the raw material gas is introduced into the processing chamber so that the pressure in the processing chamber is 100 Pa or higher and 250 Pa or lower, more preferably 100 Pa or higher and 200 Pa or lower. electrode 0.17 W / cm ² or more 0.5 W / cm ² or less, which is, more preferably the conditions for supplying the 0.25 W / cm ² or more 0.35 W / cm ² or less of the high frequency power, a silicon oxide film or oxynitride A silicon film can be formed.

  As the conditions for forming the insulating film 110, by supplying high-frequency power having the above power density in the reaction chamber at the above pressure, the decomposition efficiency of the source gas in plasma is increased, oxygen radicals are increased, and the oxidation of the source gas proceeds. Therefore, the oxygen content in the insulating film 110 is higher than the stoichiometric composition. On the other hand, in a film formed at the above substrate temperature, since the bonding force between silicon and oxygen is weak, part of oxygen in the film is released by heat treatment in a later step. As a result, the insulating film 110 containing more oxygen than that in the stoichiometric composition and from which part of oxygen is released by heating can be formed.

  Note that the insulating film 110 has a multilayer structure of a first insulating film and a second insulating film, and is formed using an oxide insulating film that can transmit oxygen as the first insulating film. As the film, an oxide insulating film which contains more oxygen than that in the stoichiometric composition and from which part of oxygen is released by heating may be formed. With this stacked structure, the first insulating film serves as a protective film for the metal oxide film in the step of forming the second insulating film. As a result, the second insulating film can be formed using high-frequency power with high power density while reducing damage to the metal oxide film.

  Alternatively, after the insulating film is formed by a sputtering method, a CVD method, or the like, the insulating film 110 can be formed by adding oxygen to the insulating film. Note that methods for adding oxygen to the insulating film include an ion doping method, an ion implantation method, and the like. Alternatively, oxygen can be added to the insulating film by exposing the insulating film to plasma containing oxygen generated in an oxidizing gas atmosphere.

Here, a 400-nm-thick silicon nitride film is formed as the insulating film 105 by a CVD method. As the insulating film 106, a silicon oxynitride film with a thickness of 50 nm is formed by a CVD method. As the metal oxide film 108, an In—Ga—Zn oxide film with a thickness of 35 nm is formed by a sputtering method using an In—Ga—Zn oxide target (In: Ga: Zn = 1: 1: 1). Form. Further, as the insulating film 110, silane with a flow rate of 200 sccm and dinitrogen monoxide with a flow rate of 4000 sccm are used as source gas, the pressure of the reaction chamber is 200 Pa, the substrate temperature is 220 ° C., and a high frequency power of 1500 W is used using a 27.12 MHz high frequency power source. A 400-nm-thick silicon oxynitride film is formed as the insulating film 110 by a plasma CVD method in which power is supplied to the parallel plate electrodes. In the plasma CVD device electrode area is a plasma CVD apparatus of a parallel plate type is 6000 cm ^2, which is 0.25 W / cm ² in terms of power (power density) per unit area power supplied. Further, masks 133 and 135 are formed using a halftone mask.

  Next, part of the insulating film 110 is etched using the masks 133 and 135 to form insulating films 111a and 111b as illustrated in FIG. The insulating film 110 can be etched using a dry etching method and / or a wet etching method. Next, part of the metal oxide film 108 is etched using the masks 133 and 135 to form metal oxide films 109a and 109b. The metal oxide film 108 can be etched using a dry etching method and / or a wet etching method.

  Here, part of each of the insulating film 110 and the metal oxide film 108 is etched by a dry etching method.

  Next, the masks 133 and 135 are processed. Here, the mask 133 is processed to be reduced in size and the mask 135 is removed. Here, the masks 133 and 135 are processed by plasma treatment in which the masks 133 and 135 are exposed to plasma generated in an atmosphere containing oxygen. As an atmosphere containing oxygen, there is an atmosphere containing an oxidizing gas such as oxygen, ozone, dinitrogen monoxide, and nitrogen dioxide. Note that the masks 133 and 135 may be exposed to plasma generated with a bias applied to the substrate 101 side. An example of an apparatus that performs such plasma processing is an ashing apparatus.

  Here, the masks 133 and 135 are processed by exposing the masks 133 and 135 to plasma generated in an atmosphere containing oxygen.

  As a result, as shown in FIG. 3D, a mask 137 with the mask 133 retracted can be formed. Further, the mask 135 is removed, and the insulating film 111b is exposed. Note that in FIG. 3D, broken lines correspond to the masks 133 and 135 shown in FIG.

  Next, part of the insulating film 111a is etched using the mask 137 to form the insulating film 111c and remove the insulating film 111b as shown in FIG. The insulating films 111a and 111b can be etched using a dry etching method and / or a wet etching method. Note that here, it is preferable to use a condition in which the insulating film 111a is etched and the metal oxide films 109a and 109b are not etched, or the etching rate of the metal oxide films 109a and 109b is lower than that of the insulating film 111a.

  Here, part of the insulating film 111a is etched and the insulating film 111b is removed by a dry etching method.

  As a result, the insulating film 111c functioning as a channel protective film can be formed. Further, since no mask is formed over the insulating film 111b, the insulating film 111b is removed, and the surface of the metal oxide film 109b is exposed. Note that the insulating film 106 is formed using an oxide insulating film similarly to the insulating film 110. Therefore, the insulating film 106 is also etched in this step, so that the insulating film 107a whose end portion substantially coincides with the metal oxide film 109a is formed between the insulating film 105 and the metal oxide film 109a. In addition, an insulating film 107b whose end portion substantially coincides with the metal oxide film 109b is formed between the insulating film 105 and the metal oxide film 109b.

  Through the above steps, the metal oxide films 109a and 109b including the channel region of the transistor and the insulating film 111c functioning as a channel protective film can be formed with one photomask.

  Note that in the etching step for forming the insulating film 111c, regions of the metal oxide films 109a and 109b exposed to plasma are damaged and oxygen vacancies are formed. Therefore, the conductivity of the metal oxide film 109a that is not covered with the insulating film 111c and the metal oxide film 109b are increased.

  Next, heat treatment is performed. The temperature of the heat treatment is typically 150 ° C. or higher and lower than the substrate strain point, preferably 300 ° C. or higher and 500 ° C. or lower, preferably 320 ° C. or higher and 470 ° C. or lower.

  For the heat treatment, an electric furnace, an RTA apparatus, or the like can be used. By using the RTA apparatus, heat treatment can be performed at a temperature equal to or higher than the strain point of the substrate for a short time. Therefore, the heat treatment time can be shortened.

  The heat treatment may be performed in an atmosphere of nitrogen, oxygen, ultra-dry air (air with a water content of 20 ppm or less, preferably 1 ppm or less, preferably 10 ppb or less), or a rare gas (such as argon or helium). Note that it is preferable that hydrogen, water, and the like be not contained in the nitrogen, oxygen, ultra-dry air, or the rare gas.

  Through the heat treatment, part of oxygen contained in the insulating film 111c can be moved to the metal oxide film 109a, so that oxygen vacancies contained in the metal oxide film 109a can be reduced.

  Note that in the case where the insulating film 110 is formed over the metal oxide film 108 with heating, oxygen can be transferred to the metal oxide film 108 so that oxygen vacancies contained in the metal oxide film 108 are filled. Therefore, it is not necessary to perform the heat treatment.

  Here, after heat treatment is performed at 450 ° C. for one hour in a nitrogen atmosphere, heat treatment is performed at 450 ° C. for one hour in a nitrogen and oxygen atmosphere.

  Next, as illustrated in FIG. 4A, the insulating film 112 is formed over the insulating film 105, the insulating film 107, the metal oxide films 109a and 109b, and the insulating film 111c. Next, a mask 139 is formed over the insulating film 112 by a photolithography process using a third photomask.

  A nitride insulating film is provided as the insulating film 112. Examples of the nitride insulating film include silicon nitride, silicon nitride oxide, aluminum nitride, and aluminum nitride oxide. A nitride insulating film containing hydrogen may be formed as the nitride insulating film.

  The thickness of the insulating film 112 is 10 nm to 400 nm, more preferably 50 nm to 300 nm.

  The insulating film 112 can be formed by a sputtering method, a CVD method, or the like. Alternatively, after an insulating film is formed by a sputtering method, a CVD method, or the like, hydrogen may be added to the insulating film. Note that there are an ion doping method, an ion implantation method, and the like as a method for adding hydrogen to the insulating film. Alternatively, hydrogen can be added to the insulating film by exposing plasma generated in a gas atmosphere containing hydrogen to the insulating film.

  Here, a silicon nitride film with a thickness of 100 nm is formed as the insulating film 112 by a plasma CVD method using silane, ammonia, and nitrogen as source gases.

  Oxygen vacancies are formed in the metal oxide films 109a and 109b due to plasma damage that occurs when the insulating film 112 is formed over the insulating film 111c. For this reason, the region of the metal oxide film 109a that is not covered with the insulating film 111c and the conductivity of the metal oxide film 109b are increased. In addition, by using a nitride insulating film containing hydrogen as the insulating film 112, hydrogen moves from the insulating film 112 to the metal oxide films 109a and 109b. When hydrogen moves to oxygen vacancies, electrons as carriers are generated. As a result, the metal oxide film 109b has high conductivity and becomes a metal oxide film 109c having conductivity. Further, the metal oxide film 109 c functions as one electrode of the capacitor 25.

  Note that the metal oxide film 109a is in contact with the insulating film 113 outside the insulating film 111c. Since the insulating film 111c is an oxide insulating film, the metal oxide film 109a in contact with the insulating film 111c functions as a channel region of the transistor. Further, in the metal oxide film 109a, a region in contact with the insulating film 113 has high conductivity like the metal oxide film 109c. That is, the metal oxide film 109c functions as a low resistance region. Therefore, the on-state current of the transistor can be increased and field effect mobility can be increased.

  Note that since the nitride insulating film also functions as a blocking film for water, hydrogen, and the like, by providing a nitride insulating film as the insulating film 112, hydrogen, water, and the like can enter the metal oxide film 109a from the outside. Can be prevented.

Both the metal oxide film 109a and the metal oxide film 109c are formed over the gate insulating film but have different impurity concentrations. Specifically, the impurity concentration of the metal oxide film 109c is higher than that of the metal oxide film 109a. For example, the hydrogen concentration contained in the metal oxide film 109a is less than 5 × 10 ¹⁹ atoms / cm ³ , preferably less than 5 × 10 ¹⁸ atoms / cm ³ , preferably 1 × 10 ¹⁸ atoms / cm ³ or less, more preferably Is 5 × 10 ¹⁷ atoms / cm ³ or less, more preferably 1 × 10 ¹⁶ atoms / cm ³ or less, and the concentration of hydrogen contained in the metal oxide film 109c is 8 × 10 ¹⁹ or more, preferably 1 × 10 ^20. atoms / cm ³ or more, more preferably 5 × 10 ²⁰ or more. Further, the concentration of hydrogen contained in the metal oxide film 109c is twice as high as that of the metal oxide film 109a, preferably 10 times or more.

In addition, the resistivity of the metal oxide film 109c is lower than that of the metal oxide film 109a. The resistivity of the metal oxide film 109c is preferably 1 × 10 ⁻⁸ times or more and less than 1 × 10 ⁻¹ times the resistivity of the metal oxide film 109a, typically 1 × 10 ⁻³ Ωcm or more. The resistivity is preferably 1 × 10 ⁻³ Ωcm or more and less than 1 × 10 ⁻¹ Ωcm, more preferably less than 1 × 10 ⁴ Ωcm.

  Next, heat treatment may be performed. The temperature of the heat treatment is typically 150 ° C to 400 ° C, preferably 300 ° C to 400 ° C, preferably 320 ° C to 370 ° C.

  In the transistor 22, the insulating film 105 formed of a nitride insulating film and the insulating film 112 formed of a nitride insulating film are in contact with each other, and the metal oxide film 109 a and the insulating film 111 c are interposed between the insulating films 105 and 112. Is provided. The nitride insulating film has a small diffusion coefficient of hydrogen, water, and oxygen, and has high blocking properties for hydrogen, water, and oxygen. Further, the insulating film 111c is formed using an oxide insulating film containing more oxygen than that in the stoichiometric composition, so that the oxygen contained in the metal oxide film 109a can be external to the heat treatment. Can be prevented from spreading. In addition, diffusion of oxygen contained in the metal oxide film 109a to the outside can be suppressed. As a result, oxygen vacancies in the metal oxide film 109a can be reduced. Furthermore, diffusion of hydrogen, water, or the like from the outside to the metal oxide film 109a can be suppressed. Therefore, hydrogen, water, and the like in the metal oxide film 109a can be reduced. As a result, a highly reliable transistor can be manufactured.

  Here, heat treatment is performed at 350 ° C. for one hour in a nitrogen and oxygen atmosphere.

  Next, after part of the insulating film 112 is etched and removed using the mask 139, an insulating film 113 having openings 115a, 115b, and 115c is formed as shown in FIG. 4B. A part of the metal oxide film 109a is exposed in the openings 115a and 115b. In the opening 115c, a part of the metal oxide film 109c is exposed. The insulating film 112 can be etched using a dry etching method and / or a wet etching method. Next, the mask 139 is removed.

  Here, part of the insulating film 112 is etched by a dry etching method.

  Next, as illustrated in FIG. 4C, a conductive film 116 is formed over the exposed portion of the metal oxide film 109 a, the exposed portion of the metal oxide film 109 c, and the insulating film 113. Next, masks 141a, 141b, and 141c are formed over the conductive film 116 by a photolithography process using a fourth photomask.

  The conductive film 116 later becomes conductive films 117a and 117b that function as a pair of electrodes and a conductive film 117c that functions as a capacitor line. Therefore, the conductive film 116 is appropriately formed using a conductive material that can be used as an electrode. For the conductive film 116, a single metal made of aluminum, titanium, chromium, nickel, copper, yttrium, zirconium, molybdenum, silver, tantalum, or tungsten, or an alloy containing this as a main component is used as a single-layer structure or a stacked structure. For example, a single layer structure of an aluminum film containing silicon, a two layer structure in which an aluminum film is stacked on a titanium film, a two layer structure in which an aluminum film is stacked on a tungsten film, and a copper film on a copper-magnesium-aluminum alloy film Two-layer structure to stack, two-layer structure to stack a copper film on a titanium film, two-layer structure to stack a copper film on a tungsten film, a titanium film or a titanium nitride film, and an overlay on the titanium film or titanium nitride film A three-layer structure in which an aluminum film or a copper film is stacked and a titanium film or a titanium nitride film is further formed thereon, a molybdenum film or a molybdenum nitride film, and an aluminum film or a copper layer stacked on the molybdenum film or the molybdenum nitride film There is a three-layer structure in which films are stacked and a molybdenum film or a molybdenum nitride film is further formed thereon. Note that a transparent conductive material containing indium oxide, tin oxide, or zinc oxide may be used.

  The conductive film 116 is formed by a sputtering method, a CVD method, an evaporation method, or the like.

  Here, as the conductive film 116, a 50-nm-thick tungsten film and a 300-nm-thick copper film are formed by a sputtering method.

  Next, part of the conductive film 116 is etched using the masks 141a, 141b, and 141c, so that the conductive films 117a and 117b functioning as a pair of electrodes and the conductive film 117c functioning as a capacitor line are formed. The conductive film 116 can be etched using a dry etching method and / or a wet etching method. After that, the masks 141a, 141b, and 141c are removed (see FIG. 4D).

  Note that an insulating film 113 formed using a nitride insulating film is formed around a region where the metal oxide film 109a and the conductive films 117a and 117b are in contact with each other. Since the diffusion coefficient of copper in the nitride insulating film is small, copper diffusion can be prevented. Therefore, when part or all of the conductive films 117a and 117b are formed of a copper film, the insulating film 113 functions as a copper barrier film. For this reason, the diffusion of copper into the channel region is reduced, and variations in the electrical characteristics of the transistor can be reduced.

  Further, in the conductive films 117a and 117b, in a region in contact with the metal oxide film 109a, a conductive material that easily bonds to oxygen such as tungsten, titanium, aluminum, copper, molybdenum, chromium, or tantalum alone or an alloy is used. Oxygen in the metal oxide film 109a is extracted to a conductive material that is easily bonded to oxygen. In addition, tungsten, titanium, aluminum, copper, molybdenum, chromium, or a part of tantalum constituent elements may be mixed into the metal oxide film 109a in some cases. As a result, in the metal oxide film 109a, a low resistance region is formed in the vicinity of the region in contact with the conductive films 117a and 117b. Since the low resistance region has high conductivity, the contact resistance between the metal oxide film 109a and the conductive films 117a and 117b can be reduced, and the on-state current of the transistor can be increased.

  Next, as illustrated in FIG. 5A, a light-transmitting conductive film 118 is formed over the insulating film 113 and the conductive films 117a, 117b, and 117c. Next, a mask 143 is formed over the conductive film 118 by a photolithography process using a fifth photomask.

  The conductive film 118 later becomes a conductive film 119 functioning as a pixel electrode. Therefore, the conductive film 118 is appropriately formed using a conductive material that can be used as a pixel electrode. The conductive film 118 includes an indium tin oxide film, an indium oxide film containing tungsten oxide, an indium zinc oxide film containing tungsten oxide, an indium oxide film containing titanium oxide, an indium tin oxide film containing titanium oxide, and indium. A conductive film formed using a light-transmitting conductive material such as a zinc oxide film or an indium tin oxide film to which silicon oxide is added can be used.

  The conductive film 118 is formed by a sputtering method, an evaporation method, a coating method, or the like.

  Here, an ITO film with a thickness of 100 nm is formed as the conductive film 118 by a sputtering method.

  Next, part of the conductive film 118 is etched using the mask 143, so that the conductive film 119 functioning as a pixel electrode is formed. The conductive film 119 is formed so as to be in contact with the conductive film 117b functioning as a pair of electrodes and to overlap with the metal oxide film 109c with the insulating film 113 interposed therebetween. The conductive film 118 can be etched by a dry etching method and / or a wet etching method. After that, the mask 143 is removed (see FIG. 5B).

  Here, part of the conductive film 118 is etched by a wet etching method.

  Through the above steps, the conductive film 103 functioning as a gate electrode, the insulating films 105 and 106a functioning as a gate insulating film, the metal oxide film 109a, the insulating film 111c covering part of the metal oxide film 109a, and the metal oxide film The transistor 22 including the conductive films 117a and 117b in contact with 109a and functioning as a pair of electrodes can be manufactured. In addition, a conductive film 119 functioning as a pixel electrode can be formed in contact with the conductive film 117b included in the transistor 22. In addition, the capacitor 25 including the metal oxide film 109c, the insulating film 113, and the conductive film 119 formed over the insulating film 106b can be manufactured. That is, an element substrate including the transistor 22, the conductive film 119 functioning as a pixel electrode, and the capacitor 25 can be manufactured using five photomasks. In this embodiment, since the metal oxide film and the channel protective film are formed using one photomask, the photomask necessary for manufacturing the element substrate can be reduced.

  In the semiconductor device described in this embodiment, a metal oxide film that serves as one electrode of the capacitor is formed at the same time as the metal oxide film including the channel region of the transistor. Therefore, the metal oxide film including the channel region of the transistor and the metal oxide film serving as one electrode of the capacitor are formed using the same metal element. In addition, a conductive film functioning as a pixel electrode is used as the other electrode of the capacitor. For these reasons, a process for forming a new conductive film is not required for forming the capacitor, and the manufacturing process of the display device can be reduced. In the capacitor, both the metal oxide film 109c and the conductive film 119 which are a pair of electrodes have a light-transmitting property, so that the capacitor 25 has a light-transmitting property. As a result, the aperture ratio of the pixel can be increased while increasing the area occupied by the capacitive element. Furthermore, a display device with reduced power consumption can be manufactured.

<About metal oxide films>
When hydrogen is added to an oxide semiconductor in which oxygen vacancies are formed, hydrogen enters oxygen vacancy sites and donor levels are formed in the vicinity of the conduction band. As a result, the oxide semiconductor has high conductivity and becomes a conductor. A conductive oxide semiconductor can be referred to as an oxide conductor. In general, an oxide semiconductor has a large energy gap and thus has a light-transmitting property with respect to visible light. On the other hand, an oxide conductor is an oxide semiconductor having a donor level in the vicinity of the conduction band. Therefore, the influence of absorption due to the donor level is small, and the light transmittance is comparable to that of an oxide semiconductor with respect to visible light.

  Here, a film formed of an oxide semiconductor (hereinafter referred to as an oxide semiconductor film (OS)) used for the metal oxide film 109a and an oxide used for the metal oxide film 109c are used. The temperature dependence of resistivity in a film formed of a conductor (hereinafter referred to as an oxide conductor film (OC)) will be described with reference to FIG. In FIG. 13, the horizontal axis represents the measured temperature, and the vertical axis represents the resistivity. In addition, measurement results of the oxide semiconductor film (OS) are indicated by circles, and measurement results of the oxide conductor film (OC) are indicated by square marks.

  Note that a sample including an oxide semiconductor film (OS) was formed on a glass substrate by a sputtering method using a sputtering target with an atomic ratio of In: Ga: Zn = 1: 1: 1.2. A -Ga-Zn oxide film is formed, and an In-Ga-Zn oxide film having a thickness of 20 nm is formed by a sputtering method using a sputtering target with an atomic ratio of In: Ga: Zn = 1: 4: 5. After heat treatment in a nitrogen atmosphere at 450 ° C., heat treatment was performed in a mixed gas atmosphere of nitrogen and oxygen at 450 ° C., and a silicon oxynitride film was formed by a plasma CVD method.

  In addition, a sample including an oxide conductor film (OC) was formed on a glass substrate by a sputtering method using a sputtering target having an atomic ratio of In: Ga: Zn = 1: 1: 1. A Ga—Zn oxide film is formed and heat-treated in a nitrogen atmosphere at 450 ° C., and then heat-treated in a mixed gas atmosphere of nitrogen and oxygen at 450 ° C., and a silicon nitride film is formed by a plasma CVD method. It was.

  As can be seen from FIG. 13, the temperature dependence of the resistivity in the oxide conductor film (OC) is smaller than the temperature dependence of the resistivity in the oxide semiconductor film (OS). Typically, the rate of change in resistivity of the oxide semiconductor film (OC) at 80 K or more and 290 K or less is less than ± 20%. Or the change rate of the resistivity in 150K or more and 250K or less is less than +/- 10%. That is, the oxide conductor is a degenerate semiconductor, and it is presumed that the conduction band edge and the Fermi level match or substantially match. Therefore, the oxide conductor film can be used for a resistor element, a wiring, a capacitor element electrode, a pixel electrode, a common electrode, and the like.

<About Oxide Semiconductor Film and Metal Oxide Film>
Next, one embodiment applicable to a metal oxide film having semiconductor characteristics and an oxide semiconductor film is described. Here, the oxide semiconductor film is described as a typical example; however, the structure of the oxide semiconductor film can be applied to the metal oxide film as appropriate.

  The oxide semiconductor film is preferably formed using a CAAC-OS film. The CAAC-OS film has c-axis orientation and a clear crystal grain boundary (also referred to as a grain boundary) cannot be confirmed. As a result, in the channel etch transistor, the amount of overetching of the oxide semiconductor film when forming the pair of electrodes is small. As a result, when the oxide semiconductor film is formed using a CAAC-OS film, a channel-etched transistor can be manufactured. Note that in a channel-etched transistor, the distance between a pair of electrodes, that is, the channel length can be reduced to be 0.5 μm or more and 6.5 μm or less, preferably more than 1 μm and less than 6 μm.

  An oxide semiconductor film includes an oxide semiconductor having a single crystal structure (hereinafter referred to as a single crystal oxide semiconductor), an oxide semiconductor having a polycrystalline structure (hereinafter referred to as a polycrystalline oxide semiconductor), and a microcrystalline structure. May be composed of one or more oxide semiconductors (hereinafter referred to as microcrystalline oxide semiconductors). A CAAC-OS, a single crystal oxide semiconductor, a polycrystalline oxide semiconductor, and a microcrystalline oxide semiconductor are described below.

<CAAC-OS>
The CAAC-OS film is one of oxide semiconductor films having a plurality of crystal parts. In addition, a crystal part included in the CAAC-OS film has c-axis alignment. In the planar TEM image, the area of the crystal part included in the CAAC-OS film is 2500 nm ² or more, more preferably 5 μm ² or more, and still more preferably 1000 μm ² or more. Further, in the cross-sectional TEM image, the crystal portion is 50% or more, preferably 80% or more, and more preferably 95% or more, whereby a thin film having physical properties close to a single crystal is obtained.

  When the CAAC-OS film is observed with a transmission electron microscope (TEM), a clear boundary between crystal parts, that is, a grain boundary (also referred to as a grain boundary) cannot be confirmed. Therefore, it can be said that the CAAC-OS film is unlikely to decrease in electron mobility due to crystal grain boundaries.

  When the CAAC-OS film is observed by TEM (cross-sectional TEM observation) from a direction substantially parallel to the sample surface, it can be confirmed that metal atoms are arranged in layers in the crystal part. Each layer of metal atoms has a shape reflecting unevenness of a surface (also referred to as a formation surface) or an upper surface on which the CAAC-OS film is formed, and is arranged in parallel with the formation surface or the upper surface of the CAAC-OS film. . In this specification, “parallel” refers to a state in which two straight lines are arranged at an angle of −10 ° to 10 °. Therefore, the case of −5 ° to 5 ° is also included. “Vertical” refers to a state in which two straight lines are arranged at an angle of 80 ° to 100 °. Therefore, the case of 85 ° to 95 ° is also included.

  On the other hand, when the CAAC-OS film is observed by TEM (planar TEM observation) from a direction substantially perpendicular to the sample surface, it can be confirmed that metal atoms are arranged in a triangular shape or a hexagonal shape in the crystal part. However, there is no regularity in the arrangement of metal atoms between different crystal parts.

  Note that when electron diffraction is performed on the CAAC-OS film, spots (bright spots) indicating orientation are observed.

  From the cross-sectional TEM observation and the planar TEM observation, it is found that the crystal part of the CAAC-OS film has orientation.

  When structural analysis is performed on a CAAC-OS film using an X-ray diffraction (XRD) apparatus, a diffraction angle (2θ) of 31 is determined in the analysis of the CAAC-OS film by an out-of-plane method. A peak may appear in the vicinity of °. This peak is attributed to the (00x) plane (x is an integer) of the crystal of InGaZn oxide; therefore, the crystal of the CAAC-OS film has c-axis orientation, and the c-axis is on the formation surface or the upper surface. It can be confirmed that it is oriented in a substantially vertical direction.

  On the other hand, when the CAAC-OS film is analyzed by an in-plane method in which X-rays are incident from a direction substantially perpendicular to the c-axis, a peak may appear when 2θ is around 56 °. This peak is attributed to the (110) plane of the InGaZn oxide crystal. In the case of a single crystal oxide semiconductor film of InGaZn oxide, when 2θ is fixed in the vicinity of 56 ° and analysis (φ scan) is performed while rotating the sample with the normal vector of the sample surface as the axis (φ axis), Six peaks attributed to a crystal plane equivalent to the (110) plane are observed. On the other hand, in the case of a CAAC-OS film, a peak is not clearly observed even when φ scan is performed with 2θ fixed at around 56 °.

  From the above, in the CAAC-OS film, the orientation of the a-axis and the b-axis is irregular between different crystal parts, but the c-axis is aligned, and the c-axis is a normal line of the formation surface or the top surface. It can be seen that the direction is parallel to the vector. Therefore, each layer of metal atoms arranged in a layer shape confirmed by the above-mentioned cross-sectional TEM observation is a plane parallel to the ab plane of the crystal.

  Note that a crystal is formed when a CAAC-OS film is formed or when crystallization treatment such as heat treatment is performed. As described above, the c-axis of the crystal is oriented in a direction parallel to the normal vector of the formation surface or the top surface of the CAAC-OS film. Therefore, for example, when the shape of the CAAC-OS film is changed by etching or the like, the c-axis of the crystal may not be parallel to the normal vector of the formation surface or the top surface of the CAAC-OS film.

  Further, the crystallinity in the CAAC-OS film is not necessarily uniform. For example, in the case where the crystal part of the CAAC-OS film is formed by crystal growth from the vicinity of the top surface of the CAAC-OS film, the region near the top surface can have a higher degree of crystallinity than the region near the formation surface. is there. In addition, in the case where an impurity is added to the CAAC-OS film, the crystallinity of a region to which the impurity is added changes, and a region having a different degree of crystallinity may be formed.

  Note that in the analysis of the CAAC-OS film by an out-of-plane method, a peak may also appear when 2θ is around 36 ° in addition to the peak when 2θ is around 31 °. A peak at 2θ of around 36 ° indicates that a crystal part having no c-axis alignment is included in part of the CAAC-OS film. The CAAC-OS film preferably has a peak at 2θ of around 31 ° and no peak at 2θ of around 36 °.

  The CAAC-OS film is an oxide semiconductor film with a low impurity concentration. The impurity is an element other than the main component of the oxide semiconductor film, such as hydrogen, carbon, silicon, or a transition metal element. In particular, an element such as silicon, which has a stronger bonding force with oxygen than the metal element included in the oxide semiconductor film, disturbs the atomic arrangement of the oxide semiconductor film by depriving the oxide semiconductor film of oxygen, and has crystallinity. It becomes a factor to reduce. In addition, heavy metals such as iron and nickel, argon, carbon dioxide, and the like have large atomic radii (or molecular radii). Therefore, if they are contained inside an oxide semiconductor film, the atomic arrangement of the oxide semiconductor film is disturbed, resulting in crystallinity. It becomes a factor to reduce. Note that the impurity contained in the oxide semiconductor film might serve as a carrier trap or a carrier generation source.

  The CAAC-OS film is an oxide semiconductor film with a low density of defect states. For example, oxygen vacancies in the oxide semiconductor film can serve as carrier traps or can generate carriers by capturing hydrogen.

  A low impurity concentration and a low density of defect states (small number of oxygen vacancies) is called high purity intrinsic or substantially high purity intrinsic. A highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor film has few carrier generation sources, and thus can have a low carrier density. Therefore, a transistor including the oxide semiconductor film rarely has electrical characteristics (also referred to as normally-on) in which the threshold voltage is negative. A highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor film has few carrier traps. Therefore, a transistor including the oxide semiconductor film has a small change in electrical characteristics and has high reliability. Note that the charge trapped in the carrier trap of the oxide semiconductor film takes a long time to be released, and may behave as if it were a fixed charge. Therefore, a transistor including an oxide semiconductor film with a high impurity concentration and a high density of defect states may have unstable electrical characteristics.

  In addition, a transistor including a CAAC-OS film has little variation in electrical characteristics due to irradiation with visible light or ultraviolet light.

<Single crystal oxide semiconductor>
A single crystal oxide semiconductor film is an oxide semiconductor film with low impurity concentration and low density of defect states (low oxygen vacancies). Therefore, the carrier density can be lowered. Accordingly, a transistor including a single crystal oxide semiconductor film is unlikely to be normally on. In addition, since the single crystal oxide semiconductor film has a low impurity concentration and a low density of defect states, carrier traps may be reduced. Therefore, a transistor including a single crystal oxide semiconductor film has a small change in electrical characteristics and has high reliability.

  Note that the density of an oxide semiconductor film increases when the number of defects is small. In addition, the density of an oxide semiconductor film increases when crystallinity is high. In addition, the density of an oxide semiconductor film increases when the concentration of impurities such as hydrogen is low. The single crystal oxide semiconductor film has a higher density than the CAAC-OS film. In addition, the density of the CAAC-OS film is higher than that of the microcrystalline oxide semiconductor film. In addition, the polycrystalline oxide semiconductor film has a higher density than the microcrystalline oxide semiconductor film. The microcrystalline oxide semiconductor film has a higher density than the amorphous oxide semiconductor film.

<Polycrystalline oxide semiconductor>
In the polycrystalline oxide semiconductor film, crystal grains can be confirmed by observation with a high-resolution TEM. For example, the crystal grains included in the polycrystalline oxide semiconductor film often have a grain size of 2 nm to 300 nm, 3 nm to 100 nm, or 5 nm to 50 nm, as observed by a high-resolution TEM. In addition, in the polycrystalline oxide semiconductor film, a crystal grain boundary may be confirmed by an observation image by a high resolution TEM.

A polycrystalline oxide semiconductor film has a plurality of crystal grains, and the crystal orientation may be different between the plurality of crystal grains. Further, when structural analysis is performed on a polycrystalline oxide semiconductor film using an XRD apparatus, for example, in an analysis of a polycrystalline oxide semiconductor film including an InGaZnO ₄ crystal by an out-of-plane method, 2θ is 31 °. There may be a peak near 2 and a peak near 2θ of 36 ° or other peaks.

  Since a polycrystalline oxide semiconductor film has high crystallinity, it may have high electron mobility. Therefore, a transistor including a polycrystalline oxide semiconductor film has high field effect mobility. However, in a polycrystalline oxide semiconductor film, impurities may segregate at a crystal grain boundary. Further, the crystal grain boundary of the polycrystalline oxide semiconductor film becomes a defect level. In a polycrystalline oxide semiconductor film, a crystal grain boundary may serve as a carrier trap or a carrier generation source; therefore, a transistor using a polycrystalline oxide semiconductor film is more electrically conductive than a transistor using a CAAC-OS film. In some cases, the characteristics of the transistor are large and the reliability is low.

<Microcrystalline oxide semiconductor>
In the microcrystalline oxide semiconductor film, there is a case where a crystal part cannot be clearly confirmed in an observation image using a TEM. In most cases, a crystal part included in the microcrystalline oxide semiconductor film has a size of 1 nm to 100 nm, or 1 nm to 10 nm. In particular, an oxide semiconductor film including a nanocrystal (nc) that is a microcrystal of 1 nm to 10 nm, or 1 nm to 3 nm is referred to as an nc-OS (nanocrystalline Oxide Semiconductor) film. In the nc-OS film, for example, a crystal grain boundary may not be clearly confirmed in an observation image using a TEM.

  The nc-OS film has periodicity in atomic arrangement in a very small region (eg, a region of 1 nm to 10 nm, particularly a region of 1 nm to 3 nm). In addition, the nc-OS film does not have regularity in crystal orientation between different crystal parts. Therefore, orientation is not seen in the whole film. Therefore, the nc-OS film may not be distinguished from an amorphous oxide semiconductor film depending on an analysis method. For example, when structural analysis is performed on the nc-OS film using an XRD apparatus using X-rays having a diameter larger than that of the crystal part, a peak indicating a crystal plane is not detected in the analysis by the out-of-plane method. Further, when electron beam diffraction (also referred to as limited-field electron diffraction) using an electron beam with a larger diameter than the crystal part (for example, 50 nm or more) is performed on the nc-OS film, a diffraction pattern such as a halo pattern is obtained. Observed. On the other hand, when nc-OS film is subjected to electron diffraction (also referred to as nanobeam electron diffraction) using an electron beam with a probe diameter (for example, 1 nm to 30 nm) that is close to the crystal part or smaller than the crystal part. Spots are observed. In addition, when nanobeam electron diffraction is performed on the nc-OS film, a region with high luminance may be observed so as to draw a circle (in a ring shape). Further, when nanobeam electron diffraction is performed on the nc-OS film, a plurality of spots may be observed in the ring-shaped region.

  The nc-OS film is an oxide semiconductor film that has higher regularity than an amorphous oxide semiconductor film. Therefore, the nc-OS film has a lower density of defect states than the amorphous oxide semiconductor film. Note that the nc-OS film does not have regularity in crystal orientation between different crystal parts. Therefore, the nc-OS film has a higher density of defect states than the CAAC-OS film.

<Modification 1, About base insulating film>
In the transistor described in this embodiment, a base insulating film can be provided between the substrate 101 and the conductive film 103 functioning as a gate electrode as needed. The base insulating film can be formed using silicon oxide, silicon oxynitride, silicon nitride, silicon nitride oxide, gallium oxide, hafnium oxide, yttrium oxide, aluminum oxide, aluminum oxynitride, or the like. Note that as the base insulating film, silicon nitride, gallium oxide, hafnium oxide, yttrium oxide, aluminum oxide, or the like is used to form impurities from the substrate 101, typically metal oxides such as alkali metal, water, and hydrogen. Diffusion to the film 109a can be suppressed.

  The base insulating film can be formed by a sputtering method, a CVD method, or the like.

<Modification 2, gate insulating film>
The insulating film 105 formed using a nitride insulating film can have a stacked structure of a first nitride insulating film with few defects and a second nitride insulating film with high hydrogen blocking properties. By providing a nitride insulating film with few defects as the gate insulating film, the withstand voltage of the gate insulating film can be improved. In addition, by providing a nitride insulating film with high hydrogen blocking properties as the gate insulating film, hydrogen from the conductive film 103 and the insulating film 105 functioning as a gate electrode can be prevented from moving to the metal oxide film 109a. Can do.

  Alternatively, as the insulating film 105 formed using a nitride insulating film, a first nitride insulating film with a high impurity blocking property, a second nitride insulating film with few defects, and a second with a high hydrogen blocking property are used. A stacked structure in which the nitride insulating film is stacked in this order from the conductive film 103 functioning as a gate electrode can be employed. By providing the first nitride insulating film having a high impurity blocking property as the gate insulating film, impurities from the conductive film 103 functioning as the gate electrode, typically hydrogen, nitrogen, alkali metal, or alkaline earth A similar metal or the like can be prevented from moving to the metal oxide film 109a.

  Note that the structures, methods, and the like described in this embodiment can be combined as appropriate with any of the structures, methods, and the like described in the other embodiments.

(Embodiment 2)
In this embodiment, a method for manufacturing an element substrate of a display device, which is different from that in Embodiment 1, will be described with reference to drawings. In this embodiment, as in Embodiment 1, a metal oxide film having a channel region and an insulating film functioning as a channel protective film are formed using one photomask. On the other hand, this embodiment is different from Embodiment 1 in order of manufacturing steps of a conductive film functioning as an electrode and an insulating film functioning as a dielectric film of a capacitor.

  A specific example of an element substrate of a liquid crystal display device using a liquid crystal element for the pixel 13 will be described. Here, FIG. 6 shows a top view of the pixel 13 shown in FIG.

  In FIG. 6, the conductive film 203 functioning as a scanning line is provided so as to extend in a direction substantially orthogonal to the signal line (left and right direction in the figure). The conductive film 213a functioning as a signal line is provided so as to extend in a direction substantially perpendicular to the scanning line (vertical direction in the figure). The conductive film 213c functioning as a capacitor line is provided so as to extend in a direction parallel to the signal line. Note that the conductive film 203 functioning as a scan line is electrically connected to the scan line driver circuit 14 (see FIG. 1A) and functions as a conductive film 213a functioning as a signal line and a capacitor line. The conductive film 213c is electrically connected to the signal line driver circuit 16 (see FIG. 1A).

  The transistor 22a is provided in a region where the scanning line and the signal line intersect. The transistor 22a includes a conductive film 203 functioning as a gate electrode, a gate insulating film (not shown in FIG. 6), a metal oxide film 209a in which a channel region formed over the gate insulating film is formed, a source electrode, and a drain The conductive films 213a and 213b function as electrodes. Note that the conductive film 203 also functions as a scan line, and a region overlapping with the metal oxide film 209a functions as a gate electrode of the transistor 22a. The conductive film 213a also functions as a signal line, and a region overlapping with the metal oxide film 209a functions as a source electrode or a drain electrode of the transistor 22a. In FIG. 6, the scanning line has an end portion located outside the end portion of the metal oxide film 209a in the top surface shape. Therefore, the scanning line functions as a light shielding film that blocks light from a light source such as a backlight. As a result, the metal oxide film 209a included in the transistor is not irradiated with light, so that variation in electrical characteristics of the transistor can be suppressed.

  The conductive film 213b is electrically connected to the light-transmitting conductive film 221 functioning as a pixel electrode in the opening 219.

  The capacitor 25a includes a metal oxide film 209b formed over the gate insulating film, a light-transmitting conductive film 221 functioning as a pixel electrode, and a dielectric insulating film formed over the transistor 22a. It consists of a body membrane. Since the metal oxide film 109b has a light-transmitting property, the capacitor 25a has a light-transmitting property. In addition, the metal oxide film 209b that functions as one of the pair of electrodes of the capacitor 25a is connected to the conductive film 213c that functions as a capacitor line.

  As described above, since the capacitor 25 a has a light-transmitting property, the capacitor 25 a can be formed large (in a large area) in the pixel 13. Therefore, while increasing the aperture ratio, it is possible to obtain 50% or more, preferably 55% or more, preferably 60% or more, and obtain a semiconductor device having an increased charge capacity. For example, in a semiconductor device with high resolution, for example, a liquid crystal display device, the area of a pixel is reduced and the area of a capacitor element is also reduced. For this reason, in a semiconductor device with high resolution, the charge capacity stored in the capacitor element is reduced. However, since the capacitor 25a described in this embodiment has a light-transmitting property, the aperture ratio can be increased while obtaining a sufficient charge capacity in each pixel by providing the capacitor in the pixel. Typically, it can be suitably used for a high-resolution semiconductor device having a pixel density of 200 ppi or more, further 300 ppi or more, and further 500 ppi.

  6 has a shape in which the side parallel to the conductive film 213a functioning as a signal line is shorter than the side parallel to the conductive film 203 functioning as a scanning line, and the capacitor line A conductive film 213c functioning as a signal line is provided so as to extend in a direction parallel to the conductive film 213a functioning as a signal line. As a result, the area of the conductive film 213c occupying the pixel 13 can be reduced, so that the aperture ratio can be increased.

  Further, according to one embodiment of the present invention, since the aperture ratio can be increased even in a high-resolution display device, light from a light source such as a backlight can be efficiently used, and power consumption of the display device can be reduced. be able to.

  Next, a method for manufacturing an element substrate of a display device will be described with reference to a cross-sectional view taken along dashed line AB and a cross-sectional view taken along dashed line CD in FIG.

  Through the steps similar to those in Embodiment 1, the conductive film 203 serving as a gate electrode is formed over the substrate 210 as shown in FIG. 7A by a step using the first photomask and the second photomask. Form. In addition, insulating films 205, 207 a, and 207 b are formed over the substrate 291 and the conductive film 203. In addition, metal oxide films 209a and 209b are formed over the insulating films 207a and 207b, respectively. In addition, an insulating film 211c functioning as a channel protective film is formed over the metal oxide film 209a. After that, heat treatment is performed.

  The substrate 201 can be selected as appropriate from the substrates 101 described in Embodiment 1. For the conductive film 203, a material and a manufacturing method similar to those of the conductive film 103 functioning as the gate electrode described in Embodiment 1 can be selected as appropriate. For the insulating film 205, a material and a manufacturing method similar to those of the insulating film 105 described in Embodiment 1 can be selected as appropriate. For the insulating films 207a and 207b, a material and a manufacturing method similar to those of the insulating films 107a and 107b described in Embodiment 1 can be selected as appropriate. For the metal oxide films 209a and 209b, a material and a manufacturing method similar to those of the metal oxide films 109a and 109b described in Embodiment 1 can be selected as appropriate. For the insulating film 211c functioning as a channel protective film, a material and a manufacturing method similar to those of the insulating film 111c described in Embodiment 1 can be selected as appropriate.

  Note that in the etching step for forming the insulating film 211c, regions exposed to plasma in the metal oxide films 209a and 209b are damaged and oxygen vacancies are formed. For this reason, the region of the metal oxide film 209a that is not covered with the insulating film 211c and the conductivity of the metal oxide film 209b are increased.

  Next, as illustrated in FIG. 7B, a conductive film 212 is formed over the insulating film 205, the insulating films 207a and 207b, the metal oxide films 209a and 209b, and the insulating film 211c. Next, masks 231a, 231b, and 231c are formed over the conductive film 212 by a photolithography process using a third photomask.

  For the conductive film 212, a material and a manufacturing method similar to those of the conductive film 116 described in Embodiment 1 can be selected as appropriate.

  Next, part of the conductive film 212 is etched using the masks 231a, 231b, and 231c, so that the conductive films 213a and 213b functioning as a pair of electrodes and the conductive film 213c functioning as a capacitor line are formed. The conductive film 116 can be etched using a dry etching method and / or a wet etching method. After that, the masks 231a, 231b, and 231c are removed (see FIG. 7C).

  Next, as illustrated in FIG. 8A, the insulating film 214 is formed over the insulating film 205, the insulating films 207a and 207b, the metal oxide films 209a and 209b, the insulating film 211c, and the conductive films 213a, 213b, and 213c. Form. Next, a mask 233 is formed over the insulating film 214 by a photolithography process using a fourth photomask.

  For the insulating film 214, a material and a manufacturing method similar to those of the insulating film 112 described in Embodiment 1 can be selected as appropriate.

  Oxygen vacancies are formed in the metal oxide films 209a and 209b due to plasma damage generated when the insulating film 214 is formed over the insulating film 211c. Therefore, the region of the metal oxide film 209a that is not covered with the insulating film 211c and the conductivity of the metal oxide film 209b are increased. Further, by using a nitride insulating film containing hydrogen as the insulating film 214, hydrogen diffuses from the insulating film 214 to the metal oxide films 209a and 209b. When hydrogen moves to oxygen vacancies, electrons as carriers are generated. As a result, the metal oxide film 209b has high conductivity and becomes a metal oxide film 209c having conductivity. In addition, the metal oxide film 209 c functions as one electrode of the capacitor 25.

  Note that the metal oxide film 209a is in contact with the insulating film 213 outside the insulating film 211c. Since the insulating film 211c is an oxide insulating film, the metal oxide film 209a in contact with the insulating film 211c functions as a channel region of the transistor. In the metal oxide film 209a, regions in contact with the conductive films 213a and 213b have high conductivity as in the metal oxide film 209c. That is, the metal oxide film 209a functions as a low resistance region. Therefore, the on-state current of the transistor can be increased and field effect mobility can be increased.

  Note that since the nitride insulating film also functions as a blocking film for water, hydrogen, and the like, by providing a nitride insulating film as the insulating film 214, hydrogen, water, and the like enter the metal oxide film 209a from the outside. Can be prevented.

Both the metal oxide film 209a and the metal oxide film 209c are formed over the gate insulating film but have different impurity concentrations. Specifically, the metal oxide film 209c has a higher impurity concentration than the metal oxide film 209a. For example, the hydrogen concentration contained in the metal oxide film 209a is less than 5 × 10 ¹⁹ atoms / cm ³ , preferably less than 5 × 10 ¹⁸ atoms / cm ³ , preferably 1 × 10 ¹⁸ atoms / cm ³ or less, and more preferably Is 5 × 10 ¹⁷ atoms / cm ³ or less, more preferably 1 × 10 ¹⁶ atoms / cm ³ or less, and the concentration of hydrogen contained in the metal oxide film 209c is 8 × 10 ¹⁹ or more, preferably 1 × 10 ^20. atoms / cm ³ or more, more preferably 5 × 10 ²⁰ or more. Further, the concentration of hydrogen contained in the metal oxide film 209c is twice as high as that of the metal oxide film 209a, preferably 10 times or more.

Further, the resistivity of the metal oxide film 209c is lower than that of the metal oxide film 209a. The resistivity of the metal oxide film 209c is preferably 1 × 10 ⁻⁸ times or more and 1 × 10 ⁻¹ times or less of the resistivity of the metal oxide film 209a, typically 1 × 10 ⁻³ Ωcm or more. The resistivity is preferably 1 × 10 ⁻³ Ωcm or more and less than 1 × 10 ⁻¹ Ωcm, more preferably less than 1 × 10 ⁴ Ωcm.

  Next, heat treatment may be performed. The temperature of the heat treatment is typically 150 ° C to 400 ° C, preferably 300 ° C to 400 ° C, preferably 320 ° C to 370 ° C.

  An insulating film 205 formed of a nitride insulating film and an insulating film 214 formed of a nitride insulating film are in contact with each other, and a metal oxide film 209a and an insulating film 211c are provided between the insulating films 205 and 214. The nitride insulating film has a small diffusion coefficient of hydrogen, water, and oxygen, and has high blocking properties for hydrogen, water, and oxygen. In addition, the insulating film 211c is formed using an oxide insulating film containing more oxygen than that in the stoichiometric composition, so that oxygen in the metal oxide film 209a can be externally included in the heat treatment. Can be prevented from spreading. As a result, oxygen vacancies in the metal oxide film 209a can be reduced. Furthermore, diffusion of hydrogen, water, or the like from the outside to the metal oxide film 209a can be suppressed. Therefore, hydrogen, water, and the like in the metal oxide film 209a can be reduced. As a result, a highly reliable transistor can be manufactured.

  Next, as illustrated in FIG. 8A, a mask 233 is formed by a photolithography process using a fourth photomask. Next, part of the insulating film 214 is etched using the mask 233 to form an insulating film 217 having an opening 219 as illustrated in FIG. In the opening 219, part of the conductive film 213b is exposed.

  Next, as illustrated in FIG. 8C, a light-transmitting conductive film 220 is formed over the exposed portion of the conductive film 213 b and the insulating film 217. Next, a mask 235 is formed over the conductive film 220 by a photolithography process using a fifth photomask.

  For the conductive film 220, a material and a manufacturing method similar to those of the conductive film 118 described in Embodiment 1 can be selected as appropriate.

  Next, part of the conductive film 220 is etched using the mask 235 to form a conductive film 221 functioning as a pixel electrode. After that, the mask 235 is removed (see FIG. 8D).

  Through the above steps, the conductive film 203 functioning as a gate electrode, the insulating films 205 and 206a functioning as gate insulating films, the metal oxide film 209a, and the insulating film functioning as a channel protective film covering part of the metal oxide film 209a The transistor 22a including the conductive films 213a and 213b in contact with the 211c and the metal oxide film 209a and functioning as a pair of electrodes can be manufactured. In addition, a conductive film 221 functioning as a pixel electrode can be formed in contact with the conductive film 213b included in the transistor 22a. In addition, the capacitor 25a including the metal oxide film 209c, the insulating film 217, and the conductive film 221 formed over the insulating film 206b can be manufactured. That is, an element substrate including the transistor 22a, the conductive film 221 functioning as a pixel electrode, and the capacitor 25a can be manufactured using five photomasks. In this embodiment, since the metal oxide film and the channel protective film are formed using one photomask, the photomask necessary for manufacturing the element substrate can be reduced.

  In the semiconductor device described in this embodiment, a metal oxide film that serves as one electrode of the capacitor is formed at the same time as the metal oxide film including the channel region of the transistor. Therefore, the metal oxide film including the channel region of the transistor and the metal oxide film serving as one electrode of the capacitor are formed using the same metal element. In addition, a conductive film functioning as a pixel electrode is used as the other electrode of the capacitor. For these reasons, a process for forming a new conductive film is not required for forming the capacitor, and the manufacturing process of the display device can be reduced. In the capacitor, both the metal oxide film 109c and the conductive film 119 which are a pair of electrodes have a light-transmitting property, so that the capacitor 25a has a light-transmitting property. As a result, the aperture ratio of the pixel can be increased while increasing the area occupied by the capacitive element. Furthermore, a display device with reduced power consumption can be manufactured.

  Note that the structures, methods, and the like described in this embodiment can be combined as appropriate with any of the structures, methods, and the like described in the other embodiments.

(Embodiment 3)
In this embodiment, as compared with Embodiments 1 and 2, a semiconductor device including a transistor capable of further reducing the amount of defects in a metal oxide film will be described with reference to drawings. The transistor described in this embodiment is different from that in Embodiments 1 and 2 in that a multilayer film including a plurality of metal oxide films is provided instead of the metal oxide film. .

  FIG. 9 is a cross-sectional view of the transistor 22b and the capacitor 25b included in the semiconductor device. FIG. 9 is a cross-sectional view taken along one-dot chain line AB and CD in FIG.

  A transistor 22b illustrated in FIG. 9A includes a multilayer film 150a over the insulating film 107a. The multilayer film 150a includes a first metal oxide film 151a in contact with the insulating film 107a, and a second metal oxide film 152a in contact with the first metal oxide film 151a and the insulating film 111c.

  A capacitor 25b illustrated in FIG. 9A includes a multilayer film 150b over the insulating film 107b. The multilayer film 150b includes a first metal oxide film 151b in contact with the insulating film 107b, and a second metal oxide film 152b in contact with the first metal oxide film 151b and the insulating film 113.

  The second metal oxide films 152a and 152b are metal oxide films composed of one or more elements constituting the first metal oxide films 151a and 151b. Therefore, interface scattering hardly occurs at the interface between the first metal oxide films 151a and 151b and the second metal oxide films 152a and 152b. Accordingly, the movement of carriers is not inhibited at the interface, so that the field effect mobility of the transistor is increased.

  The first metal oxide films 151a and 151b and the second metal oxide films 152a and 152b are typically an In—Ga oxide, an In—Zn oxide, an In—M—Zn oxide (where M is Al, Ga, Ti, Y, Zr, La, Ce, or Nd).

  The second metal oxide films 152a and 152b have lower energy at the lower end of the conduction band than the first metal oxide films 151a and 151b, and are typically the second metal oxide films 152a and 152b. The difference between the energy at the lower end of the conduction band of the films 152a and 152b and the energy at the lower end of the conduction band of the first metal oxide films 151a and 151b is 0.05 eV or more, 0.07 eV or more, 0.1 eV or more, Or 0.15 eV or more and 2 eV or less, 1 eV or less, 0.5 eV or less, or 0.4 eV or less. That is, the difference between the electron affinity of the second metal oxide films 152a and 152b and the electron affinity of the first metal oxide films 151a and 151b is 0.05 eV or more, 0.07 eV or more, 0.1 eV or more, Or 0.15 eV or more and 2 eV or less, 1 eV or less, 0.5 eV or less, or 0.4 eV or less.

  The first metal oxide films 151a and 151b and the second metal oxide films 152a and 152b are preferable because they contain In because carrier mobility (electron mobility) is increased.

  By having Al, Ga, Ti, Y, Zr, La, Ce, or Nd as the second metal oxide films 152a and 152b at a higher atomic ratio than In, the following effects may be obtained. (1) The energy gap between the second metal oxide films 152a and 152b is increased. (2) The electron affinity of the second metal oxide films 152a and 152b is reduced. (3) Suppressing diffusion of impurities from the outside. (4) Compared with the first metal oxide films 151a and 151b, the insulating property is increased. (5) Al, Ga, Y, Zr, La, Ce, or Nd is a metal element having a strong binding force with oxygen, and thus oxygen deficiency is less likely to occur.

  When the first metal oxide films 151a and 151b are In-M-Zn oxides, when the sum of In and M is 100 atomic%, the atomic ratio of In and M is preferably greater than 25 atomic%. , M is less than 75 atomic%, more preferably, In is greater than 34 atomic% and M is less than 66 atomic%.

  When the second metal oxide films 152a and 152b are In-M-Zn oxide, when the sum of In and M is 100 atomic%, the atomic ratio of In and M is preferably 50% atomic%. And M is greater than 50 atomic%, and more preferably, In is less than 25 atomic% and M is greater than 75 atomic%.

  In addition, the first metal oxide films 151a and 151b and the second metal oxide films 152a and 152b are formed of In-M-Zn oxide M (M is Al, Ga, Ti, Y, Zr, La, and Ce). , Or Nd), M (Al, Ga, Ti, Y, Zr, La, Ce) contained in the second metal oxide films 152a and 152b as compared with the first metal oxide films 151a and 151b. , Or Nd) is large, and is typically 1.5 times or more, preferably 2 times or more, and more preferably, compared to the above atoms contained in the first metal oxide films 151a and 151b. Is an atomic ratio three times higher.

In addition, the first metal oxide films 151a and 151b and the second metal oxide films 152a and 152b are formed of In-M-Zn oxide (M is Al, Ga, Ti, Y, Zr, La, Ce, or In the case of Nd), the second metal oxide films 152a and 152b are formed of In: M: Zn = x ₁ : y ₁ : z ₁ [atomic number ratio], and the first metal oxide films 151a and 151b are formed of In: M. : Zn = x ₂ : y ₂ : z ₂ [atomic ratio], y ₁ / x ₁ is larger than y ₂ / x ₂ , and preferably y ₁ / x ₁ is larger than y ₂ / x ₂ 1.5 times or more. More preferably, y ₁ / x ₁ is twice or more larger than y ₂ / x ₂ , and more preferably y ₁ / x ₁ is three times or larger than y ₂ / x ₂ . At this time, in the metal oxide film, it is preferable that y ₂ be x ₂ or more because stable electrical characteristics can be imparted to the transistor 22b using the metal oxide film.

When the first metal oxide films 151a and 151b are In-M-Zn oxide (M is Al, Ga, Ti, Y, Zr, La, Ce, or Nd), the first metal oxide film 151a is used. 151b, when the atomic ratio of metal elements is In: M: Zn = x ₁ : y ₁ : z _{1 ,} x ₁ / y ₁ is 1/3 or more and 6 or less, Further, it is preferably 1 or more and 6 or less, and z ₁ / y ₁ is preferably 1/3 or more and 6 or less, and more preferably 1 or more and 6 or less. Note that when z ₁ / y ₁ is greater than or equal to 1 and less than or equal to 6, CAAC-OS films can be easily formed as the first metal oxide films 151a and 151b. As typical examples of the atomic ratio of the target metal element, In: M: Zn = 1: 1: 1, In: M: Zn = 1: 1: 1.2, In: M: Zn = 3: 1: There are 2 etc.

When the second metal oxide films 152a and 152b are In-M-Zn oxide (M is Al, Ga, Ti, Y, Zr, La, Ce, or Nd), the second metal oxide film 152a , 152b, when the atomic ratio of the metal element is In: M: Zn = x ₂ : y ₂ : z _{2 ,} x ₂ / y ₂ <x ₁ / y ₁ , Z ₂ / y ₂ is preferably 1/3 or more and 6 or less, and more preferably 1 or more and 6 or less. Note that when z ₂ / y ₂ is greater than or equal to 1 and less than or equal to 6, a CAAC-OS film can be easily formed as the second metal oxide films 152a and 152b. As typical examples of the atomic ratio of the target metal element, In: M: Zn = 1: 3: 2, In: M: Zn = 1: 3: 4, In: M: Zn = 1: 3: 6, In: M: Zn = 1: 3: 8 and the like.

  Note that the atomic ratios of the first metal oxide films 151a and 151b and the second metal oxide films 152a and 152b each include a variation of plus or minus 40% of the above atomic ratio as an error.

  The second metal oxide films 152a and 152b also function as damage mitigating films for the first metal oxide film 151a when a film to be the insulating film 111c is formed.

  The thickness of the first metal oxide films 151a and 151b is 3 nm to 200 nm, preferably 3 nm to 100 nm, and more preferably 3 nm to 50 nm. The thickness of the second metal oxide films 152a and 152b is 3 nm to 100 nm, preferably 3 nm to 50 nm.

  The first metal oxide films 151a and 151b and the second metal oxide films 152a and 152b may have a non-single crystal structure, for example. The non-single-crystal structure includes, for example, a CAAC-OS (C Axis-Aligned-Crystalline Oxide Semiconductor) described later, a polycrystalline structure, a microcrystalline structure described later, or an amorphous structure.

  Note that in the first metal oxide films 151a and 151b and the second metal oxide films 152a and 152b, an amorphous structure region, a microcrystalline structure region, a polycrystalline structure region, a CAAC-OS region, You may comprise the mixed film which has 2 or more types of the area | region of a single crystal structure. The mixed film has, for example, a single layer structure including two or more of an amorphous structure region, a microcrystalline structure region, a polycrystalline structure region, a CAAC-OS region, and a single crystal structure region. There is a case. For example, the mixed film has a stacked structure of two or more of an amorphous structure region, a microcrystalline structure region, a polycrystalline structure region, a CAAC-OS region, and a single crystal structure region. May have.

  Here, a second metal oxide film 152a is provided between the first metal oxide film 151a and the insulating film 111c. Therefore, even if a carrier trap is formed due to impurities and defects between the second metal oxide film 152a and the insulating film 111c, the region where the carrier trap is formed and the first metal oxide film 151a There is a gap between them. As a result, electrons flowing through the first metal oxide film 151a are not easily captured by carrier traps, the on-state current of the transistor 22b can be increased, and field effect mobility can be increased. Further, when electrons are trapped in the carrier trap, the electrons become negative fixed charges. As a result, the threshold voltage of the transistor fluctuates. However, since there is a gap between the first metal oxide film 151a and the region where the carrier trap is formed, the trapping of electrons in the carrier trap can be suppressed, and the variation in threshold voltage is reduced. can do.

  In addition, since the second metal oxide film 152a can shield impurities from the outside, the amount of impurities moving from the outside to the first metal oxide film 151a can be reduced. In addition, the second metal oxide film 152a hardly forms oxygen vacancies. Therefore, the impurity concentration and the amount of oxygen vacancies in the first metal oxide film 151a can be reduced.

  Note that the first metal oxide films 151a and 151b and the second metal oxide films 152a and 152b are not simply laminated, but are continuously bonded (here, energy at the lower end of the conduction band in particular is (A structure that changes continuously between). That is, a stacked structure is formed in which impurities that form defect levels such as trap centers and recombination centers do not exist at the interface of each film. If impurities are mixed between the stacked first metal oxide films 151a and 151b and the second metal oxide films 152a and 152b, the continuity of the energy band is lost and carriers are generated at the interface. It is trapped or recombined and disappears.

In order to form a continuous bond, it is necessary to use a multi-chamber type film forming apparatus (sputtering apparatus) provided with a load lock chamber to continuously laminate each film without exposure to the atmosphere. Each chamber in the sputtering apparatus is evacuated with high vacuum (5 × 10 ⁻⁷ Pa to 1 × 1) using an adsorption-type vacuum pump such as a cryopump so as to remove as much water as possible from the metal oxide film. ^{X10 −4} Pa) is preferable. Alternatively, it is preferable to combine a turbo molecular pump and a cold trap so that a gas, particularly a gas containing carbon or hydrogen, does not flow backward from the exhaust system into the chamber.

  As illustrated in FIG. 9B, the transistor 22c may include a multilayer film 155a, and the capacitor 25c may include a multilayer film 155b.

  In the multilayer film 155a, a third metal oxide film 153a, a first metal oxide film 151a, and a second metal oxide film 152a are sequentially stacked. The third metal oxide film 153a is in contact with the insulating film 107a, the second metal oxide film 152a is in contact with the insulating film 111c, and the first metal oxide film 151a functions as a channel region.

  In the multilayer film 155b, a third metal oxide film 153b, a first metal oxide film 151b, and a second metal oxide film 152b are sequentially stacked. The third metal oxide film 153b is in contact with the insulating film 107b, and the second metal oxide film 152b is in contact with the insulating film 113.

  For the third metal oxide films 153a and 153b, a material and a formation method similar to those of the second metal oxide films 152a and 152b can be used as appropriate.

  The third metal oxide films 153a and 153b are preferably smaller in thickness than the first metal oxide films 151a and 151b. When the thickness of the third metal oxide films 153a and 153b is 1 nm to 5 nm, preferably 1 nm to 3 nm, the amount of change in threshold voltage of the transistor can be reduced.

  In the transistor described in this embodiment, a third metal oxide film 153a is provided between the insulating film 107a and the first metal oxide film 151a. A second metal oxide film 152a is provided between the first metal oxide film 151a and the insulating film 111c. Therefore, even if a carrier trap is formed between the insulating film 107a and the first metal oxide film 151a and between the first metal oxide film 151a and the insulating film 111c due to impurities and defects, the carrier There is a gap between the region where the trap is formed and the first metal oxide film 151a. As a result, electrons flowing through the first metal oxide film 151a are not easily captured by carrier traps, the on-state current of the transistor 22c can be increased, and field effect mobility can be increased. Further, when electrons are trapped in the carrier trap, the electrons become negative fixed charges. As a result, the threshold voltage of the transistor fluctuates. However, since there is a gap between the first metal oxide film 151a and a region where a carrier trap is formed, trapping of electrons in the carrier trap can be suppressed, and the threshold voltage of the transistor 22c can be suppressed. Variations can be reduced.

  Note that the structures, methods, and the like described in this embodiment can be combined as appropriate with any of the structures, methods, and the like described in the other embodiments.

(Embodiment 4)
In this embodiment, a method for manufacturing a transistor and a capacitor with high on-state current, high field-effect mobility, and little variation in electrical characteristics with a reduced photomask will be described with reference to FIGS. It explains using. Note that although this embodiment is described using the transistor described in Embodiment 2 and a manufacturing method thereof, this embodiment can be applied to other embodiments as appropriate. Further, the description of the same structure as that of the second embodiment is omitted.

  10 is a top view of the pixel 13, FIG. 11A is a cross-sectional view taken along the alternate long and short dashed lines AB and CD in FIG. 10, and FIG. 11B is a dashed dotted line E in FIG. It is sectional drawing between -F.

  The transistor 22d is provided in a region where the scanning line and the signal line intersect. The transistor 22d includes a conductive film 203 functioning as a gate electrode, a gate insulating film (not shown in FIG. 11), a metal oxide film 209a in which a channel region formed over the gate insulating film is formed, a source electrode, and a drain The conductive film 213a and 213b functioning as electrodes, the metal oxide film 209a, the insulating film (not shown in FIG. 11) covering the conductive films 213a and 213b, and the conductive film 243 functioning as a gate electrode. The transistor 22d is characterized in that a conductive film 203 functioning as a gate electrode and a conductive film 243 are connected to each other in the opening 241.

  Next, a cross-sectional structure of the transistor 22d is described with reference to FIGS. 11A is a cross-sectional view of the transistor 22d in the channel length direction and a cross-sectional view of the capacitor 25a, and FIG. 11B is a cross-sectional view of the transistor 22d in the channel direction.

  A transistor 22 d illustrated in FIGS. 11A and 11B is a channel protection transistor, and is formed over the conductive film 203 serving as a gate electrode provided over the substrate 201 and over the substrate 201 and the conductive film 203. Formed on the insulating film 205, the insulating film 207a formed on the insulating film 205, the metal oxide film 209a overlapping with the conductive film 203 with the insulating films 205 and 207a interposed therebetween, and the metal oxide film 209a. And an insulating film 211c functioning as a channel protective film and conductive films 213a and 213b whose one end is located on the insulating film 211c and in contact with the metal oxide film 209a. In addition, an insulating film 217 formed over the insulating film 205, the metal oxide film 209a, the insulating film 211c, and the conductive films 213a and 213b, and a conductive film 243 functioning as a gate electrode formed over the insulating film 217 are provided. Have. The insulating film 205 and the insulating film 207a function as a gate insulating film. The insulating film 211c and the insulating film 217 function as gate insulating films.

  As shown in FIG. 11B, the conductive film 203 and the conductive film 243 are connected to each other in an opening 241 provided in the insulating film 205 and the insulating film 217. In addition, in the channel width direction of the transistor, the end portion of the conductive film 243 is located outside the end portion of the metal oxide film 209a. Further, the side surface of the metal oxide film 209 a faces the conductive film 243 with the insulating film 217 interposed therebetween. The conductive film 243 faces the side surface of the metal oxide film 209a in the opening 241.

  The conductive film 243 can be formed using a material and a manufacturing method similar to those of the conductive film 221. The opening 241 can be formed at the same time as the opening 219 is formed. As a result, the transistor 22d can be manufactured using five photomasks without increasing the number of photomasks.

  Note that in FIG. 11B, the conductive film 203 and the conductive film 243 are directly connected to each other. On the other hand, as illustrated in FIG. 11C, the conductive film 203 and the conductive film 243 may be electrically connected to each other through the conductive film 253.

  That is, the conductive film 203 and the conductive film 253 are connected in the opening 251 provided in the insulating film 205. In addition, the conductive film 253 and the conductive film 243 are connected to each other in the opening 255 provided in the insulating film 217. As a result, the conductive film 203 and the conductive film 253 have a structure in which a voltage having the same potential is applied.

  The conductive film 253 can be formed using a material and a manufacturing method similar to those of the conductive films 213a and 213b. Compared with the opening 241 illustrated in FIG. 11B, the opening 251 and the opening 255 each have a lower height. As a result, the coverage of the conductive films 243 and 253 in each opening can be increased. As a result, the yield can be increased.

In FIG. 11B, the side surface of the metal oxide film 209a faces the conductive film 243 functioning as a gate electrode in the channel width direction of the transistor. In FIG. 11C, the side surface of the metal oxide film 209a faces the conductive film 253 having the same potential as the conductive films 203 and 243 functioning as gate electrodes in the channel width direction of the transistor. Therefore, the electric fields of the conductive film 203 and the conductive film 243 affect not only the plane of the metal oxide film 209a but also the side surfaces. As a result, the region where carriers flow in the metal oxide film 209a is not only the interface between the insulating film 207a and the metal oxide film 209a and the interface between the metal oxide film 209a and the insulating film 211c, but also the metal oxide film 209a. Therefore, the amount of carrier movement in the transistor increases. As a result, the on-state current of the transistor is increased and the field effect mobility is increased. Typically, the field effect mobility is 10 cm ² / V · s or more, and further 20 cm ² / V · s or more. Note that when the L length of the transistor is 0.5 μm or more and 6.5 μm or less, preferably greater than 1 μm and less than 6 μm, the increase in field-effect mobility is significant.

  Further, at the end portion of the metal oxide film 209a processed by etching or the like, defects are formed due to damage in the processing and are contaminated by adhesion of impurities. Therefore, when only one of the conductive film 203 and the conductive film 243 functioning as a gate electrode in a transistor is formed, stress such as an electric field is applied even when the metal oxide film 209a is intrinsic or substantially intrinsic. As a result, the end portion of the metal oxide film 209a is activated and tends to be an n-type region (low resistance region). Further, when the n-type region is linearly provided between the conductive films 213a and 213, the n-type region becomes a carrier path, and a parasitic channel is formed. As a result, the drain current rises in the threshold voltage stepwise, and the transistor has a negative shift in the threshold voltage. However, as illustrated in FIGS. 11B and 11C, the conductive film 203 and the conductive film 243 having the same potential are included, and the conductive film 243 is a side surface of the metal oxide film 209a in the channel width direction. The electric field of the conductive film 243 also affects the side surface of the metal oxide film 209a. As a result, the generation of a parasitic channel at the side surface of the metal oxide film 209a or at the end including the side surface and the vicinity thereof is suppressed. As a result, the transistor has excellent electrical characteristics in which the drain current rises sharply at the threshold voltage.

  In addition, since each of the conductive film 203 and the conductive film 243 has a function of shielding an electric field from the outside, a fixed charge provided over the conductive film 243 between the substrate 201 and the conductive film 243 is a metal oxide. The film 209a is not affected. As a result, deterioration of the stress test (for example, a negative bias potential applied to the gate electrode -GBT (Gate Bias-Temperature) stress test) is suppressed, and fluctuations in the rising current of the on-current at different drain voltages are suppressed. be able to.

  Note that the BT stress test is a kind of accelerated test, and a change in characteristics (that is, a secular change) of a transistor caused by long-term use can be evaluated in a short time. In particular, the amount of change in the threshold voltage of the transistor before and after the BT stress test is an important index for examining reliability. Before and after the BT stress test, the smaller the variation amount of the threshold voltage, the higher the reliability of the transistor.

  In FIGS. 11B and 11C, an opening is provided on one side surface of the metal oxide film 109a in the channel width direction, and the conductive film 203 and the conductive film 243 are electrically connected to the opening. However, an opening may be provided on the other side surface, and the conductive film 203 and the conductive film 243 may be electrically connected in the opening. As a result, an increase in the resistance value of the conductive film 243 can be prevented, and the electric field of the conductive film 243 can be affected on the metal oxide film 209a from both side surfaces of the metal oxide film 209a. While increasing the current, the field effect mobility can be increased.

  Note that the structures, methods, and the like described in this embodiment can be combined as appropriate with any of the structures, methods, and the like described in the other embodiments.

(Embodiment 5)
A driver circuit can be manufactured using the transistor and the capacitor described in any of Embodiments 1 to 4.

  In addition, the transistor 22d described in Embodiment 4 has high on-state current and high mobility. Therefore, by using the transistor 22d as a circuit including a transistor that needs to pass a large current, for example, the buffer, the channel length and the channel width can be reduced, and the area of the transistor can be reduced. It is. As a result, the area of the drive circuit is reduced. In a semiconductor device having a driver circuit in a peripheral portion, typically a display device, the area of the pixel portion in the display device can be increased by reducing the area of the driver circuit. That is, the display device can be narrowed.

  Note that the structures, methods, and the like described in this embodiment can be combined as appropriate with any of the structures, methods, and the like described in the other embodiments.

(Embodiment 6)
In this embodiment, as an example of a semiconductor device, an electronic device in which the semiconductor device described in the above embodiment can be mounted is described.

  As an electronic device, for example, a television device (also referred to as a television or a television receiver), a monitor for a computer, a digital camera, a digital video camera, a digital photo frame, a mobile phone (also referred to as a mobile phone or a mobile phone device). And large game machines such as portable game machines, portable information terminals, sound reproduction apparatuses, and pachinko machines. Specific examples of these electronic devices are shown in FIGS.

  FIG. 12A illustrates an example of a television device. In the television device 7100, a display portion 7103 is incorporated in a housing 7101. Images can be displayed on the display portion 7103, and the display device described in the above embodiment can be used for the display portion 7103. Here, a structure in which the housing 7101 is supported by a stand 7105 is shown.

  The television device 7100 can be operated with an operation switch included in the housing 7101 or a separate remote controller 7110. Channels and volume can be operated with operation keys 7109 provided in the remote controller 7110, and an image displayed on the display portion 7103 can be operated. The remote controller 7110 may be provided with a display portion 7107 for displaying information output from the remote controller.

  Note that the television device 7100 is provided with a receiver, a modem, and the like. General TV broadcasts can be received by a receiver, and connected to a wired or wireless communication network via a modem, so that it can be unidirectional (sender to receiver) or bidirectional (sender and receiver). It is also possible to perform information communication between each other or between recipients).

  FIG. 12B illustrates a computer, which includes a main body 7201, a housing 7202, a display portion 7203, a keyboard 7204, an external connection port 7205, a pointing device 7206, and the like. Note that the computer can use the display device described in the above embodiment for the display portion 7203.

  FIG. 12C illustrates a portable game machine, which includes two housings, a housing 7301 and a housing 7302, which are connected with a joint portion 7303 so that the portable game machine can be opened or folded. A display portion 7304 is incorporated in the housing 7301 and a display portion 7305 is incorporated in the housing 7302. In addition, the portable game machine shown in FIG. 12C includes a speaker portion 7306, a recording medium insertion portion 7307, an LED lamp 7308, input means (operation keys 7309, a connection terminal 7310, a sensor 7311 (force, displacement, position). , Speed, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, chemical, voice, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, smell or infrared A microphone 7312) and the like. Needless to say, the structure of the portable game machine is not limited to the above, and the display device described in any of the above embodiments may be used for at least one of the display portion 7304 and the display portion 7305, or any other attached equipment. Can be provided as appropriate. The portable game machine shown in FIG. 12C reads out a program or data recorded in a recording medium and displays the program or data on a display unit, or performs wireless communication with another portable game machine to share information. It has a function. Note that the function of the portable game machine illustrated in FIG. 12C is not limited to this, and the portable game machine can have a variety of functions.

  FIG. 12D illustrates an example of a mobile phone. A mobile phone 7400 is provided with a display portion 7402 incorporated in a housing 7401, operation buttons 7403, an external connection port 7404, a speaker 7405, a microphone 7406, and the like. Note that the cellular phone 7400 is manufactured using the display device described in the above embodiment for the display portion 7402.

  Information can be input to the cellular phone 7400 illustrated in FIG. 12D by touching the display portion 7402 with a finger or the like. In addition, operations such as making a call or creating a mail can be performed by touching the display portion 7402 with a finger or the like.

  There are mainly three screen modes of the display portion 7402. The first mode is a display mode mainly for displaying an image. The first is a display mode mainly for displaying images, and the second is an input mode mainly for inputting information such as characters. The third is a display + input mode in which the display mode and the input mode are mixed.

  For example, when making a call or creating a mail, the display portion 7402 may be set to a character input mode mainly for inputting characters, and an operation for inputting characters displayed on the screen may be performed. In this case, it is preferable to display a keyboard or number buttons on most of the screen of the display portion 7402.

  In addition, by providing a detection device having a sensor for detecting inclination, such as a gyroscope or an acceleration sensor, in the mobile phone 7400, the orientation (vertical or horizontal) of the mobile phone 7400 is determined, and the screen display of the display portion 7402 is displayed. Can be switched automatically.

  Further, the screen mode is switched by touching the display portion 7402 or operating the operation button 7403 of the housing 7401. Further, switching can be performed depending on the type of image displayed on the display portion 7402. For example, if the image signal to be displayed on the display unit is moving image data, the mode is switched to the display mode, and if it is text data, the mode is switched to the input mode.

  Further, in the input mode, when a signal detected by the optical sensor of the display unit 7402 is detected and there is no input by a touch operation of the display unit 7402 for a certain period, the screen mode is switched from the input mode to the display mode. You may control.

  The display portion 7402 can function as an image sensor. For example, personal authentication can be performed by touching the display portion 7402 with a palm or a finger and capturing an image of a palm print, a fingerprint, or the like. In addition, if a backlight that emits near-infrared light or a sensing light source that emits near-infrared light is used for the display portion, finger veins, palm veins, and the like can be imaged.

  FIG. 12E illustrates an example of a folding computer. The foldable computer 7450 includes a housing 7451L and a housing 7451R which are connected to each other with a hinge 7454. In addition to the operation button 7453, the left speaker 7455L, and the right speaker 7455R, an external connection port 7456 (not shown) is provided on the side surface of the computer 7450. Note that when the hinge 7454 is folded so that the display portion 7452L provided in the housing 7451L and the display portion 7452R provided in the housing 7451R face each other, the display portion can be protected by the housing.

  In addition to displaying images, the display portion 7452L and the display portion 7452R can input information when touched with a finger or the like. For example, an icon indicating an installed program can be selected with a finger to start the program. Alternatively, the image can be enlarged or reduced by changing the interval between the fingers touching two places of the displayed image. Alternatively, the image can be moved by moving a finger touching one place of the displayed image. It is also possible to display a keyboard image, select a displayed character or symbol by touching it with a finger, and input information.

  Further, the computer 7450 can be equipped with a gyro, an acceleration sensor, a GPS (Global Positioning System) receiver, a fingerprint sensor, and a video camera. For example, by providing a detection device having a sensor for detecting the inclination, such as a gyroscope or an acceleration sensor, the orientation of the computer 7450 (vertical or horizontal) is determined, and the orientation of the screen to be displayed is automatically switched. be able to.

  The computer 7450 can be connected to a network. The computer 7450 can display information on the Internet and can be used as a terminal for remotely operating other electronic devices connected to the network.

  Note that the structures, methods, and the like described in this embodiment can be combined as appropriate with any of the structures, methods, and the like described in the other embodiments.

Claims (3)

Forming a gate electrode on the insulating surface;
Forming a gate insulating film on the gate electrode;
Forming a first metal oxide film and a first insulating film on the gate insulating film;
A first mask having a region having a first thickness and a region having a second thickness greater than the first thickness on the first insulating film; and the same as the first thickness Forming a second mask having a thickness;
The first insulating film and the first metal oxide film are etched using the first mask and the second mask, respectively, and the second insulating film, the third insulating film, and the second Forming a second metal oxide film and a third metal oxide film;
After processing the first mask to form a third mask and removing the second mask, the second insulating film is etched using the third mask, and the second mask is removed. Forming a fourth insulating film on the metal oxide film and removing the third insulating film on the third metal oxide film;
Forming a fifth insulating film formed of a nitride insulating film on the second metal oxide film, the third metal oxide film, the fourth insulating film, and the gate insulating film;
A portion of the fifth insulating film is etched to form an opening in the fifth insulating film, and then a pair of electrodes in contact with the second metal oxide film and the third metal oxide Form wiring that contacts the film,
A method for manufacturing a semiconductor device in which a light-transmitting conductive film which is connected to one of the pair of electrodes and overlaps with part of the third metal oxide film is formed over the fifth insulating film. There,
At least a part of the second metal oxide film functions as a channel formation region,
A part of the third metal oxide film functions as one electrode of the capacitor,
Part of the light-transmitting conductive film functions as the other electrode of the capacitor, so that the semiconductor device is manufactured. Forming a gate electrode on the insulating surface;
Forming a gate insulating film on the gate electrode;
Forming a first metal oxide film and a first insulating film on the gate insulating film;
A first mask having a region having a first thickness and a region having a second thickness greater than the first thickness on the first insulating film; and the same as the first thickness Forming a second mask having a thickness;
The first insulating film and the first metal oxide film are etched using the first mask and the second mask, respectively, and the second insulating film, the third insulating film, and the second Forming a second metal oxide film and a third metal oxide film;
After processing the first mask to form a third mask and removing the second mask, the second insulating film is etched using the third mask, and the second mask is removed. Forming a fourth insulating film on the metal oxide film and removing the third insulating film on the third metal oxide film;
Forming a pair of electrodes in contact with the second metal oxide film and a wiring in contact with the third metal oxide film;
Forming a fifth insulating film formed of a nitride insulating film on the pair of electrodes, the fourth insulating film, the third metal oxide film, and the wiring;
A part of the fifth insulating film is etched to form an opening in the fifth insulating film, and then connected to one of the pair of electrodes, and a part of the third metal oxide film A method for manufacturing a semiconductor device which forms a light-transmitting conductive film that overlaps with
At least a part of the second metal oxide film functions as a channel formation region,
A part of the third metal oxide film functions as one electrode of the capacitor,
Part of the light-transmitting conductive film functions as the other electrode of the capacitor, so that the semiconductor device is manufactured. In claim 1 or claim 2 ,
After forming the fifth insulating film, an opening is formed in the gate insulating film and the fifth insulating film, and a part of the gate electrode is exposed to form the light-transmitting conductive film. And forming a conductive film which is connected to the gate electrode and overlaps with the second metal oxide film.

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