JP6962978B2 - Liquid crystal display - Google Patents

Description

The present invention relates to, for example, a method for manufacturing a semiconductor device having a transistor.

Transistors used in many flat panel displays such as liquid crystal displays and light emitting displays are composed of silicon semiconductors such as amorphous silicon, single crystal silicon, and polycrystalline silicon formed on a glass substrate. .. Transistors using the silicon semiconductor are also used in integrated circuits (ICs) and the like.

In recent years, a technique of using a metal oxide exhibiting semiconductor characteristics for a transistor instead of a silicon semiconductor has attracted attention. In the present specification, a metal oxide exhibiting semiconductor characteristics is referred to as an oxide semiconductor.

For example, there is disclosed a technique of producing a transistor using zinc oxide or an In-Ga-Zn-based oxide as an oxide semiconductor and using the transistor as a switching element of a pixel of a display device (Patent Document 1). reference).

Japanese Unexamined Patent Publication No. 2007-123861

Display devices sold on the market tend to have a screen size of 40 inches or more diagonally, and are being developed with a screen size of 120 inches or more diagonally taken into consideration. For this reason, the area of the glass substrate used for the display device has been increased to the 8th generation or higher.

With the increase in the area of the glass substrate, the photomask used in the exposure apparatus used in the manufacturing process of the display device becomes large, and the price of the photomask becomes a problem. for example,
Since the 10th generation photomask is expensive at 100 million yen or more per sheet, it is required to develop a manufacturing process in which the number of photomasks is reduced.

On the other hand, in a liquid crystal display device, which is an example of a display device, the larger the charge capacitance of the capacitive element, the longer the period during which the orientation of the liquid crystal molecules of the liquid crystal element can be kept constant in a situation where an electric field is applied. Can be done. In a display device that displays a still image, the fact that the period can be lengthened can reduce the number of times the image data is rewritten, and can be expected to reduce power consumption.

Therefore, in order to increase the charge capacitance of the capacitive element, there is a means of increasing the occupied area of the capacitive element, specifically, increasing the area on which the pair of electrodes are superimposed. However, in the above display device, if the area of the conductive film having a light-shielding property is increased in order to increase the area where the pair of electrodes are superimposed, the aperture ratio of the pixels is reduced and the display quality of the image is deteriorated.

One aspect of the present invention is to provide a manufacturing method capable of reducing costs in a semiconductor device having a capacitive element having a high aperture ratio and capable of increasing the charge capacitance. .. Alternatively, one aspect of the present invention is to provide a manufacturing method capable of reducing costs in a semiconductor device capable of reducing power consumption.

One aspect of the present invention is characterized in that, in the process of manufacturing a channel-protected transistor, a metal oxide film having a channel region and a channel-protected film are formed by a process using a multi-gradation photomask. .. Further, one aspect of the present invention is a method of simultaneously manufacturing a transistor and a capacitive element, which is a metal oxide film and a channel protection film having a channel region included in the transistor by a process using a multi-gradation photomask. And one electrode of the capacitive element.

In one aspect of the present invention, a gate electrode and a gate insulating film are formed on an insulating surface, a first metal oxide film and a first insulating film are formed on the gate insulating film, and the first insulating film is formed. , A first mask having a region having a first thickness and a region having a second thickness thicker than the first thickness.
A second mask having the same thickness as the first thickness is formed, and the first insulating film and the first metal oxide film are etched with the first mask and the second mask, respectively. A second insulating film and a third insulating film, and a second metal oxide film and a third metal oxide film are formed. Next, the first mask is processed to form the third mask and the second mask is removed, and then the second insulating film is etched with the third mask to form the second metal. A fourth insulating film is formed on the oxide film and the third insulating film on the third metal oxide film is removed. Next, a fifth insulating film formed of a nitride insulating film is formed on the second metal oxide film, the third metal oxide film, the fourth insulating film, and the gate insulating film. After etching a part of the insulating film of No. 5 to form an opening in the fifth insulating film, a pair of electrodes in contact with the second metal oxide film and a wiring in contact with the third metal oxide film are formed. Form. Next, a method for manufacturing a semiconductor device that forms a translucent conductive film that is connected to one of a pair of electrodes and overlaps a part of a third metal oxide film on the fifth insulating film. be.

In one aspect of the present invention, a gate electrode and a gate insulating film are formed on an insulating surface, a first metal oxide film and a first insulating film are formed on the gate insulating film, and the first insulating film is formed. , A first mask having a region having a first thickness and a region having a second thickness thicker than the first thickness.
A second mask having the same thickness as the first thickness is formed. Next, the first insulating film and the first metal oxide film are etched with the first mask and the second mask, respectively, and the second
The insulating film and the third insulating film, and the second metal oxide film and the third metal oxide film are formed. Next, the first mask is processed to form the third mask and the second mask is removed, and then the second insulating film is etched with the third mask to form the second metal. A fourth insulating film is formed on the oxide film, and the third insulating film on the third metal oxide film is removed. Next, a pair of electrodes in contact with the second metal oxide film and a wiring in contact with the third metal oxide film are formed, and the pair of electrodes, the fourth insulating film, the third metal oxide film, and the wiring are formed. A fifth insulating film formed of a nitride insulating film is formed on the wiring. Next, a part of the fifth insulating film is etched to form an opening in the fifth insulating film, and then connected to one of the pair of electrodes and with a part of the third metal oxide film. This is a method for manufacturing a semiconductor device that forms an overlapping conductive film having translucency.

After forming the fifth insulating film, an opening is formed in the gate insulating film and the fifth insulating film, and a part of the gate electrode is exposed to form a translucent conductive film. A conductive film that is connected to the gate electrode and overlaps with the second metal oxide film may be formed.

Further, the transistor is composed of a gate electrode, a gate insulating film, a second metal oxide film, a fourth insulating film that functions as a channel protective film, and a pair of electrodes. Further, the capacitive element is composed of a third metal oxide film, a fifth insulating film, and a light-transmitting conductive film.

Further, the third metal oxide film is in contact with the fifth insulating film formed of the nitride insulating film. Further, the third metal oxide film has conductivity and functions as one electrode of the capacitive element.

Further, the second metal oxide film and the third metal oxide film have different hydrogen concentrations, and the third metal oxide film has a higher hydrogen concentration than the second metal oxide film.

Further, the first metal oxide film, the second metal oxide film, and the third metal oxide film have translucency. Further, the first metal oxide film, the second metal oxide film, and the third metal oxide film have at least one of In, Ga, and Zn. Further, the first metal oxide film, the second metal oxide film and the third metal oxide film are composed of the same metal element.

Further, the region of the gate insulating film in contact with the second metal oxide film and the third metal oxide film is formed of the oxide insulating film. Further, the region of the fourth insulating film in contact with the second metal oxide film is formed of the oxide insulating film.

Further, a part of the gate insulating film is formed of a nitride insulating film, and the nitride insulating film and the fifth insulating film are formed.
The insulating film of is in contact.

Further, the fourth insulating film includes an oxide insulating film in which a part of oxygen is desorbed by heating.

According to one aspect of the present invention, it is possible to reduce the cost in the method for manufacturing a semiconductor device having a capacitive element having a high aperture ratio and capable of increasing the charge capacitance. Costs can be reduced in a method for manufacturing a semiconductor device capable of reducing power consumption.

It is a block diagram and a circuit diagram explaining one form of a semiconductor device. It is a top view explaining one form of a transistor. It is sectional drawing explaining one form of the manufacturing method of a transistor. It is sectional drawing explaining one form of the manufacturing method of a transistor. It is sectional drawing explaining one form of the manufacturing method of a transistor. It is a top view explaining one form of a transistor. It is sectional drawing explaining one form of the manufacturing method of a transistor. It is sectional drawing explaining one form of the manufacturing method of a transistor. It is sectional drawing explaining one form of a transistor. It is a top view explaining one form of a transistor. It is sectional drawing explaining one form of a transistor. It is a figure explaining an electronic device. The figure explaining the temperature dependence of resistivity.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. However, the present invention is not limited to the following description, and it is easily understood by those skilled in the art that the form and details of the present invention can be variously changed without departing from the spirit and scope of the present invention. Therefore, the present invention is not construed as being limited to the description of the embodiments and examples shown below. Further, in the embodiments and examples described below, the same reference numerals or the same hatch patterns are commonly used between different drawings for the same parts or parts having the same functions, and the repeated description thereof is omitted. do.

In addition, in each figure described in this specification, the size of each composition, the thickness of a film, or a region is defined as a region.
May be exaggerated for clarity. Therefore, it is not necessarily limited to that scale.

In addition, terms such as first, second, and third used in the present specification are added to avoid confusion of components, and are not limited in number. Therefore, for example, the "first" can be appropriately replaced with the "second" or "third" for explanation.

Further, the functions of "source" and "drain" may be replaced when the direction of the current changes in the circuit operation. Therefore, in the present specification, the terms "source" and "drain" may be used interchangeably.

The voltage refers to the potential difference between two points, and the potential refers to the electrostatic energy (electrical potential energy) of a unit charge in an electrostatic field at a certain point. However, in general, the potential difference between a potential at a certain point and a reference potential (for example, a ground potential) is simply called a potential or a voltage, and the potential and the voltage are often used as synonyms. Therefore, unless otherwise specified in the present specification, the potential may be read as a voltage, or the voltage may be read as a potential.

In the present specification, when the etching step is performed after the photolithography step, the mask formed in the photolithography step shall be removed.

(Embodiment 1)
In the present embodiment, one of the problems is to provide a manufacturing method capable of reducing the cost in a semiconductor device having a capacitive element having a high aperture ratio and capable of increasing the charge capacitance. Alternatively, one aspect of the present invention is to provide a manufacturing method capable of reducing costs in a semiconductor device capable of reducing power consumption.

In the metal oxide, in a transistor using an oxide semiconductor which is a metal oxide having semiconductor characteristics, oxygen deficiency is an example of a defect leading to a defect in the electrical characteristics of the transistor. For example, a transistor using an oxide semiconductor film containing oxygen deficiency in the film tends to have a threshold voltage fluctuating in the negative direction and tends to have a normally-on characteristic.
This is because electric charges are generated due to oxygen deficiency contained in the oxide semiconductor film, and the resistance is lowered. When a transistor has a normally-on characteristic, various problems occur, such as a tendency for malfunction to occur during operation or an increase in power consumption during non-operation. Further, there is a problem that the fluctuation amount of the electric characteristics of the transistor, typically the threshold voltage, increases due to the change with time and the stress test.

In addition to oxygen deficiency, impurities such as silicon and carbon, which are constituent elements of the insulating film, also cause defects in the electrical characteristics of the transistor. Therefore, when the impurities are mixed in the oxide semiconductor film, the resistance of the oxide semiconductor film is lowered, and the electrical characteristics of the transistor, typically the threshold voltage, are measured by a change over time or a stress test. There is a problem that the amount of fluctuation increases.

Therefore, in the present embodiment, in addition to the problem to be solved by the invention, in a semiconductor device including a transistor having an oxide semiconductor film, oxygen deficiency in the oxide semiconductor film in the channel region and the oxide semiconductor film One of the issues is to reduce the concentration of impurities in the semiconductor.

In the present embodiment, as a method for solving one of the above problems, a method for manufacturing a semiconductor device will be described with reference to the drawings. The present embodiment is characterized in that a metal oxide film having a channel region and a channel protection film are formed by a process using a multi-gradation photomask.

FIG. 1A shows an example of a semiconductor device. The semiconductor device shown in FIG. 1 (A) has a pixel unit 11
, The scanning line driving circuit 14, the signal line driving circuit 16, and m scanning lines 17 each of which is arranged in parallel or substantially parallel to each other and whose potential is controlled by the scanning line driving circuit 14, are parallel to each other. Alternatively, it has n signal lines 19 which are arranged substantially in parallel and whose potential is controlled by the signal line drive circuit 16. Further, the pixel unit 11 has a plurality of pixels 13 arranged in a matrix. Further, along the signal line 19, each has a capacitance line 15 arranged in parallel or substantially parallel to each other. The capacitance lines 15 may be arranged in parallel or substantially parallel to each other along the scanning lines 17. Further, the scanning line drive circuit 14 and the signal line drive circuit 16 may be collectively referred to as a drive circuit unit.

Each scanning line 17 is electrically connected to n pixels 13 arranged in any of the pixels 13 arranged in m rows and n columns in the pixel unit 11. Further, each signal line 19 is m line n.
Of the pixels 13 arranged in a row, m pixels 13 arranged in any row are electrically connected. Both m and n are integers of 1 or more. Further, each capacitance line 15 is electrically connected to n pixels 13 arranged in any of the pixels 13 arranged in m rows and n columns. When the capacitance lines 15 are arranged in parallel or substantially parallel along the signal line 19, they are arranged in any of the pixels 13 arranged in m rows and n columns. It is electrically connected to the m pixels 13 formed.

1 (B) and 1 (C) show an example of a circuit configuration that can be used for the pixel 13 of the display device shown in FIG. 1 (A).

The pixel 13 shown in FIG. 1B includes a liquid crystal element 21, a transistor 22, and a capacitance element 25.

The potential of one of the pair of electrodes of the liquid crystal element 21 is appropriately set according to the specifications of the pixel 13.
The orientation state of the liquid crystal element 21 is set according to the written data. Also, a plurality of pixels 1
A common potential (common potential) may be given to one of the pair of electrodes of the liquid crystal element 21 possessed by each of the three. Further, different potentials may be applied to one of the pair of electrodes of the liquid crystal element 21 for each pixel 13 in each row.

The liquid crystal element 21 is an element that controls the transmission or non-transmission of light by the optical modulation action of the liquid crystal. The optical modulation action of the liquid crystal is controlled by an electric field (including a horizontal electric field, a vertical electric field, or an oblique electric field) applied to the liquid crystal. Examples of the liquid crystal element 21 include a nematic liquid crystal, a cholesteric liquid crystal, a smectic liquid crystal, a thermotropic liquid crystal, a liotropic liquid crystal, a ferroelectric liquid crystal, and an antiferroelectric liquid crystal.

Examples of the driving method of the display device having the liquid crystal element 21 include a TN mode, a VA mode, and an ASM (Axially Symmetrically Defined Micro-cel).
l) Mode, OCB (Optically Compensated Birefrin)
gene) mode, MVA mode, PVA (Patterned Vertical)
Element) mode, IPS mode, FFS mode, or TBA (Trans)
Verse Bend Alignment) mode and the like may be used. However, the present invention is not limited to this, and various liquid crystal elements and various driving methods thereof can be used.

Further, the liquid crystal element may be composed of a liquid crystal composition containing a liquid crystal exhibiting a blue phase and a chiral agent. The liquid crystal showing the blue phase has a short response speed of 1 msec or less and is optically isotropic, so that no orientation treatment is required and the viewing angle dependence is small.

In the configuration of the pixel 13 shown in FIG. 1B, one of the source electrode and the drain electrode of the transistor 22 is electrically connected to the signal line 19, and the other is electrically connected to the other of the pair of electrodes of the liquid crystal element 21. Be connected. Further, the gate electrode of the transistor 22 is electrically connected to the scanning line 17. The transistor 22 has a function of controlling data writing of a data signal by being turned on or off. As the transistor 22, the transistor shown in any one of the first to seventh embodiments can be used.

In the configuration of the pixel 13 shown in FIG. 1B, one of the pair of electrodes of the capacitance element 25 is electrically connected to the capacitance line 15 to which the potential is supplied, and the other is the pair of electrodes of the liquid crystal element 21. It is electrically connected to the other. The potential value of the capacitance line 15 is appropriately set according to the specifications of the pixel 13. The capacitance element 25 has a function as a holding capacitance for holding the written data.

For example, in the display device having the pixel 13 of FIG. 1 (B), the pixel 13 of each line is sequentially selected by the scanning line drive circuit 14, the transistor 22 is turned on, and the data of the data signal is written.

The pixel 13 to which the data is written is put into a holding state when the transistor 22 is turned off. By doing this sequentially line by line, the image can be displayed.

Further, the pixel 13 shown in FIG. 1C is a transistor 33 that switches the display element.
, The transistor 22 that controls the drive of the pixel, the transistor 35, the capacitance element 25, and the like.
It has a light emitting element 31 and.

As an example of the light emitting element 31, there is an element having an anode, a cathode, and an EL layer sandwiched between the anode and the cathode. As an example of the EL layer, a layer having a material capable of emitting light (fluorescence) from a singlet exciter, a layer having a material capable of emitting light (phosphorescence) from a triplet exciter, and a singlet exciter. There are layers having a material capable of emitting light from (fluorescence) and a material capable of emitting light (phosphorescence) from a triplet excitator.

One of the source electrode and the drain electrode of the transistor 33 is electrically connected to the signal line 19 to which the data signal is given. Further, the gate electrode of the transistor 22 is electrically connected to the scanning line 17 to which the gate signal is given.

The transistor 33 has a function of controlling data writing of a data signal by being turned on or off.

One of the source electrode and the drain electrode of the transistor 22 is electrically connected to the wiring 37 functioning as an anode line, and the other of the source electrode and the drain electrode of the transistor 22 is electrically connected to one electrode of the light emitting element 31. Will be done. Further, the gate electrode of the transistor 22 is electrically connected to the other of the source electrode and the drain electrode of the transistor 33 and one electrode of the capacitive element 25.

The transistor 22 has a function of controlling the current flowing through the light emitting element 31 when it is turned on or off.

One of the source electrode and the drain electrode of the transistor 35 is connected to the wiring 39 to which the reference potential of the data is given, and the other of the source electrode and the drain electrode of the transistor 35 is one electrode of the light emitting element 31 and the other of the capacitance element 25. It is electrically connected to the electrodes of. Moreover,
The gate electrode of the transistor 35 is electrically connected to the scanning line 17 to which the gate signal is given.

The transistor 35 has a function of adjusting the current flowing through the light emitting element 31. For example, when the internal resistance of the light emitting element 31 increases due to deterioration of the light emitting element 31 or the like, the transistor 35
By monitoring the current flowing through the wiring 39 to which one of the source electrode and the drain electrode is connected, the current flowing through the light emitting element 31 can be corrected. The potential given to the wiring 39 can be, for example, 0V.

One of the pair of electrodes of the capacitive element 25 is electrically connected to the other of the source electrode and the drain electrode of the transistor 33 and the gate electrode of the transistor 22, and the other of the pair of electrodes of the capacitive element 25 is the source of the transistor 35. The other of the electrode and the drain electrode, and the light emitting element 3
It is electrically connected to one of the electrodes of 1.

In the configuration of the pixel 13 shown in FIG. 1C, the capacitance element 25 has a function as a holding capacitance for holding the written data.

One of the pair of electrodes of the light emitting element 31 is electrically connected to the other of the source electrode and the drain electrode of the transistor 35, the other of the capacitive element 25, and the other of the source electrode and the drain electrode of the transistor 22. Further, the other of the pair of electrodes of the light emitting element 31 is electrically connected to the wiring 41 that functions as a cathode.

As the light emitting element 31, for example, an organic electroluminescence element (also referred to as an organic EL element) or the like can be used. However, the light emitting element 31 is not limited to this, and an inorganic EL element made of an inorganic material may be used.

A high power potential VDD is given to one of the wiring 37 and the wiring 41, and a low power potential VSS is given to the other. In the configuration shown in FIG. 1C, the wiring 37 is provided with the high power potential VDD and the wiring 41 is provided with the low power potential VSS.

In the display device having the pixel 13 of FIG. 1C, the pixel 1 of each row is provided by the scanning line drive circuit 14.
3 is sequentially selected, the transistor 22 is turned on, and the data of the data signal is written.

The pixel 13 to which the data is written is put into a holding state when the transistor 22 is turned off. Further, since the transistor 22 is connected to the capacitive element 25, the written data can be held for a long time. Further, the transistor 33 controls the amount of current flowing between the source electrode and the drain electrode, and the light emitting element 31 emits light with brightness corresponding to the amount of flowing current. By doing this sequentially line by line, the image can be displayed.

In the present specification and the like, the display element, the display device which is a device having a display element, the light emitting element, and the light emitting device which is a device having a light emitting element use various forms or have various elements. Can be done. As an example of a display element, display device, light emitting element or light emitting device, an EL (electroluminescence) element (EL element containing organic and inorganic substances, an organic EL element, an inorganic EL element), a transistor (a transistor that emits light according to an electric current) , Electron emitting element, liquid crystal element, electronic ink, electrophoresis element, digital micromirror device (D
Some have a display medium such as MD) and DMS (digital micro shutter) whose contrast, brightness, reflectance, transmittance and the like are changed by an electromagnetic action. An example of a display device using an EL element is an EL display or the like. An example of a display device using an electron emitting element is a field emission display (FED) or SE.
D method flat display (SED: Surface-conduction Elec)
Tron-emitter Display) and the like. An example of a display device using a liquid crystal element is a liquid crystal display (transmissive liquid crystal display, semi-transmissive liquid crystal display, reflective liquid crystal display, direct-view liquid crystal display, projection liquid crystal display). An example of a display device using electronic ink or an electrophoresis element is electronic paper.

Next, a specific example of the element substrate of the liquid crystal display device using the liquid crystal element for the pixel 13 will be described. Here, FIG. 2 shows a top view of the pixel 13 shown in FIG. 1 (B).

In FIG. 2, the conductive film 103 that functions as a scanning line is provided so as to extend in a direction substantially orthogonal to the signal line (left-right direction in the figure). The conductive film 117a that functions as a signal line is provided so as to extend in a direction substantially orthogonal to the scanning line (vertical direction in the drawing). The conductive film 117c that functions as a capacitance line is provided so as to extend in a direction parallel to the signal line. The conductive film 103 that functions as a scanning line is electrically connected to the scanning line driving circuit 14 (see FIG. 1A), and functions as a conductive film 117a that functions as a signal line and a capacitance line. The conductive film 117c is electrically connected to the signal line drive circuit 16 (see FIG. 1A).

The transistor 22 is provided in a region where the scanning line and the signal line intersect. The transistor 22 is a conductive film 103 that functions as a gate electrode and a gate insulating film (not shown in FIG. 2).
It is composed of a metal oxide film 109a on which a channel region formed on a gate insulating film is formed, and conductive films 117a and 117b that function as source electrodes and drain electrodes. The conductive film 103 also functions as a scanning line, and the region overlapping with the metal oxide film 109a functions as a gate electrode of the transistor 22. The conductive film 117a also functions as a signal line, and the region overlapping with the metal oxide film 109a functions as a source electrode or a drain electrode of the transistor 22. Further, in FIG. 2, the end portion of the scanning line is located outside the end portion of the metal oxide film 109a in the upper surface shape. Therefore, the scanning line functions as a light-shielding film that blocks light from a light source such as a backlight. As a result, the metal oxide film 109a contained in the transistor is not irradiated with light, and fluctuations in the electrical characteristics of the transistor can be suppressed.
Further, since the metal oxide film 109a is formed by using a metal oxide having semiconductor characteristics, a channel region is formed on the metal oxide film 109a.

Further, the conductive film 117b is electrically connected to a translucent conductive film 119 that functions as a pixel electrode.

The capacitive element 25 is a dielectric formed of a metal oxide film 109c formed on a gate insulating film, a translucent conductive film 119 that functions as a pixel electrode, and a nitride insulating film provided on the transistor 22. It is composed of a body membrane. Since the metal oxide film 109c has translucency, the capacitive element 25 has translucency. Further, the metal oxide film 109c that functions as one of the pair of electrodes of the capacitance element 25 functions as a capacitance line in the opening 115c, and the conductive film 117 that functions as a capacitance line.
It is connected to c.

Since the capacitive element 25 has translucency in this way, the capacitive element 25 is enlarged in the pixel 13 (
It can be formed (in a large area). Therefore, it is possible to obtain a semiconductor device having an aperture ratio of 50% or more, preferably 55% or more, preferably 60% or more, and an increased charge capacity. For example, in a high-resolution semiconductor device, for example, a liquid crystal display device, the area of pixels is small and the area of capacitive elements is also small. Therefore, in a semiconductor device having a high resolution, the charge capacitance accumulated in the capacitive element becomes small. However, since the capacitive element 25 shown in the present embodiment has translucency, by providing the capacitive element in the pixel, it is possible to increase the aperture ratio while obtaining a sufficient charge capacity in each pixel. Typically, the pixel density is 200 ppi or more, further 300 ppi or more, and further 500 pp.
It can be suitably used for high-resolution semiconductor devices having i or higher.

Further, the pixel 13 shown in FIG. 2 has a shape in which the side parallel to the conductive film 117a functioning as a signal line is shorter than the side parallel to the conductive film 103 functioning as a scanning line, and is a capacitance line. The conductive film 117c that functions as a signal line is stretched in a direction parallel to the conductive film 117a that functions as a signal line. As a result, the area of the conductive film 117c occupying the pixel 13 can be reduced, so that the aperture ratio can be increased.

Further, in one aspect of the present invention, since the aperture ratio can be increased even in a high-resolution display device, the light of a light source such as a backlight can be efficiently used, and the power consumption of the display device can be reduced. be able to.

Next, a method of manufacturing the element substrate of the display device will be described with reference to the cross-sectional view of the alternate long and short dash line AB shown in FIG. 2 and the sectional view of the alternate long and short dash line CD.

As shown in FIG. 3A, the conductive film 102 is formed on the substrate 101. Next, the mask 131 is formed on the conductive film 102 by a photolithography step using the first photomask.

There are no major restrictions on the material of the substrate 101, but at least it must have heat resistance sufficient to withstand the subsequent heat treatment. For example, a glass substrate, a ceramic substrate, a quartz substrate, a sapphire substrate, or the like may be used as the substrate 101. It is also possible to apply a single crystal semiconductor substrate, a polycrystalline semiconductor substrate, a compound semiconductor substrate such as silicon germanium, an SOI substrate, etc., which are formed by using silicon, silicon carbide, or the like, and a semiconductor element is applied on these substrates. May be used as the substrate 101. When a glass substrate is used as the substrate 101, the 6th generation (1500 mm × 1850 mm) and the 7th generation (1870 m)
m x 2200 mm), 8th generation (2200 mm x 2400 mm), 9th generation (2400 m)
By using a large area substrate such as m × 2800 mm) or 10th generation (2950 mm × 3400 mm), a large display device can be manufactured.

Further, a flexible substrate may be used as the substrate 101, and the conductive film 102 may be formed directly on the flexible substrate. Alternatively, a release layer is provided between the substrate 101 and the conductive film 102, an element portion having a transistor is formed on the release layer, and then the element portion is peeled from the substrate 101 in the release layer.
It may be reprinted on another substrate. As a result, the element portion can be provided on a substrate having low heat resistance or a substrate having flexibility.

The conductive film 102 later becomes a conductive film 103 that functions as a gate electrode. Therefore, as the conductive film 102, a conductive material that can be used as a gate electrode is appropriately used. Conductive film 10
No. 2 is formed by using a metal element selected from aluminum, chromium, copper, tantalum, titanium, molybdenum, and tungsten, an alloy containing the above-mentioned metal element as a component, an alloy combining the above-mentioned metal elements, and the like. Can be done. Further, a metal element selected from any one or more of manganese and zirconium may be used. Further, the conductive film 102 may have a single-layer structure or a laminated structure having two or more layers. For example, a single-layer structure of an aluminum film containing silicon, a two-layer structure in which an aluminum film is laminated on a titanium film, a two-layer structure in which a titanium film is laminated on a titanium nitride film, and a tungsten film on which a titanium nitride film is laminated. Layer structure, two-layer structure in which a tungsten film is laminated on a tantalum nitride film or a tungsten nitride film, a two-layer structure in which a copper film is laminated on a titanium film, a titanium film and an aluminum film laminated on the titanium film, and further There is a three-layer structure or the like that forms a titanium film on it. Also, on aluminum, a film of elements selected from titanium, tantalum, tungsten, molybdenum, chromium, neodymium, and scandium,
Alternatively, a plurality of combined alloy films or nitride films may be used.

The conductive film 102 includes an indium tin oxide film, an indium oxide film containing tungsten oxide, an indium zinc oxide film containing tungsten oxide, an indium oxide film containing titanium oxide, and an indium tin oxide film containing titanium oxide. A film formed of a translucent conductive material such as an indium zinc oxide film or an indium tin oxide film added with silicon oxide can also be applied. Further, a film formed of the translucent conductive material and a film formed of the metal element may be laminated.

Here, as the conductive film 102, a tungsten film having a thickness of 100 nm is formed by a sputtering method. Next, a mask is formed by a photolithography process.

Next, a part of the conductive film 102 is etched with the mask 131 to form the conductive film 103 that functions as a gate electrode. The conductive film 102 can be etched using a dry etching method and / or a wet etching method. After that, the mask 131 is removed (see FIG. 3B).

Here, using a mask, the tungsten film formed as the conductive film 102 is dry-etched to form the conductive film 103 that functions as a gate electrode.

Next, as shown in FIG. 3C, the insulating film 105, the insulating film 106, and the metal oxide film 108,
The insulating film 110 is formed in order. Next, the masks 133 and 135 are formed on the insulating film 110 by a photolithography step using the second photomask. Here, a multi-tone mask is used as the second photomask.

The multi-gradation photomask is a mask capable of performing exposure with a multi-step amount of light, and typically includes a gray tone mask, a halftone mask, and the like. In the gray tone mask, a light-shielding portion and a diffraction grating are formed on a transparent substrate. In the diffraction grating, the distance between light transmitting regions such as slits, dots, and meshes is equal to or less than the resolution limit of light used for exposure, and the light transmittance is controlled by the configuration. In the halftone mask, a light-shielding portion and a semi-transmissive portion are formed on a transparent substrate. The transmissivity of the light used for exposure is controlled by the semi-transmissive portion.

By using a multi-tone mask, it is possible to perform exposure in three stages of light intensity, that is, an exposed region, a semi-exposed region, and an unexposed region. As a result, by using a multi-gradation photomask, it is possible to form a resist mask having a plurality of (typically two types) thicknesses by one exposure and development process, and the number of photomasks can be formed. Can be reduced. Here, by using a multi-gradation photomask in the step of forming the metal oxide films 109a and 109b and the insulating film 111c, one photomask can be reduced.

The insulating film 105 and the insulating film 106 later become a gate insulating film. In addition, the insulating film 105
Is preferably formed using a nitride insulating film in order to prevent impurities from diffusing from the substrate 101 and the conductive film 103 functioning as the gate electrode to the metal oxide film 108. Further, the insulating film 106 is in contact with the metal oxide film 108. In order to reduce the interface state of the insulating film 106 and the metal oxide film 108, it is preferable that the insulating film 106 is formed by using an oxide insulating film.

The insulating film 105 may be formed by using silicon nitride, silicon nitride, aluminum nitride, aluminum nitride, or the like, and is provided in a laminated or single layer.

The insulating film 106 may be formed by using silicon oxide, silicon nitride nitride, aluminum oxide, hafnium oxide, gallium oxide, Ga—Zn-based metal oxide, or the like, and is provided in a laminated or single layer.

Further, as the insulating film 106, a hafnium silicate (HfSiO _x), hafnium silicate to which nitrogen is added _{(HfSi x O y N z)} , hafnium aluminate to which nitrogen is added _{(HfAl x O y N z)} , hafnium oxide, By forming using a high-k material such as yttrium oxide, the gate leak of the transistor can be reduced.

The total thickness of the insulating film 105 and the insulating film 106 is preferably 5 nm or more and 400 nm or less, more preferably 10 nm or more and 300 nm or less, and more preferably 50 nm or more and 250 nm or less.

As the insulating film 105 and the insulating film 106, a CVD method, a sputtering method, a vapor deposition method, a coating method, or the like can be appropriately used.

By providing the insulating film 105 formed of the nitride insulating film as a part of the gate insulating film, impurities from the conductive film 103 that functions as a gate electrode, typically hydrogen, nitrogen, alkali metal, or alkaline soil. It is possible to prevent similar metals and the like from moving to the metal oxide film 109a.

Further, by providing the insulating film 106 formed of the oxide insulating film on the metal oxide film 109a side as the gate insulating film, it is possible to reduce the defect level at the interface between the gate insulating film and the metal oxide film 109a. Is. As a result, it is possible to obtain a transistor with less deterioration in electrical characteristics.

The metal oxide film 108 is typically an In—Ga oxide film, an In—Zn oxide film, or In.
There are metal oxide films such as −M—Zn oxide film (M is Al, Ga, Ti, Y, Zr, La, Ce, or Nd). Since the metal oxide film has semiconductor properties, it can also be called an oxide semiconductor.

When the metal oxide film 108 is an In—M—Zn oxide film and the sum of In and M is 100 atomic%, the atomic number ratio of In and M is preferably 25 ato.
Greater than mic%, M less than 75atomic%, more preferably In 34ato
It is larger than mic% and M is less than 66 atomic%.

The energy gap of the metal oxide film 108 is 2 eV or more, preferably 2.5 eV or more, and more preferably 3 eV or more. By forming using a metal oxide having a wide energy gap in this way, it is possible to reduce the off-current of the transistor to be formed later.

As the metal oxide film 108, a metal oxide film having a low carrier density is used. For example, the metal oxide film 108 has a carrier density of 1 × 10 ¹⁷ pieces / cm ³ or less, preferably 1 × 10.
¹⁵ pcs / cm ³ or less, more preferably 1 x 10 ¹³ pcs / cm ³ or less, more preferably 1
× 10 Use a metal oxide film of ¹¹ pieces / cm ^{3 or less.}

The thickness of the metal oxide film 108 is 3 nm or more and 200 nm or less, preferably 3 nm or more and 10
It is 0 nm or less, more preferably 3 nm or more and 50 nm or less.

The metal oxide film 108 can be formed by using a sputtering method, a coating method, a pulse laser vapor deposition method, a laser ablation method, or the like.

When the metal oxide film 108 is formed by the sputtering method, an RF power supply device, an AC power supply device, a DC power supply device, or the like can be appropriately used as the power supply device for generating plasma.

As the sputtering gas, a rare gas (typically argon), oxygen, a mixed gas of a rare gas and oxygen is appropriately used. In the case of a mixed gas of rare gas and oxygen, it is preferable to increase the gas ratio of oxygen to the rare gas.

The metal oxide film 108 is an In—M—Zn oxide film (M is Al, Ti, Ga, Y, Zr,
In the case of La, Ce, Nd or Hf), the atomic number ratio of the metal element of the sputtering target used to form the In—M—Zn oxide film is the atomic number ratio of the metal element In: M: Z.
Assuming that n = x ₁ : y ₁ : z _{1 ,} x ₁ / y ₁ is 1/3 or more and 6 or less, further 1 or more and 6 or less, and z ₁ / y ₁ is 1/3 or more and 6 or less. Further, it is preferably 1 or more and 6 or less. By _{setting z 1} / y ₁ to 1 or more and 6 or less, CAAC-OS (C Axis Aligned Crystalline Oxid), which will be described later, is used as the metal oxide film 108.
e-Semiconductor) film is easily formed. Typical examples of the atomic number ratio of the target metal element are In: M: Zn = 1: 1: 1, In: M: Zn = 3: 1: 2,
There are In: M: Zn = 5: 5: 6 and the like. The atomic number ratio of the metal oxide film 108 to be formed includes a fluctuation of plus or minus 40% of the atomic number ratio of the metal element contained in the target as an error.

In order to obtain the metal oxide film 108 having high purity, it is necessary not only to evacuate the inside of the chamber with high vacuum but also to purify the sputter gas. The oxygen gas or argon gas used as the sputtering gas has a dew point of -40 ° C or lower, preferably -80 ° C or lower, more preferably -100 ° C or lower.
Hereinafter, by using a gas whose purity is more preferably −120 ° C. or lower, it is possible to prevent water and the like from being taken into the metal oxide film as much as possible.

The insulating film 110 is preferably an oxide insulating film in order to reduce the interface state at the interface with the metal oxide film 108. The insulating film 110 may be typically formed of silicon oxide, silicon oxide nitride, aluminum oxide, hafnium oxide, gallium oxide, Ga—Zn-based metal oxide, or the like, and is provided in a laminated or single layer.

Further, it is preferable to form the insulating film 110 as a part or all of the oxide insulating film containing more oxygen than oxygen satisfying the stoichiometric composition. An oxide insulating film containing more oxygen than oxygen satisfying a stoichiometric composition is partially desorbed by heating. An oxide insulating film containing more oxygen than oxygen satisfying a stoichiometric composition is TDS (Thermal).
In the Desorption Spectroscopy) analysis, the surface temperature was 100 ° C.
The amount of oxygen desorbed in terms of oxygen atoms in the heat treatment of 700 ° C. or higher or 100 ° C. or higher and 500 ° C. or lower is 1.0 × 10 ¹⁸ atoms / cm ³ or more, preferably 3.0 × 1.
It is an oxide insulating film having 0 ²⁰ atoms / cm ^{3 or more.}

Further, the insulating film 110 preferably has a small amount of defects, and typically, the spin density of the signal appearing at g = 2.001 derived from the dangling bond of silicon is 1.5 × 10 ^{18 by ESR measurement.} spins / cm less than ^3, more 1 × ¹⁰ 18 spins / cm ³ or ^{less, 1 × 10 17 spins / cm} 3 or less, and more preferably below the detection limit.

The thickness of the insulating film 110 is 30 nm or more and 500 nm or less, preferably 50 nm or more and 400.
It shall be nm or less.

By forming the insulating film 110 using an oxide insulating film containing more oxygen than oxygen satisfying the chemical quantitative composition, oxygen desorbed from the insulating film 110 by heat treatment is removed from the metal oxide film. It can be moved to 108. As a result, the oxygen deficiency contained in the metal oxide film 108 can be reduced.

The insulating film 110 can be formed by using a sputtering method, a CVD method, or the like.

When the insulating film 110 is formed by the CVD method, it is preferable to use a sedimentary gas containing silicon and an oxidizing gas as the raw material gas. Typical examples of the sedimentary gas containing silicon include silane, disilane, trisilane, fluorinated silane and the like. As an oxidizing gas,
There are oxygen, ozone, nitrous oxide, nitrogen dioxide, etc.

When the insulating film 110 is formed by using an oxide insulating film containing more oxygen than oxygen satisfying the stoichiometric composition, the substrate placed in the vacuum-exhausted processing chamber of the plasma CVD apparatus is placed at 180 ° C. Keeping at 280 ° C. or lower, more preferably 200 ° C. or higher and 240 ° C. or lower,
The raw material gas is introduced into the treatment chamber to set the pressure in the treatment chamber to 100 Pa or more and 250 Pa or less, more preferably 100 Pa or more and 200 Pa or less, and 0.1 to the electrodes provided in the treatment chamber.
7 W / cm ² or more and 0.5 W / cm ² or less, more preferably 0.25 W / cm ² or more 0.
A silicon oxide film or a silicon nitride film can be formed under the condition of supplying high frequency power of 35 W / cm ^{2 or less.}

By supplying high-frequency power with the above power density in the reaction chamber at the above pressure as the film forming condition of the insulating film 110, the decomposition efficiency of the raw material gas is increased in the plasma, oxygen radicals are increased, and the raw material gas is oxidized. Therefore, the oxygen content in the insulating film 110 is higher than the chemical quantitative composition. On the other hand, in the film formed at the above-mentioned temperature as the substrate temperature, since the binding force between silicon and oxygen is weak, a part of oxygen in the film is desorbed by the heat treatment in the subsequent step. As a result, it is possible to form an insulating film 110 which contains more oxygen than oxygen satisfying the stoichiometric composition and a part of oxygen is desorbed by heating.

The insulating film 110 has a multilayer structure of a first insulating film and a second insulating film, and is formed by using an oxide insulating film capable of allowing oxygen to permeate as the first insulating film to provide a second insulation. An oxide insulating film may be formed in which the film contains more oxygen than the oxygen satisfying the chemical quantitative composition and a part of the oxygen is desorbed by heating. With the laminated structure, the first insulating film serves as a protective film for the metal oxide film in the process of forming the second insulating film. As a result, the second insulating film can be formed by using high frequency power having a high power density while reducing damage to the metal oxide film.

Alternatively, the insulating film 110 can be formed by forming an insulating film by using a sputtering method, a CVD method, or the like, and then adding oxygen to the insulating film. As a method of adding oxygen to the insulating film, there are an ion doping method, an ion implantation method and the like. Alternatively, oxygen can be added to the insulating film by exposing the insulating film to a plasma containing oxygen generated in an oxidizing gas atmosphere.

Here, as the insulating film 105, a silicon nitride film having a thickness of 400 nm is formed by a CVD method. Further, as the insulating film 106, a silicon oxide film having a thickness of 50 nm is formed by a CVD method. Further, by a sputtering method using an In-Ga-Zn oxide target (In: Ga: Zn = 1: 1: 1) as the metal oxide film 108, I with a thickness of 35 nm.
It forms an n-Ga-Zn oxide film. Further, as the insulating film 110, silane having a flow rate of 200 sccm and nitrous oxide having a flow rate of 4000 sccm are used as raw material gases, and the pressure in the reaction chamber is 200.
A silicon oxide film having a thickness of 400 nm is formed as the insulating film 110 by the plasma CVD method in which Pa, the substrate temperature is 220 ° C., and a high frequency power of 1500 W is supplied to the parallel plate electrode using a high frequency power supply of 27.12 MHz. .. The plasma CVD apparatus has an electrode area of 6
It is a parallel plate type plasma CVD apparatus of 000 cm ^{2 , and the supplied electric power is 0.25 W / cm 2} when converted into electric power per unit area (power density). Further, the masks 133 and 135 are formed by using the halftone mask.

Next, a part of the insulating film 110 is etched by using the masks 133 and 135, and FIG. 3 (
As shown in D), the insulating films 111a and 111b are formed. Dry etching method or /
And the insulating film 110 can be etched by using the wet etching method. Next, a part of the metal oxide film 108 is etched using the masks 133 and 135 to form the metal oxide films 109a and 109b. The metal oxide film 108 can be etched using a dry etching method and / or a wet etching method.

Here, a part of each of the insulating film 110 and the metal oxide film 108 is etched by a dry etching method.

Next, the masks 133 and 135 are processed. Here, the size of the mask 133 is reduced, and the mask 135 is removed. Here, by plasma treatment in which the masks 133 and 135 are exposed to the plasma generated in an atmosphere having oxygen, the masks 133 and 1
35 is processed. The atmosphere having oxygen includes an atmosphere having an oxidizing gas such as oxygen, ozone, nitrous oxide, and nitrogen dioxide. The masks 133 and 135 may be exposed to the plasma generated while the bias is applied to the substrate 101 side. An ashing device is an example of a device that performs such plasma processing.

Here, the masks 133 and 135 are processed by exposing the masks 133 and 135 to plasma generated in an atmosphere having oxygen.

As a result, as shown in FIG. 3D, the mask 133 can form a retracted mask 137. Further, the mask 135 is removed and the insulating film 111b is exposed. In FIG. 3D, the broken lines correspond to the masks 133 and 135 shown in FIG. 3C, respectively.

Next, a part of the insulating film 111a is etched using the mask 137 to form the insulating film 111c and remove the insulating film 111b as shown in FIG. 3 (E). The insulating films 111a and 111b can be etched by using a dry etching method and / or a wet etching method. Here, the insulating film 111a is etched and the metal oxide films 109a and 109b are not etched, or the metal oxide film 10 is formed from the insulating film 111a.
It is preferable to use the condition that the etching rates of 9a and 109b are small.

Here, a part of the insulating film 111a is etched and the insulating film 111b is removed by a dry etching method.

As a result, an insulating film 111c that functions as a channel protective film can be formed. Further, since the mask is not formed on the insulating film 111b, the insulating film 111b is removed and the surface of the metal oxide film 109b is exposed. The insulating film 106 is formed of an oxide insulating film like the insulating film 110. Therefore, the insulating film 106 is also etched in the step, and an insulating film 107a whose end portion substantially coincides with the metal oxide film 109a is formed between the insulating film 105 and the metal oxide film 109a. Further, an insulating film 107b whose end portion substantially coincides with that of the metal oxide film 109b is formed between the insulating film 105 and the metal oxide film 109b.

Through the above steps, one photomask can form the metal oxide films 109a and 109b including the channel region of the transistor and the insulating film 111c that functions as a channel protective film.

In the etching process for forming the insulating film 111c, the metal oxide film 109
The areas exposed to plasma in a and 109b are damaged and oxygen deficiency is formed. Therefore, the region of the metal oxide film 109a not covered by the insulating film 111c and the conductivity of the metal oxide film 109b are enhanced.

Next, heat treatment is performed. The temperature of the heat treatment is typically 150 ° C. or higher and lower than the substrate strain point, preferably 300 ° C. or higher and 500 ° C. or lower, preferably 320 ° C. or higher and 470 ° C. or lower.

An electric furnace, an RTA device, or the like can be used for the heat treatment. By using the RTA device, the heat treatment can be performed at a temperature equal to or higher than the strain point of the substrate for a short time. Therefore, the heat treatment time can be shortened.

The heat treatment is nitrogen, oxygen, ultra-dry air (water content is 20 ppm or less, preferably 1 p).
Air of pm or less, preferably 10 ppb or less) or noble gas (argon, helium, etc.)
You can do it in the atmosphere of. It is preferable that the nitrogen, oxygen, ultra-dry air, or noble gas does not contain hydrogen, water, or the like.

By the heat treatment, a part of the oxygen contained in the insulating film 111c can be moved to the metal oxide film 109a, and the oxygen deficiency contained in the metal oxide film 109a can be reduced.

When the insulating film 110 is formed on the metal oxide film 108 while heating, oxygen can be transferred to the metal oxide film 108 to compensate for the oxygen deficiency contained in the metal oxide film 108. Therefore, it is not necessary to perform the heat treatment.

Here, after heat treatment at 450 ° C. for 1 hour in a nitrogen atmosphere, heat treatment at 450 ° C. for 1 hour is performed in a nitrogen and oxygen atmosphere.

Next, as shown in FIG. 4A, the insulating film 105, the insulating film 107, and the metal oxide film 109a
, 109b, and the insulating film 112c is formed with the insulating film 112. Next, a mask 139 is formed on the insulating film 112 by a photolithography step using a third photomask.

A nitride insulating film is provided as the insulating film 112. As the nitride insulating film, silicon nitride,
There are silicon nitride, aluminum nitride, aluminum nitride and the like. As the nitride insulating film, a nitride insulating film containing hydrogen may be formed.

The thickness of the insulating film 112 is 10 nm or more and 400 nm or less, more preferably 50 nm or more 3
It shall be 00 nm or less.

The insulating film 112 can be formed by using a sputtering method, a CVD method, or the like. Alternatively, hydrogen may be added to the insulating film after forming the insulating film by using a sputtering method, a CVD method or the like. As a method of adding hydrogen to the insulating film, there are an ion doping method, an ion implantation method and the like. Alternatively, hydrogen can be added to the insulating film by exposing the plasma generated in a gas atmosphere containing hydrogen to the insulating film.

Here, as the insulating film 112, a silicon nitride film having a thickness of 100 nm is formed by a plasma CVD method using silane, ammonia, and nitrogen as raw material gases.

Oxygen deficiency is formed in the metal oxide films 109a and 109b due to plasma damage generated when the insulating film 112 is formed on the insulating film 111c. Therefore, the metal oxide film 10
In 9a, the region not covered by the insulating film 111c and the metal oxide film 109b have high conductivity. Further, by using a nitride insulating film containing hydrogen as the insulating film 112, hydrogen moves from the insulating film 112 to the metal oxide films 109a and 109b. The transfer of hydrogen to the oxygen deficiency produces electrons, which are carriers. As a result, the metal oxide film 109b becomes highly conductive and becomes a conductive metal oxide film 109c. Further, the metal oxide film 10
The 9c functions as one electrode of the capacitive element 25.

The metal oxide film 109a is in contact with the insulating film 113 on the outside of the insulating film 111c. Since the insulating film 111c is an oxide insulating film, the metal oxide film 10 in contact with the insulating film 111c
9a functions as a channel region of the transistor. Further, in the metal oxide film 109a, the region in contact with the insulating film 113 has high conductivity as in the metal oxide film 109c. That is, it functions as a low resistance region in the metal oxide film 109c. Therefore, it is possible to increase the on-current of the transistor and to increase the mobility of the field effect.

Since the nitride insulating film also functions as a blocking film for water, hydrogen, etc., the insulating film 1
By providing the nitride insulating film as No. 12, it is possible to prevent hydrogen, water, etc. from entering the metal oxide film 109a from the outside.

Both the metal oxide film 109a and the metal oxide film 109c are formed on the gate insulating film, but the impurity concentrations are different. Specifically, the impurity concentration of the metal oxide film 109c is higher than that of the metal oxide film 109a. For example, the hydrogen concentration contained in the metal oxide film 109a is
5 × 10 ¹⁹ atoms / cm ^{less than 3} , preferably less than 5 × 10 ¹⁸ atoms / cm ³ , preferably 1 × 10 ¹⁸ atoms / cm ³ or less, more preferably 5 × 10 ¹⁷ atos
It is ms / cm ³ or less, more preferably 1 × 10 ¹⁶ atoms / cm ³ or less, and the hydrogen concentration contained in the metal oxide film 109c is 8 × 10 ¹⁹ or more, preferably 1 × 10 ²⁰ a.
Toms / cm ³ or more, more preferably 5 × 10 ²⁰ or more. In addition, the metal oxide film 1
Compared with 09a, the hydrogen concentration contained in the metal oxide film 109c is twice, preferably 10 times or more.

Further, the metal oxide film 109c has a lower resistivity than the metal oxide film 109a. The resistivity of the metal oxide film 109c is 1 × ^10-8 times or more ^{the resistivity of the metal oxide film 109a 1 × 10 −
It is preferably less than 1} times, typically 1 × 10 ^-3 Ωcm or more and ^{less than 1 × 10 4} Ωcm, and more preferably the resistivity is 1 × 10 ^-3 Ωcm or more and ^{less than 1 × 10 -1} Ωcm. It is good.

Next, heat treatment may be performed. The temperature of the heat treatment is typically 150 ° C. or higher and 40.
The temperature is 0 ° C. or lower, preferably 300 ° C. or higher and 400 ° C. or lower, preferably 320 ° C. or higher and 370 ° C. or lower.

In the transistor 22, the insulating film 105 formed of the nitride insulating film and the insulating film 112 formed of the nitride insulating film are in contact with each other, and the metal oxide film 1 is sandwiched between the insulating films 105 and 112.
09a and an insulating film 111c are provided. The nitride insulating film has a small diffusion coefficient of hydrogen, water, and oxygen, and has a high blocking property of hydrogen, water, and oxygen. Further, by forming the insulating film 111c using an oxide insulating film containing more oxygen than oxygen satisfying the chemical quantitative composition, the outside of the oxygen contained in the metal oxide film 109a in the heat treatment is obtained. It is possible to suppress the diffusion to. In addition, the diffusion of oxygen contained in the metal oxide film 109a to the outside can be suppressed. As a result, the oxygen deficiency of the metal oxide film 109a can be reduced. Furthermore, it is possible to suppress the diffusion of hydrogen, water, etc. from the outside into the metal oxide film 109a. Therefore, hydrogen, water, etc. of the metal oxide film 109a can be reduced. As a result, a highly reliable transistor can be manufactured.

Here, heat treatment is performed at 350 ° C. for 1 hour in a nitrogen and oxygen atmosphere.

Next, a part of the insulating film 112 is etched using the mask 139 to remove the mask, and then, as shown in FIG. 4B, the insulating film 11 having openings 115a, 115b, 115c is provided.
Form 3. At the openings 115a and 115b, a part of the metal oxide film 109a is exposed. At the opening 115c, a part of the metal oxide film 109c is exposed. The insulating film 112 can be etched using a dry etching method and / or a wet etching method. Next, the mask 139 is removed.

Here, a part of the insulating film 112 is etched by a dry etching method.

Next, as shown in FIG. 4C, the exposed portion of the metal oxide film 109a and the metal oxide film 109
The conductive film 116 is formed on the exposed portion of c and the insulating film 113. Next, by a photolithography step using a fourth photomask, the masks 141a, 141b, on the conductive film 116,
Form 141c.

The conductive film 116 becomes a conductive film 117a and 117b that later functions as a pair of electrodes, and a conductive film 117c that functions as a capacitance line. Therefore, as the conductive film 116, a conductive material that can be used as an electrode is appropriately used. The conductive film 116 uses a single metal composed of aluminum, titanium, chromium, nickel, copper, yttrium, zirconium, molybdenum, silver, tantalum, or tungsten, or an alloy containing the same as a main component as a single layer structure or a laminated structure. For example, a single-layer structure of an aluminum film containing silicon, a two-layer structure in which an aluminum film is laminated on a titanium film, a two-layer structure in which an aluminum film is laminated on a tungsten film, and a copper film on a copper-magnesium-aluminum alloy film. Two-layer structure for laminating, two-layer structure for laminating a copper film on a titanium film, two-layer structure for laminating a copper film on a tungsten film, a titanium film or a titanium nitride film, and the titanium film or the titanium nitride film. A three-layer structure in which an aluminum film or a copper film is laminated and a titanium film or a titanium nitride film is formed on the film, a molybdenum film or a molybdenum nitride film, and an aluminum film or copper laminated on the molybdenum film or the molybdenum nitride film. There is a three-layer structure in which a film is laminated and a molybdenum film or a molybdenum nitride film is further formed on the film. It may be formed by using a transparent conductive material containing indium oxide, tin oxide or zinc oxide.

The conductive film 116 is formed by using a sputtering method, a CVD method, a vapor deposition method, or the like.

Here, as the conductive film 116, a tungsten film having a thickness of 50 nm and a copper film having a thickness of 300 nm are formed by a sputtering method.

Next, a part of the conductive film 116 is etched using the masks 141a, 141b, and 141c to form the conductive films 117a and 117b that function as a pair of electrodes and the conductive film 117c that functions as a capacitance line. The conductive film 116 can be etched using a dry etching method and / or a wet etching method. After this, the masks 141a, 141b,
141c is removed (see FIG. 4D).

An insulating film 113 formed of a nitride insulating film is formed around the region where the metal oxide film 109a and the conductive films 117a and 117b are in contact with each other. Since the diffusion coefficient of copper in the nitride insulating film is small, copper diffusion can be prevented. Therefore, when a part or all of the conductive films 117a and 117b are formed of a copper film, the insulating film 113 functions as a copper barrier film. Therefore, the diffusion of copper into the channel region can be reduced, and the variation in the electrical characteristics of the transistor can be reduced.

Further, in the conductive film 117a and 117b, by using a conductive material such as tungsten, titanium, aluminum, copper, molybdenum, chromium, or tantalum alone or an alloy, which is easily bonded to oxygen, in the region in contact with the metal oxide film 109a, The oxygen in the metal oxide film 109a is extracted by the conductive material that easily combines with oxygen. In addition, tungsten, titanium, aluminum, copper, molybdenum, chromium, or a part of tantalum alone or a part of the constituent elements of the alloy may be mixed in the metal oxide film 109a. As a result, in the metal oxide film 109a, a low resistance region is formed in the vicinity of the region in contact with the conductive films 117a and 117b. Since the low resistance region has high conductivity, it is possible to reduce the contact resistance between the metal oxide film 109a and the conductive films 117a and 117b, and it is possible to increase the on-current of the transistor.

Next, as shown in FIG. 5A, a translucent conductive film 118 is formed on the insulating film 113, the conductive films 117a, 117b, and 117c. Next, a mask 143 is formed on the conductive film 118 by a photolithography step using a fifth photomask.

The conductive film 118 later becomes a conductive film 119 that functions as a pixel electrode. Therefore, as the conductive film 118, a conductive material that can be used as a pixel electrode is appropriately used. The conductive film 118 includes an indium tin oxide film, an indium oxide film containing tungsten oxide, an indium zinc oxide film containing tungsten oxide, an indium oxide film containing titanium oxide, an indium tin oxide film containing titanium oxide, and indium. A conductive film formed of a translucent conductive material such as a zinc oxide film or an indium tin oxide film to which silicon oxide is added can be applied.

The conductive film 118 is formed by using a sputtering method, a vapor deposition method, a coating method, or the like.

Here, an ITO film having a thickness of 100 nm is formed as the conductive film 118 by a sputtering method.

Next, a part of the conductive film 118 is etched with the mask 143 to form the conductive film 119 that functions as a pixel electrode. The conductive film 119 is a conductive film 11 that functions as a pair of electrodes.
It is formed so as to be in contact with 7b and to overlap with the metal oxide film 109c via the insulating film 113. Conductive film 118 using dry etching and / and wet etching
Can be etched. After that, the mask 143 is removed (see FIG. 5B).

Here, a part of the conductive film 118 is etched by a wet etching method.

Through the above steps, the conductive film 103 that functions as a gate electrode, the insulating films 105 and 106a that function as a gate insulating film, the metal oxide film 109a, the insulating film 111c that partially covers the metal oxide film 109a, and the metal oxide film. A conductive film 11 that comes into contact with 109a and functions as a pair of electrodes.
A transistor 22 having 7a and 117b can be manufactured. Further, the conductive film 119 which comes into contact with the conductive film 117b contained in the transistor 22 and functions as a pixel electrode can be formed. Further, the metal oxide film 109c and the insulating film 11 formed on the insulating film 106b.
3. The capacitive element 25 having the conductive film 119 can be manufactured. That is, the element substrate having the transistor 22, the conductive film 119 functioning as a pixel electrode, and the capacitive element 25.
It can be made with 5 photomasks. In the present embodiment, since the metal oxide film and the channel protection film are formed by using one photomask, the photomask required for manufacturing the device substrate can be reduced.

Further, the semiconductor device shown in the present embodiment forms a metal oxide film including the channel region of the transistor and at the same time forms a metal oxide film serving as one electrode of the capacitive element. Therefore, the metal oxide film including the channel region of the transistor and the metal oxide film serving as one electrode of the capacitive element are composed of the same metal element. Further, a conductive film that functions as a pixel electrode is used as the other electrode of the capacitive element. Therefore, in order to form the capacitive element, the step of newly forming the conductive film is unnecessary, and the step of manufacturing the display device can be reduced. Further, in the capacitive element, since both the metal oxide film 109c and the conductive film 119, which are a pair of electrodes, have translucency, the capacitive element 25 has translucency. As a result, the aperture ratio of the pixels can be increased while increasing the occupied area of the capacitive element. Furthermore, it is possible to manufacture a display device with reduced power consumption.

<About metal oxide film>
When hydrogen is added to an oxide semiconductor in which oxygen deficiency is formed, hydrogen enters the oxygen deficient site and a donor level is formed in the vicinity of the conduction band. As a result, the oxide semiconductor becomes highly conductive.
Make it a conductor. An oxide semiconductor that has been made into a conductor can be called an oxide conductor. In general, oxide semiconductors have a large energy gap and therefore have translucency with respect to visible light.
On the other hand, the oxide conductor is an oxide semiconductor having a donor level in the vicinity of the conduction band. Therefore, the influence of absorption by the donor level is small, and it has the same level of translucency as an oxide semiconductor with respect to visible light.

Here, a film formed of an oxide semiconductor (hereinafter referred to as an oxide semiconductor film (OS)) such as that used for the metal oxide film 109a and a film such that is used for the metal oxide film 109c.
The temperature dependence of resistivity in a film formed of an oxide conductor (hereinafter referred to as an oxide conductor film (OC)) will be described with reference to FIG. In FIG. 13, the horizontal axis represents the measured temperature and the vertical axis represents the resistivity. Further, the measurement result of the oxide semiconductor film (OS) is indicated by a circle, and the measurement result of the oxide conductor film (OC) is indicated by a square mark.

The sample containing the oxide semiconductor film (OS) has an atomic number ratio of In: Ga on a glass substrate.
An In-Ga-Zn oxide film having a thickness of 35 nm is formed by a sputtering method using a sputtering target of Zn = 1: 1: 1.2, and the atomic number ratio is In: Ga: Zn = 1: 4.
: In- with a thickness of 20 nm by a sputtering method using a sputtering target of 5.
A Ga-Zn oxide film is formed and heat-treated in a nitrogen atmosphere at 450 ° C., then heat-treated in a mixed gas atmosphere of nitrogen and oxygen at 450 ° C., and a silicon oxide film is further formed by a plasma CVD method. Made.

Further, the sample containing the oxide conductor film (OC) has an atomic number ratio of In: Ga on a glass substrate.
: Thickness 1 by the sputtering method using a sputtering target of Zn = 1: 1: 1.
A 00 nm In-Ga-Zn oxide film is formed, heat-treated in a nitrogen atmosphere at 450 ° C., and then heat-treated in a mixed gas atmosphere of nitrogen and oxygen at 450 ° C. to form a silicon nitride film by a plasma CVD method. Was made.

As can be seen from FIG. 13, the temperature dependence of the resistivity in the oxide conductor film (OC) is smaller than the temperature dependence of the resistivity in the oxide semiconductor film (OS). Typically, the rate of change in resistivity of the oxide semiconductor film (OC) at 80 K or more and 290 K or less is less than ± 20%. Alternatively, the rate of change in resistivity at 150 K or more and 250 K or less is less than ± 10%.
That is, the oxide conductor is a degenerate semiconductor, and it is presumed that the conduction band edge and the Fermi level coincide with or substantially coincide with each other. Therefore, the oxide conductor film can be used for a resistance element, a wiring, an electrode of a capacitance element, a pixel electrode, a common electrode, and the like.

<About oxide semiconductor film and metal oxide film>
Next, a metal oxide film having semiconductor characteristics and an aspect applicable to the oxide semiconductor film will be described. Here, an oxide semiconductor film will be described as a typical example, but the configuration of the oxide semiconductor film can be appropriately applied to the metal oxide film.

The oxide semiconductor film is preferably composed of a CAAC-OS film. CAAC-O
The S film has c-axis orientation, and a clear grain boundary (also referred to as grain boundary) cannot be confirmed. As a result, in the channel-etched transistor, the amount of overetching of the oxide semiconductor film when forming the pair of electrodes is small. As a result, a channel-etched transistor can be manufactured by forming the oxide semiconductor film with the CAAC-OS film. In the channel etch type transistor, the distance between the pair of electrodes, that is, the channel length is set to be 0.5 μm or more and 6.5 μm or less, preferably larger than 1 μm.
It can be as small as less than μm.

The oxide semiconductor film includes an oxide semiconductor having a single crystal structure (hereinafter referred to as a single crystal oxide semiconductor), an oxide semiconductor having a polycrystalline structure (hereinafter referred to as a polycrystalline oxide semiconductor), and a microcrystal structure. It may be composed of one or more of the oxide semiconductors (hereinafter, referred to as microcrystalline oxide semiconductors). The CAAC-OS, single crystal oxide semiconductor, polycrystalline oxide semiconductor, and microcrystal oxide semiconductor will be described below.

<CAAC-OS>
The CAAC-OS film is one of the oxide semiconductor films having a plurality of crystal portions. Also, CA
The crystal portion contained in the AC-OS film has c-axis orientation. CAA in a planar TEM image
The area of the crystal portion contained in the C-OS film is 2500 nm ² or more, more preferably 5 μm ² or more, still more preferably 1000 μm ² or more. Further, in the cross-sectional TEM image, by having the crystal portion of 50% or more, preferably 80% or more, more preferably 95% or more, a thin film having physical characteristics close to that of a single crystal can be obtained.

Transmission electron microscope (TEM: Transmission Elec) with CAAC-OS membrane
When observed by a TRON Microscope), a clear boundary between crystal portions, that is, a grain boundary (also referred to as a grain boundary) cannot be confirmed. Therefore, C
It can be said that the AAC-OS film is unlikely to cause a decrease in electron mobility due to grain boundaries.

When the CAAC-OS film is observed by TEM from a direction substantially parallel to the sample surface (cross-section TEM observation), it can be confirmed that the metal atoms are arranged in layers in the crystal portion. Each layer of the metal atom has a shape that reflects the unevenness of the surface (also referred to as the surface to be formed) or the upper surface of the CAAC-OS film, and is arranged parallel to the surface to be formed or the upper surface of the CAAC-OS film. .. In the present specification, "parallel" means a state in which two straight lines are arranged at an angle of −10 ° or more and 10 ° or less. Therefore, the case of −5 ° or more and 5 ° or less is also included. Further, "vertical" means a state in which two straight lines are arranged at an angle of 80 ° or more and 100 ° or less. Therefore, the case of 85 ° or more and 95 ° or less is also included.

On the other hand, the CAAC-OS film is observed by TEM from a direction substantially perpendicular to the sample surface (plane T).
By EM observation), it can be confirmed that the metal atoms are arranged in a triangular or hexagonal shape in the crystal portion. However, there is no regularity in the arrangement of metal atoms between different crystal parts.

When electron diffraction is performed on the CAAC-OS film, spots (bright spots) showing orientation are exhibited.
Is observed.

From the cross-sectional TEM observation and the planar TEM observation, it can be seen that the crystal portion of the CAAC-OS film has orientation.

X-ray diffraction (XRD: X-Ray Diffraction) with respect to the CAAC-OS film
When the structural analysis is performed using the apparatus, a peak may appear in the diffraction angle (2θ) near 31 ° in the analysis by the out-of-plane method of the CAAC-OS film. This peak is I
Since it belongs to the (00x) plane (x is an integer) of the crystal of nGaZn oxide, CAAC-
It can be confirmed that the crystals of the OS film have c-axis orientation and the c-axis is oriented substantially perpendicular to the surface to be formed or the upper surface.

On the other hand, in-p in which X-rays are incident on the CAAC-OS film from a direction approximately perpendicular to the c-axis.
In the analysis by the lane method, a peak may appear in the vicinity of 2θ at 56 °. This peak is attributed to the (110) plane of the InGaZn oxide crystal. In the case of a single crystal oxide semiconductor film of InGaZn oxide, 2θ is fixed in the vicinity of 56 ° and the normal vector of the sample surface is the axis (φ).
When the analysis (φ scan) is performed while rotating the sample as the axis), six peaks attributed to the crystal plane equivalent to the (110) plane are observed. On the other hand, in the case of CAAC-OS film, 2
Even when θ is fixed at around 56 ° and φ scan is performed, no clear peak appears.

From the above, in the CAAC-OS film, the a-axis and b-axis orientations are irregular between different crystal portions, but they have c-axis orientation and the c-axis is the normal of the surface to be formed or the upper surface. It can be seen that the direction is parallel to the vector. Therefore, each layer of the metal atoms arranged in layers confirmed by the above-mentioned cross-sectional TEM observation is a plane parallel to the ab plane of the crystal.

The crystals are formed when the CAAC-OS film is formed or when a crystallization treatment such as heat treatment is performed. As described above, the c-axis of the crystal is oriented in a direction parallel to the normal vector of the surface to be formed or the upper surface of the CAAC-OS film. Therefore, for example, when the shape of the CAAC-OS film is changed by etching or the like, the c-axis of the crystal may not be parallel to the normal vector of the surface to be formed or the upper surface of the CAAC-OS film.

Further, the crystallinity in the CAAC-OS film does not have to be uniform. For example, CAAC-OS
When the crystal part of the film is formed by crystal growth from the vicinity of the upper surface of the CAAC-OS film, the region near the upper surface may have a higher crystallinity than the region near the surface to be formed. Also, CA
When an impurity is added to the AC-OS film, the crystallinity of the region to which the impurity is added changes, and a region having a partially different crystallinity may be formed.

In the analysis of the CAAC-OS film by the out-of-plane method, 2θ is 31 °.
In addition to the peaks in the vicinity, peaks may appear in the vicinity of 2θ of 36 °. The peak in which 2θ is in the vicinity of 36 ° indicates that a part of the CAAC-OS film contains a crystal portion having no c-axis orientation. In the CAAC-OS film, 2θ peaks near 31 ° and 2θ is 36 °.
It is preferable that no peak is shown in the vicinity.

The CAAC-OS film is an oxide semiconductor film having a low impurity concentration. Impurities are elements other than the main components of the oxide semiconductor film, such as hydrogen, carbon, silicon, and transition metal elements. In particular, elements such as silicon, which have a stronger bond with oxygen than the metal elements constituting the oxide semiconductor film, disturb the atomic arrangement of the oxide semiconductor film by depriving the oxide semiconductor film of oxygen and have crystallinity. It becomes a factor to reduce. In addition, heavy metals such as iron and nickel, argon, carbon dioxide, etc. have a large atomic radius (or molecular radius), so if they are contained inside the oxide semiconductor film, they disturb the atomic arrangement of the oxide semiconductor film and are crystalline. It becomes a factor to reduce. The impurities contained in the oxide semiconductor film may serve as a carrier trap or a carrier generation source.

The CAAC-OS film is an oxide semiconductor film having a low defect level density. For example, oxygen deficiency in an oxide semiconductor film may become a carrier trap or a carrier generation source by capturing hydrogen.

A low impurity concentration and a low defect level density (less oxygen deficiency) is called high-purity intrinsic or substantially high-purity intrinsic. Since the oxide semiconductor film having high purity intrinsicity or substantially high purity intrinsicity has few carrier sources, the carrier density can be lowered. Therefore, the transistor using the oxide semiconductor film rarely has electrical characteristics (also referred to as normal on) in which the threshold voltage becomes negative. Further, the oxide semiconductor film having high purity intrinsicity or substantially high purity intrinsicity has few carrier traps. Therefore, the transistor using the oxide semiconductor film is a highly reliable transistor with little fluctuation in electrical characteristics. The charge captured by the carrier trap of the oxide semiconductor film takes a long time to be released, and may behave as if it were a fixed charge. Therefore, a transistor using an oxide semiconductor film having a high impurity concentration and a high defect level density may have unstable electrical characteristics.

Further, the transistor using the CAAC-OS film has a small fluctuation in electrical characteristics due to irradiation with visible light or ultraviolet light.

<Single crystal oxide semiconductor>
The single crystal oxide semiconductor film is an oxide semiconductor film having a low impurity concentration and a low defect level density (less oxygen deficiency). Therefore, the carrier density can be lowered. Therefore, a transistor using a single crystal oxide semiconductor film is unlikely to have normally-on electrical characteristics. Further, since the single crystal oxide semiconductor film has a low impurity concentration and a low defect level density, carrier traps may be reduced. Therefore, a transistor using a single crystal oxide semiconductor film is a highly reliable transistor with little fluctuation in electrical characteristics.

The density of the oxide semiconductor film increases when there are few defects. In addition, the oxide semiconductor film is
The higher the crystallinity, the higher the density. Further, the density of the oxide semiconductor film increases when the concentration of impurities such as hydrogen is low. The single crystal oxide semiconductor film has a higher density than the CAAC-OS film. Further, the CAAC-OS film has a higher density than the microcrystalline oxide semiconductor film. Moreover, the polycrystalline oxide semiconductor film has a higher density than the microcrystalline oxide semiconductor film. Further, the microcrystalline oxide semiconductor film has a higher density than the amorphous oxide semiconductor film.

<Polycrystalline oxide semiconductor>
Crystal grains of the polycrystalline oxide semiconductor film can be confirmed by observation with a high-resolution TEM. The crystal grains contained in the polycrystalline oxide semiconductor film are, for example, 2 nm or more and 300 nm or less, 3 nm or more and 100 nm or less, or 5 nm or more and 50 n in an observation image by a high-resolution TEM.
It often has a particle size of m or less. Further, in the polycrystalline oxide semiconductor film, the crystal grain boundaries may be confirmed by the observation image by the high resolution TEM.

The polycrystalline oxide semiconductor film has a plurality of crystal grains, and the crystal orientation may be different between the plurality of crystal grains. Further, when the structure of the polycrystalline oxide semiconductor film is analyzed using the XRD device, for example, the ou of the polycrystalline oxide semiconductor film having crystals of _{InGaZnO 4 is obtained.}
In the analysis by the t-of-plane method, a peak in which 2θ is in the vicinity of 31 °, a peak in which 2θ is in the vicinity of 36 °, or other peaks may appear.

Since the polycrystalline oxide semiconductor film has high crystallinity, it may have high electron mobility. Therefore, the transistor using the polycrystalline oxide semiconductor film has high field effect mobility. However, in the polycrystalline oxide semiconductor film, impurities may segregate at the grain boundaries. again,
The grain boundaries of the polycrystalline oxide semiconductor film are defect levels. Since the grain boundaries of the polycrystalline oxide semiconductor film may be a carrier trap or a carrier generation source, the transistor using the polycrystalline oxide semiconductor film is more electric than the transistor using the CAAC-OS film. The characteristics of the transistor fluctuate greatly, and the transistor may have low reliability.

<Microcrystalline oxide semiconductor>
In the microcrystal oxide semiconductor film, the crystal portion may not be clearly confirmed in the observation image by TEM. The crystal portion contained in the microcrystalline oxide semiconductor film often has a size of 1 nm or more and 100 nm or less, or 1 nm or more and 10 nm or less. In particular, 1 nm or more and 10 n
Nanocrystals (nc: nanocrys) that are microcrystals of m or less, or 1 nm or more and 3 nm or less.
An oxide semiconductor film having tal) is used as an nc-OS (nanocrystalline O).
It is called a xide Semiconductor) membrane. Further, the nc-OS film is, for example, T.
In the observation image by EM, the crystal grain boundaries may not be clearly confirmed.

The nc-OS film has periodicity in the atomic arrangement in a minute region (for example, a region of 1 nm or more and 10 nm or less, particularly a region of 1 nm or more and 3 nm or less). In addition, the nc-OS film does not show regularity in crystal orientation between different crystal portions. Therefore, no orientation is observed in the entire film.
Therefore, the nc-OS film may be indistinguishable from the amorphous oxide semiconductor film depending on the analysis method. For example, an XRD that uses X-rays having a diameter larger than that of the crystal portion for the nc-OS film.
When the structural analysis is performed using the apparatus, the peak indicating the crystal plane is not detected in the analysis by the out-of-plane method. Further, when electron beam diffraction (also referred to as limited field electron diffraction) using an electron beam having a diameter larger than that of the crystal portion (for example, 50 nm or more) is performed on the nc-OS film, a diffraction pattern such as a halo pattern is generated. Observed. On the other hand, when electron diffraction (also referred to as nanobeam electron diffraction) is performed on the nc-OS film using an electron beam having a probe diameter (for example, 1 nm or more and 30 nm or less) that is close to the size of the crystal portion or smaller than the crystal portion. Spots are observed. Further, when nanobeam electron diffraction is performed on the nc-OS film, a region having high brightness (in a ring shape) may be observed in a circular motion. Further, when nanobeam electron diffraction is performed on the nc-OS film, a plurality of spots may be observed in the ring-shaped region.

The nc-OS film is an oxide semiconductor film having higher regularity than the amorphous oxide semiconductor film. Therefore, the nc-OS film has a lower defect level density than the amorphous oxide semiconductor film. However, in the nc-OS film, there is no regularity in the crystal orientation between different crystal portions. Therefore, nc-
The OS film has a higher defect level density than the CAAC-OS film.

<Modification example 1, base insulating film>
In the transistor shown in the present embodiment, a base insulating film can be provided between the substrate 101 and the conductive film 103 that functions as a gate electrode, if necessary. As the underlying insulating film, silicon oxide, silicon nitride, silicon nitride, silicon nitride, gallium oxide, hafnium oxide, yttrium oxide, aluminum oxide, aluminum nitride and the like can be used. As the underlying insulating film, silicon nitride, gallium oxide, etc.
By forming using hafnium oxide, yttrium oxide, aluminum oxide or the like, diffusion of impurities, typically alkali metal, water, hydrogen and the like from the substrate 101 into the metal oxide film 109a can be suppressed.

The underlying insulating film can be formed by a sputtering method, a CVD method, or the like.

<Modification example 2, gate insulating film>
The insulating film 105 formed of the nitride insulating film can have a laminated structure of a first nitride insulating film having few defects and a second nitride insulating film having high hydrogen blocking property. By providing a nitride insulating film with few defects as the gate insulating film, the dielectric strength of the gate insulating film can be improved. Further, by providing a nitride insulating film having a high hydrogen blocking property as the gate insulating film, it is possible to prevent hydrogen from the conductive film 103 and the insulating film 105 that function as gate electrodes from moving to the metal oxide film 109a. Can be done.

Alternatively, as the insulating film 105 formed of the nitride insulating film, a first nitride insulating film having a high impurity blocking property, a second nitride insulating film having few defects, and a second nitride insulating film having a high hydrogen blocking property. The nitride insulating film can be laminated in order from the conductive film 103 side that functions as a gate electrode. By providing a first nitride insulating film having a high blocking property of impurities as the gate insulating film, impurities from the conductive film 103 that functions as a gate electrode, typically hydrogen, nitrogen, alkali metal, or alkaline soil. Metal oxide film 1
It is possible to prevent the movement to 09a.

The configuration and method shown in this embodiment can be used in combination with the configuration and method shown in other embodiments as appropriate.

(Embodiment 2)
In this embodiment, a method of manufacturing an element substrate of a display device different from that of the first embodiment will be described with reference to the drawings. In the present embodiment, similarly to the first embodiment, a metal oxide film having a channel region and an insulating film functioning as a channel protective film are formed by using one photomask. On the other hand, in the present embodiment, the order of the steps of manufacturing the conductive film that functions as an electrode and the insulating film that functions as a dielectric film of the capacitive element is different from that of the first embodiment.

A specific example of the element substrate of the liquid crystal display device using the liquid crystal element for the pixel 13 will be described.
Here, FIG. 6 shows a top view of the pixel 13 shown in FIG. 1 (B).

In FIG. 6, the conductive film 203 that functions as a scanning line is provided so as to extend in a direction substantially orthogonal to the signal line (left-right direction in the figure). The conductive film 213a that functions as a signal line is provided so as to extend in a direction substantially orthogonal to the scanning line (vertical direction in the drawing). The conductive film 213c that functions as a capacitance line is provided so as to extend in a direction parallel to the signal line. The conductive film 203 that functions as a scanning line is electrically connected to the scanning line driving circuit 14 (see FIG. 1A), and functions as a conductive film 213a that functions as a signal line and a capacitance line. The conductive film 213c is electrically connected to the signal line drive circuit 16 (see FIG. 1A).

The transistor 22a is provided in a region where the scanning line and the signal line intersect. The transistor 22a includes a conductive film 203 that functions as a gate electrode, a gate insulating film (not shown in FIG. 6), a metal oxide film 209a on which a channel region formed on the gate insulating film is formed, a source electrode and a drain. It is composed of conductive films 213a and 213b that function as electrodes.
The conductive film 203 also functions as a scanning line, and the region overlapping with the metal oxide film 209a functions as a gate electrode of the transistor 22a. The conductive film 213a also functions as a signal line, and the region overlapping with the metal oxide film 209a functions as a source electrode or a drain electrode of the transistor 22a. Further, in FIG. 6, the end portion of the scanning line is located outside the end portion of the metal oxide film 209a in the upper surface shape. Therefore, the scanning line functions as a light-shielding film that blocks light from a light source such as a backlight. As a result, the metal oxide film 209a contained in the transistor is not irradiated with light, and fluctuations in the electrical characteristics of the transistor can be suppressed.

Further, the conductive film 213b is electrically connected to the translucent conductive film 221 that functions as a pixel electrode at the opening 219.

The capacitive element 25a is a dielectric formed of a metal oxide film 209b formed on a gate insulating film, a translucent conductive film 221 that functions as a pixel electrode, and a nitride insulating film provided on the transistor 22a. It is composed of a body membrane. Since the metal oxide film 109b has translucency, the capacitive element 25a has translucency. Further, the metal oxide film 209b that functions as one of the pair of electrodes of the capacitance element 25a is connected to the conductive film 213c that functions as the capacitance line.

Since the capacitive element 25a has translucency in this way, the capacitive element 25a can be formed large (in a large area) in the pixel 13. Therefore, it is possible to obtain a semiconductor device having an aperture ratio of 50% or more, preferably 55% or more, preferably 60% or more, and an increased charge capacity. For example, in a high-resolution semiconductor device, for example, a liquid crystal display device, the area of pixels is small and the area of capacitive elements is also small. For this reason,
In a semiconductor device with high resolution, the charge capacitance stored in the capacitive element becomes small. However, since the capacitive element 25a shown in the present embodiment has translucency, by providing the capacitive element in the pixel, it is possible to increase the aperture ratio while obtaining a sufficient charge capacity in each pixel. Typically, the pixel density is 200 ppi or more, further 300 ppi or more, and further 50.
It can be suitably used for a high resolution semiconductor device having 0 ppi.

Further, the pixel 13 shown in FIG. 6 has a shape in which the side parallel to the conductive film 213a functioning as a signal line is shorter than the side parallel to the conductive film 203 functioning as a scanning line, and is a capacitance line. The conductive film 213c that functions as a signal line is stretched in a direction parallel to the conductive film 213a that functions as a signal line. As a result, the area of the conductive film 213c occupying the pixel 13 can be reduced, so that the aperture ratio can be increased.

Further, in one aspect of the present invention, since the aperture ratio can be increased even in a high-resolution display device, the light of a light source such as a backlight can be efficiently used, and the power consumption of the display device can be reduced. be able to.

Next, a method of manufacturing the element substrate of the display device will be described with reference to the cross-sectional view of the alternate long and short dash line AB shown in FIG. 6 and the sectional view of the alternate long and short dash line CD.

Through the same steps as in the first embodiment, the conductive film 203 that functions as a gate electrode on the substrate 210 by the step using the first photomask and the second photomask, as shown in FIG. 7 (A). To form. Further, the insulating films 205 and 207a are formed on the substrate 291 and the conductive film 203.
, 207b. Further, the metal oxide film 20 is formed on the insulating films 207a and 207b, respectively.
9a and 209b are formed. Further, an insulating film 211c that functions as a channel protective film is formed on the metal oxide film 209a. After that, heat treatment is performed.

The substrate 201 can be appropriately selected from the substrate 101 shown in the first embodiment. Further, for the conductive film 203, the same material and manufacturing method as the conductive film 103 that functions as the gate electrode shown in the first embodiment can be appropriately selected. As the insulating film 205, the same material and manufacturing method as the insulating film 105 shown in the first embodiment can be appropriately selected. Insulating films 207a, 207
For b, the same materials and manufacturing methods as those of the insulating films 107a and 107b shown in the first embodiment can be appropriately selected. For the metal oxide films 209a and 209b, the same materials and production methods as those of the metal oxide films 109a and 109b shown in the first embodiment can be appropriately selected. For the insulating film 211c that functions as the channel protective film, the same material and manufacturing method as the insulating film 111c shown in the first embodiment can be appropriately selected.

In the etching process for forming the insulating film 211c, the metal oxide film 209
The area exposed to plasma in a and 209b is damaged and oxygen deficiency is formed. Therefore, the region of the metal oxide film 209a not covered by the insulating film 211c and the conductivity of the metal oxide film 209b are enhanced.

Next, as shown in FIG. 7B, the conductive film 212 is formed on the insulating film 205, the insulating films 207a and 207b, the metal oxide films 209a and 209b, and the insulating film 211c. Next, the mask 23 is placed on the conductive film 212 by a photolithography step using a third photomask.
1a, 231b and 231c are formed.

For the conductive film 212, the same material and manufacturing method as the conductive film 116 shown in the first embodiment can be appropriately selected.

Next, a part of the conductive film 212 is etched using the masks 231a, 231b, and 231c to form the conductive films 213a and 213b that function as a pair of electrodes and the conductive film 213c that functions as a capacitance line. The conductive film 116 can be etched using a dry etching method and / or a wet etching method. After this, masks 231a, 231b,
Remove 231c (see FIG. 7C).

Next, as shown in FIG. 8A, the insulating film 214 is formed on the insulating film 205, the insulating films 207a and 207b, the metal oxide films 209a and 209b, the insulating film 211c, and the conductive films 213a, 213b and 213c. Form. Next, the mask 233 is formed on the insulating film 214 by a photolithography step using a fourth photomask.

As the insulating film 214, the same material and manufacturing method as the insulating film 112 shown in the first embodiment can be appropriately selected.

Oxygen deficiency is formed in the metal oxide films 209a and 209b due to plasma damage generated when the insulating film 214 is formed on the insulating film 211c. Therefore, the metal oxide film 20
In 9a, the region not covered by the insulating film 211c and the metal oxide film 209b have high conductivity. Further, by using a nitride insulating film containing hydrogen as the insulating film 214, hydrogen is diffused from the insulating film 214 to the metal oxide films 209a and 209b. The transfer of hydrogen to the oxygen deficiency produces electrons, which are carriers. As a result, the metal oxide film 209b becomes highly conductive and becomes a conductive metal oxide film 209c. Further, the metal oxide film 20
The 9c functions as one electrode of the capacitive element 25.

The metal oxide film 209a is in contact with the insulating film 213 on the outside of the insulating film 211c. Since the insulating film 211c is an oxide insulating film, the metal oxide film 20 in contact with the insulating film 211c
9a functions as a channel region of the transistor. Further, in the metal oxide film 209a, the region in contact with the conductive film 213a and 213b has high conductivity as in the metal oxide film 209c. That is, it functions as a low resistance region in the metal oxide film 209a. Therefore, it is possible to increase the on-current of the transistor and to increase the mobility of the field effect.

Since the nitride insulating film also functions as a blocking film for water, hydrogen, etc., the insulating film 2
By providing the nitride insulating film as 14, it is possible to prevent hydrogen, water, etc. from entering the metal oxide film 209a from the outside.

Both the metal oxide film 209a and the metal oxide film 209c are formed on the gate insulating film, but the impurity concentrations are different. Specifically, the impurity concentration of the metal oxide film 209c is higher than that of the metal oxide film 209a. For example, the hydrogen concentration contained in the metal oxide film 209a is 5.
× 10 ¹⁹ atoms / cm ^{less than 3} , preferably less than 5 × 10 ¹⁸ atoms / cm ³ ,
Preferably 1 × 10 ¹⁸ atoms / cm ³ or less, more preferably 5 × 10 ^{17 atoms.}
It is s / cm ³ or less, more preferably 1 × 10 ¹⁶ atoms / cm ³ or less, and the hydrogen concentration contained in the metal oxide film 209c is 8 × 10 ¹⁹ or more, preferably 1 × 10 ²⁰ at.
oms / cm ³ or more, more preferably 5 × 10 ²⁰ or more. Further, the metal oxide film 20
Compared with 9a, the hydrogen concentration contained in the metal oxide film 209c is twice, preferably 10 times or more.

Further, the metal oxide film 209c has a lower resistivity than the metal oxide film 209a. The resistivity of the metal oxide film 209c is 1 × ^10-8 times or more ^{the resistivity of the metal oxide film 209a 1 × 10 −
It is preferably 1} times or less, typically 1 × 10 ^-3 Ωcm or more and ^{less than 1 × 10 4} Ωcm, and more preferably the resistivity is 1 × 10 ^-3 Ωcm or more and ^{less than 1 × 10 -1} Ωcm. It is good.

Next, heat treatment may be performed. The temperature of the heat treatment is typically 150 ° C. or higher and 40.
The temperature is 0 ° C. or lower, preferably 300 ° C. or higher and 400 ° C. or lower, preferably 320 ° C. or higher and 370 ° C. or lower.

The insulating film 205 formed of the nitride insulating film and the insulating film 214 formed of the nitride insulating film are in contact with each other, and the metal oxide film 209a and the insulating film 211c are provided between the insulating films 205 and 214. The nitride insulating film has a small diffusion coefficient of hydrogen, water, and oxygen, and has a high blocking property of hydrogen, water, and oxygen. Further, by forming the insulating film 211c using an oxide insulating film containing more oxygen than oxygen satisfying the chemical quantitative composition, the outside of the oxygen contained in the metal oxide film 209a in the heat treatment is obtained. It is possible to suppress the diffusion to. As a result, the oxygen deficiency of the metal oxide film 209a can be reduced. Furthermore, it is possible to suppress the diffusion of hydrogen, water, etc. from the outside into the metal oxide film 209a. Therefore, hydrogen, water, etc. of the metal oxide film 209a can be reduced. As a result, a highly reliable transistor can be manufactured.

Next, as shown in FIG. 8A, the mask 233 is formed by a photolithography step using a fourth photomask. Next, a part of the insulating film 214 is etched by using the mask 233 to form the insulating film 217 having the opening 219 as shown in FIG. 8 (B). At the opening 219, a part of the conductive film 213b is exposed.

Next, as shown in FIG. 8C, a translucent conductive film 220 is formed on the exposed portion of the conductive film 213b and the insulating film 217. Next, a mask 235 is formed on the conductive film 220 by a photolithography step using a fifth photomask.

For the conductive film 220, the same material and manufacturing method as the conductive film 118 shown in the first embodiment can be appropriately selected.

Next, a part of the conductive film 220 is etched with the mask 235 to form the conductive film 221 that functions as a pixel electrode. After that, the mask 235 is removed (see FIG. 8D).

Through the above steps, the conductive film 203 that functions as a gate electrode, the insulating films 205 and 206a that function as a gate insulating film, the metal oxide film 209a, and the insulating film that functions as a channel protective film that partially covers the metal oxide film 209a. A transistor 22a having a conductive film 213a and 213b that comes into contact with 211c and a metal oxide film 209a and functions as a pair of electrodes can be produced. Further, the conductive film 221 that comes into contact with the conductive film 213b contained in the transistor 22a and functions as a pixel electrode can be formed. Further, a capacitive element 25a having a metal oxide film 209c, an insulating film 217, and a conductive film 221 formed on the insulating film 206b can be manufactured. That is, the transistor 22a, the conductive film 221 that functions as a pixel electrode,
An element substrate having the capacitance element 25a and the capacitance element 25a can be produced with five photomasks.
In the present embodiment, since the metal oxide film and the channel protection film are formed by using one photomask, the photomask required for manufacturing the device substrate can be reduced.

Further, the semiconductor device shown in the present embodiment forms a metal oxide film including the channel region of the transistor and at the same time forms a metal oxide film serving as one electrode of the capacitive element. Therefore, the metal oxide film including the channel region of the transistor and the metal oxide film serving as one electrode of the capacitive element are composed of the same metal element. Further, a conductive film that functions as a pixel electrode is used as the other electrode of the capacitive element. Therefore, in order to form the capacitive element, the step of newly forming the conductive film is unnecessary, and the step of manufacturing the display device can be reduced. Further, in the capacitive element, since both the metal oxide film 109c and the conductive film 119, which are a pair of electrodes, have translucency, the capacitive element 25a has translucency. As a result, the aperture ratio of the pixels can be increased while increasing the occupied area of the capacitive element. Furthermore, it is possible to manufacture a display device with reduced power consumption.

The configuration and method shown in this embodiment can be used in combination with the configuration and method shown in other embodiments as appropriate.

(Embodiment 3)
In the present embodiment, a semiconductor device having a transistor capable of further reducing the amount of defects in the metal oxide film as compared with the first embodiment and the second embodiment will be described with reference to the drawings. The transistor described in the present embodiment is different from the first and second embodiments in that a multilayer film having a plurality of metal oxide films is provided instead of the metal oxide film. ..

FIG. 9 shows a cross-sectional view of the transistor 22b and the capacitance element 25b included in the semiconductor device.
FIG. 9 is a cross-sectional view between the alternate long and short dash lines AB and CD of FIG.

The transistor 22b shown in FIG. 9A has a multilayer film 150a on the insulating film 107a. The multilayer film 150a includes a first metal oxide film 151a in contact with the insulating film 107a, and a first metal oxide film 151a.
It has a second metal oxide film 152a in contact with the metal oxide film 151a and the insulating film 111c.

The capacitive element 25b shown in FIG. 9A has a multilayer film 150b on the insulating film 107b. The multilayer film 150b has a first metal oxide film 151b in contact with the insulating film 107b, and a second metal oxide film 152b in contact with the first metal oxide film 151b and the insulating film 113.

The second metal oxide films 152a and 152b are metal oxide films composed of one or more of the elements constituting the first metal oxide films 151a and 151b. Therefore, interfacial scattering is unlikely to occur at the interface between the first metal oxide films 151a and 151b and the second metal oxide films 152a and 152b. Therefore, the movement of the carrier is not hindered at the interface.
The field effect mobility of the transistor increases.

The first metal oxide films 151a and 151b and the second metal oxide films 152a and 152b are typically In-Ga oxide, In-Zn oxide, and In-M-Zn oxide (M is Al
, Ga, Ti, Y, Zr, La, Ce, or Nd).

Further, the second metal oxide films 152a and 152b are the first metal oxide films 151a and 15b.
The energy at the lower end of the conduction band is closer to the vacuum level than 1b, and typically, the energy at the lower end of the conduction band of the second metal oxide films 152a and 152b and the energy of the first metal oxide films 151a and 1b.
The difference from the energy at the lower end of the conduction band of 51b is 0.05 eV or more, 0.07 eV or more, 0
.. 1 eV or more, 0.15 eV or more, and 2 eV or less, 1 eV or less, 0.5 eV or less, or 0.4 eV or less. That is, the difference between the electron affinity of the second metal oxide films 152a and 152b and the electron affinity of the first metal oxide films 151a and 151b is 0.05 eV or more, 0.07 eV or more, 0.1 eV or more. Or 0.15 eV or more and 2 eV or less, 1
It is eV or less, 0.5 eV or less, or 0.4 eV or less.

The first metal oxide films 151a and 151b and the second metal oxide films 152a and 152b are preferable because they contain In and the carrier mobility (electron mobility) is high.

As the second metal oxide films 152a and 152b, Al, Ga, Ti, Y, Zr, La,
Having Ce or Nd at a higher atomic number ratio than In may have the following effects. (1) Increase the energy gap between the second metal oxide films 152a and 152b.
(2) The electron affinity of the second metal oxide films 152a and 152b is reduced. (3) Suppresses the diffusion of impurities from the outside. (4) The insulating property is higher than that of the first metal oxide films 151a and 151b. (5) Since Al, Ga, Y, Zr, La, Ce, or Nd is a metal element having a strong binding force with oxygen, oxygen deficiency is less likely to occur.

When the first metal oxide films 151a and 151b are In-M-Zn oxides and the sum of In and M is 100 atomic%, the atomic number ratio of In and M is preferably larger than 25 atomic% for In. , M is less than 75 atomic%, more preferably In is greater than 34 atomic% and M is less than 66 atomic%.

When the second metal oxide films 152a and 152b are In-M-Zn oxides and the sum of In and M is 100 atomic%, the atomic number ratio of In and M is preferably I.
n is less than 50 atomic%, M is greater than 50 atomic%, more preferably
It is assumed that In is less than 25 atomic% and M is larger than 75 atomic%.

Further, the first metal oxide films 151a and 151b and the second metal oxide films 152a and 15
When 2b is In—M—Zn oxide M (M is Al, Ga, Ti, Y, Zr, La, Ce, or Nd), it is compared with the first metal oxide films 151a and 151b. The atomic number ratio of M (Al, Ga, Ti, Y, Zr, La, Ce, or Nd) contained in the second metal oxide films 152a and 152b is large, and the first metal oxide is typically the first metal oxide. The atom number ratio is 1.5 times or more, preferably 2 times or more, and more preferably 3 times or more higher than the above-mentioned atoms contained in the films 151a and 151b.

Further, the first metal oxide films 151a and 151b and the second metal oxide films 152a and 15
When 2b is an In—M—Zn oxide (M is Al, Ga, Ti, Y, Zr, La, Ce, or Nd), the second metal oxide films 152a and 152b are formed with In: M: Zn = x ₁ : y ₁ :
z ₁ [atomic ratio], the first metal oxide film 151a, the _{151b In: M: Zn = x} 2: y
₂ : When z ₂ [atomic number ratio], y ₁ / x ₁ is _{larger than y 2} / x ₂ , preferably y.
₁ / x ₁ is 1.5 times or more than _{y 2} / x _2. More preferably, y ₁ / x ₁ is y ₂
It is more than twice as large as / x _{2 , more preferably y 1} / x ₁ is more than three times larger than _{y 2} / x _2. At this time, the metal oxide film, when y ₂ is at x ₂ or more, preferably because it can have stable electric characteristics to a transistor 22b with the metal oxide film.

The first metal oxide films 151a and 151b are In-M-Zn oxides (M is Al, Ga,
In the case of Ti, Y, Zr, La, Ce, or Nd), the first metal oxide films 151a, 15
In the target used to form 1b, the atomic number ratio of the metal element is In: M: Zn.
= X ₁ : y ₁ : z _{1 ,} x ₁ / y ₁ is 1/3 or more and 6 or less, further 1 or more and 6 or less, and z ₁ / y ₁ is 1/3 or more and 6 or less. Further, it is preferably 1 or more and 6 or less. By _{setting z 1} / y ₁ to 1 or more and 6 or less, the first metal oxide films 151a and 15
The CAAC-OS film is likely to be formed as 1b. Typical examples of the atomic number ratio of the target metal element are In: M: Zn = 1: 1: 1, In: M: Zn = 1: 1: 1.2, In.
: M: Zn = 3: 1: 2, etc.

The second metal oxide films 152a and 152b are In-M-Zn oxides (M is Al, Ga,
In the case of Ti, Y, Zr, La, Ce, or Nd), the second metal oxide film 152a, 15
In the target used to form 2b, the atomic number ratio of the metal element is In: M: Zn.
= _{X 2:} y _2: When _{z 2,} a _{x 2 / y 2 <x 1} / y 1, z 2 / y 2 is 1/3
It is preferably 6 or more, more preferably 1 or more and 6 or less. In addition, z ₂ / y ₂ is 1 or more and 6
By doing so, the CAAC-OS film can be easily formed as the second metal oxide films 152a and 152b. As a typical example of the atomic number ratio of the target metal element, In: M: Zn
= 1: 3: 2, In: M: Zn = 1: 3: 4, In: M: Zn = 1: 3: 6, In: M:
There are Zn = 1: 3: 8 and the like.

The first metal oxide films 151a and 151b and the second metal oxide films 152a and 15
Each of the atomic number ratios of 2b includes a fluctuation of plus or minus 40% of the above atomic number ratio as an error.

The second metal oxide films 152a and 152b are used when forming a film to be an insulating film 111c.
It also functions as a damage mitigating film for the first metal oxide film 151a.

The thickness of the first metal oxide films 151a and 151b is 3 nm or more and 200 nm or less, preferably 3 nm or more and 100 nm or less, and more preferably 3 nm or more and 50 nm or less. Second
The thickness of the metal oxide films 152a and 152b is 3 nm or more and 100 nm or less, preferably 3.
It is set to nm or more and 50 nm.

The first metal oxide films 151a and 151b and the second metal oxide films 152a and 152b may have, for example, a non-single crystal structure. The non-single crystal structure is, for example, CAAC-OS (C) described later.
Axis Aligned-Crystalline Oxide Semicond
It includes a uctor), a polycrystalline structure, a microcrystal structure described later, or an amorphous structure.

The first metal oxide films 151a and 151b and the second metal oxide films 152a and 15
In 2b, an amorphous structure region, a microcrystal structure region, a polycrystalline structure region, and CAAC-O.
A mixed film having two or more types of a region S and a region having a single crystal structure may be formed. The mixed film has, for example, a monolayer structure having two or more regions of an amorphous structure region, a microcrystal structure region, a polycrystalline structure region, a CAAC-OS region, and a single crystal structure region. In some cases. Further, the mixed film may be, for example, an amorphous region, a microcrystal region, a polycrystalline region, CAAC-.
It may have a laminated structure of two or more regions of either the OS region or the single crystal structure region.

Here, a second metal oxide film 152a is provided between the first metal oxide film 151a and the insulating film 111c. Therefore, the second metal oxide film 152a and the insulating film 111c
Even if a carrier trap is formed due to impurities and defects, there is a gap between the region where the carrier trap is formed and the first metal oxide film 151a. As a result, the electrons flowing through the first metal oxide film 151a are less likely to be captured by the carrier trap, the on-current of the transistor 22b can be increased, and the electric field effect mobility can be increased. Further, when an electron is captured by the carrier trap, the electron becomes a negative fixed charge. As a result, the threshold voltage of the transistor fluctuates. However, since there is a gap between the first metal oxide film 151a and the region where the carrier trap is formed, it is possible to suppress the capture of electrons in the carrier trap and reduce the fluctuation of the threshold voltage. can do.

Further, since the second metal oxide film 152a can shield impurities from the outside, it is possible to reduce the amount of impurities moving from the outside to the first metal oxide film 151a. Further, the second metal oxide film 152a is less likely to form an oxygen deficiency. Because of these
It is possible to reduce the impurity concentration and the amount of oxygen deficiency in the first metal oxide film 151a.

The first metal oxide films 151a and 151b and the second metal oxide films 152a and 15
2b is manufactured so that continuous bonding (here, in particular, a structure in which the energy at the lower end of the conduction band changes continuously between the films) is formed instead of simply laminating the films. That is, the laminated structure is such that impurities such as trap centers and recombination centers that form defect levels do not exist at the interface of each film. If impurities are mixed between the laminated first metal oxide films 151a and 151b and the second metal oxide films 152a and 152b, the continuity of the energy band is lost and carriers are formed at the interface. It is trapped or recombined and disappears.

In order to form a continuous junction, it is necessary to continuously laminate each film without exposing it to the atmosphere by using a multi-chamber type film forming apparatus (sputtering apparatus) equipped with a load lock chamber. Each chamber in the sputtering apparatus uses a suction-type vacuum exhaust pump such as a cryopump to remove water and the like, which are impurities for the metal oxide film, as much as possible, and high vacuum exhaust (5 × ^10-7 Pa to 1). (Up to about × 10 ^-4 Pa) is preferable. Alternatively, it is preferable to combine a turbo molecular pump and a cold trap to prevent gas, particularly a gas containing carbon or hydrogen, from flowing back from the exhaust system into the chamber.

Further, as shown in FIG. 9B, the transistor 22c may have a multilayer film 155a, and the capacitive element 25c may have a multilayer film 155b.

In the multilayer film 155a, a third metal oxide film 153a, a first metal oxide film 151a, and a second metal oxide film 152a are laminated in this order. In addition, the third metal oxide film 153a
Is in contact with the insulating film 107a, the second metal oxide film 152a is in contact with the insulating film 111c, and the first metal oxide film 151a functions as a channel region.

In the multilayer film 155b, a third metal oxide film 153b, a first metal oxide film 151b, and a second metal oxide film 152b are laminated in this order. In addition, the third metal oxide film 153b
Is in contact with the insulating film 107b, and the second metal oxide film 152b is in contact with the insulating film 113.

As the third metal oxide films 153a and 153b, the same materials and forming methods as those of the second metal oxide films 152a and 152b can be appropriately used.

It is preferable that the third metal oxide films 153a and 153b have a smaller film thickness than the first metal oxide films 151a and 151b. By setting the thickness of the third metal oxide films 153a and 153b to 1 nm or more and 5 nm or less, preferably 1 nm or more and 3 nm or less, it is possible to reduce the fluctuation amount of the threshold voltage of the transistor.

The transistors shown in the present embodiment include an insulating film 107a and a first metal oxide film 151a.
A third metal oxide film 153a is provided between the two. Further, the first metal oxide film 15
A second metal oxide film 152a is provided between 1a and the insulating film 111c. Therefore, even if a carrier trap is formed between the insulating film 107a and the first metal oxide film 151a, and between the first metal oxide film 151a and the insulating film 111c due to impurities and defects, the carrier is concerned. There is a gap between the region where the trap is formed and the first metal oxide film 151a. As a result, the electrons flowing through the first metal oxide film 151a are less likely to be captured by the carrier trap, the on-current of the transistor 22c can be increased, and the electric field effect mobility can be increased. Further, when an electron is captured by the carrier trap, the electron becomes a negative fixed charge. As a result, the threshold voltage of the transistor fluctuates. However, since there is a gap between the first metal oxide film 151a and the region where the carrier trap is formed, it is possible to suppress the capture of electrons in the carrier trap, and the threshold voltage of the transistor 22c can be suppressed. Fluctuations can be reduced.

The configuration and method shown in this embodiment can be used in combination with the configuration and method shown in other embodiments as appropriate.

(Embodiment 4)
In the present embodiment, a method for manufacturing a transistor having a large on-current, a high field effect mobility, and a small variation in electrical characteristics and a capacitive element with a reduced photomask is described.
This will be described with reference to FIGS. 10 and 11. In this embodiment, the transistor shown in the second embodiment and the method for manufacturing the transistor will be described, but the present embodiment can be appropriately applied to other embodiments. Further, the description of the configuration overlapping with the second embodiment will be omitted.

FIG. 10 is a top view of the pixel 13, and FIG. 11 (A) shows the alternate long and short dash lines AB and CD of FIG.
11 (B) is a cross-sectional view between the alternate long and short dash lines EF in FIG.

The transistor 22d is provided in a region where the scanning line and the signal line intersect. The transistor 22d includes a conductive film 203 that functions as a gate electrode, a gate insulating film (not shown in FIG. 11), and a metal oxide film 209a on which a channel region formed on the gate insulating film is formed.
Conductive films 213a and 213b that function as source and drain electrodes, metal oxide film 2
It is composed of 09a, an insulating film covering the conductive films 213a and 213b (not shown in FIG. 11), and a conductive film 243 that functions as a gate electrode. The transistor 22d has an opening 241.
The conductive film 203 and the conductive film 243 that function as gate electrodes are connected to each other.

Next, the cross-sectional structure of the transistor 22d will be described with reference to FIG. FIG. 11 (A
) Is a cross-sectional view of the transistor 22d in the channel length direction and a cross-sectional view of the capacitive element 25a.
FIG. 11B is a cross-sectional view of the transistor 22d in the channel direction.

The transistor 22d shown in FIGS. 11 (A) and 11 (B) is a channel protection type transistor, and is formed on the conductive film 203, which functions as a gate electrode provided on the substrate 201, and the substrate 201 and the conductive film 203. The insulating film 205 is formed on the insulating film 205, the metal oxide film 209a that overlaps with the conductive film 203 via the insulating films 205 and 207a, and the metal oxide film 209a. It has an insulating film 211c that functions as a channel protective film, and a conductive film 213a and 213b whose one end is located on the insulating film 211c and is in contact with the metal oxide film 209a. Further, the insulating film 205, the metal oxide film 209a,
It has an insulating film 211c, an insulating film 217 formed on the conductive films 213a and 213b, and a conductive film 243 that functions as a gate electrode formed on the insulating film 217. Insulating film 205
And the insulating film 207a functions as a gate insulating film. In addition, the insulating film 211c and the insulating film 2
Reference numeral 17 functions as a gate insulating film.

As shown in FIG. 11B, the conductive film 203 and the conductive film 243 are connected at the openings 241 provided in the insulating film 205 and the insulating film 217. Further, in the channel width direction of the transistor, the end portion of the conductive film 243 is located outside the end portion of the metal oxide film 209a. Further, the side surface of the metal oxide film 209a faces the conductive film 243 via the insulating film 217.
Further, the conductive film 243 faces the side surface of the metal oxide film 209a at the opening 241.

The conductive film 243 can be formed by using the same material and manufacturing method as the conductive film 221. Further, the opening 241 can be formed at the same time when the opening 219 is formed.
As a result, the transistor 22d can be manufactured using five photomasks without increasing the number of photomasks.

In FIG. 11B, the conductive film 203 and the conductive film 243 are directly connected to each other. On the other hand, as shown in FIG. 11C, the conductive film 203 and the conductive film 243 are the conductive film 253.
It may be electrically connected via.

That is, the conductive film 203 and the conductive film 253 are connected at the opening 251 provided in the insulating film 205. Further, in the opening 255 provided in the insulating film 217, the conductive film 2
53 and the conductive film 243 are connected. As a result, the conductive film 203 and the conductive film 253 have a structure in which a voltage of the same potential is applied.

The conductive film 253 can be formed by using the same materials and manufacturing methods as those of the conductive films 213a and 213b. Compared with the opening 241 shown in FIG. 11 (B), the opening 251 and the opening 255 are each lower in height. As a result, the conductive films 243 and 2 at the respective openings.
It is possible to increase the coverage of 53. As a result, the yield can be increased.

In FIG. 11B, the metal oxide film 209 is shown in the channel width direction of the transistor.
The side surface of a faces the conductive film 243 that functions as a gate electrode. Further, in FIG. 11C, the side surface of the metal oxide film 209a faces the conductive film 253 having the same potential as the conductive film 203 and 243 functioning as the gate electrode in the channel width direction of the transistor. Therefore, the electric fields of the conductive film 203 and the conductive film 243 affect not only the plane surface of the metal oxide film 209a but also the side surfaces. As a result, in the metal oxide film 209a, the region where the carrier flows is not only the interface between the insulating film 207a and the metal oxide film 209a and the interface between the metal oxide film 209a and the insulating film 211c, but also the metal oxide film 209a. Because it is a wide range including the inside of
The amount of carrier movement in the transistor increases. As a result, the on-current of the transistor increases and the mobility of the field effect increases, and typically the mobility of the field effect is 10 cm ^2.
It is / V · s or more, and further 20 cm ² / V · s or more. The L length of the transistor is set to 0.
.. When it is 5 μm or more and 6.5 μm or less, preferably larger than 1 μm and less than 6 μm, the increase in electric field mobility is remarkable.

Further, at the end portion of the metal oxide film 209a processed by etching or the like, defects are formed due to damage in the processing and are contaminated by adhesion of impurities or the like. For this reason,
When only one of the conductive film 203 or the conductive film 243 that functions as a gate electrode is formed in the transistor, even if the metal oxide film 209a is genuine or substantially genuine, metal oxidation is performed by applying stress such as an electric field. The end of the film 209a is activated and n
It tends to be a mold region (low resistance region). Further, the n-type region includes conductive films 213a and 21.
If it is provided linearly between 3, the n-type region becomes a carrier path and a parasitic channel is formed. As a result, the drain current at the threshold voltage rises stepwise, and the threshold voltage becomes a minus-shifted transistor. However,
As shown in FIGS. 11 (B) and 11 (C), the conductive film 203 and the conductive film 24 having the same potential.
The conductive film 243 faces the side surface of the metal oxide film 209a in the channel width direction, so that the electric field of the conductive film 243 also affects the side surface of the metal oxide film 209a. As a result, the generation of parasitic channels at the side surface of the metal oxide film 209a, or at the end including the side surface and its vicinity is suppressed. As a result, the transistor has excellent electrical characteristics and the drain current rises sharply at the threshold voltage.

Further, since each of the conductive film 203 and the conductive film 243 has a function of shielding an electric field from the outside, the fixed charge provided on the conductive film 243 between the substrate 201 and the conductive film 243 is a metal oxide. It does not affect the film 209a. As a result, a stress test (for example, applying a negative potential to the gate electrode-GBT (Gate Bias-Temperat))
The deterioration of the ure) stress test) can be suppressed, and the fluctuation of the on-current rising voltage at different drain voltages can be suppressed.

The BT stress test is a kind of accelerated test, and changes in transistor characteristics (that is, changes over time) caused by long-term use can be evaluated in a short time. In particular, the fluctuation amount of the threshold voltage of the transistor before and after the BT stress test is an important index for examining the reliability. Before and after the BT stress test, it can be said that the smaller the fluctuation amount of the threshold voltage is, the higher the reliability of the transistor is.

Further, in FIGS. 11B and 11C, an opening is provided on one side surface side of the metal oxide film 109a in the channel width direction, and the conductive film 203 and the conductive film 243 are electrically connected in the opening. However, an opening may be provided on the other side surface side, and the conductive film 203 and the conductive film 243 may be electrically connected in the opening. As a result, it is possible to prevent the resistance value of the conductive film 243 from increasing, and the conductive film 243 can be seen from both sides of the metal oxide film 209a.
It is possible to affect the electric field of the metal oxide film 209a, increase the on-current of the transistor, and increase the electric field effect mobility.

The configuration and method shown in this embodiment can be used in combination with the configuration and method shown in other embodiments as appropriate.

(Embodiment 5)
A drive circuit can be manufactured by using the transistors and capacitive elements shown in the first to fourth embodiments.

Further, the transistor 22d shown in the fourth embodiment has a large on-current and high mobility. Therefore, by using a transistor 22d in a circuit composed of transistors that need to pass a large current, for example, a buffer, it is possible to reduce the channel length and channel width, and it is possible to reduce the area of the transistor. Is. As a result, the area of the drive circuit is reduced. In a semiconductor device having a drive circuit in a peripheral portion, typically a display device, the area of the pixel portion in the display device can be increased by reducing the area of the drive circuit. That is, the frame of the display device can be narrowed.

The configuration and method shown in this embodiment can be used in combination with the configuration and method shown in other embodiments as appropriate.

(Embodiment 6)
In the present embodiment, as an example of the semiconductor device, an electronic device on which the semiconductor device described in the above embodiment can be mounted will be described.

Electronic devices include, for example, television devices (also referred to as televisions or television receivers), monitors for computers, digital cameras, digital video cameras, digital photo frames, mobile phones (also referred to as mobile phones and mobile phone devices). , Portable game machine,
Examples include mobile information terminals, sound reproduction devices, and large game machines such as pachinko machines. Specific examples of these electronic devices are shown in FIG.

FIG. 12A shows an example of a television device. In the television device 7100, the display unit 7103 is incorporated in the housing 7101. The display unit 7103 can display an image, and the display device described in the above embodiment can be used for the display unit 7103. Further, here, a configuration in which the housing 7101 is supported by the stand 7105 is shown.

The operation of the television device 7100 can be performed by an operation switch included in the housing 7101 or a separate remote controller 7110. The operation key 7109 included in the remote controller 7110 can be used to operate the channel and volume, and the display unit 71.
The image displayed in 03 can be operated. Further, the remote controller 7110 may be provided with a display unit 7107 for displaying information output from the remote controller.

The television device 7100 is configured to include a receiver, a modem, and the like. The receiver can receive general television broadcasts, and by connecting to a wired or wireless communication network via a modem, it can be unidirectional (sender to receiver) or bidirectional (sender and receiver). It is also possible to perform information communication between (or between recipients, etc.).

FIG. 12B shows a computer, which includes a main body 7201, a housing 7202, and a display unit 7203.
It includes a keyboard 7204, an external connection port 7205, a pointing device 7206, and the like. The computer can use the display device described in the above embodiment for the display unit 7203.

FIG. 12C shows a portable gaming machine, which is composed of two housings, a housing 7301 and a housing 7302, and is connected by a connecting portion 7303 so as to be openable and closable. The display unit 7304 is incorporated in the housing 7301, and the display unit 7305 is incorporated in the housing 7302. again,
The portable gaming machine shown in FIG. 12C also includes a speaker unit 7306 and a recording medium insertion unit 73.
07, LED lamp 7308, input means (operation key 7309, connection terminal 7310, sensor 7311 (force, displacement, position, speed, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, chemical substance, voice, Time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient,
It includes a function to measure vibration, odor or infrared rays), microphone 7312) and the like. Of course, the configuration of the portable game machine is not limited to the above, and at least the display device 7304 and the display unit 7305, or one of them may use the display device described in the above embodiment, and other accessory equipment. Can be appropriately provided. Figure 1
The portable game machine shown in 2 (C) has a function of reading a program or data recorded on a recording medium and displaying it on a display unit, and a function of wirelessly communicating with another portable game machine to share information. Has. The functions of the portable game machine shown in FIG. 12C are not limited to this, and various functions can be provided.

FIG. 12D shows an example of a mobile phone. The mobile phone 7400 has a housing 740.
In addition to the display unit 7402 incorporated in 1, the operation button 7403, the external connection port 7404,
It is equipped with a speaker 7405, a microphone 7406, and the like. The mobile phone 7400 is manufactured by using the display device described in the above embodiment for the display unit 7402.

The mobile phone 7400 shown in FIG. 12D is obtained by touching the display unit 7402 with a finger or the like.
You can enter information. In addition, operations such as making a phone call or composing an e-mail can be performed by touching the display unit 7402 with a finger or the like.

The screen of the display unit 7402 mainly has three modes. The first is a display mode mainly for displaying an image, and the second is an input mode mainly for inputting information such as characters. The third is a display + input mode in which two modes, a display mode and an input mode, are mixed.

For example, when making a phone call or composing an e-mail, the display unit 7402 may be set to a character input mode mainly for inputting characters, and the characters displayed on the screen may be input. In this case, it is preferable to display the keyboard or the number button on most of the screen of the display unit 7402.

Further, by providing a detection device having a sensor for detecting the inclination of a gyro, an acceleration sensor, or the like inside the mobile phone 7400, the orientation (vertical or horizontal) of the mobile phone 7400 can be determined.
The screen display of the display unit 7402 can be automatically switched.

Further, the screen mode can be switched by touching the display unit 7402 or by operating the operation button 7403 of the housing 7401. It is also possible to switch depending on the type of image displayed on the display unit 7402. For example, if the image signal displayed on the display unit is moving image data, the display mode is switched, and if the image signal is text data, the input mode is switched.

Further, in the input mode, the signal detected by the optical sensor of the display unit 7402 is detected, and when there is no input by the touch operation of the display unit 7402 for a certain period of time, the screen mode is switched from the input mode to the display mode. You may control it.

The display unit 7402 can also function as an image sensor. For example, display unit 7
The person can be authenticated by touching the 402 with a palm or a finger and taking an image of a palm print, a fingerprint, or the like.
Further, if a backlight that emits near-infrared light or a sensing light source that emits near-infrared light is used for the display unit, it is possible to image finger veins, palmar veins, and the like.

FIG. 12E shows an example of a foldable computer. The foldable computer 7450 includes a housing 7451L and a housing 7451R connected by a hinge 7454. Further, the operation button 7453, the left side speaker 7455L, and the right side speaker 7
In addition to the 455R, an external connection port 745 (not shown) on the side of the computer 7450
6 is provided. When the hinge 7454 is folded so that the display unit 7452L provided on the housing 7451L and the display unit 7452R provided on the housing 7451R face each other, the display unit can be protected by the housing.

In addition to displaying images, the display unit 7452L and the display unit 7452R can input information by touching them with a finger or the like. For example, you can launch a program by touching and selecting an icon that indicates an installed program. Alternatively, the image can be enlarged or reduced by changing the distance between the fingers touching two parts of the displayed image. Alternatively, the image can be moved by moving the finger touching one part of the displayed image. You can also display a keyboard image, touch the displayed characters and symbols with your finger to select them, and enter information.

In addition, the computer 7450 has a gyro, an accelerometer, and a GPS (Global P).
It can also be equipped with an positioning System) receiver, a fingerprint sensor, and a video camera. For example, by providing a detection device having a sensor that detects tilt such as a gyro or an acceleration sensor, the orientation (vertical or horizontal) of the computer 7450 is determined and the orientation of the screen to be displayed is automatically switched. be able to.

Also, the computer 7450 can be connected to the network. The computer 7450 can display information on the Internet and can be used as a terminal for remotely controlling other electronic devices connected to the network.

The configuration and method shown in this embodiment can be used in combination with the configuration and method shown in other embodiments as appropriate.

Claims (4)

In a plan view, a translucent pixel electrode, a translucent first metal oxide film having a region overlapping the pixel electrode, a transistor electrically connected to the pixel electrode, and the transistor and electricity. A liquid crystal display device having a source wiring connected to the object.
The transistor has a channel forming region in the second metal oxide film and has a channel forming region.
The pixel electrode and the first metal oxide film are overlapped with each other via an insulating layer provided on the transistor.
The insulating layer is in contact with the pixel electrode and the first metal oxide film.
A holding capacity is formed in the overlapping region of the pixel electrode and the first metal oxide film.
It has an auxiliary wiring that is connected to the first metal oxide film and has a region that is arranged parallel or substantially parallel to the source wiring in a plan view.
The auxiliary wiring has the same material as the source wiring and has the same material.
The pixel electrode is connected to the transistor via a drain electrode, and the pixel electrode is connected to the transistor.
The pixel electrode is connected to the drain electrode in a contact hole provided in the insulating layer.
In a plan view, the pixel electrode is a liquid crystal display device that does not overlap with the auxiliary wiring. In a plan view, a translucent pixel electrode, a translucent first metal oxide film having a region overlapping the pixel electrode, a transistor electrically connected to the pixel electrode, and the transistor and electricity. A liquid crystal display device having a source wiring connected to the object.
The transistor has a channel forming region in the second metal oxide film and has a channel forming region.
The pixel electrode and the first metal oxide film are overlapped with each other via an insulating layer provided on the transistor.
The insulating layer is in contact with the pixel electrode and the first metal oxide film.
A holding capacity is formed in the overlapping region of the pixel electrode and the first metal oxide film.
It has an auxiliary wiring that is connected to the first metal oxide film and has a region that is arranged parallel or substantially parallel to the source wiring in a plan view.
The auxiliary wiring has the same material as the source wiring and has the same material.
The auxiliary wiring is provided so as to be in direct contact with the first metal oxide film.
The pixel electrode is connected to the transistor via a drain electrode, and the pixel electrode is connected to the transistor.
The pixel electrode is connected to the drain electrode in a contact hole provided in the insulating layer.
In a plan view, the pixel electrode is a liquid crystal display device that does not overlap with the auxiliary wiring. In claim 1 or 2,
The insulating layer is a liquid crystal display device which is a nitride insulating film. In any one of claims 1 to 3,
The second metal oxide film is a liquid crystal display device in contact with the oxide insulating film on the channel forming region.

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