JP2024016053A - display device - Google Patents

Abstract

The present invention provides a manufacturing method that can reduce costs in a semiconductor device having a capacitive element that has a high aperture ratio and can increase charge capacity. Alternatively, a manufacturing method is provided that can reduce costs in a semiconductor device that can reduce power consumption. [Solution] A metal oxide film having a channel region, a metal oxide film functioning as a pixel electrode, a source electrode and a drain electrode are formed using a mask formed by a process using a multi-tone photomask. form. Furthermore, an oxide insulating film is formed on the metal oxide film having a channel region, and a nitride insulating film is formed on the oxide insulating film and the metal oxide film that functions as a pixel electrode. It is possible to increase the electrical conductivity of a functioning metal oxide film. [Selection diagram] Figure 3

Description

TECHNICAL FIELD The present invention relates to a product, a method, or a manufacturing method. Alternatively, the invention relates to a process, machine, manufacture, or composition of matter. In particular, one embodiment of the present invention relates to a semiconductor device, a display device, a light emitting device, a power storage device, a memory device, a driving method thereof, or a manufacturing method thereof. In particular, the present invention relates to, for example, a method for manufacturing a semiconductor device having a transistor.

Transistors used in many flat panel displays, such as liquid crystal display devices and light emitting display devices, are made of silicon semiconductors such as amorphous silicon, single crystal silicon, or polycrystalline silicon formed on a glass substrate. . Furthermore, transistors using silicon semiconductors are also used in integrated circuits (ICs) and the like.

2. Description of the Related Art In recent years, a technology that uses metal oxides exhibiting semiconductor properties in transistors instead of silicon semiconductors has been attracting attention. Note that in this specification, a metal oxide exhibiting semiconductor characteristics will be referred to as an oxide semiconductor.

For example, a technique has been disclosed in which a transistor is manufactured using zinc oxide or an In-Ga-Zn-based oxide as an oxide semiconductor, and the transistor is used as a switching element of a pixel of a display device, etc. (Patent Document 1) reference).

Japanese Patent Application Publication No. 2007-123861

Display devices sold on the market tend to have larger screen sizes of 40 inches or more diagonally, and further development is being carried out with a view to screen sizes of 120 inches or more diagonally. For this reason, glass substrates used in display devices are becoming larger in area than eighth-generation devices.

As glass substrates become larger in area, photomasks used in exposure devices used in the manufacturing process of display devices become larger, and the cost of the photomasks becomes a problem. for example,
Since 10th generation photomasks are expensive at over 100 million yen each, there is a need to develop a manufacturing process that reduces the number of photomasks.

On the other hand, in a liquid crystal display device, which is an example of a display device, the larger the charge capacitance value of the capacitive element, the longer the period during which the orientation of liquid crystal molecules in the liquid crystal element can be maintained constant when an electric field is applied. be able to. In a display device that displays still images, being able to lengthen the period makes it possible to reduce the number of times image data is rewritten, which can lead to a reduction in power consumption.

Therefore, in order to increase the charge capacity of the capacitive element, there is a method of increasing the area occupied by the capacitive element, specifically, increasing the area where a pair of electrodes overlap. However, in the above display device, if the area of the light-blocking conductive film is increased in order to increase the area where the pair of electrodes overlap, the aperture ratio of the pixel is reduced and the display quality of the image is degraded.

Therefore, one aspect of the present invention is to provide a manufacturing method that can reduce costs in a semiconductor device that has a capacitive element that has a high aperture ratio and can increase charge capacity. shall be. Alternatively, an object of one embodiment of the present invention is to provide a manufacturing method that can reduce costs in a semiconductor device that can reduce power consumption.
Alternatively, an object of one embodiment of the present invention is to provide a novel semiconductor device. Alternatively, an object of one embodiment of the present invention is to provide a novel display device. Note that the description of these issues does not preclude the existence of other issues. Note that one embodiment of the present invention does not necessarily need to solve all of these problems. Note that issues other than these will naturally become clear from the description, drawings, claims, etc., and it is possible to extract issues other than these from the description, drawings, claims, etc. It is.

One embodiment of the present invention uses a mask formed by a process using a multi-tone photomask to form a metal oxide film having a channel region, a metal oxide film functioning as a pixel electrode, a source electrode and a drain. It is characterized by forming an electrode. By using a multi-tone photomask, a mask having a first shape having a first thickness and a second thickness thicker than the first thickness is formed. Using the first shape mask, the metal oxide film and the conductive film on the substrate are etched to form a metal oxide film having a channel region and a metal oxide film functioning as a pixel electrode. Next, the first shape mask is processed to remove the mask in the first thickness region and leave the second thickness region to form a second shape mask. Next, using the second shape mask, the conductive film formed on the metal oxide film is etched to form a source electrode and a drain electrode. Note that a capacitor line may be formed in this step. Furthermore, an oxide insulating film is formed on the metal oxide film having a channel region, and a nitride insulating film is formed on the oxide insulating film and the metal oxide film that functions as a pixel electrode. It is possible to increase the electrical conductivity of a functioning metal oxide film.

In one embodiment of the present invention, a gate electrode and a gate insulating film are formed over an insulating surface, a first metal oxide film and a first conductive film are formed over the gate insulating film, and a first metal oxide film and a first conductive film are formed over the first conductive film. , a first mask having a region having a first thickness and a region having a second thickness thicker than the first thickness;
forming a second mask having the same thickness as the first thickness, etching the first conductive film and the first metal oxide film using the first mask and the second mask, respectively; A second conductive film, a third conductive film, a second metal oxide film, and a third metal oxide film are formed. Next, the first mask is processed to form a third mask, and after removing the second mask, the second conductive film is etched using the third mask to form a second metal. A fourth conductive film and a fifth conductive film functioning as a source electrode and a drain electrode are formed on the oxide film, and the third conductive film is removed. Next, a first insulating film is formed on the second metal oxide film, the fourth conductive film, and the fifth conductive film, and on the first insulating film and the third metal oxide film, After forming the second insulating film, parts of the first insulating film and the second insulating film are etched to form openings in the first insulating film and the second insulating film. Next, a semiconductor device is fabricated in which a sixth conductive film, which is in contact with the fifth conductive film and functions as a pixel electrode, and a seventh conductive film, which is in contact with the third metal oxide film and which functions as a capacitor line, are formed. It's a method.

Note that the first insulating film has an opening above the third metal oxide film.

Further, the second metal oxide film and the third metal oxide film have different hydrogen concentrations. Specifically, the third metal oxide film has a higher hydrogen concentration than the second metal oxide film.

Further, the third metal oxide film has conductivity, and the third metal oxide film, the second insulating film, and the light-transmitting conductive film constitute a capacitive element.

Further, the first metal oxide film, the second metal oxide film, and the third metal oxide film have light-transmitting properties. Further, the first metal oxide film, the second metal oxide film, and the third metal oxide film contain at least one of In, Ga, and Zn. Further, it is preferable that the first metal oxide film, the second metal oxide film, and the third metal oxide film are made of the same metal element.

Further, the first insulating film is formed using an oxide insulating film. Note that the first insulating film preferably includes an oxide insulating film from which part of oxygen is released by heating. Further, the second insulating film is formed using a nitride insulating film.

According to one embodiment of the present invention, costs can be reduced in a method for manufacturing a semiconductor device including a capacitor that has a high aperture ratio and can increase charge capacity. A method for manufacturing a semiconductor device that can reduce power consumption can reduce costs. Alternatively, according to one embodiment of the present invention, a novel semiconductor device can be provided. Alternatively, according to one embodiment of the present invention, a novel display device can be provided. The description of these effects is as follows:
It does not preclude the existence of other effects. Note that one embodiment of the present invention does not necessarily need to have all of these effects. Note that effects other than these will become obvious from the description, drawings, claims, etc., and effects other than these can be extracted from the description, drawings, claims, etc. It is.

1 is a block diagram and a circuit diagram illustrating one form of a semiconductor device. FIG. FIG. 2 is a top view illustrating one form of a pixel. FIG. 2 is a cross-sectional view illustrating one form of a method for manufacturing an element substrate. FIG. 2 is a cross-sectional view illustrating one form of a method for manufacturing an element substrate. FIG. 2 is a cross-sectional view illustrating one form of a method for manufacturing an element substrate. FIG. 2 is a top view illustrating one form of a pixel. FIG. 2 is a cross-sectional view illustrating one form of a method for manufacturing an element substrate. FIG. 2 is a top view illustrating one form of a pixel. FIG. 2 is a cross-sectional view illustrating one form of a method for manufacturing an element substrate. FIG. 2 is a cross-sectional view illustrating one form of a method for manufacturing an element substrate. FIG. 1 is a cross-sectional view illustrating one form of a transistor. FIG. 2 is a diagram illustrating an electronic device. FIG. 2 is a cross-sectional view illustrating one form of an element substrate. FIG. 2 is a top view illustrating one form of a pixel. FIG. 1 is a cross-sectional view illustrating one form of a transistor. It is a figure explaining a display module. It is a figure explaining the temperature dependence of resistivity. FIG. 2 is a top view and a cross-sectional view illustrating the structure of a sample. It is a figure explaining the resistance value of a metal oxide film.

Embodiments of the present invention will be described in detail below with reference to the drawings. However, those skilled in the art will easily understand that the present invention is not limited to the following description, and that the form and details thereof can be changed in various ways without departing from the spirit and scope of the present invention. Therefore, the present invention should not be construed as being limited to the contents described in the embodiments and examples shown below. In addition, in the embodiments and examples described below, the same reference numerals or the same hatch patterns are commonly used in different drawings for the same parts or parts having similar functions, and repeated explanations thereof will be omitted. do.

In each figure described in this specification, the size of each structure, the thickness of the film, or the area is as follows.
May be exaggerated for clarity. Therefore, it is not necessarily limited to that scale.

Furthermore, terms such as first, second, third, etc. used in this specification are used to avoid confusion among the constituent elements, and are not intended to be numerically limited. Therefore, for example, the description can be made by replacing "first" with "second" or "third" as appropriate.

Further, the functions of "source" and "drain" may be interchanged when the direction of current changes during circuit operation. Therefore, in this specification, the terms "source" and "drain" can be used interchangeably.

Further, voltage refers to the potential difference between two points, and potential refers to the electrostatic energy (electrical potential energy) possessed by a unit charge in an electrostatic field at one point. However, in general, a potential difference between a potential at a certain point and a reference potential (for example, ground potential) is simply called a potential or a voltage, and potential and voltage are often used synonymously. Therefore, in this specification, unless otherwise specified, a potential may be read as a voltage, and a voltage may be read as a potential.

In this specification, when an etching process is performed after a photolithography process, the mask formed in the photolithography process is removed.

(Embodiment 1)
An object of this embodiment is to provide a manufacturing method that can reduce costs in a semiconductor device that has a capacitive element that has a high aperture ratio and can increase charge capacity. Alternatively, an object of one embodiment of the present invention is to provide a manufacturing method that can reduce costs in a semiconductor device that can reduce power consumption.

Note that in a transistor using an oxide semiconductor, which is a metal oxide having semiconductor characteristics, oxygen vacancies are an example of defects that lead to poor electrical characteristics of the transistor. For example, in a transistor using an oxide semiconductor film containing oxygen vacancies in the film, the threshold voltage tends to fluctuate in the negative direction, and the transistor tends to have normally-on characteristics.
This is because charges are generated due to oxygen vacancies contained in the oxide semiconductor film, resulting in lower resistance. When a transistor has normally-on characteristics, various problems arise, such as malfunctions being more likely to occur during operation or increased power consumption when not operating. Additionally, there is a problem in that the amount of variation in the electrical characteristics of the transistor, typically the threshold voltage, increases due to changes over time or stress tests.

Furthermore, not only oxygen vacancies but also impurities such as silicon and carbon, which are constituent elements of the insulating film, cause defects in the electrical characteristics of the transistor. Therefore, when the impurity mixes into the oxide semiconductor film, the resistance of the oxide semiconductor film decreases, and changes over time and stress tests affect the electrical characteristics of the transistor, typically the threshold voltage. There is a problem that the amount of fluctuation increases.

Therefore, in this embodiment, in addition to the problems to be solved by the invention, in a semiconductor device including a transistor including an oxide semiconductor film, oxygen vacancies in the oxide semiconductor film that is a channel region, and One of the challenges is to reduce the impurity concentration of

In this embodiment, as a method for solving one of the above problems, a method for manufacturing a semiconductor device will be described with reference to drawings. This embodiment is characterized in that a metal oxide film having a channel region, a source electrode, and a drain electrode are formed by a process using a multi-gradation photomask.

FIG. 1A shows an example of a semiconductor device. In the semiconductor device shown in FIG. 1A, a pixel portion 11
, the scanning line drive circuit 14 , and the signal line drive circuit 16 , each arranged in parallel or substantially parallel, and m scanning lines 17 whose potentials are controlled by the scanning line drive circuit 14 , each arranged in parallel. Alternatively, n signal lines 19 are arranged substantially in parallel and whose potentials are controlled by the signal line drive circuit 16. Further, the pixel section 11 includes a plurality of pixels 13 arranged in a matrix. Further, along the signal line 19, there are capacitor lines 15 arranged in parallel or substantially parallel to each other. Note that the capacitor lines 15 may be arranged parallel to each other or substantially parallel to each other along the scanning line 17. Further, the scanning line drive circuit 14 and the signal line drive circuit 16 may be collectively referred to as a drive circuit section.

Each scanning line 17 is electrically connected to n pixels 13 arranged in any row among the pixels 13 arranged in m rows and n columns in the pixel section 11 . Further, each signal line 19 has m rows and n
Among the pixels 13 arranged in the columns, it is electrically connected to m pixels 13 arranged in any column. Both m and n are integers of 1 or more. Furthermore, each capacitor line 15 is electrically connected to n pixels 13 arranged in any row among the pixels 13 arranged in m rows and n columns. Note that when the capacitor lines 15 are arranged in parallel or substantially parallel along the signal line 19, the capacitor lines 15 may be arranged in any one of the pixels 13 arranged in m rows and n columns. The m pixels 13 are electrically connected to each other.

1B and 1C show an example of a circuit configuration that can be used for the pixel 13 of the display device shown in FIG. 1A.

The pixel 13 shown in FIG. 1B includes a liquid crystal element 21, a transistor 22, and a capacitor 25.

The potential of one of the pair of electrodes of the liquid crystal element 21 is appropriately set according to the specifications of the pixel 13.
The alignment state of the liquid crystal element 21 is set according to written data. Also, multiple pixels 1
A common potential (common potential) may be applied to one of the pair of electrodes of the liquid crystal element 21 of each of the liquid crystal elements 3. Further, different potentials may be applied to one of the pair of electrodes of the liquid crystal element 21 for each pixel 13 in each row.

Note that the liquid crystal element 21 is an element that controls transmission or non-transmission of light by an optical modulation effect of liquid crystal. Note that the optical modulation effect of the liquid crystal is controlled by an electric field (including a horizontal electric field, a vertical electric field, or an oblique electric field) applied to the liquid crystal. Note that examples of the liquid crystal element 21 include nematic liquid crystal, cholesteric liquid crystal, smectic liquid crystal, thermotropic liquid crystal, lyotropic liquid crystal, ferroelectric liquid crystal, and antiferroelectric liquid crystal.

Examples of driving methods for the display device having the liquid crystal element 21 include TN mode, VA mode, and ASM (Axially Symmetric Aligned Micro-cell).
l) Mode, OCB (Optically Compensated Birefring)
mode), MVA mode, PVA (Patterned Vertical) mode, MVA mode, PVA (Patterned Vertical
Alignment) mode, IPS mode, FFS mode, or TBA (Trans
Verse Bend Alignment) mode or the like may also be used. However, the invention is not limited thereto, and various liquid crystal elements and driving methods can be used.

Further, the liquid crystal element may be formed of a liquid crystal composition containing a liquid crystal exhibiting a blue phase and a chiral agent. Liquid crystal exhibiting a blue phase has a short response speed of 1 msec or less and is optically isotropic, so alignment treatment is unnecessary and viewing angle dependence is small.

In the configuration of the pixel 13 shown in FIG. 1B, one of the source electrode and the drain electrode of the transistor 22 is electrically connected to the signal line 19, and the other is electrically connected to the other of the pair of electrodes of the liquid crystal element 21. Connected. Further, the gate electrode of the transistor 22 is electrically connected to the scanning line 17. The transistor 22 has a function of controlling data writing of the data signal by turning on or off. Note that as the transistor 22, the transistor described in any one of Embodiments 1 to 7 can be used.

In the configuration of the pixel 13 shown in FIG. 1B, one of the pair of electrodes of the capacitive element 25 is electrically connected to the capacitive line 15 to which a potential is supplied, and the other is connected to the pair of electrodes of the liquid crystal element 21. electrically connected to the other. Note that the value of the potential of the capacitor line 15 is appropriately set according to the specifications of the pixel 13. The capacitive element 25 has a function as a storage capacitor that holds written data.

For example, in the display device having the pixels 13 shown in FIG. 1B, the scanning line drive circuit 14 sequentially selects the pixels 13 in each row, turns on the transistor 22, and writes data of the data signal.

The pixel 13 to which data has been written is placed in a holding state when the transistor 22 is turned off. By performing this sequentially for each row, an image can be displayed.

In addition, the pixel 13 shown in FIG. 1C has a transistor 33 that switches the display element.
, a transistor 22 that controls pixel drive, a transistor 35, a capacitive element 25,
It has a light emitting element 31.

An example of the light emitting element 31 is an element having an anode, a cathode, and an EL layer sandwiched between the anode and the cathode. Examples of EL layers include a layer containing a material capable of emitting light from singlet excitons (fluorescence), a layer containing a material capable of emitting light from triplet excitons (phosphorescence), and a layer containing a material capable of emitting light from triplet excitons (phosphorescence). There are layers including a material capable of emitting light (fluorescence) from triplet excitons and a material capable of emitting light (phosphorescence) from triplet excitons.

One of the source electrode and drain electrode of the transistor 33 is electrically connected to the signal line 19 to which a data signal is applied. Furthermore, the gate electrode of the transistor 33 is electrically connected to the scanning line 17 to which a gate signal is applied.

The transistor 33 has a function of controlling data writing of the data signal by turning on or off.

One of the source electrode and drain electrode of the transistor 22 is electrically connected to a wiring 37 functioning as an anode line, and the other of the source electrode and drain electrode of the transistor 22 is electrically connected to one electrode of the light emitting element 31. be done. Further, the gate electrode of the transistor 22 is electrically connected to the other of the source electrode and the drain electrode of the transistor 33 and to one electrode of the capacitive element 25.

The transistor 22 has a function of controlling the current flowing to the light emitting element 31 by turning on or off.

One of the source electrode and drain electrode of the transistor 35 is connected to a wiring 39 to which a data reference potential is applied, and the other of the source electrode and drain electrode of the transistor 35 is connected to one electrode of the light emitting element 31 and the other of the capacitive element 25. electrically connected to the electrodes of the moreover,
A gate electrode of the transistor 35 is electrically connected to the scanning line 17 to which a gate signal is applied.

The transistor 35 has a function of adjusting the current flowing through the light emitting element 31. For example, if the internal resistance of the light emitting element 31 increases due to deterioration of the light emitting element 31, the transistor 35
By monitoring the current flowing through the wiring 39 to which one of the source electrode and the drain electrode is connected, the current flowing through the light emitting element 31 can be corrected. The potential applied to the wiring 39 can be, for example, 0V.

One of the pair of electrodes of the capacitive element 25 is electrically connected to the other of the source and drain electrodes of the transistor 33 and the gate electrode of the transistor 22, and the other of the pair of electrodes of the capacitive element 25 is connected to the source of the transistor 35. The other of the electrode and the drain electrode, and the light emitting element 3
It is electrically connected to one electrode of 1.

In the configuration of the pixel 13 shown in FIG. 1C, the capacitive element 25 has a function as a storage capacitor that holds written data.

One of the pair of electrodes of the light emitting element 31 is electrically connected to the other of the source electrode and drain electrode of the transistor 35, the other of the capacitive element 25, and the other of the source electrode and drain electrode of the transistor 22. Further, the other of the pair of electrodes of the light emitting element 31 is electrically connected to a wiring 41 functioning as a cathode.

As the light emitting element 31, for example, an organic electroluminescent element (also referred to as an organic EL element) can be used. However, the light emitting element 31 is not limited to this, and an inorganic EL element made of an inorganic material may be used.

Note that a high power supply potential VDD is applied to one of the wiring 37 and the wiring 41, and a low power supply potential VSS is applied to the other. In the configuration shown in FIG. 1C, a high power supply potential VDD is applied to the wiring 37, and a low power supply potential VSS is applied to the wiring 41.

In the display device having the pixels 13 shown in FIG.
3 are sequentially selected, the transistor 22 is turned on, and the data of the data signal is written.

The pixel 13 to which data has been written is placed in a holding state when the transistor 22 is turned off. Furthermore, since the transistor 22 is connected to the capacitive element 25, it is possible to hold written data for a long time. Further, the amount of current flowing between the source electrode and the drain electrode is controlled by the transistor 33, and the light emitting element 31 emits light with a brightness corresponding to the amount of current flowing. By performing this sequentially for each row, an image can be displayed.

Note that in this specification and the like, a display element, a display device that is a device that includes a display element, a light-emitting element, and a light-emitting device that is a device that includes a light-emitting element may have various forms or have various elements. Can be done. Examples of display elements, display devices, light-emitting elements, or light-emitting devices include EL (electroluminescence) elements (EL elements containing organic and inorganic substances, organic EL elements, and inorganic EL elements), and transistors (transistors that emit light in response to current). , electron-emitting device, liquid crystal device, electronic ink, electrophoretic device, digital micromirror device (D
There are display media such as MD) and DMS (digital micro shutter) that have display media whose contrast, brightness, reflectance, transmittance, etc. change due to electromagnetic action. An example of a display device using an EL element is an EL display. An example of a display device using an electron-emitting device is a field emission display (FED) or SE.
D type flat display (SED: Surface-conduction Elec)
tron-emitter display). Examples of display devices using liquid crystal elements include liquid crystal displays (transmissive liquid crystal displays, transflective liquid crystal displays, reflective liquid crystal displays, direct-view liquid crystal displays, and projection liquid crystal displays). An example of a display device using electronic ink or an electrophoretic element is electronic paper.

Next, a specific example of an element substrate of a liquid crystal display device using a liquid crystal element for the pixel 13 will be described. Here, FIG. 2 shows a top view of the pixel 13 shown in FIG. 1(B).

In FIG. 2, the conductive film 103 functioning as a scanning line is provided extending in a direction substantially perpendicular to the signal line (left-right direction in the figure). The conductive film 114 functioning as a signal line is provided extending in a direction substantially perpendicular to the scanning line (vertical direction in the figure). The conductive film 116 functioning as a capacitor line is provided extending in a direction parallel to the signal line. Note that the conductive film 116 is separated for each pixel. Therefore, by connecting the conductive film 124 to the conductive film 116 of the adjacent pixel, the conductive film 116 of the adjacent pixel is electrically connected. Note that the conductive film 103 that functions as a scanning line is electrically connected to the scanning line drive circuit 14 (see FIG. 1A), and the conductive film 114 that functions as a signal line and the conductive film 114 that functions as a capacitor line. The conductive film 116 and the conductive film 124 are electrically connected to the signal line driver circuit 16 (see FIG. 1A).

The transistor 22 is provided in a region where the scanning line and the signal line intersect. The transistor 22 includes a conductive film 103 functioning as a gate electrode and a gate insulating film (not shown in FIG. 2).
, a metal oxide film 109a in which a channel region is formed on a gate insulating film, and conductive films 114 and 115 that function as a source electrode and a drain electrode. Note that the conductive film 103 also functions as a scanning line, and a region overlapping with the metal oxide film 109a functions as a gate electrode of the transistor 22. Further, the conductive film 114 also functions as a signal line,
A region overlapping with the metal oxide film 109a functions as a source electrode or a drain electrode of the transistor 22.

This embodiment is characterized in that the end of the metal oxide film 109a is located outside the end of the conductive films 114 and 115 in a plan view. Another feature is that the end of the metal oxide film 109c is located outside the end of the conductive film 116 that functions as a capacitor line.

Since the metal oxide film 109a is formed using a metal oxide having semiconductor characteristics,
A channel region is formed in the metal oxide film 109a between the conductive film 114 and the conductive film 115.

Furthermore, the conductive film 115 is electrically connected to a light-transmitting conductive film 123 that functions as a pixel electrode.

The metal oxide film 109c is a film formed at the same time as the metal oxide film 109a, and is a film in which oxygen vacancies are formed due to plasma damage or the like, and the conductivity is increased. Alternatively, the metal oxide film 109c is a film formed at the same time as the metal oxide film 109a, and is a film whose conductivity is increased by containing impurities. Alternatively, the metal oxide film 109c is a film formed at the same time as the metal oxide film 109a, contains impurities, has oxygen vacancies formed due to plasma damage, etc., and has increased conductivity.

The capacitive element 25 is a dielectric film formed of a metal oxide film 109c formed on the gate insulating film, a light-transmitting conductive film 123 that functions as a pixel electrode, and a nitride insulating film provided on the transistor 22. It is composed of a body membrane. Since the metal oxide film 109c has a light-transmitting property, the capacitive element 25 has a light-transmitting property. Further, the metal oxide film 109c, which functions as one of the pair of electrodes of the capacitive element 25, is connected to the conductive film 116, which functions as a capacitive line.

In this way, since the capacitive element 25 has light-transmitting properties, the capacitive element 25 is large (
can be formed over a large area). Therefore, it is possible to increase the aperture ratio to 50% or more, preferably 55% or more, preferably 60% or more, and it is also possible to obtain a semiconductor device with increased charge capacity. For example, in a semiconductor device with high resolution, such as a liquid crystal display device, the area of a pixel becomes small, and the area of a capacitive element also becomes small. Therefore, in a semiconductor device with high resolution, the charge capacity accumulated in the capacitive element becomes small. However, since the capacitive element 25 shown in this embodiment has light-transmitting properties, by providing the capacitive element in each pixel, the aperture ratio can be increased while obtaining sufficient charge capacity in each pixel. Typically, the pixel density is 200ppi or more, further 300ppi or more, and even 500ppi.
It can be suitably used for a semiconductor device with a high resolution of i or more.

Furthermore, the pixel 13 shown in FIG. 2 has a shape in which the side parallel to the conductive film 114 functioning as a signal line is shorter than the side parallel to the conductive film 103 functioning as a scanning line, and the side parallel to the conductive film 114 functioning as a signal line is shorter. A conductive film 116 that functions as a signal line, and a conductive film 124 that electrically connects the conductive films 116 formed in adjacent pixels are provided extending in a direction parallel to the conductive film 114 that functions as a signal line. As a result, the area of the conductive films 114 and 116 occupying the pixel 13 can be reduced, so the aperture ratio can be increased.

Further, one embodiment of the present invention can increase the aperture ratio even in a high-resolution display device, so light from a light source such as a backlight can be used efficiently, reducing power consumption of the display device. be able to.

Next, a method for manufacturing an element substrate of a display device will be described using a cross-sectional view taken along a dotted line AB and a cross-sectional view taken along a dotted line CD shown in FIG.

As shown in FIG. 3A, a conductive film 102 is formed over a substrate 101. Next, a mask 131 is formed on the conductive film 102 by a photolithography process using a first photomask.

There are no major restrictions on the material of the substrate 101, but it must have at least enough heat resistance to withstand subsequent heat treatment. For example, a glass substrate, a ceramic substrate, a quartz substrate, a sapphire substrate, or the like may be used as the substrate 101. Furthermore, it is also possible to apply single crystal semiconductor substrates formed using silicon, silicon carbide, etc., polycrystalline semiconductor substrates, compound semiconductor substrates such as silicon germanium, SOI substrates, etc., and semiconductor devices can be formed on these substrates. may be used as the substrate 101. In addition, when using a glass substrate as the substrate 101, 6th generation (1500 mm x 1850 mm) and 7th generation (1870 mm
m x 2200mm), 8th generation (2200mm x 2400mm), 9th generation (2400m
By using a large-area substrate such as a 10th generation (2950 mm x 3400 mm) or the like (2950 mm x 3400 mm), a large display device can be manufactured.

Alternatively, a flexible substrate may be used as the substrate 101, and the conductive film 102 may be formed directly on the flexible substrate. Alternatively, a peeling layer is provided between the substrate 101 and the conductive film 102, and an element portion having a transistor is formed on the peeling layer, and then the element portion is peeled from the substrate 101 on the peeling layer,
It may be transferred to another board. As a result, the element portion can be provided on a substrate with low heat resistance or flexibility.

The conductive film 102 later becomes a conductive film 103 that functions as a gate electrode. Therefore, for the conductive film 102, a conductive material that can be used as a gate electrode is appropriately used. Conductive film 10
2 is formed using a metal element selected from aluminum, chromium, copper, tantalum, titanium, molybdenum, and tungsten, an alloy containing the above-mentioned metal elements, or an alloy that is a combination of the above-mentioned metal elements. Can be done. Further, a metal element selected from one or more of manganese and zirconium may be used. Further, the conductive film 102 may have a single layer structure or a stacked structure of two or more layers. For example, a single-layer structure of an aluminum film containing silicon, a two-layer structure in which an aluminum film is stacked on a titanium film, a two-layer structure in which a titanium film is stacked on a titanium nitride film, and a two-layer structure in which a tungsten film is stacked on a titanium nitride film. Layer structure: a two-layer structure in which a tungsten film is laminated on a tantalum nitride film or a tungsten nitride film; a two-layer structure in which a copper film is laminated on a titanium film; a titanium film and an aluminum film on the titanium film; There is a three-layer structure on which a titanium film is formed. Further, an alloy film or a nitride film in which aluminum is combined with one or more elements selected from titanium, tantalum, tungsten, molybdenum, chromium, neodymium, and scandium may be used.

Further, the conductive film 102 includes an indium tin oxide film, an indium oxide film containing tungsten oxide, an indium zinc oxide film containing tungsten oxide, an indium oxide film containing titanium oxide, and an indium tin oxide film containing titanium oxide. , an indium zinc oxide film, an indium tin oxide film added with silicon oxide, or the like, which is formed of a conductive material having translucency can also be used. Further, it is also possible to have a stacked structure of a film formed of the above-mentioned light-transmitting conductive material and a film formed of the above-mentioned metal element.

Here, a tungsten film with a thickness of 100 nm is formed as the conductive film 102 by a sputtering method. Next, a mask is formed by a photolithography process.

Next, a portion of the conductive film 102 is etched using the mask 131 to form a conductive film 103 that functions as a gate electrode. The conductive film 102 can be etched using a dry etching method and/or a wet etching method. After this, the mask 131 is removed (see FIG. 3(B)).

Here, the tungsten film formed as the conductive film 102 is dry-etched using a mask to form the conductive film 103 that functions as a gate electrode.

Next, as shown in FIG. 3(C), an insulating film 105, an insulating film 106, a metal oxide film 108,
A conductive film 110 is sequentially formed. Next, masks 133 and 134 are formed on the conductive film 110 by a photolithography process using a second photomask. Here, a feature is that a multi-tone mask is used as the second photomask.

A multi-tone photomask is a mask that can perform exposure at multiple levels of light intensity, and typically includes a gray-tone mask, a half-tone mask, and the like. In the gray tone mask, a light shielding portion and a diffraction grating are formed on a transparent substrate. In the diffraction grating, the intervals between light transmitting regions such as slits, dots, meshes, etc. are equal to or less than the resolution limit of light used for exposure, and the light transmittance is controlled by this configuration. A halftone mask has a light-shielding part and a semi-transparent part formed on a light-transmitting substrate. The transmissivity of light used for exposure is controlled by the semi-transmissive part.

By using a multi-tone mask, exposure can be performed at three levels of light intensity: an exposed area, a semi-exposed area, and an unexposed area. As a result, by using a multi-tone photomask, it is possible to form resist masks with multiple (typically two) thicknesses in a single exposure and development process, and the number of photomasks can be reduced. can be reduced. Here, by using a multi-tone photomask in the process of forming the metal oxide film and the conductive films 114, 115, and 116, the number of photomasks can be reduced by one.

The insulating film 105 and the insulating film 106 will later become a gate insulating film. In addition, the insulating film 105
is preferably formed using a nitride insulating film in order to prevent impurities from diffusing into the metal oxide film 108 from the substrate 101 and the conductive film 103 functioning as a gate electrode. Further, the insulating film 106 is in contact with the metal oxide film 108. In order to reduce the interface state between the insulating film 106 and the metal oxide film 108, the insulating film 106 is preferably formed using an oxide insulating film.

The insulating film 105 may be formed using silicon nitride, silicon nitride oxide, aluminum nitride, aluminum nitride oxide, or the like, and is provided as a stacked layer or a single layer.

The insulating film 106 may be formed using silicon oxide, silicon oxynitride, aluminum oxide, hafnium oxide, gallium oxide, Ga--Zn-based metal oxide, or the like, and is provided as a stacked layer or a single layer.

Further, as the insulating film 106, hafnium silicate (HfSiO _x ), hafnium silicate added with nitrogen (HfSi _x O _y N _z ), hafnium aluminate added with nitrogen (HfAl _x O _y N _z ), hafnium oxide, Gate leakage of the transistor can be reduced by using a high-k material such as yttrium oxide.

The total thickness of the insulating film 105 and the insulating film 106 is preferably 5 nm or more and 400 nm or less, more preferably 10 nm or more and 300 nm or less, and more preferably 50 nm or more and 250 nm or less.

The insulating film 105 and the insulating film 106 can be formed using a CVD method, a sputtering method, a vapor deposition method, a coating method, or the like, as appropriate.

By providing the insulating film 105 formed of a nitride insulating film as a part of the gate insulating film, impurities from the conductive film 103 functioning as a gate electrode, typically hydrogen, nitrogen, alkali metal, or alkaline earth, can be removed. Similar metals and the like can be prevented from moving to the metal oxide film 109a.

Furthermore, by providing the insulating film 106 made of an oxide insulating film on the metal oxide film 109a side as the gate insulating film, it is possible to reduce defect levels at the interface between the gate insulating film and the metal oxide film 109a. It is. As a result, a transistor with less deterioration in electrical characteristics can be obtained.

The metal oxide film 108 is typically an In-Ga oxide film, an In-Zn oxide film, or an In-Ga oxide film.
There are metal oxide films such as -M-Zn oxide films (M is Al, Ga, Ti, Y, Zr, La, Ce, or Nd). Note that since the metal oxide film has semiconductor characteristics, it can also be called an oxide semiconductor.

Note that when the metal oxide film 108 is an In--M--Zn oxide film, when the sum of In and M is 100 atomic%, the ratio of the number of atoms of In and M is preferably equal to the number of atoms of In and M. The ratio is preferably In greater than 25 atomic % and M less than 75 atomic %, more preferably In greater than 34 atomic % and M less than 66 atomic %.

The energy gap of the metal oxide film 108 is 2 eV or more, preferably 2.5 eV or more, and more preferably 3 eV or more. By forming the transistor using a metal oxide with a wide energy gap in this manner, the off-state current of the transistor to be formed later can be reduced.

As the metal oxide film 108, a metal oxide film with low carrier density is used. For example, the metal oxide film 108 has a carrier density of 1×10 ¹⁷ carriers/cm ³ or less, preferably 1×10
¹⁵ pieces/cm ³ or less, more preferably 1×10 ¹³ pieces/cm ³ or less, more preferably 1
A metal oxide film with a density of ×10 ¹¹ pieces/cm ³ or less is used.

The thickness of the metal oxide film 108 is 3 nm or more and 200 nm or less, preferably 3 nm or more and 10 nm or more.
0 nm or less, more preferably 3 nm or more and 50 nm or less.

The metal oxide film 108 can be formed using a sputtering method, a coating method, a pulsed laser deposition method, a laser ablation method, or the like.

When forming the metal oxide film 108 by a sputtering method, an RF power supply, an AC power supply, a DC power supply, or the like can be appropriately used as a power supply for generating plasma.

As the sputtering gas, a rare gas (typically argon) atmosphere, an oxygen atmosphere, or a mixed gas of a rare gas and oxygen is appropriately used. Note that in the case of a mixed gas of a rare gas and oxygen, it is preferable to increase the gas ratio of oxygen to the rare gas.

The metal oxide film 108 is an In-M-Zn oxide film (M is Al, Ti, Ga, Y, Zr,
La, Ce, Nd or Hf), the atomic ratio of the metal elements in the sputtering target used to form the In-M-Zn oxide film is In:M:Z.
When n=x ₁ :y ₁ :z _{1 ,} x ₁ /y ₁ is 1/3 or more and 6 or less, furthermore, 1 or more and 6 or less, and z ₁ /y ₁ is 1/3 or more and 6 or less. , and more preferably 1 or more and 6 or less. Note that by setting z ₁ /y ₁ to 1 or more and 6 or less, CAAC-OS (C Axis Aligned Crystalline Oxid
e Semiconductor) film is more likely to be formed. Typical examples of the atomic ratio of the metal elements in the target are In:M:Zn=1:1:1, In:M:Zn=3:1:2,
In:M:Zn=5:5:6, etc. Note that each of the atomic ratios of the metal oxide films 108 to be formed includes a variation of plus or minus 40% of the atomic ratio of the metal elements contained in the target as an error.

In order to obtain a highly pure metal oxide film 108, it is necessary not only to evacuate the chamber to a high degree, but also to make the sputtering gas highly purified. The oxygen gas or argon gas used as the sputtering gas has a dew point of -40°C or lower, preferably -80°C or lower, and more preferably -100°C.
Hereinafter, it is possible to prevent moisture and the like from being taken into the metal oxide film as much as possible by using a gas highly purified to −120° C. or lower.

The conductive film 110 later becomes conductive films 114 and 115 that function as a pair of electrodes, and a conductive film 116 that functions as a capacitor line. Therefore, for the conductive film 110, a conductive material that can be used as an electrode is appropriately used. The conductive film 110 is made of aluminum, titanium, chromium, nickel,
A single metal such as copper, yttrium, zirconium, molybdenum, silver, tantalum, or tungsten, or an alloy mainly composed of these metals is used in a single layer structure or a laminated structure.
For example, a single layer structure of an aluminum film containing silicon, a two-layer structure in which an aluminum film is stacked on a titanium film, a two-layer structure in which an aluminum film is stacked on a tungsten film, and a copper film on a copper-magnesium-aluminum alloy film. A two-layer structure in which a copper film is laminated on a titanium film, a two-layer structure in which a copper film is laminated on a tungsten film, a titanium film or titanium nitride film, and a titanium film or titanium nitride film stacked on top of the titanium film or titanium nitride film. A three-layer structure in which an aluminum film or a copper film is laminated, and then a titanium film or a titanium nitride film is formed on top of the aluminum film or a titanium nitride film. There is a three-layer structure in which films are stacked and a molybdenum film or molybdenum nitride film is further formed on top of the stacked films. Note that it may be formed using a transparent conductive material containing indium oxide, tin oxide, or zinc oxide.

The conductive film 110 is formed using a sputtering method, a CVD method, a vapor deposition method, or the like.

Here, as the insulating film 105, a silicon nitride film with a thickness of 400 nm is formed by the CVD method. Further, as the insulating film 106, a silicon oxynitride film with a thickness of 50 nm is formed by a CVD method. In addition, as the metal oxide film 108, a 35 nm thick I
An n-Ga-Zn oxide film is formed. Further, as the conductive film 110, a tungsten film with a thickness of 50 nm and a copper film with a thickness of 300 nm are formed by sputtering.

Next, using the masks 133 and 134, part of the conductive film 110 is etched to form conductive films 111 and 113. The conductive film 110 can be etched using a dry etching method and/or a wet etching method. Next, using the masks 133 and 134, a portion of the metal oxide film 108 is etched to form metal oxide films 109a and 109b. The metal oxide film 108 can be etched using a dry etching method and/or a wet etching method.

Here, a portion of each of the conductive film 110 and the metal oxide film 108 is etched by a dry etching method.

Next, the masks 133 and 134 are processed. Here, processing is performed so that the size of the mask 133 is reduced and the mask 134 is removed. Here, the masks 133 and 134 are exposed to plasma generated in an atmosphere containing oxygen.
Process 34. Examples of atmospheres containing oxygen include atmospheres containing oxidizing gases such as oxygen, ozone, dinitrogen monoxide, and nitrogen dioxide. Note that the masks 133 and 134 may be exposed to plasma generated while a bias is applied to the substrate 101 side. An example of a device that performs such plasma processing is an ashing device.

As a result, as shown in FIG. 3(D), the masks 135 and 136 with the mask 133 retracted
can be formed. Furthermore, a mask 137 can be formed in which the mask 134 is recessed. Note that in FIG. 3(D), the broken lines indicate the masks 133 and 133 shown in FIG. 3(C), respectively.
It corresponds to 134.

Next, using masks 135, 136, 137, parts of the conductive films 111, 113 are etched to form conductive films 114, 115, 116, and the metal oxide film 10 is etched.
A portion of each of 9a and 109b is exposed. The conductive films 111, 112, and 113 can be etched using a dry etching method and/or a wet etching method.
Note that it is preferable to use conditions in which the conductive films 111 and 113 are etched and the metal oxide films 109a and 109b are not etched, or the etching rate of the metal oxide films 109a and 109b is lower than that of the conductive films 111 and 113.

Here, part of the conductive films 111 and 113 is etched by a dry etching method.

As a result, as shown in FIG. 3E, conductive films 114 and 115 that function as a pair of electrodes of a transistor and a conductive film 116 that functions as a capacitor line can be formed. Also,
Parts of each of metal oxide films 109a and 109b are exposed.

Through the above steps, with one photomask, the metal oxide film 109a including the channel region of the transistor, and the conductive films 114 and 115 functioning as a pair of electrodes of the transistor,
A metal oxide film 109b that later becomes one electrode of the capacitor and a conductive film 116 that functions as a capacitor line can be formed.

Note that in the etching process for forming the conductive films 114 and 115 that function as a pair of electrodes of the transistor, regions of the metal oxide films 109a and 109b exposed to plasma are damaged and oxygen vacancies are formed. Therefore, the conductivity of the exposed regions of the metal oxide film 109a and the metal oxide film 109b increases.

Next, it is preferable to perform heat treatment. The temperature of the heat treatment is typically 150°C or higher and lower than the substrate strain point, preferably 300°C or higher and 500°C or lower, preferably 320°C or higher and 47°C or higher.
The temperature shall be below 0℃.

For the heat treatment, an electric furnace, an RTA device, etc. can be used. By using an RTA apparatus, heat treatment can be performed at a temperature equal to or higher than the strain point of the substrate for only a short time. Therefore, the heat treatment time can be shortened.

The heat treatment is carried out using nitrogen, oxygen, ultra-dry air (water content is 20 ppm or less, preferably 1 p).
pm or less, preferably 10 ppb or less), or rare gas (argon, helium, etc.)
This can be done in an atmosphere of Note that it is preferable that the nitrogen, oxygen, ultra-dry air, or rare gas does not contain hydrogen, water, or the like.

Here, heat treatment is performed at 450° C. for 1 hour in a nitrogen atmosphere, and then heat treatment is performed at 450° C. for 1 hour in a nitrogen and oxygen atmosphere.

Further, in the conductive films 114, 115, and 116, a conductive material that easily combines with oxygen, such as tungsten, titanium, aluminum, copper, molybdenum, chromium, or tantalum alone or an alloy, is applied to the regions in contact with the metal oxide films 109a, 109b. By using this, oxygen in the metal oxide films 109a and 109b is drawn out by the conductive material that easily combines with oxygen. Further, the metal oxide films 109a and 109b include tungsten, titanium, aluminum, copper, molybdenum,
Chromium or tantalum alone or a part of an alloy constituent element may be mixed in. As a result, in the metal oxide films 109a and 109b, the conductive films 114, 115, 116
A low resistance region is formed near the region in contact with. Since the low resistance region has high conductivity, it is possible to reduce the contact resistance between the metal oxide film 109a and the conductive films 114 and 115,
It is possible to increase the on-state current of a transistor. Further, the contact resistance between the metal oxide film 109b and the conductive film 116 can be reduced, and the resistance of the signal line and the capacitor line can be reduced.

Next, as shown in FIG. 4A, an insulating film 118 is formed. Next, a mask 138 is formed on the insulating film 118 by a photolithography process using a third photomask.

The insulating film 118 is preferably formed using an oxide insulating film in order to reduce the interface state at the interface with the metal oxide film 108. The insulating film 118 is typically made of silicon oxide, silicon oxynitride, aluminum oxide, hafnium oxide, gallium oxide, or Ga-Z.
It may be formed using an n-based metal oxide or the like, and may be provided as a laminated layer or a single layer.

Further, it is preferable that part or all of the insulating film 118 be formed using an oxide insulating film containing more oxygen than the stoichiometric composition. When an oxide insulating film containing more oxygen than the stoichiometric composition is heated, part of the oxygen is eliminated. An oxide insulating film containing more oxygen than the stoichiometric composition has an oxygen desorption amount of 1.0×10 ¹⁸ atoms/cm ³ or more in terms of oxygen atoms in TDS analysis. , preferably 3.
The oxide insulating film has a density of 0×10 ²⁰ atoms/cm ³ or more.

Further, it is preferable that the insulating film 118 has a small amount of defects, and typically, according to ESR measurement, the spin density of a signal appearing at g=2.001 derived from silicon dangling bonds is 1.5×10 ¹⁸ It is preferably less than 1×10 ¹⁸ spins/cm ³ , more preferably 1×10 18 spins/cm ³ or less, 1×10 ¹⁷ spins/cm ³ or less, and further preferably below the lower limit of detection.

The thickness of the insulating film 118 is 30 nm or more and 500 nm or less, preferably 50 nm or more and 400 nm or more.
It should be less than nm.

By forming the insulating film 118 using an oxide insulating film containing more oxygen than the oxygen that satisfies the stoichiometric composition, oxygen released from the insulating film 118 by heat treatment can be removed from the metal oxide film. 109a. As a result, oxygen vacancies contained in the metal oxide film 109a can be reduced.

The insulating film 118 can be formed using a sputtering method, a CVD method, or the like.

When forming the insulating film 118 using a CVD method, it is preferable to use a deposition gas containing silicon and an oxidizing gas as the source gas. Typical examples of deposition gases containing silicon include silane, disilane, trisilane, and fluorinated silane. As an oxidizing gas,
Oxygen, ozone, dinitrogen monoxide, nitrogen dioxide, etc.

When forming the insulating film 118 using an oxide insulating film containing more oxygen than the stoichiometric composition, the substrate placed in the evacuated processing chamber of the plasma CVD apparatus is heated to 180°C. Maintained at a temperature of 280°C or higher, more preferably 200°C or higher and 240°C or lower,
Introducing raw material gas into the processing chamber and setting the pressure in the processing chamber to 20 Pa or more and 250 Pa or less,
Silicon oxide can be heated under the conditions of supplying high-frequency power of 0.17 W/cm ² or more and 0.5 W/cm ² or less, more preferably 0.25 W/cm ² or more and 0.35 W/cm ² or less, to the electrodes provided in the processing chamber. A silicon oxynitride film or a silicon oxynitride film can be formed.

As a condition for forming the insulating film 118, by supplying high-frequency power with the above power density in a reaction chamber with the above pressure, the decomposition efficiency of the source gas in the plasma increases, oxygen radicals increase, and oxidation of the source gas progresses. Therefore, the oxygen content in the insulating film 118 becomes higher than the stoichiometric composition. On the other hand, in a film formed at the above-mentioned substrate temperature, the bonding force between silicon and oxygen is weak, so that part of the oxygen in the film is desorbed by heat treatment in a later step. As a result, it is possible to form an insulating film 118 that contains more oxygen than the stoichiometric composition and in which part of the oxygen is released by heating.

Note that the insulating film 118 has a multilayer structure of a first insulating film and a second insulating film, and the first insulating film is formed using an oxide insulating film that can transmit oxygen, and the second insulating film is formed using an oxide insulating film that can transmit oxygen. An oxide insulating film may be formed that contains more oxygen than the stoichiometric composition, and part of the oxygen is released by heating. With this layered structure, the first insulating film serves as a protective film for the metal oxide film in the step of forming the second insulating film. As a result, the second insulating film can be formed using high frequency power with high power density while reducing damage to the metal oxide film.

Alternatively, the insulating film 118 can be formed by forming an insulating film using a sputtering method, a CVD method, or the like, and then adding oxygen to the insulating film. Note that methods for adding oxygen to the insulating film include ion doping, ion implantation, and the like. Alternatively, oxygen can be added to the insulating film by exposing the insulating film to plasma containing oxygen generated in an oxidizing gas atmosphere.

Here, as the insulating film 118, silane with a flow rate of 200 sccm and silane with a flow rate of 4000 sccm are used.
Using a plasma CVD method using m dinitrogen monoxide as a raw material gas, the pressure in the reaction chamber was 200 Pa, the substrate temperature was 220°C, and 1500 W of high frequency power was supplied to parallel plate electrodes using a 27.12 MHz high frequency power source. A silicon oxynitride film with a thickness of 400 nm is formed. In addition,
The plasma CVD device is a parallel plate type plasma CVD device with an electrode area of 6000 ^cm2 , and the supplied power is 0.25 W/c when converted to power per unit area (power density).
^m2 . Furthermore, masks 133 and 135 are formed using halftone masks.

Next, a part of the insulating film 118 is etched using the mask 138 to form an insulating film 119 having an opening 151 as shown in FIG. 4(B). In the opening 151, a portion of the metal oxide film 109b is exposed. The insulating film 118 can be etched using a dry etching method and/or a wet etching method. Next, mask 138 is removed.

Note that in the etching process for forming the insulating film 119, the metal oxide film 109b
The area exposed to the plasma is damaged and oxygen vacancies are formed. For this reason,
In the metal oxide film 109b, the conductivity of the region not covered with the insulating film 119 is increased.

Here, a part of the insulating film 118 is etched by a dry etching method.

Next, as shown in FIG. 4C, an insulating film 120 is formed on the metal oxide film 109b and the insulating film 119. Next, by a photolithography process using a fourth photomask,
A mask 139 is formed on the insulating film 120.

A nitride insulating film is provided as the insulating film 120. As the nitride insulating film, silicon nitride,
Examples include silicon nitride oxide, aluminum nitride, aluminum nitride oxide, and the like. A nitride insulating film containing hydrogen may be formed as the nitride insulating film.

The thickness of the insulating film 120 is 10 nm or more and 400 nm or less, more preferably 50 nm or more and 3
00 nm or less.

The insulating film 120 can be formed using a sputtering method, a CVD method, or the like. Alternatively, after forming an insulating film using a sputtering method, a CVD method, or the like, hydrogen may be added to the insulating film. Note that methods for adding hydrogen to the insulating film include ion doping, ion implantation, and the like. Alternatively, hydrogen can be added to the insulating film by exposing the insulating film to plasma generated in a gas atmosphere containing hydrogen.

Here, as the insulating film 120, a silicon nitride film with a thickness of 100 nm is formed by a plasma CVD method using silane, ammonia, and nitrogen as raw material gases.

Due to plasma damage that occurs when forming the insulating film 120 on the insulating film 119, oxygen vacancies are formed in the metal oxide film 109b. Therefore, the conductivity of the region of the metal oxide film 109b that is not covered with the insulating film 119 becomes high. Further, by using a nitride insulating film containing hydrogen as the insulating film 120, hydrogen moves from the insulating film 120 to the metal oxide film 109b. Electrons, which are carriers, are generated by the movement of hydrogen into oxygen vacancies. As a result, the metal oxide film 109b has high conductivity, and the metal oxide film 109c has high conductivity.
becomes. The metal oxide film 109c functions as one electrode of the capacitive element 25.

Note that the nitride insulating film also functions as a blocking film for water, hydrogen, etc., so the insulating film 1
20, by providing a nitride insulating film, it is possible to prevent hydrogen, water, etc. from entering the metal oxide film 109a from the outside.

Both the metal oxide film 109a and the metal oxide film 109c are formed on the insulating film 106, but have different impurity concentrations. Specifically, the impurity concentration of the metal oxide film 109c is higher than that of the metal oxide film 109a. For example, the hydrogen concentration contained in the metal oxide film 109a is
less than 5×10 ¹⁹ atoms/cm ³ , preferably less than 5×10 ¹⁸ atoms/cm ³ , preferably less than 1×10 ¹⁸ atoms/cm ³ , more preferably 5×10 ¹⁷ ato
ms/cm ³ or less, more preferably 1×10 ¹⁶ atoms/cm ³ or less, and the hydrogen concentration contained in the metal oxide film 109c is 8×10 ¹⁹ or more, preferably 1×10 ²⁰ a
toms/cm ³ or more, more preferably 5×10 ²⁰ or more. In addition, metal oxide film 1
The hydrogen concentration contained in the metal oxide film 109c is twice that of the metal oxide film 109a, preferably 10 times or more.

Further, the metal oxide film 109c has a lower resistivity than the metal oxide film 109a. The resistivity of the metal oxide film 109c is 1×10 ^-8 times or more than the resistivity of the metal oxide film 109a, 1×10 ^-
The resistivity is preferably less than ¹ times, typically 1×10 ⁻³ Ωcm or more and less than 1×10 ⁴ Ωcm, more preferably 1×10 ⁻³ Ωcm or more and less than 1×10 ⁻¹ Ωcm. Good.

Next, heat treatment may be performed. The temperature of the heat treatment is typically 150°C or higher and 40°C.
The temperature is 0°C or lower, preferably 300°C or higher and 400°C or lower, preferably 320°C or higher and 370°C or lower.

A nitride insulating film has a small diffusion coefficient for hydrogen, water, and oxygen, and has a high blocking property for hydrogen, water, and oxygen. Furthermore, by forming the insulating film 119 using an oxide insulating film containing more oxygen than the oxygen that satisfies the stoichiometric composition, oxygen contained in the metal oxide film 109a can be removed from the outside during the heat treatment. It is possible to suppress the spread of Furthermore, diffusion of oxygen contained in the metal oxide film 109a to the outside can be suppressed. As a result, the amount of oxygen vacancies in the metal oxide film 109a can be reduced. Furthermore, the metal oxide film 1 from the outside
Diffusion of hydrogen, water, etc. to 09a can be suppressed. Therefore, the metal oxide film 109a
hydrogen, water, etc. can be reduced. As a result, a highly reliable transistor can be manufactured.

Here, heat treatment is performed at 350° C. for 1 hour in a nitrogen and oxygen atmosphere.

Next, using the mask 139, parts of the insulating films 119 and 120 are etched, and as shown in FIG.
As shown in D), an opening 152 is formed and the insulating film 120 is etched.
Openings 153 and 154 are formed. Further, the insulating film 120 becomes an insulating film 121 through the etching. In the opening 152, a portion of the conductive film 115 is exposed. Opening 15
3, 154, a portion of the conductive film 116 is exposed. Dry etching method or/
The insulating film 120 can be etched using a wet etching method. Next, mask 139 is removed.

Here, a portion of the insulating film 120 is etched using a dry etching method.

Next, as shown in FIG. 5A, a light-transmitting conductive film 122 is formed over the insulating film 121 and the conductive films 115 and 116. Next, masks 140 and 141 are formed on the conductive film 122 by a photolithography process using a fifth photomask.

The conductive film 122 later becomes a conductive film 123 that functions as a pixel electrode. Therefore, for the conductive film 122, a conductive material that can be used as a pixel electrode is appropriately used. The conductive film 122 includes an indium tin oxide film, an indium oxide film containing tungsten oxide, an indium zinc oxide film containing tungsten oxide, an indium oxide film containing titanium oxide, an indium tin oxide film containing titanium oxide, and an indium tin oxide film containing titanium oxide. A film formed of a light-transmitting conductive material such as a zinc oxide film or an indium tin oxide film added with silicon oxide can be used.

The conductive film 122 is formed using a sputtering method, a vapor deposition method, a coating method, or the like.

Here, an ITO film with a thickness of 100 nm is formed as the conductive film 122 by a sputtering method.

Next, a part of the conductive film 122 is etched using the masks 140 and 141, and the conductive film 122 is etched.
23 and 124 are formed. The conductive film 123 functions as a pixel electrode. The conductive film 124 has a function of electrically connecting the conductive films 116 formed in adjacent pixels. Note that the conductive film 1
24 functions as a capacitor line similarly to the conductive film 116.

The conductive film 123 is in contact with the conductive film 115 functioning as a pair of electrodes, and the insulating film 12
The metal oxide film 109c is formed so as to overlap the metal oxide film 109c through the metal oxide film 109c. The conductive film 122 can be etched using a dry etching method and/or a wet etching method.
After this, the masks 140 and 141 are removed (see FIG. 5(B)).

Here, a part of the conductive film 122 is etched by a wet etching method.

Through the above steps, the conductive film 103 functioning as a gate electrode, the insulating films 105 and 106 functioning as a gate insulating film, the metal oxide film 109a, and the conductive film functioning as a source electrode and a drain electrode in contact with the metal oxide film 109a. Transistor 22 with 114, 115
can be created. Further, a conductive film 123 that is in contact with the conductive film 115 included in the transistor 22 and functions as a pixel electrode can be formed. Further, the capacitor 25 including the metal oxide film 109c, the insulating film 121, and the conductive film 123 formed over the insulating film 106 can be manufactured. That is, the transistor 22 and the conductive film 123 functioning as a pixel electrode
, and an element substrate having the capacitive element 25 can be manufactured using five photomasks.
In this embodiment mode, a metal oxide film and a conductive film that functions as a source electrode and a drain electrode are formed using one photomask, so the number of photomasks required to fabricate an element substrate can be reduced. can.

Further, in the semiconductor device described in this embodiment, a metal oxide film that becomes one electrode of the capacitor is formed at the same time as the metal oxide film that includes the channel region of the transistor. Therefore, the metal oxide film including the channel region of the transistor and the metal oxide film serving as one electrode of the capacitor are made of the same metal element. Further, a conductive film functioning as a pixel electrode is used as the other electrode of the capacitor. Therefore, there is no need for a new step of forming a conductive film to form a capacitor, and the number of steps for manufacturing a display device can be reduced. Further, in the capacitive element, since the metal oxide film 109c and the conductive film 123, which are a pair of electrodes, both have light-transmitting properties, the capacitive element 25 has light-transmitting properties. As a result, the aperture ratio of the pixel can be increased while increasing the area occupied by the capacitive element. Furthermore, a display device with reduced power consumption can be manufactured.

Note that although the opening 151 is provided in FIG. 4B, one aspect of the embodiment of the present invention is not limited to this. As shown in FIG. 13(A), in some cases or depending on the situation,
It is also possible not to provide the opening 151.

Note that although the conductive film 124 is connected to the conductive film 116 of an adjacent pixel in FIG. 4B, one aspect of the embodiment of the present invention is not limited to this. As shown in FIGS. 13B and 13C, depending on the case or the situation, the conductive film 116 can be extended and connected.

<Modification 1, regarding the base insulating film>
In the transistor described in this embodiment, a base insulating film can be provided between the substrate 101 and the conductive film 103 functioning as a gate electrode, if necessary. The base insulating film can be formed using silicon oxide, silicon oxynitride, silicon nitride, silicon nitride oxide, gallium oxide, hafnium oxide, yttrium oxide, aluminum oxide, aluminum oxynitride, or the like. Note that by forming the base insulating film using silicon nitride, gallium oxide, hafnium oxide, yttrium oxide, aluminum oxide, etc., the substrate 1
Diffusion of impurities, typically alkali metals, water, hydrogen, etc., from 01 to the metal oxide film 109a can be suppressed.

The base insulating film can be formed by a sputtering method, a CVD method, or the like.

<Modification 2, regarding gate insulating film>
The insulating film 105 formed of a nitride insulating film can have a stacked structure of a first nitride insulating film with few defects and a second nitride insulating film with high hydrogen blocking properties. By providing a nitride insulating film with few defects as the gate insulating film, the dielectric strength voltage of the gate insulating film can be improved. Furthermore, by providing a nitride insulating film with high hydrogen blocking properties as the gate insulating film, it is possible to prevent hydrogen from the conductive film 103 and the insulating film 105, which function as gate electrodes, from moving to the metal oxide film 109a. can.

Alternatively, the insulating film 105 formed of a nitride insulating film may include a first nitride insulating film with high impurity blocking properties, a second nitride insulating film with few defects, and a second nitride insulating film with high hydrogen blocking properties. A stacked structure in which nitride insulating films are stacked in order from the side of the conductive film 103 functioning as a gate electrode can be used. As a gate insulating film, the first film has high impurity blocking properties.
By providing the nitride insulating film, impurities from the conductive film 103 functioning as a gate electrode,
Typically, hydrogen, nitrogen, alkali metals, alkaline earth metals, etc. are used as the metal oxide film 10.
9a can be prevented.

<Modification 3, regarding metal oxide film>
<About metal oxide film>
When hydrogen is added to an oxide semiconductor in which oxygen vacancies are formed, hydrogen enters the oxygen vacancy sites and a donor level is formed near the conduction band. As a result, the oxide semiconductor becomes highly conductive,
Become a conductor. An oxide semiconductor that has been made into a conductor can be referred to as an oxide conductor. In general, oxide semiconductors have a large energy gap and are therefore transparent to visible light.
On the other hand, an oxide conductor is an oxide semiconductor having a donor level near the conduction band. Therefore, the influence of absorption by the donor level is small, and the material has a visible light transmittance comparable to that of an oxide semiconductor.

Here, a film formed of an oxide semiconductor (hereinafter referred to as an oxide semiconductor film (OS)), such as the one used for the metal oxide film 109a, and a film formed of an oxide semiconductor, such as the one used for the metal oxide film 109c, are used.
The temperature dependence of resistivity in a film formed of an oxide conductor (hereinafter referred to as an oxide conductor film (OC)) will be described with reference to FIG. In FIG. 17, the horizontal axis shows the measured temperature, and the vertical axis shows the resistivity. Furthermore, the measurement results for the oxide semiconductor film (OS) are indicated by circles, and the measurement results for the oxide conductor film (OC) are indicated by square marks.

Note that the sample including the oxide semiconductor film (OS) was prepared on a glass substrate with an atomic ratio of In:Ga.
: An In-Ga-Zn oxide film with a thickness of 35 nm was formed by a sputtering method using a sputtering target of Zn=1:1:1.2, and the atomic ratio was In:Ga:Zn=1:4.
:20 nm thick In-
After forming a Ga-Zn oxide film and heat-treating it in a nitrogen atmosphere at 450°C, heat-treating it in a mixed gas atmosphere of nitrogen and oxygen at 450°C, and further forming a silicon oxynitride film by a plasma CVD method, Created.

In addition, a sample containing an oxide conductor film (OC) was prepared on a glass substrate with an atomic ratio of In:Ga.
: Thickness 1 by sputtering method using a sputtering target of Zn=1:1:1
After forming a 00 nm thick In-Ga-Zn oxide film and heat-treating it in a nitrogen atmosphere at 450°C, heat-treating it in a mixed gas atmosphere of nitrogen and oxygen at 450°C, and forming a silicon nitride film using a plasma CVD method. It was created by

As can be seen from FIG. 13, the temperature dependence of resistivity in the oxide conductor film (OC) is smaller than the temperature dependence of resistivity in the oxide semiconductor film (OS). Typically, the rate of change in resistivity of the oxide conductor film (OC) at 80K or higher and 290K or lower is less than ±20%. Alternatively, the rate of change in resistivity at 150K or higher and 250K or lower is less than ±10%.
That is, the oxide conductor is a degenerate semiconductor, and it is estimated that the conduction band edge and the Fermi level match or substantially match. Therefore, the oxide conductor film can be used for resistive elements, wiring, electrodes of capacitive elements, pixel electrodes, common electrodes, and the like.

<About oxide semiconductor films and metal oxide films>
Next, one embodiment applicable to a metal oxide film and an oxide semiconductor film having semiconductor characteristics will be described. Although an oxide semiconductor film will be described here as a representative example, the structure of the oxide semiconductor film can be applied to a metal oxide film as appropriate.

The oxide semiconductor film is preferably composed of a CAAC-OS film. CAAC-O
The S film has c-axis orientation, and clear crystal grain boundaries (also referred to as grain boundaries) cannot be observed. As a result, in the channel-etched transistor, the amount of overetching of the oxide semiconductor film when forming the pair of electrodes is small. As a result, by forming the oxide semiconductor film with a CAAC-OS film, a channel-etched transistor can be manufactured. Note that the channel-etched transistor has a channel length that is 0.5 μm or more and 6.5 μm or less, preferably 1 μm or more and 6.5 μm or more, and the channel length is 0.5 μm or more and 6.5 μm or less, and preferably 1 μm or more and 6.5 μm or less.
It is possible to make it as small as less than μm.

Further, the oxide semiconductor film includes an oxide semiconductor with a single crystal structure (hereinafter referred to as a single crystal oxide semiconductor), an oxide semiconductor with a polycrystalline structure (hereinafter referred to as a polycrystalline oxide semiconductor), and an oxide semiconductor with a microcrystalline structure. oxide semiconductor (hereinafter referred to as a microcrystalline oxide semiconductor). CAAC-OS, single crystal oxide semiconductor, polycrystalline oxide semiconductor, and microcrystalline oxide semiconductor will be explained below.

<CAAC-OS>
The CAAC-OS film is one type of oxide semiconductor film having multiple crystal parts. Also, CA
The crystal part included in the AC-OS film has c-axis orientation. In the plane TEM image, CAA
The area of the crystal part included in the C-OS film is 2500 nm ² or more, more preferably 5 μm ² or more, and even more preferably 1000 μm ^{2 or} more. Further, in a cross-sectional TEM image, by having the crystalline portion in 50% or more, preferably 80% or more, more preferably 95% or more, the thin film has physical properties close to those of a single crystal.

The CAAC-OS film was examined using a transmission electron microscope (TEM).
When observed using a tron microscope, clear boundaries between crystal parts, that is, crystal grain boundaries (also referred to as grain boundaries) cannot be confirmed. Therefore, it can be said that the CAAC-OS film is less prone to decrease in electron mobility due to grain boundaries.

When the CAAC-OS film is observed by TEM in a direction approximately parallel to the sample surface (cross-sectional TEM observation), it can be confirmed that metal atoms are arranged in a layered manner in the crystal part. Each layer of metal atoms has a shape that reflects the unevenness of the surface on which the film is formed (also referred to as the surface to be formed) or the top surface of the CAAC-OS film, and is arranged parallel to the surface to be formed or the top surface of the CAAC-OS film. . Note that in this specification, "parallel" refers to a state in which two straight lines are arranged at an angle of -10° or more and 10° or less. Therefore, cases where the angle is greater than or equal to -5° and less than or equal to 5° are also included. Moreover, "perpendicular" refers to a state in which two straight lines are arranged at an angle of 80° or more and 100° or less. Therefore, cases where the angle is greater than or equal to 85° and less than or equal to 95° are also included.

On the other hand, the CAAC-OS film was observed by TEM from a direction approximately perpendicular to the sample surface (plane T
(EM observation), it can be confirmed that metal atoms are arranged in a triangular or hexagonal shape in the crystal part. However, no regularity is observed in the arrangement of metal atoms between different crystal parts.

Note that when performing electron beam diffraction on the CAAC-OS film, spots (bright spots) showing orientation are observed.
is observed.

From the cross-sectional TEM observation and the planar TEM observation, it can be seen that the crystal part of the CAAC-OS film has orientation.

X-ray diffraction (XRD) was performed on the CAAC-OS film.
When structural analysis is performed using a device, a peak may appear at a diffraction angle (2θ) of around 31° in an out-of-plane analysis of a CAAC-OS film. This peak is I
CAAC-
It can be confirmed that the crystal of the OS film has c-axis orientation, and the c-axis is oriented in a direction approximately perpendicular to the surface on which it is formed or the upper surface.

On the other hand, an in-p in which X-rays are incident on the CAAC-OS film from a direction approximately perpendicular to the c-axis.
In analysis using the lane method, a peak may appear near 2θ of 56°. This peak is assigned to the (110) plane of the InGaZn oxide crystal. In the case of a single-crystal oxide semiconductor film of InGaZn oxide, 2θ is fixed near 56°, and the normal vector of the sample surface is aligned with the axis (φ
When analysis (φ scan) is performed while the sample is rotated with respect to the (110) plane, six peaks attributed to crystal planes equivalent to the (110) plane are observed. On the other hand, in the case of CAAC-OS film, 2
Even when φ scanning is performed with θ fixed at around 56°, no clear peak appears.

From the above, in the CAAC-OS film, the orientation of the a-axis and b-axis is irregular between different crystal parts, but it has c-axis orientation, and the c-axis is normal to the surface on which it is formed or the top surface. It can be seen that the direction is parallel to the vector. Therefore, each layer of metal atoms arranged in a layered manner confirmed by the above-mentioned cross-sectional TEM observation is a plane parallel to the ab plane of the crystal.

Note that the crystal portion is formed when the CAAC-OS film is formed or when a crystallization process such as heat treatment is performed. As described above, the c-axis of the crystal part is oriented in a direction parallel to the normal vector of the formation surface or top surface of the CAAC-OS film. Therefore, for example, when the shape of the CAAC-OS film is changed by etching or the like, the c-axis of the crystal part may not be parallel to the normal vector of the formation surface or top surface of the CAAC-OS film.

Further, the degree of crystallinity in the CAAC-OS film does not have to be uniform. For example, CAAC-OS
When the crystalline portion of the film is formed by crystal growth from near the top surface of the CAAC-OS film, the region near the top surface may have a higher degree of crystallinity than the region near the surface on which it is formed. Also, CA
When an impurity is added to an AC-OS film, the crystallinity of the region to which the impurity is added changes, and regions with partially different crystallinity may be formed.

In addition, in the out-of-plane analysis of the CAAC-OS film, 2θ is 31°.
In addition to nearby peaks, a peak may also appear near 2θ of 36°. The peak near 2θ of 36° indicates that a portion of the CAAC-OS film contains a crystal portion that does not have c-axis orientation. The CAAC-OS film shows a peak at 2θ of around 31°, and 2θ of 36°.
It is preferable that no peaks be shown in the vicinity.

The CAAC-OS film is an oxide semiconductor film with low impurity concentration. The impurity is an element other than the main component of the oxide semiconductor film, such as hydrogen, carbon, silicon, or a transition metal element. In particular, elements such as silicon, which have a stronger bond with oxygen than the metal elements constituting the oxide semiconductor film, disturb the atomic arrangement of the oxide semiconductor film by removing oxygen from the oxide semiconductor film, resulting in crystallinity. This is a factor that reduces the In addition, heavy metals such as iron and nickel, argon, carbon dioxide, etc. have large atomic radii (or molecular radii), so if they are included inside the oxide semiconductor film, they will disturb the atomic arrangement of the oxide semiconductor film and cause crystallinity. This is a factor that reduces the Note that impurities contained in the oxide semiconductor film may become a carrier trap or a carrier generation source.

Further, the CAAC-OS film is an oxide semiconductor film with a low density of defect levels. For example, oxygen vacancies in an oxide semiconductor film may act as a carrier trap or become a carrier generation source by capturing hydrogen.

A material having a low impurity concentration and a low defect level density (few oxygen vacancies) is called high-purity intrinsic or substantially high-purity intrinsic. A high-purity intrinsic or substantially high-purity intrinsic oxide semiconductor film has few carrier generation sources, and thus can have a low carrier density. Therefore, a transistor using the oxide semiconductor film rarely has electrical characteristics in which the threshold voltage is negative (also referred to as normally-on). Further, an oxide semiconductor film that is highly pure or substantially pure has fewer carrier traps. Therefore, a transistor using the oxide semiconductor film has small fluctuations in electrical characteristics and is highly reliable. Note that the charge trapped in the carrier trap of the oxide semiconductor film may behave as if it were a fixed charge because it takes a long time to release the charge. Therefore, a transistor including an oxide semiconductor film with a high impurity concentration and a high defect level density may have unstable electrical characteristics.

Further, a transistor using a CAAC-OS film has small fluctuations in electrical characteristics due to irradiation with visible light or ultraviolet light.

<Single crystal oxide semiconductor>
A single crystal oxide semiconductor film is an oxide semiconductor film that has a low impurity concentration and a low defect level density (few oxygen vacancies). Therefore, carrier density can be lowered. Therefore, a transistor using a single crystal oxide semiconductor film rarely has normally-on electrical characteristics. Further, since the single crystal oxide semiconductor film has a low impurity concentration and a low defect level density, carrier traps may be reduced in some cases. Therefore, a transistor using a single crystal oxide semiconductor film has small fluctuations in electrical characteristics and is highly reliable.

Note that the oxide semiconductor film has a higher density when there are fewer defects. In addition, the oxide semiconductor film is
The higher the crystallinity, the higher the density. Furthermore, the density of the oxide semiconductor film increases when the concentration of impurities such as hydrogen is low. A single crystal oxide semiconductor film has a higher density than a CAAC-OS film. Further, the CAAC-OS film has a higher density than the microcrystalline oxide semiconductor film. Further, a polycrystalline oxide semiconductor film has a higher density than a microcrystalline oxide semiconductor film. Further, a microcrystalline oxide semiconductor film has a higher density than an amorphous oxide semiconductor film.

<Polycrystalline oxide semiconductor>
Crystal grains can be confirmed in the polycrystalline oxide semiconductor film when observed using a high-resolution TEM. The crystal grains contained in the polycrystalline oxide semiconductor film are, for example, 2 nm or more and 300 nm or less, 3 nm or more and 100 nm or less, or 5 nm or more and 50 nm or more, as observed in a high-resolution TEM image.
The particle size is often less than m. Further, in a polycrystalline oxide semiconductor film, crystal grain boundaries may be confirmed in an image observed using a high-resolution TEM.

A polycrystalline oxide semiconductor film has a plurality of crystal grains, and the crystal orientations may differ between the plurality of crystal grains. Furthermore, when a polycrystalline oxide semiconductor film is subjected to structural analysis using an XRD device, for example, _the ou
In analysis using the to-of-plane method, a peak at 2θ of around 31°, a peak at 2θ around 36°, or other peaks may appear.

A polycrystalline oxide semiconductor film has high crystallinity and therefore may have high electron mobility. Therefore, a transistor using a polycrystalline oxide semiconductor film has high field-effect mobility. However, in the polycrystalline oxide semiconductor film, impurities may segregate at grain boundaries. Also,
The crystal grain boundaries of the polycrystalline oxide semiconductor film become defect levels. In polycrystalline oxide semiconductor films, crystal grain boundaries may become carrier traps or carrier generation sources, so transistors using polycrystalline oxide semiconductor films have lower electrical power than transistors using CAAC-OS films. Characteristics may vary greatly, resulting in a transistor with low reliability.

<Microcrystalline oxide semiconductor>
In a microcrystalline oxide semiconductor film, crystal parts may not be clearly visible in a TEM observation image. A crystal part included in a microcrystalline oxide semiconductor film often has a size of 1 nm or more and 100 nm or less, or 1 nm or more and 10 nm or less. In particular, 1 nm or more 10n
nanocrystals (nc: nanocrystals), which are microcrystals of 1 nm or more and 3 nm or less
An oxide semiconductor film having nc-OS (nanocrystalline O
xide Semiconductor) film. Further, the nc-OS film is, for example, T
In images observed by EM, grain boundaries may not be clearly confirmed in some cases.

The nc-OS film has periodicity in the atomic arrangement in a minute region (for example, a region of 1 nm or more and 10 nm or less, particularly a region of 1 nm or more and 3 nm or less). Further, in the nc-OS film, there is no regularity in crystal orientation between different crystal parts. Therefore, no orientation is observed throughout the film.
Therefore, depending on the analysis method, an nc-OS film may be indistinguishable from an amorphous oxide semiconductor film. For example, for an nc-OS film, XRD using X-rays with a diameter larger than that of the crystal part
When structural analysis is performed using the device, no peaks indicating crystal planes are detected in out-of-plane analysis. Furthermore, when an nc-OS film is subjected to electron beam diffraction (also called selected area electron diffraction) using an electron beam with a diameter larger than that of the crystal part (for example, 50 nm or more), a diffraction pattern like a halo pattern is generated. Observed. On the other hand, when an nc-OS film is subjected to electron beam diffraction (also called nanobeam electron diffraction) using an electron beam with a probe diameter close to the size of the crystal part or smaller than the crystal part (for example, from 1 nm to 30 nm), Spots are observed. Furthermore, when nanobeam electron diffraction is performed on an nc-OS, a circular (ring-shaped) region of high brightness may be observed. Furthermore, when nanobeam electron diffraction is performed on an nc-OS, a plurality of spots may be observed within a ring-shaped region.

The nc-OS film is an oxide semiconductor film with higher regularity than an amorphous oxide semiconductor film. Therefore, the nc-OS film has a lower defect level density than the amorphous oxide semiconductor film. However, in the nc-OS film, there is no regularity in crystal orientation between different crystal parts. Therefore, nc-
The OS film has a higher density of defect levels than the CAAC-OS film.

Note that the structure, method, etc. shown in this embodiment can be used in appropriate combination with the structures, methods, etc. shown in other embodiments.

(Embodiment 2)
In this embodiment, a method for manufacturing an element substrate of a display device that is different from that in Embodiment 1 will be described with reference to drawings. In this embodiment, similarly to Embodiment 1, a metal oxide film having a channel region and a conductive film functioning as a source electrode and a drain electrode are formed using one photomask. On the other hand, this embodiment differs from Embodiment 1 in the configuration of a conductive film that functions as a capacitor line.

A specific example of an element substrate of a liquid crystal display device using a liquid crystal element for the pixel 13 will be described.
Here, FIG. 6 shows a top view of the pixel 13 shown in FIG. 1(B).

In the pixel 13 shown in FIG. 6, a part of the metal oxide film 109c functions as a capacitor line. Also,
Metal oxide films 109c provided in adjacent pixels are connected by a conductive film 173.

In the pixel 13 shown in FIG. 6, in the openings 171 and 172 provided in the insulating film 119 (see FIG. 7A), a metal oxide film 109c and a conductive film 12 functioning as a pixel electrode are formed.
A conductive film 173 formed at the same time as No. 3 is connected. The metal oxide film 109c has an opening 151
(See FIG. 4B.) Since it is in contact with an insulating film formed using a nitride insulating film, it has conductivity. As a result, the metal oxide film 109c functions not only as a capacitor line but also as one electrode of the capacitor.

The capacitive element 25 includes a conductive metal oxide film 109c, an insulating film 121 (see FIG. 7B), and a conductive film 123 functioning as a pixel electrode. That is, by connecting the metal oxide film 109c with the conductive film 173, one electrode (
Here, the electrically conductive metal oxide film 109c) can be made to have the same potential.

In the pixel 13 shown in this embodiment, the conductive film formed at the same time as the conductive films 114 and 115 is not used as the capacitor line. Since the conductive films 114 and 115 have light blocking properties, the aperture ratio of the pixel can be increased.

Next, a method for manufacturing an element substrate of a display device will be described using a cross-sectional view taken along a dotted line AB and a cross-sectional view taken along a dotted line CD shown in FIG.

As shown in FIG. 7A, a conductive film 103 functioning as a gate electrode is formed on a substrate 101 through a process similar to that in Embodiment 1 using a first photomask to a third photomask. , insulating films 105, 106, metal oxide films 109a, 109c, conductive films 114, 1
15, an insulating film 119 and an insulating film 120 are formed. Note that in this embodiment, the conductive film 116 is not formed. In addition, the metal oxide film 109a is
, 109c and the conductive films 114 and 115, the number of photomasks in the process of manufacturing the element substrate can be reduced.

Next, a mask is formed on the insulating film 120 by a photolithography process using a fourth photomask, and then the insulating films 119 and 120 are etched using the mask to open an opening that exposes the conductive film 115. While forming the portion 152, the insulating film 120 is etched,
Openings 171 and 172 are formed to expose the conductive metal oxide film (see FIG. 7B). Furthermore, the insulating film 121 can be formed by this etching.

Next, a light-transmitting conductive film is formed on the exposed portions of the conductive metal oxide film 109c and the conductive film 115, and on the insulating film 121. Next, a mask is formed on the light-transmitting conductive film by a photolithography process using a fifth photomask, and the light-transmitting conductive film is etched using the mask to form a pixel electrode. a functional conductive film 123;
Then, a conductive film 173 functioning as a capacitor line is formed. The conductive film 173 has a function of electrically connecting the conductive metal oxide films 109c formed in adjacent pixels. After this, the mask is removed (see FIG. 7(C)).

Through the above steps, the transistor 22 and the capacitor 25 can be manufactured. Further, through the above steps, an element substrate having pixels with a higher aperture ratio can be manufactured.

Note that the structure, method, etc. shown in this embodiment can be used in appropriate combination with the structures, methods, etc. shown in other embodiments.

(Embodiment 3)
This embodiment uses FFS (Fringe Field Switch), which is an example of a transverse electric field method.
The explanation will be given using a pixel structure of a liquid crystal display device in tching mode.

In the FFS mode liquid crystal display device shown in this embodiment, the common electrode is striped, and the alignment of the liquid crystal is controlled by applying an electric field generated by the pixel electrode and the common electrode to the liquid crystal between the electrodes. An FFS mode liquid crystal display device has a high aperture ratio and can obtain a wide viewing angle.

Here, FIG. 8 shows a top view of the pixel 13 shown in FIG. 1(B).

The pixel 13 shown in FIG. 8 has one metal oxide film 183 in each pixel. Metal oxide film 1
Conductive films 181 and 182 are provided on 83 to function as a source electrode and a drain electrode. The conductive film 181 also functions as a signal line. Note that the conductive film 181 is separated for each pixel. Further, the conductive film 1 electrically connects the conductive films 181 provided in adjacent pixels.
87 is provided on the conductive film 181 via an insulating film (not shown). The conductive film 187 is
It is connected to the conductive film 181 at the openings 184 and 185. Also, across multiple pixels,
A conductive film 186 that functions as a striped common electrode is provided. Conductive film 187 and conductive film 1
86 are formed at the same time.

In the display device shown in this embodiment, the conductive film 186 that functions as a common electrode is not formed over the entire surface of the substrate and has a striped shape, so that the conductive film 186 that functions as a signal line and the conductive film 187 that functions as a scanning line. The area overlapping with the conductive film 103 is reduced. As a result, the conductive film 10
The parasitic capacitance that occurs between the conductive films 181 and 187 and the conductive film 186 can be reduced.

Next, a method for manufacturing an element substrate of a display device will be described using a cross-sectional view taken along a dotted line AB and a cross-sectional view taken along a dotted line EF shown in FIG.

After going through the same steps as in Embodiment 1 and using the first photomask, the image shown in FIG.
), a conductive film 103 functioning as a gate electrode is formed on a substrate 101. Next, on the substrate 101 and the conductive film 103, insulating films 105, 106,
A metal oxide film 108 and a conductive film 110 are formed.

Next, as shown in FIG. 9B, a metal oxide film 183 and conductive films 181 and 182 are formed by a process using the second photomask described in Embodiment Mode 1. Similar to the conductive film 114 described in Embodiment 1, the conductive film 181 functions as one of a source electrode and a drain electrode of a transistor, and also functions as a signal line. Similar to the conductive film 115 described in Embodiment 1, the conductive film 182 functions as the other of the source electrode and the drain electrode of the transistor. Here, the metal oxide film 183 and the conductive films 181, 1
82, the number of photomasks in the process of manufacturing the element substrate can be reduced.

Next, after the insulating film 119 having the opening 151 is formed by a step using the third photomask described in Embodiment 1, an insulating film 120 is formed over the metal oxide film 183 and the insulating film 119.
(See FIG. 9(C).)

In the metal oxide film 183, a region 191 in contact with the insulating film 120 is
Similar to 9c, conductivity is increased. As a result, it functions as a pixel electrode. On the other hand, the insulating film 11
9 is formed using an oxide insulating film. Therefore, a region of the metal oxide film 183 in contact with the insulating film 119 has a low interface state density with the insulating film 119. Furthermore, when the insulating film 119 is formed using an oxide insulating film containing more oxygen than the oxygen that satisfies the stoichiometric composition, oxygen contained in the insulating film 119 moves to the metal oxide film 183. Therefore, the content of oxygen vacancies in the region 192 can be reduced. As a result, in the metal oxide film 183, a region 192 in contact with the insulating film 119 functions as a channel region. Further, in the metal oxide film 183, regions in contact with the conductive films 181 and 182 become low resistance regions.

Note that when forming the insulating film 119 having the opening 151, the distance between the end of the opening 151 and the conductive film 181 functioning as a signal line and the distance between the end of the opening 151 and the conductive film 181 functioning as a signal line are determined. It is preferable that the distances are each larger than 1.5 μm, and more preferably larger than 2 μm. In the metal oxide film 183, the region in contact with the insulating film 120 has oxygen vacancies or contains impurities, thereby increasing the conductivity, but the conductivity also increases in the region adjacent to this region. This is considered to be because impurities are diffused in the lateral direction, so that regions of the metal oxide film 183 that are not in contact with the insulating film 121 also contain impurities, resulting in lower resistance. Therefore, the distance between the end of the opening 151 and the conductive film functioning as a scanning line is set to 1.5.
By making the thickness larger than μm, or even larger than 2 μm, it is possible to prevent the resistance of the channel region of the transistor 22 from becoming low, and a transistor having normally-off characteristics can be manufactured. Further, by setting the distance between the end of the opening 151 and the conductive film 181 functioning as a signal line to be larger than 1.5 μm, or even larger than 2 μm, the distance between the conductive film 181 functioning as a signal line and the metal oxide Region 19 functioning as a pixel electrode in film 183
1 and 1 do not affect each other, and display defects can be prevented.

Next, a mask is formed on the insulating film 121 by a photolithography process using a fourth photomask, and then the insulating films 119 and 120 are etched using the mask to open an opening to expose the conductive film 181. The portions 184 and 185 are formed, and the insulating film 121 is also formed (see FIG. 10(A)).

Next, a light-transmitting conductive film is formed on the exposed portion of the conductive film 181 and on the insulating film 121. Next, a mask is formed on the light-transmitting conductive film by a photolithography process using a fifth photomask, and the light-transmitting conductive film is etched using the mask to form a common electrode. A functional conductive film 186 is formed, and a conductive film 187 that functions as a signal line is also formed. The conductive film 187 electrically connects the conductive films 181 provided in adjacent pixels. After this, the mask is removed (see FIG. 10(B)).

Through the above steps, the transistor 22 and the capacitor 25 can be manufactured. Further, through the above steps, an element substrate having pixels with a higher aperture ratio can be manufactured. Furthermore, an FFS mode liquid crystal display device can be manufactured.

Note that the structure, method, etc. shown in this embodiment can be used in appropriate combination with the structures, methods, etc. shown in other embodiments.

(Embodiment 4)
In this embodiment, a semiconductor device including a transistor in which the amount of defects in a metal oxide film can be further reduced compared to Embodiments 1 to 3 will be described with reference to the drawings. The transistor described in this embodiment differs from Embodiment 1 and 2 in that a multilayer film including a plurality of metal oxide films is provided instead of a metal oxide film. .

FIG. 11 is a cross-sectional view of a transistor included in a semiconductor device, taken along dashed-dot lines AB and CD shown in FIG.

The transistor 22b shown in FIG. 11A has multilayer films 250a and 250 on the insulating film
It has b. The multilayer film 250a includes a first metal oxide film 251a in contact with the insulating film 106, and a second metal oxide film 252a in contact with the first metal oxide film 251a and the insulating film 119.
has.

A multilayer film 250b shown in FIG. 11(A) provided on the insulating film 106 functions as a capacitor electrode. The multilayer film 250b includes a first metal oxide film 251b in contact with the insulating film 107b, and a second metal oxide film 252b in contact with the first metal oxide film 251b and the insulating film 119.

The second metal oxide films 252a and 252b are metal oxide films made of one or more of the elements that constitute the first metal oxide films 251a and 251b. Therefore, interface scattering is less likely to occur at the interface between the first metal oxide films 251a, 251b and the second metal oxide films 252a, 252b. Therefore, since the movement of carriers is not inhibited at the interface,
The field effect mobility of the transistor is increased.

The first metal oxide films 251a, 251b and the second metal oxide films 252a, 252b are typically In-Ga oxide, In-Zn oxide, In-M-Zn oxide (M is Al
, Ga, Ti, Y, Zr, La, Ce, or Nd).

Further, the second metal oxide films 252a and 252b are similar to the first metal oxide films 251a and 252b.
1b, the energy at the lower end of the conduction band is closer to the vacuum level, and typically, the energy at the lower end of the conduction band of the second metal oxide films 252a, 252b and the energy of the lower end of the conduction band of the first metal oxide films 251a, 2
The difference with the energy at the lower end of the conduction band of 51b is 0.05 eV or more, 0.07 eV or more, 0
．． It is 1 eV or more, or 0.15 eV or more, and 2 eV or less, 1 eV or less, 0.5 eV or less, or 0.4 eV or less. That is, the difference between the electron affinity of the second metal oxide films 252a, 252b and the electron affinity of the first metal oxide films 251a, 251b is 0.05 eV or more, 0.07 eV or more, 0.1 eV or more, or 0.15eV or more and 2eV or less, 1
eV or less, 0.5 eV or less, or 0.4 eV or less.

The first metal oxide films 251a, 251b and the second metal oxide films 252a, 252b preferably contain In because carrier mobility (electron mobility) is increased.

The second metal oxide films 252a and 252b include Al, Ga, Ti, Y, Zr, La,
Having Ce or Nd in a higher atomic ratio than In may have the following effects. (1) Enlarge the energy gap between the second metal oxide films 252a and 252b.
(2) Decreasing the electron affinity of the second metal oxide films 252a and 252b. (3) Suppressing the diffusion of impurities from the outside. (4) The insulation property is higher than that of the first metal oxide films 251a and 251b. (5) Since Ga, Y, Zr, La, Ce, or Nd is a metal element that has a strong bonding force with oxygen, oxygen vacancies are less likely to occur.

When the first metal oxide films 251a and 251b are In--M--Zn oxides, when the sum of In and M is 100 atomic%, the atomic ratio of In and M is preferably I
The atomic ratio of n and M is preferably greater than 25 atomic% for In and 75 atomic% for M.
mic%, more preferably In is greater than 34 atomic%, and M is 66 atomic%.
Less than mic%.

When the second metal oxide films 252a and 252b are In--M--Zn oxides, when the sum of In and M is 100 atomic%, the atomic ratio of In and M is preferably I
More preferably, n is less than 50 atomic%, M is greater than 50 atomic%,
It is assumed that In is less than 25 atomic% and M is greater than 75 atomic%.

In addition, the first metal oxide films 251a, 251b and the second metal oxide films 252a, 25
When 2b is an In-M-Zn oxide M (M is Al, Ga, Ti, Y, Zr, La, Ce, or Nd), compared to the first metal oxide films 251a and 251b, The atomic ratio of M (Al, Ga, Ti, Y, Zr, La, Ce, or Nd) contained in the second metal oxide films 252a and 252b is large, and typically, the first metal oxide film The atomic ratio is 1.5 times or more, preferably 2 times or more, and more preferably 3 times or more higher than the atoms contained in the films 251a and 251b.

In addition, the first metal oxide films 251a, 251b and the second metal oxide films 252a, 25
2b is In-M-Zn oxide (M is Al, Ga, Ti, Y, Zr, La, Ce, or Nd), the second metal oxide films 252a and 252b are In:M:Zn. = _x1 : _y1
:z ₁ [atomic ratio], the first metal oxide films 251a and 251b are In:M:Zn=x ₂ :
When y ₂ :z ₂ [atomic ratio], y ₁ /x ₁ is larger than y ₂ /x ₂ , preferably,
y ₁ /x ₁ is 1.5 times or more greater than y ₂ /x ₂ . More preferably, y ₁ /x ₁ is y
₂ /x ₂ is twice or more, and more preferably y ₁ /x ₁ is three times or more larger than y ₂ /x ₂ .

The first metal oxide films 251a and 251b are In-M-Zn oxide (M is Al, Ga,
Ti, Y, Zr, La, Ce, or Nd), the first metal oxide film 251a, 25
In the target used for forming film 1b, the atomic ratio of metal elements is In:M:Zn
=x ₁ :y ₁ :z _{1 ,} then x ₁ /y ₁ is 1/3 or more and 6 or less, furthermore, 1 or more and 6 or less, and z ₁ /y ₁ is 1/3 or more and 6 or less, Furthermore, it is preferably 1 or more and 6 or less. Note that by setting z ₁ /y ₁ to 1 or more and 6 or less, the first metal oxide films 251a, 25
As 1b, a CAAC-OS film is easily formed. Typical examples of the atomic ratio of the metal elements in the target include In:M:Zn=1:1:1, In:M:Zn=1:1:1.2, and In:M:Zn=1:1:1.2.
:M:Zn=3:1:2 etc.

The second metal oxide films 252a and 252b are In-M-Zn oxide (M is Ga, Y, Z
r, La, Ce, or Nd), the atomic ratio of the metal elements in the target used for forming the second metal oxide films 252a, 252b is In:M:Zn=x ₂ :y ₂
:z _{2 ,} then x ₂ /y ₂ <x ₁ /y ₁ , and z ₂ /y ₂ is 1/3 or more and 6 or less,
Furthermore, it is preferably 1 or more and 6 or less. Note that by setting z ₂ /y ₂ to 1 or more and 6 or less, a CAAC-OS film can be easily formed as the second metal oxide films 252a and 252b. A typical example of the atomic ratio of the metal elements in the target is In:M:Zn=1:3:2.
, In:M:Zn=1:3:4, In:M:Zn=1:3:6, In:M:Zn=1:3
: There is 8th grade.

Note that the first metal oxide films 251a, 251b and the second metal oxide films 252a, 25
Each of the atomic ratios of 2b includes a variation of plus or minus 40% of the above atomic ratio as an error.

The second metal oxide films 252a and 252b also function as a film for alleviating damage to the first metal oxide film 251a when forming the film that will become the insulating film 119.

The thickness of the first metal oxide films 251a and 251b is 3 nm or more and 200 nm or less, preferably 3 nm or more and 100 nm or less, and more preferably 3 nm or more and 50 nm or less. Second
The thickness of the metal oxide films 252a and 252b is 3 nm or more and 100 nm or less, preferably 3 nm or more and 100 nm or less.
nm or more and 50 nm.

The first metal oxide films 251a, 251b and the second metal oxide films 252a, 252b may have, for example, a non-single crystal structure. The non-single crystal structure is, for example, CAAC-OS (C
Axis Aligned-Crystalline Oxide Semicond
uctor), a polycrystalline structure, a microcrystalline structure (described later), or an amorphous structure.

Note that the first metal oxide films 251a, 251b and the second metal oxide films 252a, 25
2b, an amorphous structure region, a microcrystalline structure region, a polycrystalline structure region, CAAC-O
A mixed film having two or more of the S region and the single crystal structure region may be configured. The mixed film is, for example, a single layer structure having two or more of the following: an amorphous structure region, a microcrystalline structure region, a polycrystalline structure region, a CAAC-OS region, and a single crystal structure region. There are cases. In addition, the mixed film may include, for example, an amorphous structure region, a microcrystalline structure region, a polycrystalline structure region, a CAAC-
It may have a stacked structure of two or more types of regions, including an OS region and a single crystal structure region.

Here, a second metal oxide film 252a is provided between the first metal oxide film 251a and the insulating film 119. Therefore, even if a carrier trap is formed between the second metal oxide film 252a and the insulating film 119 due to impurities and defects, the region where the carrier trap is formed and the first metal oxide film 251a are There is a gap between them. As a result,
Electrons flowing through the first metal oxide film 251a are less likely to be captured by carrier traps, making it possible to increase the on-current of the transistor 22b and to improve field-effect mobility. Furthermore, when electrons are captured by carrier traps, they become negative fixed charges. As a result, the threshold voltage of the transistor fluctuates. However, since there is a gap between the first metal oxide film 251a and the region where the carrier traps are formed, it is possible to suppress the capture of electrons in the carrier traps, thereby reducing fluctuations in the threshold voltage. can do.

Further, since the second metal oxide film 252a can shield impurities from the outside, it is possible to reduce the amount of impurities that migrate from the outside to the first metal oxide film 251a. Furthermore, the second metal oxide film 252a is less likely to form oxygen vacancies. Because of these,
It is possible to reduce the impurity concentration and the amount of oxygen vacancies in the first metal oxide film 251a.

Note that the first metal oxide films 251a, 251b and the second metal oxide films 252a, 25
2b is fabricated so that a continuous junction (in this case, in particular, a structure in which the energy at the lower end of the conduction band changes continuously between each film) is formed instead of simply stacking each film. That is, at the interface between each film, the first metal oxide films 251a and 251b are made so that there are no defect levels such as trap centers or recombination centers, or impurities that would form a barrier that inhibits the flow of carriers. It has a laminated structure. If the stacked first metal oxide films 251a, 2
If impurities are mixed between 51b and the second metal oxide films 252a and 252b, the continuity of the energy band will be lost, and carriers will be trapped or recombined at the interface.
It will disappear.

In order to form a continuous bond, it is necessary to use a multi-chamber type film forming apparatus (sputtering apparatus) equipped with a load lock chamber to successively stack each film without exposing them to the atmosphere. Each chamber in the sputtering device is evacuated to a high vacuum (5×10 ⁻⁷ Pa to 1 ×10 ⁻⁴ Pa) is preferable. Alternatively, it is preferable to use a combination of a turbomolecular pump and a cold trap to prevent gas, particularly gas containing carbon or hydrogen, from flowing back into the chamber from the exhaust system.

Furthermore, as shown in FIG. 11B, the transistor 22c may include a multilayer film 255a. Alternatively, the multilayer film 255b may be provided as a capacitor electrode.

The multilayer film 255a includes a third metal oxide film 253a, a first metal oxide film 251a, and a second metal oxide film 252a stacked in this order. Further, the third metal oxide film 253a
is in contact with the insulating film 106, the second metal oxide film 252a is in contact with the insulating film 119, and the first metal oxide film 251a functions as a channel region.

The multilayer film 255b includes a third metal oxide film 253b, a first metal oxide film 251b, and a second metal oxide film 252b stacked in this order. Further, the third metal oxide film 253b
is in contact with the insulating film 106, and the second metal oxide film 252b is in contact with the insulating film 119.

The third metal oxide films 253a and 153b can be formed using the same material and formation method as the second metal oxide films 252a and 252b, as appropriate.

It is preferable that the third metal oxide films 253a, 153b have a smaller thickness than the first metal oxide films 251a, 251b. By setting the thickness of the third metal oxide films 253a and 153b to 1 nm or more and 5 nm or less, preferably 1 nm or more and 3 nm or less, it is possible to reduce the amount of fluctuation in the threshold voltage of the transistor.

In the transistor shown in this embodiment, a third metal oxide film 253a is provided between the insulating film 106 and the first metal oxide film 251a. In addition, the first metal oxide film 251
A second metal oxide film 252a is provided between a and the insulating film 119. Therefore, between the insulating film 106 and the first metal oxide film 251a, and between the first metal oxide film 251a,
Even if a carrier trap is formed between 1a and the insulating film 119 due to impurities and defects, there is a gap between the region where the carrier trap is formed and the first metal oxide film 251a. As a result, electrons flowing through the first metal oxide film 251a are less likely to be captured by carrier traps, making it possible to increase the on-current of the transistor 22c and to improve field effect mobility. Furthermore, when electrons are captured by carrier traps, they become negative fixed charges. As a result, the threshold voltage of the transistor fluctuates. However, since there is a gap between the first metal oxide film 251a and the region where the carrier trap is formed, it is possible to reduce the capture of electrons in the carrier trap, and the threshold voltage of the transistor 22c can be reduced. Fluctuations can be reduced.

Note that the structure, method, etc. shown in this embodiment can be used in appropriate combination with the structures, methods, etc. shown in other embodiments.

(Embodiment 5)
This embodiment mode describes a method for manufacturing a transistor and a capacitor with large on-current, high field-effect mobility, and little variation in electrical characteristics while reducing the number of photomasks.
This will be explained using FIGS. 14 and 15. Note that although this embodiment mode will be described using the transistor and its manufacturing method described in Embodiment Mode 2, this embodiment mode can be applied to other embodiments as appropriate. Furthermore, explanations of configurations that overlap with those of the second embodiment will be omitted.

FIG. 14 is a top view of the pixel 13, and FIG. 15(A) is a top view of the pixel 13, and FIG.
FIG. 15B is a sectional view taken along the dashed line EF in FIG. 14.

The transistor 22d is provided in a region where the scanning line and the signal line intersect. The transistor 22d includes a conductive film 103 functioning as a gate electrode, a gate insulating film (not shown in FIG. 15), a metal oxide film 109a in which a channel region is formed on the gate insulating film,
Conductive films 114 and 115 functioning as source and drain electrodes, metal oxide film 109
a, an insulating film (not shown in FIG. 15) that covers the conductive films 114 and 115, and a conductive film 243 that functions as a gate electrode. The transistor 22d is characterized in that the conductive film 103 functioning as a gate electrode and the conductive film 243 are connected in the opening 241.

Next, the cross-sectional structure of the transistor 22d will be explained using FIG. 15. Figure 15 (A
) is a cross-sectional view of the transistor 22d in the channel length direction, and FIG. 15(B) is a cross-sectional view of the transistor 22d in the channel direction.

The transistor 22d shown in FIGS. 15A and 15B is a channel-etched transistor, and includes a conductive film 103 provided on the substrate 101 that functions as a gate electrode, and an insulating film in contact with the substrate 101 and the conductive film 103. 105 and an insulating film 106 in contact with the insulating film 105
A metal oxide film 109a overlaps with the conductive film 103 via insulating films 105 and 106, and conductive films 114 and 115 are in contact with the metal oxide film 109a. Further, an insulating film 119 in contact with the insulating film 105, the insulating film 106, the metal oxide film 109a, and the conductive films 114 and 115, an insulating film 121 in contact with the insulating film 119, and a conductive film functioning as a gate electrode in contact with the insulating film 121. It has a film 243. The insulating film 105 and the insulating film 106 function as gate insulating films. Further, the insulating film 119 and the insulating film 121 function as a gate insulating film.

As shown in FIG. 15B, the conductive film 103 and the conductive film 243 are connected at openings 241 provided in the insulating film 105, the insulating film 106, the insulating film 119, and the insulating film 121. Further, in the channel width direction of the transistor, the end of the conductive film 243 is located outside the end of the metal oxide film 109a. Further, the side surface of the metal oxide film 109a faces the conductive film 243 with the insulating film 119 and the insulating film 121 interposed therebetween. Further, the conductive film 243 has an opening 241
, facing the side surface of the metal oxide film 109a.

The conductive film 243 can be formed using the same material and manufacturing method as the conductive film 123 and the conductive film 124. Further, the opening 241 can be formed at the same time as the opening 152 is formed. As a result, the transistor 22d can be manufactured using five photomasks without increasing the number of photomasks.

In FIG. 15B, in the channel width direction of the transistor, the metal oxide film 109
The side surface a faces a conductive film 243 functioning as a gate electrode. Therefore, the conductive film 103
The electric field of the conductive film 243 affects not only the plane but also the side surfaces of the metal oxide film 109a. As a result, the region in which carriers flow in the metal oxide film 109a is not only the interface between the insulating film 106 and the metal oxide film 109a, and the interface between the metal oxide film 109a and the insulating film 119, but also the region where carriers flow in the metal oxide film 109a. Since the range is wide, including the inside of the transistor, the amount of carrier movement in the transistor increases. As a result, the on-state current of the transistor increases and the field effect mobility increases, typically 10 cm ² /V·s or more, and further 20 cm ² /V·s or more. Note that the L length of the transistor is 0.5 μm or more and 6.5 μm
Hereinafter, the field effect mobility increases significantly by preferably setting the thickness to be greater than 1 μm and less than 6 μm.

Further, at the end of the metal oxide film 109a processed by etching or the like, defects are formed due to damage during processing, and contamination occurs due to adhesion of impurities. For this reason,
When only one of the conductive film 103 and the conductive film 243, which function as a gate electrode in a transistor, is formed, even if the metal oxide film 109a is intrinsic or substantially intrinsic, metal oxidation occurs due to stress such as an electric field. The end of the material film 109a is activated and n
It tends to become a type region (low resistance region). Further, the n-type region is the conductive film 114, 115
If the n-type region is provided linearly between the two, the n-type region becomes a carrier path, and a parasitic channel is formed. As a result, the rise in drain current at the threshold voltage is gradual;
In addition, the transistor becomes a transistor whose threshold voltage is shifted to a negative value. However, as shown in FIG. 15B, since the conductive film 103 and the conductive film 243 are at the same potential, and the conductive film 243 faces the side surface of the metal oxide film 109a in the channel width direction, The electric field of the conductive film 243 also affects the side surfaces of the metal oxide film 109a. As a result, metal oxide film 1
The generation of parasitic channels on the side surface of 09a or the end portion including the side surface and the vicinity thereof is suppressed. As a result, a transistor with excellent electrical characteristics is obtained in which the drain current rises steeply at the threshold voltage.

Further, by having the conductive film 103 and the conductive film 243, each has a function of shielding an electric field from the outside, so that fixed charges provided between the substrate 101 and the conductive film 243 and on the conductive film 243 are It does not affect the film 109a. As a result, stress tests (for example, applying a negative potential to the gate electrode - GBT (Gate Bias-Temperature)
(ure) stress test) is suppressed, and variation in the rise voltage of the on-current at different drain voltages can be suppressed.

Note that the BT stress test is a type of accelerated test, and can evaluate changes in transistor characteristics (ie, changes over time) caused by long-term use in a short time. In particular, the amount of variation in the threshold voltage of a transistor before and after the BT stress test is an important index for examining reliability. It can be said that the smaller the amount of variation in the threshold voltage before and after the BT stress test, the more reliable the transistor is.

Further, in FIG. 15B, an opening is provided on one side surface of the metal oxide film 109a in the channel width direction, and the conductive film 103 and the conductive film 243 are electrically connected in the opening. However, an opening may also be provided on the other side, and the conductive film 103 and the conductive film 243 may be electrically connected through the opening. As a result, an increase in the resistance value of the conductive film 243 can be prevented, and the electric field of the conductive film 243 can be applied to the metal oxide film 109a from both sides of the metal oxide film 109a, thereby turning on the transistor. Along with increasing the current, field effect mobility can be increased.

Note that the structure, method, etc. shown in this embodiment can be used in appropriate combination with the structures, methods, etc. shown in other embodiments.

(Embodiment 6)
A driver circuit can be manufactured using the transistor and capacitor described in Embodiments 1 to 5.

Further, the transistor 22d shown in Embodiment 4 has a large on-current and high mobility. Therefore, by using the transistor 22d in a circuit that requires a large current to flow, such as a buffer, the channel length and channel width can be reduced, and the area of the transistor can be reduced. It is. As a result, the area of the drive circuit is reduced. 2. Description of the Related Art In a semiconductor device, typically a display device, having a drive circuit in its peripheral portion, by reducing the area of the drive circuit, the area of a pixel portion in the display device can be increased. That is, it is possible to make the frame of the display device narrower.

Note that the structure, method, etc. shown in this embodiment can be used in appropriate combination with the structures, methods, etc. shown in other embodiments.

(Embodiment 7)
In this embodiment, a display module to which a semiconductor device of one embodiment of the present invention is applied is described.
This will be explained using FIG. 16.

The display module 8000 shown in FIG. 16 includes, between an upper cover 8001 and a lower cover 8002, a touch panel 8004 connected to an FPC 8003, a display panel 8006 connected to an FPC 8005, a backlight unit 8007, a frame 8009, a printed circuit board 8010, It has a battery 8011. Note that the backlight unit 8007, battery 8011, touch panel 8004, and the like may not be provided.

The semiconductor device of one embodiment of the present invention can be used for the display panel 8006, for example.

The shape and dimensions of the upper cover 8001 and the lower cover 8002 can be changed as appropriate according to the sizes of the touch panel 8004 and the display panel 8006.

As the touch panel 8004, a resistive film type or capacitive type touch panel can be used by superimposing it on the display panel 8006. Further, it is also possible to provide the counter substrate (sealing substrate) of the display panel 8006 with a touch panel function. Alternatively, it is also possible to provide an optical sensor in each pixel of the display panel 8006 to form an optical touch panel.
Alternatively, a touch sensor electrode can be provided in each pixel of the display panel 8006 to provide a capacitive touch panel.

Backlight unit 8007 has a light source 8008. The light source 8008 may be provided at the end of the backlight unit 8007, and a light diffusing plate may be used.

The frame 8009 has a function of protecting the display panel 8006 and also functions as an electromagnetic shield for blocking electromagnetic waves generated by the operation of the printed circuit board 8010. Further, the frame 8009 may have a function as a heat sink.

The printed circuit board 8010 includes a power supply circuit and a signal processing circuit for outputting a video signal and a clock signal. The power supply for supplying power to the power supply circuit may be an external commercial power supply or may be a power supply from a separately provided battery 8011. battery 801
1 can be omitted if a commercial power source is used.

Further, the display module 8000 may be additionally provided with members such as a polarizing plate, a retardation plate, and a prism sheet.

The structure shown in this embodiment can be used in combination with the structures shown in other embodiments as appropriate.

(Embodiment 8)
In this embodiment, as an example of a semiconductor device, an electronic device in which the semiconductor device described in the above embodiment can be mounted will be described.

Examples of electronic devices include television devices (also referred to as televisions or television receivers), computer monitors, digital cameras, digital video cameras, digital photo frames, and mobile phones (also referred to as mobile phones and mobile phone devices). , portable game console,
Examples include mobile information terminals, audio playback devices, and large game machines such as pachinko machines. Specific examples of these electronic devices are shown in FIG.

FIG. 12(A) shows an example of a television device. A television device 7100 has a display portion 7103 built into a housing 7101. The display portion 7103 can display images, and the display device described in the above embodiment can be used for the display portion 7103. Further, here, a configuration in which the housing 7101 is supported by a stand 7105 is shown.

The television device 7100 can be operated using an operation switch included in the housing 7101 or a separate remote controller 7110. The operation keys 7109 provided on the remote controller 7110 can be used to control the channel and volume, and the display section 71
You can operate the video displayed on 03. Further, the remote controller 7110 may be provided with a display section 7107 that displays information output from the remote controller.

Note that the television device 7100 is configured to include a receiver, a modem, and the like. The receiver can receive general television broadcasts, and can be connected to a wired or wireless communication network via a modem, allowing one-way (sender to receiver) or two-way (sender to receiver) It is also possible to communicate information between recipients or between recipients.

FIG. 12B shows a computer, which includes a main body 7201, a housing 7202, a display portion 7203,
It includes a keyboard 7204, an external connection port 7205, a pointing device 7206, and the like. Note that the display device described in the above embodiment can be used for the display portion 7203 of the computer.

FIG. 12C shows a portable gaming machine, which is composed of two housings, a housing 7301 and a housing 7302, which are connected by a connecting portion 7303 so as to be openable and closable. A display portion 7304 is built into the casing 7301, and a display portion 7305 is built into the casing 7302. Also,
In addition, the portable gaming machine shown in FIG. 12(C) includes a speaker section 7306, a recording medium insertion section 73
07, LED lamp 7308, input means (operation key 7309, connection terminal 7310, sensor 7311 (force, displacement, position, speed, acceleration, angular velocity, number of rotations, distance, light, liquid, magnetism, temperature, chemical substance, voice, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, slope,
(including functions to measure vibration, odor, or infrared rays), a microphone 7312), etc. Of course, the configuration of the portable gaming machine is not limited to that described above, and the display device described in the above embodiment mode may be used for at least both or one of the display portions 7304 and 7305, and other accessory equipment may be used. It is possible to have a configuration in which the following is provided as appropriate. Figure 1
The portable gaming machine shown in 2(C) has the function of reading out programs or data recorded on a recording medium and displaying them on the display, and the function of sharing information by wirelessly communicating with other portable gaming machines. has. Note that the functions that the portable gaming machine shown in FIG. 12(C) has are not limited to these, and can have various functions.

FIG. 12(D) shows an example of a mobile phone. The mobile phone 7400 has a housing 740
In addition to the display section 7402 built into 1, there are operation buttons 7403, external connection ports 7404,
It is equipped with a speaker 7405, a microphone 7406, and the like. Note that the mobile phone 7400 is manufactured by using the display device described in the above embodiment mode for the display portion 7402.

In the mobile phone 7400 shown in FIG. 12(D), by touching the display portion 7402 with a finger or the like,
Information can be entered. Further, operations such as making a call or composing an email can be performed by touching the display portion 7402 with a finger or the like.

The screen of the display section 7402 mainly has three modes. The first is a display mode that mainly displays images, and the second is an input mode that mainly inputs information such as characters. The third mode is a display+input mode, which is a mixture of two modes: a display mode and an input mode.

For example, when making a phone call or composing an email, the display unit 7402 may be set to a character input mode that mainly inputs characters, and the user may input the characters displayed on the screen. In this case, it is preferable to display a keyboard or number buttons on most of the screen of the display section 7402.

Furthermore, by providing a detection device having a sensor for detecting inclination such as a gyro or an acceleration sensor inside the mobile phone 7400, the orientation of the mobile phone 7400 (vertical or horizontal) can be determined.
The screen display on the display section 7402 can be automatically switched.

Further, switching of the screen mode is performed by touching the display portion 7402 or operating the operation button 7403 on the housing 7401. Further, it is also possible to switch depending on the type of image displayed on the display section 7402. For example, if the image signal to be displayed on the display section is video data, the mode is switched to display mode, and if it is text data, the mode is switched to input mode.

In addition, in the input mode, a signal detected by the optical sensor of the display section 7402 is detected, and if there is no input by touch operation on the display section 7402 for a certain period of time, the screen mode is switched from the input mode to the display mode. May be controlled.

The display portion 7402 can also function as an image sensor. For example, display section 7
By touching 402 with the palm or fingers and capturing an image of a palm print, fingerprint, etc., the person can be authenticated.
Furthermore, if a backlight that emits near-infrared light or a sensing light source that emits near-infrared light is used in the display section, it is also possible to image finger veins, palm veins, and the like.

FIG. 12(E) shows an example of a foldable computer. The foldable computer 7450 includes a housing 7451L and a housing 7451R connected by a hinge 7454. In addition, the operation button 7453, the left speaker 7455L, and the right speaker 7
455R, there is an external connection port 745 not shown on the side of the computer 7450.
6. Note that when the hinge 7454 is folded so that the display portion 7452L provided in the case 7451L and the display portion 7452R provided in the case 7451R face each other, the display portion can be protected by the case.

In addition to displaying images, the display portions 7452L and 7452R can input information by touching them with a finger or the like. For example, you can touch and select an icon representing an installed program to launch the program. Alternatively, the image can be enlarged or reduced by changing the distance between two fingers touching the displayed image. Alternatively, the displayed image can be moved by touching one part of the image with a finger. You can also input information by displaying an image of the keyboard and touching the displayed characters and symbols with your finger to select them.

In addition, the computer 7450 is equipped with a gyro, an acceleration sensor, a GPS (Global P
It can also be equipped with a receiver (positioning system), a fingerprint sensor, and a video camera. For example, by providing a detection device having a sensor that detects inclination such as a gyro or an acceleration sensor, the orientation of the computer 7450 (vertical or horizontal) can be determined and the orientation of the displayed screen can be automatically switched. be able to.

Additionally, computer 7450 can be connected to a network. The computer 7450 can display information on the Internet and can also be used as a terminal for remotely operating other electronic devices connected to the network.

Note that the structure, method, etc. shown in this embodiment can be used in appropriate combination with the structures, methods, etc. shown in other embodiments.

In this example, the lateral diffusion length of a conductive region in a metal oxide film was investigated.

First, the structure of the sample will be explained.

FIG. 18(A) shows a top view of the sample, and FIG. 1 shows a cross-sectional view corresponding to AB in FIG.
8(B).

The sample includes a substrate 301, an insulating film 303 on the substrate 301, a metal oxide film 305 on the insulating film 303, a pair of conductive films 307 and 308 in contact with a part of the metal oxide film 305, and a metal oxide film 305. an insulating film 309 in contact with a portion of each of the film 305 and the pair of conductive films 307 and 308;
It has an insulating film 311 in contact with an insulating film 303, a metal oxide film 305, a pair of conductive films 307 and 308, and an insulating film 309. Note that the insulating film 309 has openings 310a and 310b. Furthermore, the insulating film 311 is in contact with the metal oxide film 305 at the openings 310a and 310b.

Here, a glass substrate was used as the substrate 301.

Further, as the insulating film 303, a first silicon nitride film with a thickness of 50 nm and a first silicon nitride film with a thickness of 300 nm are used.
A laminated film was used in which a second silicon nitride film, a third silicon nitride film with a thickness of 50 nm, and a silicon oxynitride film with a thickness of 50 nm were laminated in this order.

Further, as the metal oxide film 305, an In--Ga--Zn oxide film with a thickness of 35 nm was used. Note that the In-Ga-Zn oxide film is In-Ga-Zn with In:Ga:Zn=1:1:1.
It was formed by a sputtering method using an n-oxide target.

Further, as a pair of conductive films 307 and 308, a first titanium film with a thickness of 50 nm and a first titanium film with a thickness of 4 nm are used.
A laminated film in which a 00 nm thick aluminum film and a 100 nm thick second titanium film were laminated in this order was used.

Further, as the insulating film 309, a silicon oxynitride film with a thickness of 450 nm was used.

Further, as the insulating film 311, a silicon nitride film with a thickness of 100 nm was used.

The metal oxide film 305 is connected to the insulating film 3 at the openings 310a and 310b of the insulating film 309.
It touches 11. Therefore, the metal oxide film 305 has a region 305a in contact with the insulating film 309 and regions 305b and 305c in contact with the insulating film 311. Note that since the insulating film 311 is formed of a silicon nitride film, the regions 305b and 305c have higher conductivity than the region 305a.

Hydrogen contained in the insulating film 311 diffuses laterally in the metal oxide film 305. The region where hydrogen has diffused becomes highly conductive. Therefore, the width of the insulating film 309, that is, the opening 310a
, 310b becomes narrower, the conductivity also increases in the region 305a,
Even if it is in contact with the insulating film 309, it no longer functions as a channel region of the transistor.

Therefore, samples were prepared in which the width of the insulating film 309, that is, the distance d between the openings 310a and 310b, was varied. Next, a voltage was applied so that the potential difference between the pair of conductive films 307 and 308 was 0.99 V, and the resistance value of the entire metal oxide film 305 was measured.

Table 1 and FIG. 19 show the distance d between the openings 310a and 310b and the resistance value of the metal oxide film 305. In addition, two samples were produced as comparative examples. Comparative Example 1 is a sample in which the insulating film 309 does not have openings 310a and 310b, that is, the entire metal oxide film 305 is in contact with the insulating film 309 formed of a silicon oxynitride film. Comparative Example 2 is a sample that does not have an insulating film 309, that is, a sample in which the entire metal oxide film 305 is in contact with an insulating film 311 formed of a silicon nitride film.

Table 1 and FIG. 19 show that when the distance d between the openings 310a and 310b exceeds 3 μm, the resistance value of the metal oxide film 305 increases. The diffusion length in the lateral direction is estimated to be about 1.5 to 2 um per side.

Therefore, when forming the channel region of the transistor and the electrode of the capacitive element in one metal oxide film, the distance between the channel region of the transistor and the electrode of the capacitive element is set to be larger than 1.5 μm, and even larger than 2 μm. By making the thickness large, particularly 3 μm or more, a transistor having excellent switching characteristics and a highly conductive electrode of a capacitive element can be formed using one metal oxide film.

Claims (1)

forming a gate electrode and a gate insulating film on the insulating surface;
forming a first metal oxide film and a first conductive film on the gate insulating film;
a first mask having, on the first conductive film, a region having a first thickness and a region having a second thickness thicker than the first thickness; and a first mask having a thickness equal to the first thickness. forming a second mask having a
Using the first mask and the second mask, the first conductive film and the first metal oxide film are etched, respectively, to form a second conductive film, a third conductive film, and a third conductive film. forming a second metal oxide film and a third metal oxide film;
The first mask is processed to form a third mask, and after removing the second mask, the second conductive film is etched using the third mask to form the second conductive film. forming a fourth conductive film and a fifth conductive film functioning as a source electrode and a drain electrode on the metal oxide film, and removing the third conductive film;
forming a first insulating film on the second metal oxide film, the fourth conductive film, and the fifth conductive film;
forming a second insulating film on the first insulating film and the third metal oxide film;
After etching a portion of the first insulating film and the second insulating film to form openings in the first insulating film and the second insulating film, the openings are in contact with the fifth conductive film. A method for manufacturing a semiconductor device, comprising: forming a sixth conductive film functioning as a pixel electrode; and a seventh conductive film functioning as a capacitor line in contact with the third metal oxide film.

Images