JP2019121172A5 - - Google Patents
Download PDFInfo
- Publication number
- JP2019121172A5 JP2019121172A5 JP2018000452A JP2018000452A JP2019121172A5 JP 2019121172 A5 JP2019121172 A5 JP 2019121172A5 JP 2018000452 A JP2018000452 A JP 2018000452A JP 2018000452 A JP2018000452 A JP 2018000452A JP 2019121172 A5 JP2019121172 A5 JP 2019121172A5
- Authority
- JP
- Japan
- Prior art keywords
- bit position
- result
- circuit
- bits
- imaginary
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Priority Applications (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2018000452A JP6863907B2 (ja) | 2018-01-05 | 2018-01-05 | 演算回路 |
| PCT/JP2018/046496 WO2019135355A1 (ja) | 2018-01-05 | 2018-12-18 | 演算回路 |
| US16/959,986 US11494165B2 (en) | 2018-01-05 | 2018-12-18 | Arithmetic circuit for performing product-sum arithmetic |
| CN201880085295.3A CN111630509B (zh) | 2018-01-05 | 2018-12-18 | 执行积和运算的运算电路 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2018000452A JP6863907B2 (ja) | 2018-01-05 | 2018-01-05 | 演算回路 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2019121172A JP2019121172A (ja) | 2019-07-22 |
| JP2019121172A5 true JP2019121172A5 (https=) | 2021-02-04 |
| JP6863907B2 JP6863907B2 (ja) | 2021-04-21 |
Family
ID=67143671
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2018000452A Active JP6863907B2 (ja) | 2018-01-05 | 2018-01-05 | 演算回路 |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US11494165B2 (https=) |
| JP (1) | JP6863907B2 (https=) |
| CN (1) | CN111630509B (https=) |
| WO (1) | WO2019135355A1 (https=) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP6995629B2 (ja) * | 2018-01-05 | 2022-01-14 | 日本電信電話株式会社 | 演算回路 |
| CN116010762B (zh) * | 2021-10-22 | 2026-03-13 | 意法半导体(格勒诺布尔2)公司 | 包括硬件计算器的集成电路和相应的计算方法 |
| CN117335810A (zh) * | 2022-06-23 | 2024-01-02 | 加特兰微电子科技(上海)有限公司 | 数据压缩、解压缩方法及装置 |
Family Cites Families (19)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2630778B2 (ja) * | 1987-07-17 | 1997-07-16 | 三洋電機株式会社 | 低周波帯域デジタルフィルタの構成方法 |
| EP1728865A1 (en) * | 1998-09-04 | 2006-12-06 | Aventis Pasteur Limited | Treatment of cervical cancer |
| JP2000132539A (ja) * | 1998-10-28 | 2000-05-12 | Matsushita Electric Ind Co Ltd | 演算装置 |
| WO2000062421A1 (en) * | 1999-04-14 | 2000-10-19 | Nokia Networks Oy | Digital filter and method for performing a multiplication based on a look-up table |
| JP3875183B2 (ja) * | 2002-11-20 | 2007-01-31 | シャープ株式会社 | 演算装置 |
| US7043515B2 (en) * | 2002-12-10 | 2006-05-09 | Isic Corporation | Methods and apparatus for modular reduction circuits |
| US20050201457A1 (en) * | 2004-03-10 | 2005-09-15 | Allred Daniel J. | Distributed arithmetic adaptive filter and method |
| JP4724413B2 (ja) * | 2004-11-26 | 2011-07-13 | キヤノン株式会社 | データ分類方法 |
| EP1975906B1 (en) * | 2006-01-13 | 2012-07-04 | Fujitsu Ltd. | Montgomery s algorithm multiplication remainder calculator |
| GB2448744A (en) * | 2007-04-26 | 2008-10-29 | Wolfson Microelectronics Plc | Look-up table indexing scheme with null values used to expand table to have a power of two number of entries in each cycle of coefficients |
| CN101682297B (zh) * | 2007-06-04 | 2012-06-27 | Nxp股份有限公司 | 包含频带选择的数字信号处理电路和方法 |
| JP2011186592A (ja) * | 2010-03-05 | 2011-09-22 | Renesas Electronics Corp | フィルタ演算器、フィルタ演算方法及び動き補償処理装置 |
| KR20120077164A (ko) * | 2010-12-30 | 2012-07-10 | 삼성전자주식회사 | Simd 구조를 사용하는 복소수 연산을 위한 사용하는 장치 및 방법 |
| JP5920226B2 (ja) * | 2011-02-15 | 2016-05-18 | 日本電気株式会社 | 複素演算処理用コプロセッサ及びプロセッサシステム |
| ES2396673B2 (es) * | 2012-08-09 | 2014-01-24 | Universidade De Santiago De Compostela | Aparato y método para calcular operaciones de potenciación y extracción de raíces |
| US9753695B2 (en) * | 2012-09-04 | 2017-09-05 | Analog Devices Global | Datapath circuit for digital signal processors |
| US10019230B2 (en) * | 2014-07-02 | 2018-07-10 | Via Alliance Semiconductor Co., Ltd | Calculation control indicator cache |
| US10303735B2 (en) * | 2015-11-18 | 2019-05-28 | Intel Corporation | Systems, apparatuses, and methods for K nearest neighbor search |
| JP6995629B2 (ja) * | 2018-01-05 | 2022-01-14 | 日本電信電話株式会社 | 演算回路 |
-
2018
- 2018-01-05 JP JP2018000452A patent/JP6863907B2/ja active Active
- 2018-12-18 WO PCT/JP2018/046496 patent/WO2019135355A1/ja not_active Ceased
- 2018-12-18 US US16/959,986 patent/US11494165B2/en active Active
- 2018-12-18 CN CN201880085295.3A patent/CN111630509B/zh active Active
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP2019121172A5 (https=) | ||
| JP5226062B2 (ja) | プログラム可能な巡回冗長度検査(crc)計算のための命令セット・アーキテクチャ | |
| JP2017121053A5 (ja) | 回路 | |
| JP2018512607A5 (https=) | ||
| MY164432A (en) | Data processing apparatus having bit field manipulation instruction and method | |
| WO2016206563A1 (zh) | 一种dpd系统 | |
| JP2015164061A5 (https=) | ||
| WO2018193906A1 (ja) | 情報処理方法、情報処理装置およびプログラム | |
| JP2016529745A5 (ja) | 端末装置、通信方法、および集積回路 | |
| JP2017529591A5 (https=) | ||
| CN113439440A (zh) | 图像分量预测方法、编码器、解码器以及存储介质 | |
| JP2006268483A5 (https=) | ||
| WO2022088876A1 (zh) | 通信数据的处理方法、装置、设备及存储介质 | |
| ATE504897T1 (de) | Disparitätskarte | |
| JPWO2021181731A5 (https=) | ||
| JP2019521550A5 (https=) | ||
| CN116097680A8 (zh) | 一种应用迁移的方法和装置 | |
| CN106664101A (zh) | 自适应速率压缩散列处理装置 | |
| JP2018156718A5 (https=) | ||
| AR019995A1 (es) | Metodo de filtrado digital y filtro digital | |
| JP2008136193A5 (https=) | ||
| CN105656603A (zh) | 一种基于树修剪的scma译码方法及系统 | |
| JP1714883S (ja) | アイコン用画像 | |
| RU2006100297A (ru) | Генерация смещения адреса в системах обработки данных | |
| JP2018515812A5 (https=) |