JP2019033143A - Manufacturing method of semiconductor device - Google Patents

Abstract

To improve mobility of a semiconductor device employing a thin film transistor using an oxide semiconductor material, to increase an ON current, and to manufacture the semiconductor device at low cost and with high yield so as to facilitate potential control, and to provide stable characteristics.SOLUTION: A manufacturing method of a semiconductor device is disclosed. The semiconductor device comprises a gate electrode, a source electrode and a drain electrode. A gate insulation film and an oxide semiconductor channel layer are included between the gate electrode and the source electrode and between the gate electrode and the drain electrode, and the gate insulation film is present between the gate electrode and the oxide semiconductor channel layer. The oxide semiconductor channel layer includes: a first oxide layer which contains at least zinc and does not contain indium; and a second oxide layer which contains at least indium. The manufacturing method is implemented on conditions that, when an oxygen addition ratio in depositing the first oxide layer is defined as (a) and an oxygen addition ratio in depositing the second oxide layer is defined as (b), (a) is greater than 1.1b and smaller than 1.6b.SELECTED DRAWING: Figure 4A

Description

  The present invention relates to a semiconductor device, and particularly relates to an oxide semiconductor device and an oxide semiconductor thin film transistor.

  In a liquid crystal display using a thin film transistor as a pixel switch, a liquid crystal display using amorphous silicon (amorphous silicon) as a channel layer of the thin film transistor (TFT) is mainly used. However, if the display becomes high definition such as 4K and 8K, the pixel size is inevitably reduced, and naturally, the thin film transistor is also reduced. This means that the current value per unit area is increased. In the channel layer employing amorphous silicon, the on-characteristics (mobility and on-current) are insufficient and it is difficult to cope with it.

  On the other hand, low-temperature polysilicon (LTPS) with excellent on-state characteristics can cope with sufficiently high definition, but since a high-cost process such as laser annealing is used, it is difficult to produce a large screen, and high-resolution that supports high definition. There is a need for semiconductor materials that achieve on-state characteristics and large area manufacturing. Therefore, in recent years, an oxide semiconductor material has attracted attention as a thin film semiconductor material covering this region. In recent years, practical application studies have also been conducted as thin film transistors for organic EL (electroluminescence) backplanes that are self-luminous devices and require large current drive.

  Unlike amorphous silicon, which is deposited by chemical vapor deposition (CVD), oxide semiconductors can be deposited by sputtering, so they have excellent film uniformity, and demands for larger displays and higher definition. It can correspond to. In addition, oxide semiconductors have better on-characteristics than amorphous silicon, are advantageous for high brightness, high contrast, and high-speed driving, and also have low leakage current when turned off, and can be expected to reduce power consumption (power saving). . Furthermore, since the sputtering method can form a film uniformly over a large area and can form a film at a lower temperature than the chemical vapor deposition method, a material having low heat resistance is selected as a material constituting the thin film transistor. There is also an advantage of being able to.

  As an oxide semiconductor suitable for a channel layer of a display TFT, for example, indium gallium zinc composite oxide (hereinafter referred to as “IGZO”) is known, and a semiconductor device using IGZO is also known ( For example, see Patent Document 1).

  Since IGZO has poor resistance to an electrode processing process and poor resistance to a protective film formation process, it is difficult to manufacture at low cost because an etch stop layer needs to be formed. On the other hand, oxide semiconductor materials having high resistance to electrode processing processes such as indium tin zinc composite oxide (hereinafter referred to as ITZO) and zinc tin composite oxide (hereinafter referred to as ZTO) have been proposed (for example, Patent Documents 2 and 3). In particular, ZTO is a promising oxide semiconductor material from the viewpoint of cost and sustainability because it does not use rare metals or elements with high industrial utilization.

On the other hand, these oxide semiconductor materials also generally have a mobility of about 6 to 10 cm ² / Vs practically, which is insufficient for the future high-definition display. In order to respond, 20 cm ² / Vs or more, preferably about 25 cm ² / Vs is desired. However, the threshold potential is likely to cause depletion only by increasing the carrier density of the oxide semiconductor material. The resistance to the protective film process is likely to become more sensitive, and it is becoming difficult to cope with it only with material technology.

In order to overcome this situation, a structure in which an oxide semiconductor channel layer is multilayered with different material systems, for example, an oxide containing zinc oxide without containing indium oxide on the side in contact with the source / drain (SD) electrode. the semiconductor layer (such as ZTO), laminated oxide TFT structure having an oxide semiconductor layer containing indium oxide as the gate insulating film side (indium tin composite oxide (hereinafter referred to as "ITO"), etc.) is also proposed, 50 cm ² / High mobility of about Vs is realized (see Patent Document 4).

JP 2006-165532 A Japanese Patent Application Laid-Open No. 2008-243928 JP2012-033699A Japanese Patent No. 5503667

  In the above prior art, as the first oxide layer on the side in contact with the source / drain electrodes, an oxide semiconductor layer (such as ZTO) that does not contain indium oxide and contains zinc oxide, and the second oxide on the gate insulating film side When a liquid crystal display is manufactured using a stacked thin film transistor that employs an oxide semiconductor layer (ITO or the like) containing indium oxide as a channel layer, the following problems exist.

  In order to effectively operate the oxide semiconductor layer as a thin film transistor, an activation process such as an annealing process is required. At that time, a first oxide semiconductor layer (such as ZTO) that does not contain indium oxide but contains zinc oxide and a second oxide semiconductor layer that contains indium oxide (hereinafter referred to as indium zinc composite oxide (hereinafter referred to as “IZO”). ), ITO, etc.), depending on the added oxygen conditions during film formation, the current-voltage characteristics may show a Hump shape, or may be greatly depleted, resulting in characteristics unsuitable for practical use as thin film transistors.

  FIG. 1 is a diagram illustrating an example of the characteristics of a thin film transistor. The horizontal axis represents a gate voltage (V), the vertical axis represents a drain current (A), and the drain voltage is graphed in three types of 0.1 V, 1 V, and 10 V. It is a thing. FIG. 1 (a) shows the case where the ratio of oxygen addition during ZTO / IZO film formation of the ZTO / IZO multilayer TFT is 40% / 20%, respectively, and the thin film transistor becomes conductive and does not function. FIG. 1B shows the case where the oxygen addition ratios of the ZTO / IZO multilayer TFTs during ZTO / IZO film formation are 40% / 40%, respectively, and a Hump is formed.

  The cause of this is not clearly understood, but oxygen atoms move between layers due to an imbalance between the oxygen composition in the first oxide semiconductor layer and the oxygen composition in the second oxide semiconductor layer. This is considered to be because a conductive layer due to oxygen deficiency is formed on one of the oxide semiconductor layers near the interface. Therefore, it is observed as a depletion in which conduction starts even under a Hump shape or a negative bias where the threshold potential (Vth) is two steps. Such characteristics are not suitable as pixel switches for high-definition displays or drivers for OLED displays. Therefore, a device structure and manufacturing method of a high mobility thin film transistor that can be stably operated by appropriately controlling the threshold potential to> 0V is desired.

  Note that this problem is that the first oxide layer includes an oxide semiconductor layer that does not include indium oxide such as ZTO but includes zinc oxide, and the second oxide layer includes relatively high conductivity that includes indium oxide such as IZO, ITO, and IGZO. This is a problem peculiar to a thin film transistor having a stacked channel such as a conductive oxide semiconductor layer.

  The present invention has been made in view of the above-mentioned problems found by the inventors, and an object thereof is to provide an oxide semiconductor device that achieves both high mobility and low-cost process of an oxide TFT. And

  One aspect of the present invention includes a gate electrode, a source electrode, and a drain electrode, and a gate insulating film and an oxide semiconductor channel layer are provided between the gate electrode and the source electrode and between the gate electrode and the drain electrode. A gate insulating film between the gate electrode and the oxide semiconductor channel layer, wherein the oxide semiconductor channel layer contains at least zinc and does not contain indium A method for manufacturing a semiconductor device comprising a layer and a second oxide layer containing at least indium. In this manufacturing method, when the oxygen addition ratio when forming the first oxide layer is a and the oxygen addition ratio when forming the second oxide layer is b, a is from 1.1b It must be large and smaller than 1.6b.

  According to the present invention, high mobility and high on-state current of a semiconductor device using a thin film transistor using an oxide semiconductor material can be realized, and low-cost, high-yield manufacturing with easy threshold potential control. Stable characteristics are provided.

FIG. 5 is a graph illustrating the influence of the oxygen addition ratio during ZTO / IZO film formation on TFT characteristics in a ZTO / IZO multilayer TFT. The graph which shows the characteristic of ZTO / IZO laminated TFT anticipated in the Example. Process sectional drawing explaining the manufacturing process of the bottom gate top contact type thin-film transistor by the Example of this invention. Process sectional drawing explaining the manufacturing process of the bottom gate top contact type thin-film transistor by the Example of this invention. The top surface schematic diagram which shows the structure of a display pixel electrode periphery, and the structure of TFT by the Example of this invention. FIG. 3 is a graph illustrating the relationship between TFT characteristics (current-voltage characteristics, mobility) and oxygen addition ratio during IZO film formation when a ZTO / IZO multilayer structure TFT shown in Example 1 is prototyped. The table | surface which put together about the TFT characteristic which investigated the oxygen addition ratio at the time of IZO film-forming in the range of 20-40% when the oxygen addition ratio at the time of ZTO film-forming by Example 1 of this invention was 40%. FIG. 6 is a graph for explaining the relationship between TFT characteristics (current-voltage characteristics, mobility) and oxygen addition ratio during ZTO film formation when a ZTO / IZO multilayer structure TFT shown in Example 2 is prototyped. The table which put together about the TFT characteristic which investigated the oxygen addition ratio at the time of ZTO film-forming in the range of 8-50% when the oxygen addition ratio at the time of IZO film-forming by Example 2 of this invention was set to 30%. FIG. 6 is a graph for explaining the relationship between TFT characteristics and the oxygen addition rate during ZTO film formation when a ZTO / ITO laminated structure TFT shown in Example 3 is prototyped. Regarding TFT manufacturing of ZTO / ITO laminated TFT according to Example 3 of the present invention, TFT characteristics obtained by investigating the oxygen addition ratio during ZTO film formation in the range of 25 to 53% when the oxygen addition ratio during ITO film formation is 33% Summary table. FIG. 9 is a graph illustrating the relationship between TFT characteristics and the oxygen addition ratio during IGZO film formation when a ZTO / IGZO multilayer structure TFT shown in Example 3 is manufactured as a prototype. Regarding the ZTO / IGZO multilayer TFT manufacturing according to Example 3 of the present invention, TFT characteristics obtained by investigating the oxygen addition ratio during ZTO film formation in the range of 25 to 40% when the oxygen addition ratio during IGZO film formation is 25% Summary table.

  Embodiments will be described in detail with reference to the drawings. However, the present invention is not construed as being limited to the description and numerical values of the embodiments described below. Those skilled in the art will readily understand that the specific configuration can be changed without departing from the spirit or the spirit of the present invention.

  In the present specification and the like, notations such as “first”, “second”, “third”, and the like are attached to identify the components, and do not necessarily limit the number or order.

  The position, size, range, and the like of each component illustrated in the drawings and the like may not represent the actual position, size, range, or the like for easy understanding. For this reason, the present invention is not necessarily limited to the position, size, range, and the like disclosed in the drawings and the like.

  An example of a configuration described in the following example is a stacked structure of a first oxide layer in which a channel layer includes at least zinc oxide and does not include indium oxide, and a second oxide layer that includes at least indium oxide. In the oxide semiconductor film forming step to be formed, an oxygen addition ratio and a combination thereof suitable for forming the first oxide layer and the second oxide layer are provided. Accordingly, deterioration of characteristics of the thin film transistor caused by oxygen transfer between layers during the subsequent channel layer activation treatment step can be prevented, and a high mobility transistor in which the threshold potential is controlled to an appropriate state can be realized.

  FIG. 2 is a diagram showing an example of characteristics of an ideal thin film transistor expected by the above configuration, where the horizontal axis is the gate voltage (V), the vertical axis is the drain current (A), and the drain voltages are 0.1V and 1V. , 10V, graphed.

  As a specific example, the oxygen addition ratio at the time of forming the oxide semiconductor layer containing the first zinc and not containing a is a, and the oxygen addition ratio at the time of forming the oxide semiconductor layer containing the second In is b. In some cases, an oxide semiconductor stacked structure is formed in which a> b, a is larger than 1.1b, smaller than 1.6b, and satisfies a <50% and b> 20%. With the above film formation conditions, it is possible to realize a thin film transistor that prevents oxygen migration between oxide semiconductor stacked channel layers due to post-annealing annealing treatment and achieves both high mobility and good switching characteristics.

  Hereinafter, an example of the oxide thin film transistor of this embodiment will be described. In the channel layer of this example, the first oxide semiconductor layer is ZTO (film thickness 30 nm), and the second oxide layer is IZO (film thickness 5 nm).

  3A and 3B are cross-sectional views showing an example of a process for manufacturing the oxide thin film transistor of this example.

  An electrode layer 1 serving as a gate electrode, for example, a Mo layer or a MoW layer (film thickness: 100 nm) is formed on the substrate 10 by a DC magnetron sputtering method or the like. Thereafter, a photoresist pattern is formed, and gate electrode processing is performed using this as a mask (FIG. 3A (a)).

The gate insulating film layer 2 is formed by PE-CVD or the like so as to cover the electrode layer 1 processed into the formed gate electrode pattern. Here, SiO _x (film thickness 100 nm) is formed (FIG. 3A (b)). Thereafter, oxide layers 3 and 4 to be channel layers are continuously formed by a DC magnetron sputtering method (FIG. 3A (c)).

First, the IZO layer (film thickness 5 nm) which is the second oxide layer 3 uses a target material having a zinc composition of 10 at%, film formation conditions, room temperature, film formation pressure 0.5 Pa, sputtering gas Ar / O ₂ mixture The film was formed with a gas (oxygen addition ratio of 10 to 50%) and a DC power of 50W. Here, the oxygen addition ratio is defined by the flow rate ratio of Ar / O ₂ . Practically, it can be considered as a ratio of gas flow rate. In other words, the oxygen addition ratio of 10 to 50% indicates the ratio of the flow rate of oxygen when the flow rates of Ar and O ₂ are 100% (the same applies hereinafter).

Further, the ZTO layer (film thickness 50 nm) which is the first oxide layer 4 uses a target material (addition of 350 ppm Al) with a tin composition of 30 at%, film formation conditions, room temperature, film formation pressure 0.5 Pa, sputtering gas. A film was formed using an Ar / O ₂ mixed gas (oxygen addition ratio: 40%). In addition, the ZTO layer may be formed as an oxide containing a zinc-tin composite oxide as a main component in addition to the case where it is formed from a zinc-tin composite oxide. That is, various other elements may be added in order to improve or adjust the characteristics of the zinc-tin composite oxide.

  Thereafter, a channel pattern is formed by the photoresist layer 5 (FIG. 3A (c)), and the oxide channel region is processed using this as a mask. For the processing, for example, an etching solution generally used for ITO processing such as an oxalic acid-based etching solution is used. With the oxide film thickness, the oxide layers 3 and 4 can be sufficiently removed even if the in-plane distribution is taken into account in a processing time of about 3 minutes (FIG. 3A (d)).

The processed oxide layer is subjected to an activation annealing treatment for 1 hour under the condition of a temperature of 200 ° C. under irradiation of UV light of about 25 mW / cm ² by a mercury lamp having a central wavelength of 254 nm. Thereafter, for example, a Mo / Al / Mo layer, Mo, or Mo alloy layer to be the source / drain electrode layer 6 is formed by magnetron DC sputtering or vapor deposition (FIG. 3B (e)). The source / drain electrode layer 6 is further processed into an SD electrode pattern with a PAN-based etching solution using the source / drain electrode pattern formed by the photoresist layer 7 as a mask (FIG. 3B (f)), and then SiN for surface protection. A protective film 8 such as _{x 2} / SiO _{x is} formed by a PE-CVD method or the like to complete the thin film transistor of this example (FIG. 3B (g)).

  According to the inventor's consideration, in the above process, there is a possibility that oxygen deficiency occurs in the oxide stacked channel due to the activation annealing and the TFT characteristics are deteriorated. This problem can be solved by adopting the film forming conditions (1) and (4).

  FIG. 3C is a schematic view of the completed TFT as viewed from above. A gate line 21 and a data line 22 are arranged on the pixel electrode (transparent electrode) 23 via the TFT 20. This TFT is often used for pixel electrode control of a display or the like. FIG. 3C shows an outline of the positional relationship between the gate line 21, the data line 22, and the pixel electrode 23 in that case. In the case of a display, this is continuously formed in an array. In addition, a partially enlarged plan view of the TFT 20 corresponding to the cross section of FIG. 3B (g) is also shown.

  In this example, when ZTO is used for the first oxide layer 4 and the oxygen addition ratio during film formation is 40%, the oxygen addition ratio during film formation of IZO as the second oxide layer 3 is The current-voltage characteristics of this multilayer TFT were investigated when changing in the range of 20% to 40%.

The results are shown in FIGS. 4A and 4B. FIG. 4A shows the results of current-voltage characteristics and mobility under typical film formation conditions. The oxygen addition rate at the time of ZTO film formation is 40%, and the oxygen addition rate at the time of IZO film formation is changed from (a) 20%, (b) 25%, (c) 30%, (d) 40% from the top. I let you. The horizontal axis represents the gate voltage (V), the vertical axis represents the drain current (A) and the mobility (cm ² / Vs), and the drain voltage is graphed in three types of 0.1 V, 1 V, and 10 V (hereinafter referred to as “V”). The same applies to other current-voltage characteristics graphs.

It can be understood that the current-voltage characteristics are not turned off at the oxygen addition ratio of 20% during the IZO film formation, which is not suitable as a TFT. When the oxygen addition ratio during the IZO film formation is increased to 25%, the OFF operation is performed, but a Hump is observed in the current-voltage characteristics, and it can be seen that a leak path other than the channel layer is formed. Further, when the ratio of oxygen addition during IZO film formation is increased to 30%, no Hump is observed, good current-voltage characteristics are exhibited, the threshold potential V _th is controlled to 1 V or more, and the mobility μ _FE is also 32. The above values are good. However, when the amount of oxygen added during the IZO film formation is 40% or more, the current-voltage characteristic in which Hump is seen is shown. As described above, it can be understood that there is an appropriate value for the oxygen addition ratio during the IZO film formation.

  FIG. 4B further shows the results of investigating the relationship between the oxygen addition rate during TFT formation and TFT characteristics in detail. From this result, when the oxygen addition ratio during the IZO film formation is 26 to 36%, the threshold voltage becomes positive and no hump is observed. Therefore, from this data, when the oxygen addition ratio during film formation of the first oxide layer (ZTO) is a and the oxygen addition ratio during film formation of the second oxide layer (IZO) is b, at least a = It can be understood that an appropriate condition is satisfied in the range of 1.11 to 1.54b.

  In this example, by appropriately controlling the respective oxygen addition ratios when forming the first and second oxide layers of the channel layer, oxygen transfer between layers is prevented, and high mobility and> 0V are achieved. It is possible to enable good threshold potential control. In addition, since it can be realized without increasing the number of masks in the process, it is possible to achieve both low cost processes and high mobility.

  It should be noted that the channel layer and electrode layer thicknesses, film formation methods, processing (etching) methods, and the like shown in this embodiment can be variously changed according to the characteristics required for the device to be manufactured. . In this embodiment, the DC magnetron sputtering method is used as a typical film forming method. However, various film forming methods such as conventional RF, DC sputtering, RF magnetron sputtering, ECR sputtering, ion plating, and reactive vapor deposition are used. The same effect can be expected.

  Next, the oxide TFT structure is the same as that of Example 1 and the manufacturing process is almost the same, and the oxygen addition ratio of ZTO as the first oxide layer is set to 8% to 50%. The TFT characteristics when the oxygen addition ratio during film formation of IZO as the second oxide layer is 30% will be described.

  FIG. 5A shows current-voltage characteristics and mobility under typical film forming conditions. The oxygen addition rate during IZO film formation is 30%, and the oxygen addition rate during ZTO film formation varies from (a) 8%, (b) 33%, (c) 40%, and (d) 45% from the top. I let you.

It can be seen that when the oxygen addition ratio during the ZTO film formation is 8%, the TFT characteristics are not turned off and are in a conductive state, which is not suitable as a TFT. Next, when the oxygen addition ratio during ZTO film formation is 33%, the OFF state can be secured, and it can be seen that the current-voltage characteristics are good, but the threshold potential is -5.4V and depletion is observed. The characteristics are insufficient to be applied to a display. Furthermore, when the oxygen addition ratio during ZTO film formation is 40%, the threshold potential is also controlled to> 0 V, the mobility is secured> 30 cm ² / Vs, and no hump is observed, which is a good characteristic.

  FIG. 5B summarizes the results of detailed evaluation of oxygen addition ratio and TFT characteristics during ZTO film formation. From this result, the threshold voltage becomes positive when the oxygen addition ratio during the ZTO film formation is 34 to 45%, and no Hump is observed. Therefore, from this data, when the oxygen addition ratio during film formation of the first oxide layer (ZTO) is a and the oxygen addition ratio during film formation of the second oxide layer (IZO) is b, at least a = It can be understood that an appropriate condition is satisfied in the range of 1.13 to 1.50b.

  From the above results, it was confirmed that the film formation was consistent with the oxygen addition conditions during film formation that achieved both high mobility and threshold potential control as described in Example 1. From the data of FIGS. 4B and 5B, it can be understood that an inappropriate condition as a transistor is not included in a range where a is larger than 1.1b and smaller than 1.6b.

  Further, from the results of Examples 1 and 2, the critical value of the oxygen addition ratio suitable for this example is 20% or more with respect to the oxygen addition ratio b during IZO film formation (below it cannot be turned off and is not suitable as a TFT), ZTO It is considered that the oxygen addition ratio a during film formation is 50% or less (above that the effective sputtering rate is lowered and is not suitable as a manufacturing technique).

  As in Example 1, the channel layer and electrode layer thickness, film formation method, processing (etching) method, etc. shown in this example can be variously changed according to the required device characteristics. is there.

Next, as in Examples 1 and 2, ZTO (tin composition 33 at%, Al 250 ppm, Si 100 ppm added) was used for the first oxide layer, ITO, IGZO (4: The characteristics of the TFT configured in 1: 1) will be described. For the film formation of the second oxide layer, ITO and IGZO, using target materials having a tin composition of 10 at% and an indium composition of 67 at%, respectively, film formation conditions, room temperature, film formation pressure 0.5 Pa, sputtering gas Ar / The film was formed with an O ₂ mixed gas (oxygen addition ratio of 20% to 40% during film formation) and a DC power of 50W. Other steps are almost the same as those in the first embodiment.

Typical current-voltage characteristics of the thin film transistor formed by the above process are shown in FIGS. 6A and 7A. Each mobility 62.1cm ² /Vs,28.1cm ² / Vs and, the threshold potential> good transistor characteristics are controlled to 0V is obtained. Detailed data on other film forming conditions are summarized in FIGS. 6B and 7B.

  FIG. 6A is a graph for explaining the relationship between TFT characteristics (current-voltage characteristics, mobility) and the oxygen addition ratio during ZTO film formation when a prototype of a ZTO / ITO multilayer TFT is fabricated under the above conditions.

  FIG. 6B summarizes TFT characteristics for the ZTO / ITO laminated TFT manufacturing, in which the oxygen addition ratio during the ITO film formation was 33%, and the oxygen addition ratio during the ZTO film formation was investigated in the range of 25 to 53%. FIG.

  From this result, the threshold voltage becomes positive when the oxygen addition ratio during the ZTO film formation is 40 to 45%, and no Hump is observed. Therefore, from this data, when the oxygen addition ratio during film formation of the first oxide layer (ZTO) is a and the oxygen addition ratio during film formation of the second oxide layer (ITO) is b, at least a = It can be seen that the range of 1.21-1.36b is appropriate.

  FIG. 7A is a graph illustrating the relationship between TFT characteristics (current-voltage characteristics, mobility) and oxygen addition ratio during IGZO film formation when a ZTO / IGZO multilayer structure TFT is fabricated under the above conditions.

  FIG. 7B is a table summarizing TFT characteristics obtained by investigating the oxygen addition ratio during ZTO film formation in the range of 25 to 40% when the oxygen addition ratio during IGZO film formation is 25% for ZTO / IGZO multilayer TFT manufacturing. FIG.

  From this result, when the oxygen addition ratio during ZTO film formation is 30 to 35%, the threshold voltage becomes positive, and Hump is not seen. Therefore, from this data, when the oxygen addition ratio during film formation of the first oxide layer (ZTO) is a and the oxygen addition ratio during film formation of the second oxide layer (IGZO) is b, at least a = It can be seen that a range of 1.20 to 1.40b is appropriate.

  From the data of FIGS. 6B and 7B, it can be understood that an inappropriate condition as a transistor is not included in a range where a is larger than 1.1b and smaller than 1.6b.

  When the results of Examples 1 to 3 are combined, the oxygen addition ratio during film formation of the first oxide layer (ZTO) is a, and oxygen during film formation of the second oxide layer (IZO, ITO, IGZO). When the addition ratio is b, it can be understood that an inappropriate condition is not included as a device manufacturing condition within a range where a is larger than 1.1b and smaller than 1.6b. If the range is further limited from the above data, when the second oxide layer is IZO, appropriate conditions are included in the range of approximately a = 1.11 to 1.54b. In the case where the layer is ITO or IGZO, it is indicated that appropriate conditions are included in the range of approximately a = 1.20 to 1.40b.

  As with Examples 1 and 2, the channel layer and electrode layer thicknesses, film forming methods, processing (etching) methods, etc. shown in Example 3 can be variously changed according to the required device characteristics. Is possible.

  As a result of this film formation process, when compared with the same parameters, the first oxide layer (ZTO) has a predetermined amount of oxygen taken in more than the second oxide layer (IZO, ITO, IGZO). As a result, it is speculated that the above TFT characteristics are obtained by balancing the oxygen composition in the first oxide semiconductor layer and the oxygen composition in the second oxide semiconductor layer in the operation of the device. The That is, due to the balance between the oxygen composition in the first oxide semiconductor layer and the oxygen composition in the second oxide semiconductor layer, the movement of oxygen atoms between layers is suppressed, and one of the oxides in the vicinity of the interface is suppressed. This is probably because the formation of a conductive layer due to oxygen deficiency on the semiconductor layer side is suppressed. For this reason, it is presumed that there is no depletion in which conduction begins even under a Hump shape or a negative bias where the threshold potential (Vth) is two-stage.

  The present invention is not limited to the embodiments described above, and includes various modifications. For example, part of the configuration of one embodiment can be replaced with the configuration of another embodiment without departing from the spirit of the invention, and the configuration of another embodiment can be added to the configuration of one embodiment. It is possible. Moreover, it is possible to add / delete / replace other configurations for a part of the configurations of the embodiments.

  The present invention can be applied to the field of manufacturing semiconductor devices.

DESCRIPTION OF SYMBOLS 1 ... Gate electrode 2 ... Gate insulating film 3 ... 2nd oxide semiconductor layer (Indium oxide is included)
4 ... 1st oxide semiconductor layer (zinc oxide is included, indium oxide is not included)
5 ... Photoresist layer (channel pattern)
6 ... Source / drain electrode layer 7 ... Photoresist layer (source / drain electrode pattern)
8 ... Protective film 10 ... Substrate 20 ... TFT
21 ... Gate line 22 ... Data line 23 ... Pixel electrode (transparent electrode)

Claims (9)

A semiconductor device comprising a gate electrode, a source electrode, and a drain electrode,
Between the gate electrode and the source electrode, and between the gate electrode and the drain electrode, a gate insulating film and an oxide semiconductor channel layer,
The gate insulating film is present between the gate electrode and the oxide semiconductor channel layer;
In the method of manufacturing a semiconductor device, the oxide semiconductor channel layer includes a first oxide layer containing at least zinc and not containing indium, and a second oxide layer containing at least indium.
When the oxygen addition ratio when forming the first oxide layer is a and the oxygen addition ratio when forming the second oxide layer is b, a is larger than 1.1b, 1 A method of manufacturing a semiconductor device on condition that it is smaller than 6b. The oxygen addition ratio at the time of forming the first oxide layer is a <0.5.
A method for manufacturing a semiconductor device according to claim 1. The oxygen addition ratio during film formation of the second oxide layer is b> 0.2.
A method for manufacturing a semiconductor device according to claim 1. The first oxide layer is a zinc-tin composite oxide (ZTO) or an oxide containing a zinc-tin composite oxide as a main component.
A method for manufacturing a semiconductor device according to claim 1. The second oxide layer is indium zinc composite oxide (IZO).
A method for manufacturing a semiconductor device according to claim 1. When the oxygen addition ratio when forming the first oxide layer is a and the oxygen addition ratio when forming the second oxide layer is b, a = 1.11b to 1.54b. Is,
A method for manufacturing a semiconductor device according to claim 5. The second oxide layer is at least one selected from indium tin composite oxide (ITO) and indium gallium zinc composite oxide (IGZO).
A method for manufacturing a semiconductor device according to claim 1. When the oxygen addition ratio when forming the first oxide layer is a and the oxygen addition ratio when forming the second oxide layer is b, a = 1.20b to 1.40b. Is,
A method for manufacturing a semiconductor device according to claim 7. The first oxide layer is disposed closer to the source electrode and the drain electrode than the second oxide layer,
The second oxide layer is disposed closer to the gate insulating film than the first oxide layer.
A method for manufacturing a semiconductor device according to claim 1.

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