JP2019016797A - Wiring film for flat panel display, and aluminum alloy sputtering target - Google Patents

Wiring film for flat panel display, and aluminum alloy sputtering target Download PDF

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JP2019016797A
JP2019016797A JP2018155844A JP2018155844A JP2019016797A JP 2019016797 A JP2019016797 A JP 2019016797A JP 2018155844 A JP2018155844 A JP 2018155844A JP 2018155844 A JP2018155844 A JP 2018155844A JP 2019016797 A JP2019016797 A JP 2019016797A
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wiring film
wiring
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alloy
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後藤 裕史
Yasushi Goto
裕史 後藤
裕美 岩成
Yumi Iwanari
裕美 岩成
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Kobe Steel Ltd
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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0201Thermal arrangements, e.g. for cooling, heating or preventing overheating
    • H05K1/0203Cooling of mounted components
    • H05K1/0207Cooling of mounted components using internal conductor planes parallel to the surface for thermal conduction, e.g. power planes
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    • C22METALLURGY; FERROUS OR NON-FERROUS ALLOYS; TREATMENT OF ALLOYS OR NON-FERROUS METALS
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    • C22C21/00Alloys based on aluminium
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    • C23C14/00Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/06Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
    • C23C14/14Metallic material, boron or silicon
    • C23C14/16Metallic material, boron or silicon on metallic substrates or on substrates of boron or silicon
    • C23C14/165Metallic material, boron or silicon on metallic substrates or on substrates of boron or silicon by cathodic sputtering
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    • C23C14/00Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
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    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
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    • C23C14/00Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/22Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
    • C23C14/34Sputtering
    • C23C14/3407Cathode assembly for sputtering apparatus, e.g. Target
    • C23C14/3414Metallurgical or chemical aspects of target preparation, e.g. casting, powder metallurgy
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    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/22Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
    • C23C14/34Sputtering
    • C23C14/35Sputtering by application of a magnetic field, e.g. magnetron sputtering
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    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
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    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/58After-treatment
    • C23C14/5873Removal of material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01BCABLES; CONDUCTORS; INSULATORS; SELECTION OF MATERIALS FOR THEIR CONDUCTIVE, INSULATING OR DIELECTRIC PROPERTIES
    • H01B1/00Conductors or conductive bodies characterised by the conductive materials; Selection of materials as conductors
    • H01B1/02Conductors or conductive bodies characterised by the conductive materials; Selection of materials as conductors mainly consisting of metals or alloys
    • H01B1/023Alloys based on aluminium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204Conductive materials
    • H01L23/53209Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53214Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being aluminium
    • H01L23/53219Aluminium alloys
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

To provide: a wiring film for a flat panel display, which is arranged to be able to suppress the rise in wiring resistance even if going through a heat hysteresis at a high temperature of 400°C or higher and 500°C or lower, which does not cause a hillock and the like, and which is superior in heat resistance; and a sputtering target to be used for forming the wiring film.SOLUTION: A wiring film for a flat panel display according to the present invention is one to be formed on a substrate. The wiring film comprises a laminate structure in which first and second layers are laminated. The first layer includes at least one high-melting point metal selected from a group consisting of Mo, Ti, Cr, W and Ta; the second layer is made of an Al alloy including a rare earth element and Ni, whose contents are each 0.01 atom% or more; and the total content of the rare earth element and Ni is 0.055 atom% or less.SELECTED DRAWING: Figure 8

Description

本発明は、フラットパネルディスプレイ用配線膜、および当該配線膜の形成に用いられるAl合金スパッタリングターゲットに関する。   The present invention relates to a wiring film for a flat panel display and an Al alloy sputtering target used for forming the wiring film.

液晶ディスプレイ、有機ELディスプレイ、タッチパネルなどのフラットパネルディスプレイの電極材料に用いられる配線膜には、電気抵抗率の低いAl薄膜が使用されている。しかし、Alは融点が低くて耐熱性が小さい。更にAlは、大気中で酸化されて不動態皮膜を容易に形成する。そのため、Al薄膜が半導体層または透明画素電極と直接接続しても、その界面に生成されるAl酸化物の絶縁層によって接触抵抗が上昇して画面の表示品位が低下するという問題がある。   An Al thin film having a low electric resistivity is used as a wiring film used as an electrode material for flat panel displays such as liquid crystal displays, organic EL displays, and touch panels. However, Al has a low melting point and low heat resistance. Furthermore, Al is easily oxidized in the atmosphere to form a passive film. Therefore, even when the Al thin film is directly connected to the semiconductor layer or the transparent pixel electrode, there is a problem in that the contact resistance is increased by the Al oxide insulating layer formed at the interface, and the display quality of the screen is lowered.

これらの問題点については、これまで、以下の対策が講じられてきた。まず、耐熱性については、Alの表面に、Mo、Ti、Cr、W、およびTaなどの高融点金属からなるバリアメタル層を介在させて積層構造とする。機械強度の高いバリアメタル層を介在させることで、基板とAlの熱膨張係数差によって応力が集中して発生する、半球状突起物であるヒロックを押さえ込む。また、Al酸化物の形成を防ぎ、電気的な接続を可能にする目的のために、Al薄膜と、半導体層または透明画素電極との間に、上記バリアメタル層を介在させる。具体的には、Al薄膜の上および/または下に、上記バリアメタル層が形成された積層配線薄膜が使用されている。   The following measures have been taken for these problems. First, for heat resistance, a laminated structure is formed by interposing a barrier metal layer made of a refractory metal such as Mo, Ti, Cr, W, and Ta on the surface of Al. By interposing a barrier metal layer having high mechanical strength, hillocks, which are hemispherical projections, are generated, which are generated by stress concentration due to the difference in thermal expansion coefficient between the substrate and Al. In addition, for the purpose of preventing the formation of Al oxide and enabling electrical connection, the barrier metal layer is interposed between the Al thin film and the semiconductor layer or the transparent pixel electrode. Specifically, a laminated wiring thin film in which the barrier metal layer is formed on and / or below the Al thin film is used.

一方、フラットパネルディスプレイの高精細化や低消費電力化の要求に伴い、スイッチングマトリクスとして用いられる薄膜トランジスタ(TFT:Thin Film Transistor)に使用される材料も検討されている。例えば従来のアモルファスシリコンから、より高性能化を目的として、低温ポリシリコン半導体などのポリシリコン半導体や酸化物半導体などが使われる。これらの半導体材料は、高いキャリア移動度を有し、光学バンドギャップが大きく、低温で成膜できるため、大型・高解像度・高速駆動が要求される次世代ディスプレイや、耐熱性の低い樹脂基板などへの適用が期待されている。   On the other hand, with the demand for higher definition and lower power consumption of flat panel displays, materials used for thin film transistors (TFTs) used as switching matrices are also being studied. For example, a polysilicon semiconductor such as a low-temperature polysilicon semiconductor or an oxide semiconductor is used from the conventional amorphous silicon for the purpose of higher performance. These semiconductor materials have high carrier mobility, a large optical band gap, and can be deposited at low temperatures, so next-generation displays that require large size, high resolution, and high-speed driving, resin substrates with low heat resistance, etc. Application to is expected.

低温ポリシリコン半導体は、非単結晶性のアモルファスシリコンや微結晶シリコンの半導体薄膜を用い、おおむね、400〜500℃程度の結晶化アニール、および不純物注入後の活性化アニールなどの加熱プロセスを経て作製される。具体的には、例えば、CVD法によって基板上に形成されたアモルファスシリコンや、粒径が約0.1μm以下と比較的小さな微結晶シリコンなどの半導体薄膜にレーザー光を照射する。該レーザー光を照射して半導体薄膜を局部的に加熱し、少なくとも部分的に溶融させた後、その冷却過程で半導体薄膜を約0.3μm以上の比較的粒径の大きな多結晶に結晶化する。このようなレーザー光照射による結晶化アニールにより、薄膜半導体装置の低温プロセス化が可能になり、耐熱性に優れた高価な石英基板だけでなく、安価なガラス基板を使用できるようになる。また、活性化アニールでは、ポリシリコン薄膜に注入した不純物とSiとの結合を促進させ、キャリア濃度を制御すると共に、イオン注入により破壊された結晶を回復させるための処理を兼ねる。   A low-temperature polysilicon semiconductor is produced by using a non-single crystalline amorphous silicon or microcrystalline silicon semiconductor thin film, generally through a heating process such as crystallization annealing at about 400 to 500 ° C. and activation annealing after impurity implantation. Is done. Specifically, for example, a semiconductor thin film such as amorphous silicon formed on a substrate by a CVD method or microcrystalline silicon having a relatively small particle size of about 0.1 μm or less is irradiated with laser light. After irradiating the laser beam to locally heat the semiconductor thin film and at least partially melt it, the semiconductor thin film is crystallized into a polycrystal having a relatively large grain size of about 0.3 μm or more in the cooling process. . Such crystallization annealing by laser light irradiation enables thin film semiconductor devices to be processed at a low temperature, so that not only an expensive quartz substrate having excellent heat resistance but also an inexpensive glass substrate can be used. In the activation annealing, the bonding between the impurity implanted into the polysilicon thin film and Si is promoted, the carrier concentration is controlled, and the treatment for recovering the crystal broken by the ion implantation is also performed.

このように低温ポリシリコンの作製に当たっては、結晶化アニールや活性化アニールのために400〜500℃程度の熱履歴に曝されることから、アモルファスシリコンに比べてプロセス温度が比較的高くなる。   Thus, in producing low temperature polysilicon, it is exposed to a thermal history of about 400 to 500 ° C. for crystallization annealing and activation annealing, so that the process temperature is relatively higher than that of amorphous silicon.

また、酸化物半導体においても、レーザーアニールや、350〜500℃程度の高温アニールを施して結晶性の膜質へと改善し、半導体の移動度やTFTのしきい値電圧などの性能を向上させている。   Also in oxide semiconductors, laser annealing and high-temperature annealing at about 350 to 500 ° C. are performed to improve the crystalline film quality, and the performance of semiconductor mobility and TFT threshold voltage is improved. Yes.

従来のアモルファスシリコンを用いたTFTは、TFTの製造工程中で加わる熱履歴は最大で350℃程度であったため、前述した、高融点金属とAl薄膜を積層した配線薄膜を、問題なく使用することができた。ところが、低温ポリシリコンや酸化物半導体のように400〜500℃程度の熱履歴に曝される半導体材料をTFTに適用すると、この高い熱履歴によって、AlとMoなどの高融点金属との間で相互拡散が生じ、配線抵抗が増加するなどの問題が生じる。或いは、高い熱履歴によって基板と配線薄膜の応力が大きくなり、高融点金属を突き破るほどAlの応力拡散が促進されて配線薄膜の表面にヒロックが生じる。また配線薄膜の側壁部分では、高融点金属に覆われていない部分でサイドヒロックが生じるなどの問題も生じる。このように、400℃以上の熱処理では、400℃未満の熱処理とは異なる挙動が生じるため、400℃以上の熱処理に対応した配線膜が必要となる。   Conventional TFTs using amorphous silicon had a maximum thermal history of about 350 ° C during the TFT manufacturing process, so the above-mentioned wiring thin film in which a refractory metal and an Al thin film are laminated should be used without problems. I was able to. However, when a semiconductor material that is exposed to a thermal history of about 400 to 500 ° C., such as low-temperature polysilicon or an oxide semiconductor, is applied to the TFT, the high thermal history causes a high melting point metal such as Al and Mo to be used. Interdiffusion occurs, causing problems such as increased wiring resistance. Alternatively, the stress of the substrate and the wiring thin film is increased by the high thermal history, and the stress diffusion of Al is promoted as it breaks through the refractory metal, thereby causing hillocks on the surface of the wiring thin film. Further, in the side wall portion of the wiring thin film, there arises a problem that side hillocks occur in a portion not covered with the refractory metal. As described above, the heat treatment at 400 ° C. or higher causes different behavior from the heat treatment at less than 400 ° C. Therefore, a wiring film corresponding to the heat treatment at 400 ° C. or higher is required.

そのため、低温ポリシリコンや酸化物半導体などをTFTの半導体層に適用するときは、アモルファスシリコンを用いたときのように高融点金属とAl薄膜との積層配線膜を用いるのではなく、高融点金属の単層配線薄膜が使用されてきた。しかし、高融点金属は電気抵抗率が高いという問題がある。   Therefore, when applying low-temperature polysilicon or oxide semiconductor to the semiconductor layer of TFT, instead of using a laminated wiring film of refractory metal and Al thin film as in the case of using amorphous silicon, refractory metal Single-layer wiring thin films have been used. However, refractory metals have a problem of high electrical resistivity.

発明者らは、これまでに、400℃までの耐熱性、すなわち、ヒロック発生の防止に優れた耐熱性配線材料として、特許文献1にNd、Gd、Dyの一種以上を合計で1.0原子%超、15原子%以下の範囲で含有するAl合金膜を開示している。   As a heat-resistant wiring material excellent in heat resistance up to 400 ° C., that is, prevention of generation of hillocks, the inventors have so far added one or more of Nd, Gd, and Dy to 1.0 atom in total in Patent Document 1. An Al alloy film containing more than 15% and 15 atomic% or less is disclosed.

特許第2733006号公報Japanese Patent No. 2733006

しかしながら特許文献1は、実質的にアモルファスシリコンを対象とした技術に関するものである。すなわち、特許文献1はTFT製造プロセス上不可避である電極膜形成後の250〜400℃程度の加熱工程における耐熱性および低比抵抗の実現を目指すものであって、それよりも高温での上記特性改善を図ったものではない。   However, Patent Document 1 relates to a technique that substantially targets amorphous silicon. That is, Patent Document 1 aims to realize heat resistance and low specific resistance in a heating process of about 250 to 400 ° C. after forming an electrode film, which is unavoidable in the TFT manufacturing process. It is not an improvement.

本発明は上記事情に着目してなされたものであって、その目的は、400℃以上500℃以下の高温の熱履歴を受けたとしても、配線抵抗の上昇が抑えられ、ヒロックなどの発生もなく耐熱性に優れたフラットパネルディスプレイ用配線膜、および当該配線膜の形成に用いられるスパッタリングターゲットを提供することにある。   The present invention has been made paying attention to the above circumstances, and its purpose is to suppress an increase in wiring resistance even if it receives a high temperature thermal history of 400 ° C. or more and 500 ° C. or less, and to generate hillocks or the like. Another object of the present invention is to provide a flat panel display wiring film having excellent heat resistance and a sputtering target used for forming the wiring film.

上記課題を解決し得たフラットパネルディスプレイ用配線膜は、基板上に形成されるフラットパネルディスプレイ用の配線膜であって、前記配線膜は、Mo、Ti、Cr、W、およびTaよりなる群から選択される少なくとも一種以上の高融点金属を含む第一層と;希土類元素、Ni、およびCoのうち少なくとも一種以上を0.01原子%以上、0.2原子%未満含むAl合金からなる第二層とが積層された積層構造からなるところに要旨を有する。   A wiring film for a flat panel display that has solved the above problems is a wiring film for a flat panel display formed on a substrate, and the wiring film is a group consisting of Mo, Ti, Cr, W, and Ta. A first layer containing at least one refractory metal selected from: an Al alloy containing 0.01 atomic% or more and less than 0.2 atomic% of at least one of rare earth elements, Ni, and Co; The gist of the invention is that it has a laminated structure in which two layers are laminated.

前記第一層と前記第二層との界面に、前記高融点金属の少なくとも1種とAlとを含む反応層を有するものであることも好ましい実施態様である。   It is also a preferred embodiment that a reaction layer containing at least one of the refractory metals and Al is present at the interface between the first layer and the second layer.

本発明の好ましい実施形態において、上記Al合金は、希土類元素を0.01原子%以上と、Ni、およびCoのうち少なくとも一種以上を0.01原子%以上と、を含むものである。   In a preferred embodiment of the present invention, the Al alloy contains 0.01 atom% or more of rare earth elements and 0.01 atom% or more of at least one of Ni and Co.

本発明の好ましい実施形態において、上記反応層は、400℃以上、500℃以下の熱履歴によって形成されるものである。   In a preferred embodiment of the present invention, the reaction layer is formed by a thermal history of 400 ° C. or higher and 500 ° C. or lower.

本発明の好ましい実施形態において、上記希土類元素は、Nd、La、Gd、Dy、Y、およびCeよりなる群から選択される少なくとも一種以上である。   In a preferred embodiment of the present invention, the rare earth element is at least one selected from the group consisting of Nd, La, Gd, Dy, Y, and Ce.

本発明の好ましい実施態様において、反応層は、AlとMoの化合物を含むものである。   In a preferred embodiment of the present invention, the reaction layer contains a compound of Al and Mo.

本発明の好ましい実施態様において、基板側から順に、前記第一層および前記第二層の積層構造の配線膜がこの順序で形成されているか、または、前記第二層および前記第一層の積層構造の配線膜がこの順序で形成されている。   In a preferred embodiment of the present invention, a wiring film having a laminated structure of the first layer and the second layer is formed in this order from the substrate side, or the laminated layer of the second layer and the first layer. A wiring film having a structure is formed in this order.

本発明の好ましい実施態様において、基板側から順に、前記第一層、前記第二層、および前記第一層の積層構造の配線膜がこの順序で形成されており、前記第一層と前記第二層との界面には、いずれも、前記反応層が形成されている。   In a preferred embodiment of the present invention, a wiring film having a laminated structure of the first layer, the second layer, and the first layer is formed in this order from the substrate side, and the first layer and the first layer In any case, the reaction layer is formed at the interface with the two layers.

また、上記課題を解決し得た本発明のスパッタリングターゲットは、上記フラットパネルディスプレイ用配線膜の形成に用いられるスパッタリングターゲットであって、上記スパッタリングターゲットは、希土類元素、Ni、およびCoのうち少なくとも一種以上を0.01原子%以上、0.2原子%未満であって、残部:Alおよび不可避不純物であるAl合金スパッタリングターゲットで構成されている。   Moreover, the sputtering target of the present invention that has solved the above problems is a sputtering target used for forming the wiring film for a flat panel display, and the sputtering target is at least one of rare earth elements, Ni, and Co. The above is comprised of 0.01 atomic% or more and less than 0.2 atomic%, with the balance being Al and an Al alloy sputtering target that is an inevitable impurity.

本発明の好ましい実施形態において、上記スパッタリングターゲットは、希土類元素を0.01原子%以上と、Ni、およびCoのうち少なくとも一種以上を0.01原子%以上と、を含むものである。   In a preferred embodiment of the present invention, the sputtering target contains 0.01 atom% or more of rare earth elements and 0.01 atom% or more of at least one of Ni and Co.

本発明によれば、400℃以上500℃以下の高温での熱履歴を受けても電気抵抗率の上昇が抑えられ、ヒロックの発生も認められず、低い配線抵抗と高い耐熱性を兼ね備えたフラットパネルディスプレイ用配線膜を提供できる。また本発明によれば当該配線膜の形成に用いられるスパッタリングターゲットを提供できる。   According to the present invention, even when subjected to a thermal history at a high temperature of 400 ° C. or higher and 500 ° C. or lower, an increase in electrical resistivity is suppressed, generation of hillocks is not observed, and a flat having low wiring resistance and high heat resistance. A wiring film for panel display can be provided. Moreover, according to this invention, the sputtering target used for formation of the said wiring film can be provided.

図1は、実施例No.1の断面の走査型電子顕微鏡写真である。FIG. It is a scanning electron micrograph of the cross section of 1. 図2は、実施例No.2の断面の走査型電子顕微鏡写真である。FIG. It is a scanning electron micrograph of the cross section of 2. 図3は、実施例No.3の断面の走査型電子顕微鏡写真である。FIG. 3 is a scanning electron micrograph of cross section 3. 図4は、実施例No.4の断面の走査型電子顕微鏡写真である。FIG. 4 is a scanning electron micrograph of section 4. 図5は、実施例No.1の断面の透過型電子顕微鏡写真である。FIG. 1 is a transmission electron micrograph of the cross section of FIG. 図6は、実施例No.2の断面の透過型電子顕微鏡写真である。FIG. It is a transmission electron micrograph of the cross section of 2. 図7は、実施例No.4の断面の透過型電子顕微鏡写真である。FIG. 4 is a transmission electron micrograph of section 4. 図8は、実施例の三層構造からなる種々の積層配線膜において、熱処理温度と各配線膜の電気抵抗率との関係を示すグラフである。FIG. 8 is a graph showing the relationship between the heat treatment temperature and the electrical resistivity of each wiring film in various laminated wiring films having the three-layer structure of the example. 図9は、実施例No.5の断面の透過型電子顕微鏡写真である。FIG. 5 is a transmission electron micrograph of the cross section of FIG. 図10は、実施例No.5の断面の走査型透過電子顕微鏡写真である。FIG. 5 is a scanning transmission electron micrograph of section 5. 図11は、実施例No.6の断面の透過型電子顕微鏡写真である。FIG. 6 is a transmission electron micrograph of section 6. 図12は、実施例No.6の断面の走査型透過電子顕微鏡写真である。FIG. 6 is a scanning transmission electron micrograph of the cross section of FIG. 図13は、実施例No.5の第二層の平面の透過型電子顕微鏡写真である。FIG. 5 is a transmission electron micrograph of the plane of the second layer of No. 5; 図14は、実施例No.5の第二層の平面の走査型透過電子顕微鏡写真である。FIG. 5 is a scanning transmission electron micrograph of the plane of the second layer of No. 5; 図15は、実施例No.6の第二層の平面の透過型電子顕微鏡写真である。FIG. 6 is a transmission electron micrograph of the plane of the second layer of FIG. 図16は、実施例No.6の第二層の平面の走査型透過電子顕微鏡写真である。FIG. 6 is a scanning transmission electron micrograph of the plane of the second layer of FIG.

本発明者らは、400℃以上500℃以下の高温の熱履歴を受けたとしても、配線抵抗の上昇が抑えられ、ヒロックなどの発生もなく耐熱性に優れたフラットパネルディスプレイ用配線膜を提供するため、検討を重ねてきた。その結果、Moなどの高融点金属層とAl配線の積層構造からなる配線膜において、Al配線材料として、Nd、La、Gd、Dy、Y、Ceなどの希土類元素(以下、「REM」(rare earth metal)と言うことがある)、Ni、Coのうち少なくとも一種以上の合金元素を従来よりも極く低量で含むAl合金を用いればよいことを見出した。すなわち、該合金元素添加による耐熱性向上作用を有効に発揮させつつ、しかも、Alと高融点金属の相互拡散を防止するバリア層として機能する反応層がその界面に形成され、拡散経路となる粒界密度が低くなるために配線抵抗の上昇が抑えられることを見出し、本発明を完成した。   The present inventors provide a wiring film for a flat panel display, which is excellent in heat resistance without generation of hillocks and the like, in which an increase in wiring resistance is suppressed even when a high temperature thermal history of 400 ° C. or more and 500 ° C. or less is received. In order to do so, it has been studied repeatedly. As a result, in a wiring film comprising a laminated structure of a refractory metal layer such as Mo and Al wiring, rare earth elements such as Nd, La, Gd, Dy, Y, and Ce (hereinafter “REM” (rare) are used as the Al wiring material. It has been found that an Al alloy containing at least one alloy element of Ni and Co in an extremely lower amount than in the past may be used. That is, a reaction layer functioning as a barrier layer for preventing the mutual diffusion of Al and a refractory metal is formed at the interface while effectively exerting the heat resistance improving effect by addition of the alloy element, and becomes a diffusion path. The inventors have found that the increase in wiring resistance can be suppressed because the field density is low, and the present invention has been completed.

本発明に到達した経緯は以下のとおりである。まず、Moなどの高融点金属とAl配線との相互拡散については、Al配線を構成する組織が微細で粒界密度が高い程、上記の相互拡散が促進され、配線抵抗の上昇率が大きいことが分かった。組織が最も粗大で、粒界密度が低いものは純Alであるが、純Alは耐熱性に劣っている。そのため高融点金属を積層した状態で、400℃以上の熱履歴を受けると後記する実施例でも示すようにサイドヒロックが生じる。サイドヒロックが生じると、上層のゲート絶縁膜や保護膜を突き破るため、電流リークが生じ、TFT素子の特性が劣化するなどの問題が生じる。   The background to the present invention is as follows. First, regarding interdiffusion between refractory metals such as Mo and Al wiring, the finer the structure of the Al wiring and the higher the grain boundary density, the more the above-mentioned interdiffusion is promoted and the rate of increase in wiring resistance is larger. I understood. The one with the coarsest structure and the low grain boundary density is pure Al, but pure Al is inferior in heat resistance. For this reason, when a heat history of 400 ° C. or higher is received in a state where the refractory metal is laminated, side hillocks are generated as shown in examples described later. When the side hillock occurs, the upper gate insulating film and the protective film are pierced, causing a problem such as current leakage and deterioration of characteristics of the TFT element.

そこで本発明者らは、高融点金属とAl配線との相互拡散による配線抵抗の上昇を抑制でき、しかも、耐熱性に優れたAl合金とすべく、合金元素に着目した。その結果、希土類元素、Ni、およびCoのうち少なくとも一種以上を合計含有量が0.2原子%未満となるように添加したAl合金は、組織の結晶粒が比較的大きくて純Alに近くなり、粒界密度を低くできることがわかった。   Therefore, the present inventors have focused on alloying elements so that an increase in wiring resistance due to mutual diffusion between the refractory metal and the Al wiring can be suppressed and an Al alloy having excellent heat resistance can be obtained. As a result, an Al alloy in which at least one of rare earth elements, Ni, and Co is added so that the total content is less than 0.2 atomic% is relatively large in structure grain and close to pure Al. It was found that the grain boundary density can be lowered.

これに、400℃以上の高い熱履歴が加わると、該Al合金からなる第二層と接触している高融点金属を含む第一層から第二層側に、主にAl粒界を通じた高融点金属の拡散、すなわち、粒界拡散が生じる。Al合金では、結晶粒の内部を拡散する粒内拡散よりも、粒界を拡散する粒界拡散の方が大きい。このため、本発明で規定するようにAl合金の合金元素の合計含有量を上記のように著しく低減したAl合金を用いると、上記の粒界拡散が若干進むものの、粒界拡散と競合して第一層と第二層との界面にも、少なくともAlと高融点金属を含む反応層形成が進み、結果的に界面の反応層形成が先行して終了する。この反応層が、Alと高融点金属との相互拡散を防止するためのバリア層として有効に機能し、上記粒界拡散が止まる。その結果、配線抵抗の上昇が抑えられると推察される。   When a high thermal history of 400 ° C. or more is added to this, a high temperature mainly through an Al grain boundary is formed from the first layer containing the refractory metal in contact with the second layer made of the Al alloy to the second layer side. Melting of the melting point metal, that is, grain boundary diffusion occurs. In an Al alloy, grain boundary diffusion for diffusing grain boundaries is larger than intragranular diffusion for diffusing inside crystal grains. For this reason, when using an Al alloy in which the total content of the alloy elements of the Al alloy is significantly reduced as described above as defined in the present invention, the above-mentioned grain boundary diffusion slightly progresses, but competes with the grain boundary diffusion. Formation of a reaction layer containing at least Al and a refractory metal also proceeds at the interface between the first layer and the second layer, and as a result, formation of the reaction layer at the interface is terminated in advance. This reaction layer effectively functions as a barrier layer for preventing interdiffusion between Al and the refractory metal, and the grain boundary diffusion stops. As a result, it is assumed that the increase in wiring resistance is suppressed.

また実験結果から配線抵抗について以下のことがわかった。配線膜の電気導電性は、添加元素に起因する電子の不純物散乱と、粒界によって生じる粒界散乱によって阻害されることが知られている。実験3に用いたNo.5、6の第二層のみの電気抵抗率を比べると、NiとLaを含むAl合金を用いたNo.6は、純Alを用いたNo.5と比べると高い電気抵抗率を示す。しかしながらNo.6のAl合金はMoと積層構造にして450℃で熱処理を行うと純A1薄膜単層と同等以下の電気抵抗率を示した。No.5、6の結晶粒径を調べたところ、No.5は図5に示すように200nm程度であるのに対して、No.6は図7に示すように500nm以上と結晶粒径が大きかった。このことからAl合金を用いたNo.6の電気抵抗率が低くなった理由は、Al結晶粒の粗大化によって粒界密度が低減して粒界散乱が抑制されたためであると考えられる。   From the experimental results, it was found that the wiring resistance was as follows. It is known that the electrical conductivity of the wiring film is hindered by impurity scattering of electrons caused by additive elements and grain boundary scattering caused by the grain boundaries. No. used in Experiment 3 When comparing the electrical resistivity of only the second layers of Nos. 5 and 6, No. 5 using an Al alloy containing Ni and La was obtained. 6 is No. 6 using pure Al. Compared with 5, it shows high electrical resistivity. However, no. When the Al alloy 6 was laminated with Mo and heat-treated at 450 ° C., it exhibited an electrical resistivity equivalent to or lower than that of a pure A1 thin film single layer. No. When the crystal grain sizes of Nos. 5 and 6 were examined, no. 5 is about 200 nm as shown in FIG. 6 had a crystal grain size as large as 500 nm or more as shown in FIG. For this reason, No. 1 using an Al alloy was used. The reason why the electrical resistivity of 6 was lowered is considered to be that grain boundary density was reduced by the coarsening of Al crystal grains and grain boundary scattering was suppressed.

なお、No.6の結晶粒径が大きくなった理由は、Niの添加効果であると考えられる。他の遷移金属、あるいは希土類元素のみを添加した場合と比べると、特にNiはAl結晶粒の増大効果が大きかった。更にNiは添加量を適切に制御すれば、電気抵抗率の増加を抑制しつつAl結晶粒の増大効果を発揮することができた。   In addition, No. The reason why the crystal grain size of No. 6 has increased is considered to be the effect of addition of Ni. Compared with the case where only other transition metals or only rare earth elements were added, Ni was particularly effective in increasing Al crystal grains. Furthermore, if the addition amount of Ni was appropriately controlled, an increase effect of Al crystal grains could be exhibited while suppressing an increase in electrical resistivity.

また耐熱性については以下のことがわかった。No.6は450℃の高温熱処理でもヒロックは生じなかったが、このような優れた耐熱性は合金元素の添加や積層構造にすることによる効果だけではなく、Al粒界を通じたMoの拡散による効果との相乗効果であると考えられる。積層構造と耐熱性との関係は、基板と第二層の間に下地層としてMoを含む第一層を設けることでAl結晶粒の配向性が向上して優れた耐熱性が得られると共に、更に基板と反対側の第二層にMoを含む第三層を設けることで概ね350℃まではヒロックの発生を抑えることができる。また合金元素と耐熱性の関係は、上記したように第二層を所定のA1合金とすることで耐熱性向上効果が得られる。更にMoの粒界拡散と耐熱性との関係は、熱処理温度が350℃以上になるとMoの粒界拡散が開始され、400℃以上になると粒界拡散がより一層進行する。350℃以上の高温でも優れた耐熱性を有する理由は以下のように考えられる。合金元素を添加すると粒界密度が増加し、それに伴ってMoの拡散も促進される。そのため合金元素を適量添加することでMoの拡散によって合金元素自体の耐熱性向上効果を凌駕する耐熱性が得られるとともに、抵抗の上昇も抑制される。また熱処理温度が400℃を超えると、既に粒界を拡散しているMoによってヒロックの発生を抑えることができる。   Moreover, the following things were understood about heat resistance. No. No hillocks were generated even at a high temperature heat treatment of 450 ° C. 6, but such excellent heat resistance was not only due to the addition of alloy elements and the laminated structure, but also due to the diffusion of Mo through the Al grain boundary. This is considered to be a synergistic effect. The relationship between the laminated structure and heat resistance is that by providing a first layer containing Mo as an underlayer between the substrate and the second layer, the orientation of the Al crystal grains is improved and excellent heat resistance is obtained. Furthermore, by providing a third layer containing Mo in the second layer opposite to the substrate, generation of hillocks can be suppressed up to approximately 350 ° C. The relationship between the alloy element and the heat resistance can be improved by making the second layer a predetermined A1 alloy as described above. Further, regarding the relationship between the grain boundary diffusion of Mo and the heat resistance, the grain boundary diffusion of Mo is started when the heat treatment temperature is 350 ° C. or higher, and the grain boundary diffusion further proceeds when the heat treatment temperature is 400 ° C. or higher. The reason for having excellent heat resistance even at a high temperature of 350 ° C. or higher is considered as follows. When the alloy element is added, the grain boundary density increases, and accordingly, the diffusion of Mo is promoted. Therefore, by adding an appropriate amount of the alloy element, heat resistance exceeding the heat resistance improvement effect of the alloy element itself can be obtained by diffusion of Mo, and an increase in resistance is also suppressed. When the heat treatment temperature exceeds 400 ° C., generation of hillocks can be suppressed by Mo that has already diffused through the grain boundaries.

なお、No.5は第二層が純Alのため300℃付近でヒロックが発生してしまい、Moの粒界拡散による耐熱性向上効果が得られなかったと推測される。一方、No.6では上記複合的な耐熱性向上効果が得られており、熱処理温度を高くしても純Alのように耐熱性が途切れることはない。このようにNo.6では添加元素の種類を適切に選択すると共に、Moとの積層構造とすることで粒界拡散による耐熱性向上効果も得られ、純Alと同程度以下の優れた電気抵抗率と純Alを凌駕する高い耐熱性を兼備できる。   In addition, No. No. 5 is presumed that since the second layer was pure Al, hillocks were generated around 300 ° C., and the heat resistance improvement effect due to Mo grain boundary diffusion was not obtained. On the other hand, no. In No. 6, the composite heat resistance improvement effect is obtained, and even if the heat treatment temperature is increased, the heat resistance is not interrupted as in the case of pure Al. Thus, no. In No. 6, the type of additive element is appropriately selected, and the heat resistance improvement effect by grain boundary diffusion can be obtained by adopting a laminated structure with Mo. High heat resistance can be achieved.

上記したように配線抵抗低減の観点からは反応層の生成を促進させてMoなどの高融点金属の粒界拡散を抑制することが好ましい。一方、粒界拡散が進行することで好ましくは350℃以上、より好ましくは400℃以上での耐熱性を向上できる。本発明では高融点金属の粒界拡散による配線抵抗と耐熱性のバランスを考慮して第二層を構成するAl合金の合金元素やその添加量、及び積層させる第一層の高融点金属を適切に制御する必要がある。   As described above, from the viewpoint of reducing the wiring resistance, it is preferable to promote the formation of a reaction layer to suppress the grain boundary diffusion of a refractory metal such as Mo. On the other hand, the heat resistance at 350 ° C. or higher, more preferably 400 ° C. or higher, can be improved by the grain boundary diffusion. In the present invention, considering the balance between the wiring resistance and the heat resistance due to the grain boundary diffusion of the refractory metal, the alloy element of the Al alloy constituting the second layer and its addition amount, and the refractory metal of the first layer to be laminated are appropriately selected. Need to control.

本発明の配線膜は、Mo、Ti、Cr、W、およびTaよりなる群から選択される少なくとも一種以上の高融点金属を含む第一層と;希土類元素、Ni、およびCoのうち少なくとも一種以上を0.01原子%以上、0.2原子%未満を合金元素として含むAl合金の第二層とが積層された積層構造を有しているところに特徴がある。   The wiring film of the present invention includes a first layer containing at least one refractory metal selected from the group consisting of Mo, Ti, Cr, W, and Ta; and at least one of rare earth elements, Ni, and Co Is characterized in that it has a laminated structure in which a second layer of an Al alloy containing 0.01 atomic% or more and less than 0.2 atomic% as an alloy element is laminated.

まず、配線膜を最も特徴付ける第二層を構成するAl合金について説明する。   First, an Al alloy constituting the second layer that most characterizes the wiring film will be described.

[希土類元素、Ni、およびCoのうち少なくとも一種以上を0.01原子%以上、0.2原子%未満]
希土類元素、Ni、およびCoは、いずれもAlの耐熱性向上に寄与する元素であり、後記するように第一層と積層することによって更に400以上500℃以下の高温域での耐熱性向上に寄与する。
[At least one of rare earth elements, Ni, and Co is 0.01 atomic% or more and less than 0.2 atomic%]
Rare earth elements, Ni, and Co are all elements that contribute to improving the heat resistance of Al, and by further laminating with the first layer as will be described later, further improving the heat resistance in a high temperature range of 400 to 500 ° C. Contribute.

本発明に用いられる希土類元素とは、LaからLuまでの15元素で構成されるランタノイド元素、Sc、およびYを意味する。好ましい希土類元素は、Nd、La、Gd、Dy、Y、またはCeであり、これらを、単独で、または二種以上併用して用いることができる。より好ましくはNd、La、Gd、Dyであり、更に好ましくはNd、Laである。   The rare earth element used in the present invention means lanthanoid elements composed of 15 elements from La to Lu, Sc, and Y. Preferred rare earth elements are Nd, La, Gd, Dy, Y, or Ce, and these can be used alone or in combination of two or more. Nd, La, Gd, and Dy are more preferable, and Nd and La are more preferable.

上記効果を発現するためには、本発明のAl合金に、これら希土類元素、Ni、Coのうち少なくとも一種以上の合金元素を0.01原子%以上含有させる必要があり、好ましくは0.02原子%以上、より好ましくは0.05原子%以上である。   In order to exhibit the above effects, the Al alloy of the present invention must contain at least one alloy element of at least one of these rare earth elements, Ni, and Co, preferably 0.02 atom. % Or more, more preferably 0.05 atomic% or more.

一方、耐熱性向上の観点からは合金元素の含有量は多い方が望ましいが、合金元素の含有量が過剰になると結晶粒が小さくなり粒界密度が増えるため、粒界に沿って第二層内に拡散する高融点金属が増加するため、配線抵抗が著しく増加する。したがってAl合金に含まれる上記合金元素の合計含有量は、0.2原子%未満とする必要があり、好ましくは0.15原子%以下、より好ましくは0.12原子%以下である。   On the other hand, from the viewpoint of improving heat resistance, it is desirable that the content of the alloy element is large. However, if the content of the alloy element is excessive, the crystal grain becomes smaller and the grain boundary density increases, so the second layer along the grain boundary. Since the refractory metal diffusing inside increases, the wiring resistance increases remarkably. Therefore, the total content of the alloy elements contained in the Al alloy needs to be less than 0.2 atomic%, preferably 0.15 atomic% or less, more preferably 0.12 atomic% or less.

優れた耐熱性向上効果を得る観点からは希土類元素量は、好ましくは0.01原子%以上である。一方、希土類元素含有量の上限は、耐熱性の観点から合金元素含有量の上限である0.2原子%未満まで許容できるが、400℃以上500℃以下での高温域における配線抵抗をより一層低減する観点から好ましくは0.05原子%以下である。希土類元素含有量は、より好ましくは0.02原子%以上、更に好ましくは0.035原子%以上であって、より好ましくは0.15原子%以下、更に好ましくは0.10原子%以下である。ここで希土類元素含有量とは、希土類元素を単独で含むときは単独の量であり、希土類元素を二種以上を併用するときは合計量である。   From the viewpoint of obtaining an excellent heat resistance improvement effect, the rare earth element content is preferably 0.01 atomic% or more. On the other hand, the upper limit of the rare earth element content is acceptable up to less than 0.2 atomic%, which is the upper limit of the alloy element content from the viewpoint of heat resistance, but the wiring resistance in the high temperature region at 400 ° C to 500 ° C is further increased. From the viewpoint of reduction, it is preferably 0.05 atomic% or less. The rare earth element content is more preferably 0.02 atomic% or more, still more preferably 0.035 atomic% or more, more preferably 0.15 atomic% or less, still more preferably 0.10 atomic% or less. . Here, the rare earth element content is a single amount when a rare earth element is contained alone, and a total amount when two or more rare earth elements are used in combination.

また耐熱性向上効果、および配線抵抗上昇抑制効果を十分に発揮させる観点からはNiおよびCoの少なくとも一種以上(以下、単に「Ni、Co」ということがある)の含有量は、好ましくは0.01原子%以上、より好ましくは0.02原子%以上である。一方、Ni、Coの含有量の上限は、耐熱性の観点から合金元素含有量の上限0.2原子%未満まで許容できるが、過剰に含有させると配線抵抗がかえって高くなるため、好ましくは0.1原子%以下、より好ましくは0.08原子%以下である。Ni、Coは単独で添加しても良いし、両方を併用してもよい。Ni、Coはいずれか一方を含むときはその量であり、両方を含むときは合計量である。   Further, from the viewpoint of sufficiently exerting the effect of improving the heat resistance and the effect of suppressing the increase in wiring resistance, the content of at least one or more of Ni and Co (hereinafter sometimes simply referred to as “Ni, Co”) is preferably 0.00. It is 01 atomic% or more, more preferably 0.02 atomic% or more. On the other hand, the upper limit of the content of Ni and Co can be allowed up to less than 0.2 atomic% of the upper limit of the alloy element content from the viewpoint of heat resistance. However, if excessively contained, the wiring resistance becomes higher, and therefore preferably 0. .1 atomic% or less, more preferably 0.08 atomic% or less. Ni and Co may be added singly or in combination. Ni or Co is the amount when either one is included, and the total amount when both are included.

本発明では、合金元素を単独で添加してもよいし、二種以上の合金元素を併用してもよい。Al合金中の合金元素は、上記範囲で含まれていれば、耐熱性向上効果が得られる。より優れた耐熱性向上効果を得るためには好ましくは、希土類元素と、NiおよびCoの少なくとも一種以上と、を含むことが推奨される。特にNiとCoはAl結晶粒の増大効果が大きいため、より好ましくは、Ni、Coの少なくとも一方を含む。   In the present invention, an alloy element may be added alone, or two or more kinds of alloy elements may be used in combination. If the alloy element in the Al alloy is included in the above range, an effect of improving heat resistance can be obtained. In order to obtain a more excellent heat resistance improvement effect, it is recommended to contain a rare earth element and at least one of Ni and Co. In particular, since Ni and Co have a large effect of increasing Al crystal grains, they preferably contain at least one of Ni and Co.

本発明に用いられるAl合金は、上記のとおり希土類元素、Ni、およびCoのうち少なくとも一種以上を0.01原子%以上、0.2原子%未満の範囲で含み、残部:Alおよび不可避不純物である。好ましくは、希土類元素と、少なくともNi、またはCoのいずれか一方と、を含み、残部:Alおよび不可避不純物である。   As described above, the Al alloy used in the present invention contains at least one of rare earth elements, Ni, and Co in a range of 0.01 atomic% or more and less than 0.2 atomic%, with the balance being Al and inevitable impurities. is there. Preferably, it contains a rare earth element and at least one of Ni or Co, and the balance is Al and inevitable impurities.

更に本発明のAl合金には、本発明の作用を損なわない範囲で、(i)Mo、Ti、Cr、W、およびTaよりなる群から選択される少なくとも一種以上;(ii)CuおよびGeの少なくとも一種以上;を含んでいてもよい。   Further, the Al alloy of the present invention includes (i) at least one selected from the group consisting of Mo, Ti, Cr, W, and Ta, as long as the effects of the present invention are not impaired; May contain at least one or more.

(i)Mo、Ti、Cr、W、およびTaよりなる群から選択される少なくとも一種以上は、0.01原子%以上であれば400℃以上500℃以下の高い熱履歴においてAl合金の耐熱性を向上させてヒロックやAl酸化物の形成抑制に有効に作用する。またこれら合金元素の含有量が0.05原子%未満の少量であれば、合金化しても配線抵抗を低く抑えることができる。更に上記反応層の形成によって、第一層から高融点金属がAl粒界を通じて拡散することも抑制できることから、相互拡散に起因する配線抵抗の上昇も抑えることができると推察される。   (I) At least one selected from the group consisting of Mo, Ti, Cr, W, and Ta has a heat resistance of the Al alloy in a high thermal history of 400 ° C. or more and 500 ° C. or less as long as it is 0.01 atomic% or more. It effectively works to suppress the formation of hillocks and Al oxides. Moreover, if the content of these alloy elements is a small amount of less than 0.05 atomic%, the wiring resistance can be kept low even when alloying. Furthermore, since the formation of the reaction layer can suppress the diffusion of the high melting point metal from the first layer through the Al grain boundary, it is presumed that the increase in wiring resistance due to the mutual diffusion can also be suppressed.

Mo、Ti、Cr、W、およびTaよりなる群から選択される少なくとも一種以上の含有量は、好ましくは0.01原子%以上、より好ましくは0.02原子%以上であって、好ましくは0.05原子%未満、より好ましくは0.03原子%以下である。これらの合金元素は単独で添加してもよいし、複数を併用してもよい。いずれかを単独で含むときはその量であり、複数で含むときは合計量である。   The content of at least one selected from the group consisting of Mo, Ti, Cr, W, and Ta is preferably 0.01 atomic% or more, more preferably 0.02 atomic% or more, and preferably 0 .05 atomic% or less, more preferably 0.03 atomic% or less. These alloy elements may be added alone or in combination. When any one is included, it is the amount, and when any is included, it is the total amount.

(ii)CuおよびGeは、上述した希土類元素やNi、Coよりも低温で析出する元素であり、また粒界密度に悪影響を及ぼさないため、配線抵抗の上昇を抑制できる。このような効果を得るためには、CuおよびGeの少なくとも一種以上の含有量は、好ましくは0.01原子%以上、より好ましくは0.02原子%以上である。一方、CuやGeの含有量が多くなりすぎるとかえって配線抵抗が上昇するため、好ましくは0.05原子%以下、より好ましくは0.03原子%以下である。Cu、Geは、単独で添加しても良いし、両方を併用してもよい。いずれか一方を含むときはその量であり、両方を含むときは合計量である。   (Ii) Cu and Ge are elements that precipitate at a lower temperature than the above-mentioned rare earth elements, Ni and Co, and do not adversely affect the grain boundary density, so that an increase in wiring resistance can be suppressed. In order to obtain such an effect, the content of at least one of Cu and Ge is preferably 0.01 atomic% or more, more preferably 0.02 atomic% or more. On the other hand, if the content of Cu or Ge is excessively increased, the wiring resistance is increased, so that it is preferably 0.05 atomic% or less, more preferably 0.03 atomic% or less. Cu and Ge may be added alone or in combination. When either one is included, it is the amount, and when both are included, it is the total amount.

なお、(i)Mo、Ti、Cr、W、およびTaよりなる群から選択される少なくとも一種以上;(ii)CuおよびGeの少なくとも一種以上;を含む場合でも、Al合金に含まれる合金元素、すなわち、希土類元素、Ni、Coおよび上記(i)、(ii)の合計量は0.2原子%未満に制御する必要がある。合計量が0.2原子%以上になると、加熱後の配線抵抗が上昇するなどの問題が生じることがある。合計量の好ましい範囲は上記したとおりである。   Note that (i) at least one or more selected from the group consisting of Mo, Ti, Cr, W, and Ta; (ii) at least one or more of Cu and Ge; That is, the total amount of rare earth elements, Ni, Co and the above (i) and (ii) needs to be controlled to be less than 0.2 atomic%. When the total amount is 0.2 atomic% or more, problems such as an increase in wiring resistance after heating may occur. The preferable range of the total amount is as described above.

以上、第二層を構成するAl合金について説明した。以下、本発明の配線膜について説明する。   The Al alloy that constitutes the second layer has been described above. Hereinafter, the wiring film of the present invention will be described.

本発明の配線膜は、Mo、Ti、Cr、W、およびTaよりなる群から選択される少なくとも一種以上の高融点金属を含む第一層と上記Al合金からなる第二層とが積層された積層構造である。具体的には基板側から順に、上記第一層および上記第二層がこの順序で積層された二層構造であってもよいし、また、上記第二層および上記第一層がこの順序で積層された二層構造であってもよい。或いは、上記第二層の上下に上記第一層が配置された三層構造であってもよい。すなわち、基板側から順に、上記第一層、上記第二層、および上記第一層がこの順序で積層された三層構造でもよい。なお、本発明では、三層構造とする場合、第二層からみて基板側と反対側に積層させた第一層を第三層ということがある。   In the wiring film of the present invention, a first layer containing at least one refractory metal selected from the group consisting of Mo, Ti, Cr, W, and Ta and a second layer made of the Al alloy are laminated. It is a laminated structure. Specifically, a two-layer structure in which the first layer and the second layer are laminated in this order in order from the substrate side may be employed, and the second layer and the first layer may be arranged in this order. A laminated two-layer structure may be used. Alternatively, a three-layer structure in which the first layer is disposed above and below the second layer may be used. That is, a three-layer structure in which the first layer, the second layer, and the first layer are stacked in this order from the substrate side may be used. In the present invention, when a three-layer structure is used, the first layer laminated on the side opposite to the substrate side when viewed from the second layer may be referred to as a third layer.

特に三層構造とすると、第二層であるAl合金の耐酸化性が向上すると共に、耐熱性がより一層向上するため望ましい。   In particular, a three-layer structure is desirable because the oxidation resistance of the Al alloy as the second layer is improved and the heat resistance is further improved.

本発明の第一層に用いられる高融点金属は、フラットディスプレイの技術分野においてバリア層として通常用いられるものである。高融点金属はAl粒界に沿って拡散して耐熱性向上に寄与する。具体的には、Mo、Ti、Cr、W、およびTaを一種、または二種以上含む合金元素として用いることができる。上記第二層の上下に上記第一層を配置する場合は、上側の第一層と下側の第一層は同じ組成であってもよいし、異なっていてもよい。また第一層は高融点金属以外の元素を含んでいてもよいが、好ましくは任意の上記高融点金属と、残部:不可避不純物である。   The refractory metal used in the first layer of the present invention is usually used as a barrier layer in the technical field of flat displays. The refractory metal diffuses along the Al grain boundary and contributes to an improvement in heat resistance. Specifically, it can be used as an alloy element containing one or more of Mo, Ti, Cr, W, and Ta. When the first layer is disposed above and below the second layer, the upper first layer and the lower first layer may have the same composition or may be different. The first layer may contain an element other than the refractory metal, but is preferably any refractory metal and the balance: inevitable impurities.

本発明の配線膜は、いずれの積層構造を有するにしろ、上記第一層と上記第二層との界面、更に三層構造とした場合には上記第二層と第三層との界面に、Alと高融点金属を少なくとも含む反応層が形成されている。本発明における反応層とは、低温ポリシリコンや酸化物半導体が曝される高温の熱履歴、好ましくは400℃以上、500℃以下によって形成されるものである。熱履歴の上限を500℃以下とすることにより、上記反応層がそれ以上に成長せず、界面に留まるため、電気抵抗の上昇を効果的に抑えることができる。上記反応層には、例えば、Alと高融点金属の化合物、具体的にはAlとMoの化合物を含むものが挙げられる。   The wiring film of the present invention has any laminated structure, but at the interface between the first layer and the second layer, and moreover at the interface between the second layer and the third layer in the case of a three-layer structure. A reaction layer containing at least Al and a refractory metal is formed. The reaction layer in the present invention is formed by a high temperature thermal history to which low temperature polysilicon or an oxide semiconductor is exposed, preferably 400 ° C. or more and 500 ° C. or less. By setting the upper limit of the thermal history to 500 ° C. or less, the reaction layer does not grow any more and stays at the interface, so that an increase in electrical resistance can be effectively suppressed. Examples of the reaction layer include a compound containing Al and a refractory metal, specifically, a compound containing a compound of Al and Mo.

反応層は、実施例で示すように熱処理後の積層構造を有する配線膜の断面を透過型電子顕微鏡(以下、「TEM」(Transmission Electron Microscope)ということがある。)で観察すれば確認できる。   The reaction layer can be confirmed by observing a cross section of the wiring film having a laminated structure after heat treatment with a transmission electron microscope (hereinafter sometimes referred to as “TEM” (Transmission Electron Microscope)) as shown in Examples.

本発明に用いられる基板は、フラットパネルディスプレイの分野に通常用いられるものであれば特に限定されず、例えばガラス、石英、シリコン、SUS、Ti箔などの金属からなるものが挙げられる。   The substrate used in the present invention is not particularly limited as long as it is usually used in the field of flat panel displays, and examples thereof include those made of metal such as glass, quartz, silicon, SUS, and Ti foil.

本発明のフラットパネルディスプレイは、上述した本発明の配線膜を備えたものであり、例えば、液晶ディスプレイ、有機ELディスプレイ、タッチパネル、フィールドエミッションディスプレイ、真空蛍光管ディスプレイ、プラズマディスプレイなどが挙げられる。   The flat panel display of the present invention includes the above-described wiring film of the present invention, and examples thereof include a liquid crystal display, an organic EL display, a touch panel, a field emission display, a vacuum fluorescent tube display, and a plasma display.

上記フラットパネルディスプレイにおいて、薄膜トランジスタの半導体層は、低温ポリシリコンまたは酸化物で構成されていることが好ましい。前述したように、これらは、その作製過程または膜質改善などの目的で、400℃以上500℃以下の高温熱履歴を受けることがあるが、本発明の配線膜を用いれば、耐熱性や配線抵抗に悪影響を及ぼすことなく、これらの半導体層材料によるメリットを最大限に享受することができる。上記酸化物としては特に限定されず、例えば通常用いられるIn、Zn、Ga、およびSnよりなる群から選択される少なくとも一種の元素を含む酸化物が挙げられる。   In the flat panel display, the semiconductor layer of the thin film transistor is preferably made of low-temperature polysilicon or oxide. As described above, these may be subjected to a high-temperature thermal history of 400 ° C. or more and 500 ° C. or less for the purpose of their production process or film quality improvement. However, if the wiring film of the present invention is used, the heat resistance and wiring resistance are increased. The advantages of these semiconductor layer materials can be enjoyed to the maximum without adversely affecting the process. The oxide is not particularly limited, and examples thereof include oxides containing at least one element selected from the group consisting of commonly used In, Zn, Ga, and Sn.

本発明を特徴付ける上記Al合金薄膜は、スパッタリング法にてスパッタリングターゲット(以下「ターゲット」ということがある)を用いて形成することが好ましい。薄膜の形成方法として、例えばインクジェット塗布法、真空蒸着法、スパッタリング法などが挙げられるが、このうちスパッタリング法が、合金化の容易さや膜厚均一性に優れているため好ましい。   The Al alloy thin film characterizing the present invention is preferably formed by a sputtering method using a sputtering target (hereinafter also referred to as “target”). Examples of the thin film forming method include an ink jet coating method, a vacuum deposition method, and a sputtering method. Among these methods, the sputtering method is preferable because it is easy to alloy and has excellent film thickness uniformity.

上記スパッタリング法で上記Al合金膜を形成する場合、上記スパッタリングターゲットとして、希土類元素、Ni、およびCoのうち少なくとも一種以上を所定量含み、所望のAl合金膜と同一組成のAl合金スパッタリングターゲットを用いれば、組成ズレの恐れがなく、所望の成分組成のAl合金膜を形成することができる。所望の成分組成のAl合金膜となるように複数のスパッタリングターゲットを用いて共蒸着させてもよい。   When the Al alloy film is formed by the sputtering method, an Al alloy sputtering target having the same composition as the desired Al alloy film and containing a predetermined amount of at least one of rare earth elements, Ni, and Co is used as the sputtering target. Thus, there is no risk of composition deviation, and an Al alloy film having a desired component composition can be formed. You may co-evaporate using a several sputtering target so that it may become Al alloy film of a desired component composition.

第一の配線膜の形成に用いられるスパッタリングターゲットは、希土類元素、Ni、およびCoのうち少なくとも一種以上を0.01原子%以上、0.2原子%未満含み、残部:Alおよび不可避不純物であるAl合金スパッタリングターゲットである。好ましくは希土類元素を0.01原子%以上と、Ni、およびCoのうち少なくとも一種以上を0.01原子%以上と、を含み、合計合金元素含有量が、0.2原子%未満であって、残部:Alおよび不可避不純物であるAl合金スパッタリングターゲットである。   The sputtering target used for forming the first wiring film contains 0.01 atomic% or more and less than 0.2 atomic% of at least one of rare earth elements, Ni, and Co, and the balance is Al and inevitable impurities. It is an Al alloy sputtering target. Preferably, the rare earth element is 0.01 atomic% or more, and at least one of Ni and Co is 0.01 atomic% or more, and the total alloy element content is less than 0.2 atomic%. , Balance: Al and an Al alloy sputtering target which is an inevitable impurity.

スパッタリングターゲットには、発明の作用を損なわない範囲で、(i)Mo、Ti、Cr、W、およびTaよりなる群から選択される少なくとも一種以上;(ii)CuおよびGeの少なくとも一種以上;を前述した量で含んでもよい。   In the sputtering target, (i) at least one or more selected from the group consisting of Mo, Ti, Cr, W, and Ta; (ii) at least one or more of Cu and Ge; It may be included in the amounts described above.

上記スパッタリングターゲットの作製方法として、真空溶解法や粉末焼結法が挙げられるが、特に真空溶解法での作製が、ターゲット面内の組成や組織の均一性を確保できる観点から望ましい。   Examples of the method for producing the sputtering target include a vacuum melting method and a powder sintering method. In particular, the production by the vacuum melting method is desirable from the viewpoint of ensuring the composition in the target surface and the uniformity of the structure.

本発明の配線膜の配線抵抗は、フラットパネルディスプレイの構造、配線ルールなどによって異なるが、おおむね5.5μΩcm以下であり、好ましくは5.0μΩcm以下の電気抵抗率である。   The wiring resistance of the wiring film of the present invention varies depending on the structure of the flat panel display, wiring rules, etc., but is generally 5.5 μΩcm or less, preferably 5.0 μΩcm or less.

以下、実施例を挙げて本発明をより具体的に説明するが、本発明はもとより下記実施例によって制限を受けるものではなく、前・後記の趣旨に適合し得る範囲で適当に変更を加えて実施することも勿論可能であり、それらはいずれも本発明の技術的範囲に包含される。   EXAMPLES Hereinafter, the present invention will be described more specifically with reference to examples. However, the present invention is not limited by the following examples, but may be appropriately modified within a range that can meet the purpose described above and below. Of course, it is possible to implement them, and they are all included in the technical scope of the present invention.

実験1(耐熱性評価)
ガラス基板上に、基板側から順に、Moからなる膜厚70nmの第一層、表1に示す組成を有する膜厚300nmのAl−Ni−La合金からなる第二層、Moからなる膜厚70nmの第一層(以下、「第三層」という)を順次、スパッタリング法を用いて積層した。なお、No.2〜No.4の第二層は、膜に対応した組成を有するスパッタリングターゲットを用いて蒸着させた。この際、第二層が表1に示す組成となるようにDCパワーの比率を制御した。またNo.1の第二層は純Alスパッタリングターゲットを用いて膜厚300nmの純Al膜を成膜した。第二層の組成は、ICP発光分光分析装置を用い、定量分析して確認した。なお、表中、at%は原子%を意味する。
Experiment 1 (Evaluation of heat resistance)
On the glass substrate, in order from the substrate side, a first layer made of Mo with a thickness of 70 nm, a second layer made of an Al—Ni—La alloy with a thickness of 300 nm having the composition shown in Table 1, and a film thickness made of Mo with a thickness of 70 nm. The first layer (hereinafter referred to as “third layer”) was sequentially laminated using a sputtering method. In addition, No. 2-No. The second layer 4 was deposited using a sputtering target having a composition corresponding to the film. At this time, the ratio of the DC power was controlled so that the second layer had the composition shown in Table 1. No. As the second layer 1, a pure Al film having a thickness of 300 nm was formed using a pure Al sputtering target. The composition of the second layer was confirmed by quantitative analysis using an ICP emission spectroscopic analyzer. In the table, at% means atomic%.

スパッタリング条件は以下のとおりである。
DCマグネトロンスパッタ装置
ターゲットサイズ:4インチφ×5mmt
Arガス圧:2mTorr
DCパワー:250W
極間距離:100mm
基板温度:室温
The sputtering conditions are as follows.
DC magnetron sputtering system Target size: 4 inches φ × 5mmt
Ar gas pressure: 2 mTorr
DC power: 250W
Distance between electrodes: 100mm
Substrate temperature: room temperature

次に、フォトリソグラフィーおよびエッチングにより、5μm幅のラインアンドスペースパターンに形成した後、赤外線加熱により、窒素雰囲気中にて400℃、450℃の各温度で1時間の熱処理を行なった。   Next, a line and space pattern having a width of 5 μm was formed by photolithography and etching, and then heat treatment was performed at 400 ° C. and 450 ° C. for 1 hour in a nitrogen atmosphere by infrared heating.

得られた各試料の耐熱性を評価した。詳細には熱処理後の積層配線の斜め上方向から試料断面を走査型電子顕微鏡(SEM:Scanning Electron Microscope)で観察し、サイドヒロックの有無を調べた。倍率は3000〜10000倍の範囲で行い、サイドヒロックの生成が見られたものを×、サイドヒロックの生成が見られないものを○とした。その結果を表1に示す。   The heat resistance of each obtained sample was evaluated. Specifically, the cross section of the sample was observed with a scanning electron microscope (SEM) from the diagonally upward direction of the laminated wiring after the heat treatment, and the presence or absence of side hillocks was examined. The magnification was in the range of 3000 to 10,000 times. The case where side hillock generation was observed was rated as x, and the case where side hillock generation was not observed was marked as ◯. The results are shown in Table 1.

表1より、No.2〜4は、いずれの加熱温度においても、サイドヒロックの発生は見られなかった。また配線端部にもサイドヒロックは見られなかった。一方、No.1は、いずれの加熱温度においても、配線端部にサイドヒロックと呼ばれる突起が高密度で形成されることが確認された。   From Table 1, No. In Nos. 2 to 4, no side hillock was observed at any heating temperature. Also, no side hillock was seen at the end of the wiring. On the other hand, no. No. 1 was confirmed to be formed with high density of protrusions called side hillocks at the end of the wiring at any heating temperature.

図1〜4は450℃に加熱した後のNo.1〜4のSEM写真であるが、図1に示すようにNo.1は配線端部からサイドヒロックに相当する突起1が生じていることが確認できた。一方、図2〜4に示すようにNo.2〜4では突起は生じていなかった。   1-4 show No. 1 after heating to 450 ° C. 1 to 4 are SEM photographs, but as shown in FIG. It was confirmed that the protrusion 1 corresponding to the side hillock 1 was generated from the end of the wiring. On the other hand, as shown in FIGS. In 2-4, the protrusion did not arise.

更に450℃に加熱した後の積層配線の断面をTEM暗視野像で観察した結果を図5〜7に示す。図5〜7に示すように第一層3と第二層4、第二層4と第三層5の間にMo−Alの反応層2が確認された。なお、図5〜7は、夫々No.1、2、4であるが、No.1、2、4と合金元素の添加量が多くなるほど、反応層の領域が広がっていることがわかった。   Furthermore, the result of having observed the cross section of the laminated wiring after heating at 450 degreeC with the TEM dark field image is shown to FIGS. As shown in FIGS. 5 to 7, the Mo—Al reaction layer 2 was confirmed between the first layer 3 and the second layer 4, and between the second layer 4 and the third layer 5. 5 to 7 are respectively No. 1, 2, 4 but no. It was found that the region of the reaction layer expanded as the amount of addition of 1, 2, 4 and alloy elements increased.

実験2(配線抵抗評価)
幅100μm、長さ10のラインアンドスペースパターンを形成した以外は、上記実験1と同様にして各試料を作製した。なお、本実施例では極間距離を通常の55mmではなく、100mmに設定したスパッタ装置を用いた。そのため、本実施例では55mmの極間距離で成膜した場合と比べて膜中に取り込まれるスパッタチャンバー内に残留する主として酸素、窒素、水分などのガス成分が多くなり、電気抵抗率が2割程度高くなる傾向を示した。
Experiment 2 (Evaluation of wiring resistance)
Each sample was prepared in the same manner as in Experiment 1 except that a line and space pattern having a width of 100 μm and a length of 10 was formed. In this example, a sputtering apparatus was used in which the distance between the electrodes was set to 100 mm instead of the usual 55 mm. Therefore, in this embodiment, gas components such as oxygen, nitrogen, and moisture remaining mainly in the sputtering chamber taken into the film are increased compared with the case where the film is formed at a distance of 55 mm, and the electric resistivity is 20%. It showed a tendency to become higher.

得られた積層配線における第二層の電気抵抗率を4端子法で測定して配線抵抗を評価した。配線抵抗はMoとAlの並列抵抗と考え、Moの抵抗率は熱処理前後で12μΩcmの並列抵抗とし、積層配線の膜厚比で抵抗を分配して差し引くことで上記Al合金の電気抵抗率を算出した。参考のため、上記加熱処理前における24℃での第二層の電気抵抗率も同様にして測定した(表中、「asdepo」欄)。本実施例では、電気抵抗率が5.5μΩcm以下を配線抵抗に優れており合格、5.5μΩcm超を配線抵抗が高く不合格と評価した。   The electrical resistance of the second layer in the obtained multilayer wiring was measured by a four-terminal method to evaluate the wiring resistance. The wiring resistance is considered to be the parallel resistance of Mo and Al. The resistivity of Mo is 12 μΩcm parallel resistance before and after the heat treatment, and the electric resistivity of the Al alloy is calculated by distributing and subtracting the resistance by the film thickness ratio of the laminated wiring. did. For reference, the electrical resistivity of the second layer at 24 ° C. before the heat treatment was measured in the same manner (“asdepo” column in the table). In this example, an electrical resistivity of 5.5 μΩcm or less was excellent in wiring resistance, and the wiring resistance exceeding 5.5 μΩcm was evaluated as being high and rejected.

これらの結果を図8に示す。図8より、No.1〜3を用いたときは、加熱温度が400℃、450℃のいずれでも、電気抵抗率を5.5μΩcm以下に低く抑えることができた。
詳細には、第二層に純Alを用いたNo.1(図中、◆)の電気抵抗率は、加熱温度が高くなると増加する傾向を示したが、その程度は非常に低いものであった。
また第二層に本発明の要件を満足するAl合金で構成されたNo.2、3(図中、■、▲)の電気抵抗率も加熱温度が高くなると増加する傾向を示したが、合格基準の電気抵抗率の範囲内に抑えることができた。その増加率は、純Alに比べて高いものであった。
これに対し、No.4(図中、●)は、第二層であるAl合金膜に含まれる合金元素の合計含有量が0.22原子%と多い例であり、電気抵抗率が上昇した。
These results are shown in FIG. From FIG. When 1 to 3 were used, the electrical resistivity could be kept low at 5.5 μΩcm or less regardless of whether the heating temperature was 400 ° C. or 450 ° C.
Specifically, No. 1 using pure Al for the second layer. The electrical resistivity of 1 (♦ in the figure) tended to increase as the heating temperature increased, but the degree was very low.
Further, No. 2 made of an Al alloy satisfying the requirements of the present invention in the second layer. The electrical resistivity of 2, 3 (■, ▲ in the figure) also showed a tendency to increase as the heating temperature increased, but it could be suppressed within the acceptable standard electrical resistivity range. The rate of increase was higher than that of pure Al.
In contrast, no. 4 (● in the figure) is an example in which the total content of alloy elements contained in the Al alloy film as the second layer is as high as 0.22 atomic%, and the electrical resistivity increased.

以上の実験1、2の結果より、本発明で規定するAl合金を含むNo.2、3の配線膜を用いた場合、400℃以上500℃以下の高温熱履歴を受けたとしても、配線抵抗の上昇が抑えられ、サイドヒロックなどの発生もなく耐熱性に優れたフラットパネルディスプレイが得られることが確認された。   From the results of the above experiments 1 and 2, No. 1 containing an Al alloy as defined in the present invention. When two or three wiring films are used, even if a high temperature thermal history of 400 ° C. or more and 500 ° C. or less is received, an increase in wiring resistance is suppressed, and there is no generation of side hillocks and excellent flat panel display with excellent heat resistance It was confirmed that

一方、純Alを用いたNo.1では、加熱処理後の電気抵抗率は、加熱温度が400℃を超えると徐々に増加する傾向が見られたが、その程度は、非常に低いものであった。しかしながら、純Alを用いると耐熱性が低下し、純Alを用いたときは、加熱処理後にサイドヒロックの発生が見られた。   On the other hand, no. In No. 1, the electric resistivity after the heat treatment tended to gradually increase when the heating temperature exceeded 400 ° C., but the degree was very low. However, when pure Al is used, the heat resistance is lowered, and when pure Al is used, side hillocks are generated after the heat treatment.

No.4は合金元素含有量が過剰なAl合金を第二層に用いた例である。No.4は加熱処理でサイドヒロックの発生は見られず、耐熱性は良好であったが、図8に示すように、加熱処理後の電気抵抗率は、加熱温度が400℃を超えると著しく増加し、その増加率は純Alと比べて非常に高いものであった。   No. 4 is an example in which an Al alloy having an excessive alloy element content is used for the second layer. No. No side hillock was observed in heat treatment 4 and heat resistance was good, but as shown in FIG. 8, the electrical resistivity after the heat treatment markedly increased when the heating temperature exceeded 400 ° C. The rate of increase was much higher than that of pure Al.

実験3
No.5、6はガラス基板上に、基板側から順に、Moからなる膜厚70nmの第一層、膜厚1000nmの第二層、Moからなる膜厚70nmの第三層を順次、スパッタリング法を用いて積層した。なお、No.5の第二層は純Al膜であり、No.6の第二層はAl−0.02at%Ni−0.04at%La合金膜である。夫々の膜に対応した組成を有するスパッタリングターゲットを用いて蒸着させた。スパッタリング条件は実験1と同じである。また第二層の組成は実験1と同様にして確認した。
Experiment 3
No. 5 and 6 are formed by sequentially using a sputtering method on a glass substrate in order from the substrate side, a first layer made of Mo having a thickness of 70 nm, a second layer having a thickness of 1000 nm, and a third layer made of Mo having a thickness of 70 nm. And laminated. In addition, No. The second layer of No. 5 is a pure Al film. The second layer 6 is an Al-0.02 at% Ni-0.04 at% La alloy film. Vapor deposition was performed using a sputtering target having a composition corresponding to each film. The sputtering conditions are the same as in Experiment 1. The composition of the second layer was confirmed in the same manner as in Experiment 1.

次に、赤外線加熱により、窒素雰囲気中にて450℃の温度で1時間の熱処理を行なって試料を作成した。   Next, heat treatment was performed for 1 hour at a temperature of 450 ° C. in a nitrogen atmosphere by infrared heating to prepare a sample.

得られた各試料を様々な角度から観察した。まず、熱処理後の各試料の断面をTEM暗視野像で観察した結果を図9、11に示す。また該TEM観察断面と同じ断面をSTEM(Scanning Transmission Electron Microscope:走査型透過電子顕微鏡)観察した結果を図10、12に示す。   Each obtained sample was observed from various angles. First, the result of having observed the cross section of each sample after heat processing by the TEM dark field image is shown in FIG. Moreover, the result of having observed the same cross section as this TEM observation cross section by STEM (Scanning Transmission Electron Microscope: Scanning Transmission Electron Microscope) is shown in FIGS.

No.5について図9、10に示す。図10に示されているように粒界部分には、第一層から第二層方向にコントラストの明るい部分が存在しており、この箇所をエネルギー分散型X線分析(Energy Dispersive X−ray Spectrometry:EDS)によって調べた結果、Moが粒界に沿って拡散していることが確認できた。また第一層と第二層の界面にもコントラストの明るい部分が存在しており、この箇所を電子回折によって調べた結果、AlとMoが反応して形成されたAl12Moであり、反応層が確認できた。 No. 5 is shown in FIGS. As shown in FIG. 10, there is a bright portion in the grain boundary portion in the direction from the first layer to the second layer. : EDS), it was confirmed that Mo was diffused along the grain boundary. Further, a bright portion exists at the interface between the first layer and the second layer. As a result of examining this portion by electron diffraction, Al 12 Mo formed by reaction of Al and Mo is obtained. Was confirmed.

No.6について図11、12に示す。図11に示されているように第二層の粒界部分には、第一層から第二層方向にコントラストの明るい部分が存在しており、Moが粒界に沿って拡散していることが確認できた。また第一層と第二層の界面にもコントラストの明るい部分が存在しており、AlとMoが反応して形成されたAl12Moであり、反応層が確認できた。 No. 6 is shown in FIGS. As shown in FIG. 11, in the grain boundary part of the second layer, there is a bright part in the direction from the first layer to the second layer, and Mo is diffused along the grain boundary. Was confirmed. The are also present bright contrast portions at the interface of the first and second layers, Al and Mo Al are formed by reacting 12 Mo, the reaction layer was confirmed.

また図9〜12に基づいてNo.5とNo.6のAlの結晶粒の大きさを比べた結果、No.6の方が大きかった。   In addition, based on FIGS. 5 and no. As a result of comparing the size of Al crystal grains of No. 6, 6 was bigger.

次にNo.5、No.6について、第二層部分を水平方向に切断して露出した平面をTEM暗視野像で観察した結果を夫々図13、15に示す。図13、15に基づいてNo.5とNo.6のAlの結晶粒の大きさを比べた結果、No.6の方が大きかった。   Next, no. 5, no. 13 and 15 show the results of observing a flat surface exposed by cutting the second layer portion in the horizontal direction with a TEM dark field image, respectively. Based on FIGS. 5 and no. As a result of comparing the size of Al crystal grains of No. 6, 6 was bigger.

また上記No.5とNo.6の第二層部分を水平方向に切断して露出した平面をTEM観察した箇所をSTEM観察した結果を夫々図14、16に示す。図14に示すように粒界部分に沿ってコントラストの明るい部分、すなわちMoが粒界に沿って拡散したMo拡散層が確認できた。同様に図16でもMo拡散層が確認できた。また図14、16に基づいてMo拡散層の面積率を比べると、図16に示すNo.6の方が大きかった。   In addition, the above No. 5 and no. FIGS. 14 and 16 show the results of STEM observation of the TEM observation of the exposed plane obtained by cutting the second layer portion 6 in the horizontal direction. As shown in FIG. 14, a bright part along the grain boundary part, that is, a Mo diffusion layer in which Mo diffused along the grain boundary was confirmed. Similarly, the Mo diffusion layer was confirmed in FIG. Further, when comparing the area ratios of the Mo diffusion layers based on FIGS. 6 was bigger.

1 サイドヒロックに相当する突起
2 反応層
3 第一層
4 第二層
5 第三層
6 Mo反応層
7 Mo拡散層
1 protrusion corresponding to side hillock 2 reaction layer 3 first layer 4 second layer 5 third layer 6 Mo reaction layer 7 Mo diffusion layer

Claims (8)

基板上に形成されるフラットパネルディスプレイ用の配線膜であって、
前記配線膜は、Mo、Ti、Cr、W、およびTaよりなる群から選択される少なくとも一種以上の高融点金属を含む第一層と;
希土類元素及びNiをそれぞれ0.01原子%以上含み、かつ前記希土類元素及びNiの合計の含有量が0.055原子%以下であるAl合金からなる第二層とが積層された積層構造からなることを特徴とするフラットパネルディスプレイ用配線膜。
A wiring film for a flat panel display formed on a substrate,
The wiring film includes a first layer containing at least one refractory metal selected from the group consisting of Mo, Ti, Cr, W, and Ta;
It has a laminated structure in which a second layer made of an Al alloy containing rare earth elements and Ni in an amount of 0.01 atomic% or more and a total content of the rare earth elements and Ni of 0.055 atomic% or less is laminated. A wiring film for a flat panel display.
前記第一層と前記第二層との界面に、前記高融点金属の少なくとも1種とAlとを含む反応層を有するものである請求項1に記載のフラットパネルディスプレイ用配線膜。   The wiring film for a flat panel display according to claim 1, wherein a reaction layer containing at least one kind of the refractory metal and Al is provided at an interface between the first layer and the second layer. 前記反応層は、400℃以上、500℃以下の熱履歴によって形成されるものである請求項2に記載のフラットパネルディスプレイ用配線膜。   The wiring layer for a flat panel display according to claim 2, wherein the reaction layer is formed by a thermal history of 400 ° C. or more and 500 ° C. or less. 前記希土類元素は、Nd、La、Gd、Dy、Y、およびCeよりなる群から選択される少なくとも一種以上である請求項1〜3のいずれか1項に記載のフラットパネルディスプレイ用配線膜。   The wiring film for a flat panel display according to claim 1, wherein the rare earth element is at least one selected from the group consisting of Nd, La, Gd, Dy, Y, and Ce. 前記反応層は、AlとMoの化合物を含むものである請求項2又は3に記載のフラットパネルディスプレイ用配線膜。   The wiring film for a flat panel display according to claim 2, wherein the reaction layer contains a compound of Al and Mo. 基板側から順に、前記第一層および前記第二層の積層構造の配線膜がこの順序で形成されているか、または、前記第二層および前記第一層の積層構造の配線膜がこの順序で形成されている請求項1〜5のいずれか1項に記載のフラットパネルディスプレイ用配線膜。   In order from the substrate side, the wiring film of the laminated structure of the first layer and the second layer is formed in this order, or the wiring film of the laminated structure of the second layer and the first layer is arranged in this order. The wiring film for flat panel displays of any one of Claims 1-5 formed. 基板側から順に、前記第一層、前記第二層、および前記第一層の積層構造の配線膜がこの順序で形成されており、前記第一層と前記第二層との界面には、いずれも、前記反応層が形成されている請求項2、3又は5のいずれか1項に記載のフラットパネルディスプレイ用配線膜。   In order from the substrate side, a wiring film having a laminated structure of the first layer, the second layer, and the first layer is formed in this order, and at the interface between the first layer and the second layer, In any case, the wiring film for a flat panel display according to any one of claims 2, 3 and 5, wherein the reaction layer is formed. 請求項1に記載のフラットパネルディスプレイ用配線膜の形成に用いられるスパッタリングターゲットであって、
前記スパッタリングターゲットは、希土類元素及びNiをそれぞれ0.01原子%以上含み、前記希土類元素及びNiの合計の含有量が0.055原子%以下であって、残部:Alおよび不可避不純物であるAl合金スパッタリングターゲット。
A sputtering target used for forming a wiring film for a flat panel display according to claim 1,
The sputtering target contains 0.01 atomic% or more of a rare earth element and Ni, respectively, the total content of the rare earth element and Ni is 0.055 atomic% or less, and the balance: Al and an inevitable impurity Al alloy Sputtering target.
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