JP2010262991A - Al alloy film for display device having superior developer resistance, display device, and sputtering target - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an Al alloy film for a display device, exhibiting a sufficiently low electric resistivity even when a heat treatment at low temperature is applied, having a sufficiently reduced contact resistivity with a transparent pixel electrode directly connected to the Al alloy film, and having superior developer resistance. <P>SOLUTION: An Al alloy film directly connected to a transparent conductive film on a substrate of a display device contains ≤2.0 atom% (0 atom% is not included) of a Ni and/or Co element belonging to a group A and 0.05-2.5 atom% of at least one element belonging to a group B. The element of the group B comprises Gd, Nd, La, Y, Sc, Pr, Dy, Ce, Ho, Er, Tb, Pm, Tm, Yb, Lu, Hf, Zr, Zn, Mg, Ti, Mn and Ge. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to an Al alloy film for a display device having excellent developer resistance, a display device, and a sputtering target.

  A liquid crystal display device used in various fields ranging from a small mobile phone to a large television exceeding 30 inches uses a thin film transistor (hereinafter referred to as “TFT”) as a switching element, and a transparent pixel electrode. A TFT substrate having a wiring portion such as a gate wiring and a source-drain wiring, a semiconductor layer such as amorphous silicon (a-Si) or polycrystalline silicon (p-Si), and a predetermined distance from the TFT substrate. And a counter substrate provided with a common electrode, and a liquid crystal layer filled between the TFT substrate and the counter substrate.

  In a TFT substrate, wiring materials such as gate wiring and source-drain wiring are made of Al alloy such as pure Al or Al-Nd (hereinafter, these are collectively referred to) because they have low electrical resistance and are easy to process finely. Are sometimes used as Al-based alloys). A barrier metal layer made of a refractory metal such as Mo, Cr, Ti, or W is usually provided between the Al-based alloy wiring and the transparent pixel electrode. In this way, the reason for connecting the Al-based alloy wiring through the barrier metal layer is that when the Al-based alloy wiring is directly connected to the transparent pixel electrode, the connection resistance (contact resistance) increases and the display quality of the screen decreases. Because. That is, Al constituting the wiring directly connected to the transparent pixel electrode is very easily oxidized, and oxygen generated during the film formation process of the liquid crystal display or oxygen added at the time of film formation causes the Al-based alloy wiring and the transparent pixel electrode. This is because an Al oxide insulating layer is formed at the interface. Moreover, although the transparent conductive film such as ITO constituting the transparent pixel electrode is a conductive metal oxide, it cannot be electrically ohmic connected by the Al oxide layer generated as described above.

  However, in order to form the barrier metal layer, in addition to the film forming sputtering apparatus necessary for forming the gate electrode, the source electrode, and the drain electrode, an extra film forming chamber for forming the barrier metal must be provided. I must. As the cost of the liquid crystal display is reduced along with the mass production, an increase in manufacturing cost and a decrease in productivity due to the formation of the barrier metal layer cannot be neglected.

  Therefore, electrode materials and manufacturing methods that can omit the formation of the barrier metal layer and can directly connect the Al-based alloy wiring to the transparent pixel electrode have been proposed.

  For example, the applicant of the present application discloses a direct contact technique that enables the omission of the barrier metal layer, simplifies the process without increasing the number of processes, and connects the Al-based alloy wiring directly and securely to the transparent pixel electrode. (Patent Document 1).

  Specifically, Patent Document 1 discloses an Al alloy containing 0.1 to 6 atomic% of at least one selected from the group consisting of Au, Ag, Zn, Cu, Ni, Sr, Ge, Sm, and Bi as an alloy component. Disclosure. If an Al alloy wiring made of the Al alloy is used, at least a part of these alloy components exist as a precipitate or a concentrated layer at the interface between the Al alloy film and the transparent pixel electrode, whereby a barrier metal layer is formed. Even if is omitted, the contact resistance with the transparent pixel electrode can be reduced.

  However, the heat-resistant temperatures of Al alloys containing Ni or the like described in Patent Document 1 are all about 150 to 200 ° C., which is lower than the maximum temperature in the manufacturing process of a display device (particularly a TFT substrate).

  In recent years, the manufacturing temperature of display devices tends to be further lowered from the viewpoint of improving yield and improving productivity. However, even if the maximum temperature of the manufacturing process (deposition temperature of the silicon nitride film) is lowered to 300 ° C., it exceeds the heat resistance temperature of the Al alloy described in Patent Document 1.

  On the other hand, when the maximum temperature in the manufacturing process (referred to as “heat treatment temperature” in the present invention) is lowered, there is an adverse effect that the electrical resistance of the Al-based alloy wiring is not sufficiently lowered. Therefore, the applicant of the present application discloses, in Patent Document 2, an Al alloy that exhibits a sufficiently low electric resistance even at a low heat treatment temperature while exhibiting good heat resistance.

  Specifically, at least one element selected from the group consisting of Ni, Ag, Zn, Cu, and Ge (hereinafter referred to as “α component”), and Mg, Cr, Mn, Ru, Rh, Pd, and Ir. , Pt, La, Ce, Pr, Gd, Tb, Sm, Eu, Ho, Er, Tm, Yb, Lu, and Dy, at least one element (hereinafter referred to as “X component”). An Al alloy film made of an Al-α-X alloy containing bismuth is disclosed.

  When the Al alloy film is used for a thin film transistor substrate, the barrier metal layer can be omitted, and the transparent pixel electrode made of the Al alloy film and the conductive oxide film can be directly and reliably contacted without increasing the number of steps. It is supposed to be possible. In addition, even when a low heat treatment temperature of, for example, about 100 ° C. or higher and 300 ° C. or lower is applied to the Al alloy film, it is said that reduction in electrical resistance and excellent heat resistance can be achieved. Specifically, for example, even when a low-temperature heat treatment at 250 ° C. for 30 minutes is employed, the electric resistivity of the Al alloy film can be 7 μΩ · cm or less without causing defects such as hillocks. Are listed.

JP 2004-214606 A JP 2006-261636 A

  As described above, by adding an alloy element to pure Al, various functions not found in pure Al are given. On the other hand, when the amount of alloy element added increases, the electrical resistance of the wiring itself increases. End up. In addition, an undesirable tendency appears that the corrosion resistance deteriorates due to the addition of alloy elements.

  In particular, in the manufacturing process of the array substrate, a plurality of wet processes are passed. However, when a metal nobler than Al is added, a problem of galvanic corrosion appears and the corrosion resistance deteriorates. For example, an alkaline developer containing TMAH (tetramethylammonium hydroxide) is used in a photolithography process (hereinafter sometimes referred to as a development process), but in the case of a direct contact structure, a barrier metal layer is omitted. Therefore, the Al alloy film is exposed and is easily damaged by the developer.

  According to the examination results of the present inventors, particularly when the contact resistance reducing element described in Patent Documents 1 and 2 (Au, Ag, Zn, Cu, Ni, Sr, Sm, Ge, etc. is added to the Al film) It was found that the etching rate (dissolution rate) of the Al alloy film in the development process tends to be remarkably increased. It is known that the etching of the Al alloy film in the development process is promoted by galvanic corrosion accompanying the concentration of the additive element, and in particular, it is electrochemically more noble than Al such as Au, Ag, Ni, and Cu. When an element is added, the tendency appears notably. When the etching rate in the development process is increased, there are problems that it is difficult to rework the wiring and that the yield in manufacturing is reduced.

  Further, according to the examination results of the present inventors, the problems of galvanic corrosion and etching rate increase caused by the developer described above are also caused by the environmental temperature. For example, the developer resistance excellent in a room temperature environment of 25 ° C. Even if it does, it has been found that the above problems appear when the temperature rises to about 30 ° C., and the developer resistance may be inferior.

  The present invention has been made in view of the above problems, and its object is to provide a display device having low electrical resistance, low contact resistance even when a barrier metal layer is omitted, and excellent developer resistance. The object is to provide an Al alloy film. More specifically, an object of the present invention is to provide an Al alloy film for a display device, which does not show an increase in etching rate even when the temperature of the developing process is increased to 30 ° C. and has excellent developer resistance.

  Another object of the present invention is to provide a sputtering target particularly useful for the production of the Al alloy film for a display device.

  An Al alloy film excellent in developer resistance according to the present invention that can achieve the above object is an Al alloy film for a display device that is directly connected to a transparent pixel electrode on a substrate of the display device, and the Al alloy film Includes not more than 2.0 atomic percent (not including 0 atomic percent) of Ni and / or Co elements belonging to group A, and 0.05 to 2.5 atomic percent of at least one element belonging to group B, The elements of group B are Gd, Nd, La, Y, Sc, Pr, Dy, Ce, Ho, Er, Tb, Pm, Tm, Yb, Lu, Hf, Zr, Zn, Mg, Ti, Mn, and Ge. It has a gist where it is composed of.

  In a preferred embodiment of the present invention, the group B element is composed of Gd, Nd, La, Y, Sc, Pr, and Dy.

  In a preferred embodiment of the present invention, the element of group B is composed of elements of Gd, Nd, La, and Y belonging to group B1.

  In a preferred embodiment of the present invention, the ratio (β1 / α) between the content of group B1 (β1) and the content of group A (α) (β1 / α) satisfies 1.5.

  The present invention includes a display device in which the Al alloy film for a display device described above is used for a thin film transistor.

In addition, the sputtering target of the present invention that can achieve the above-described object belongs to a group A containing Ni and / or Co elements of 2.0 atomic% or less (not including 0 atomic%) and the following group B: It has a gist where it contains 0.05 to 2.5 atomic% of at least one element.
Group B elements: Gd, Nd, La, Y, Sc, Pr, Dy, Ce, Ho, Er, Tb, Pm, Tm, Yb, Lu, Hf, Zr, Zn, Mg, Ti, Mn, and Ge.

  In a preferred embodiment of the present invention, the group B element is composed of Gd, Nd, La, Y, Sc, Pr, and Dy.

  In a preferred embodiment of the present invention, the element of group B is composed of elements of Gd, Nd, La, and Y belonging to group B1.

  In a preferred embodiment of the present invention, the ratio (β1 / α) of the content of group B1 (β1) to the content of group A (α) (β1 / α) satisfies 1.5.

  According to the present invention, an Al alloy film can be directly connected to a transparent pixel electrode (transparent conductive film, oxide conductive film) without interposing a barrier metal layer, and a relatively low heat treatment temperature (for example, 250). In the case of applying ~ 300 ° C., an Al alloy film for a display device having a sufficiently low electric resistance and excellent in resistance to an alkaline developer can be provided. The above heat treatment temperature refers to the highest processing temperature in a display device manufacturing process (for example, TFT substrate manufacturing process). In a general display device manufacturing process, CVD film formation for forming various thin films is performed. It means the heating temperature of the substrate at the time, the temperature of the heat treatment furnace when the protective film is thermally cured, and the like.

  If the Al alloy film of the present invention is applied to a display device, the barrier metal layer can be omitted. Therefore, if the Al alloy film of the present invention is used, a display device with excellent productivity, low cost and high performance can be obtained.

FIG. 1 is an enlarged schematic cross-sectional explanatory view showing a configuration of a typical liquid crystal display to which an amorphous silicon TFT substrate is applied. FIG. 2 is a schematic cross-sectional explanatory view showing the configuration of the TFT substrate according to the first embodiment of the present invention. FIG. 3 is an explanatory view showing an example of a manufacturing process of the TFT substrate shown in FIG. 2 in order. FIG. 4 is an explanatory view showing an example of a manufacturing process of the TFT substrate shown in FIG. 2 in order. FIG. 5 is an explanatory diagram showing an example of a manufacturing process of the TFT substrate shown in FIG. 2 in order. FIG. 6 is an explanatory view showing an example of the manufacturing process of the TFT substrate shown in FIG. 2 in order. FIG. 7 is an explanatory diagram showing an example of a manufacturing process of the TFT substrate shown in FIG. 2 in order. FIG. 8 is an explanatory view showing an example of a manufacturing process of the TFT substrate shown in FIG. 2 in order. FIG. 9 is an explanatory diagram showing an example of a manufacturing process of the TFT substrate shown in FIG. 2 in order. FIG. 10 is an explanatory view showing an example of a manufacturing process of the TFT substrate shown in FIG. 2 in order. FIG. 11 is a schematic cross-sectional explanatory view showing a configuration of a TFT substrate according to the second embodiment of the present invention. FIG. 12 is an explanatory diagram showing an example of a manufacturing process of the TFT substrate shown in FIG. 11 in order. FIG. 13 is an explanatory view showing, in order, an example of a manufacturing process of the TFT substrate shown in FIG. FIG. 14 is an explanatory view showing an example of a manufacturing process of the TFT substrate shown in FIG. 11 in order. FIG. 15 is an explanatory view showing an example of a manufacturing process of the TFT substrate shown in FIG. 11 in order. FIG. 16 is an explanatory view showing an example of a manufacturing process of the TFT substrate shown in FIG. 11 in order. FIG. 17 is an explanatory diagram showing an example of a manufacturing process of the TFT substrate shown in FIG. 11 in order. FIG. 18 is an explanatory view showing, in order, an example of the manufacturing process of the TFT substrate shown in FIG. FIG. 19 is a diagram showing a Kelvin pattern (TEG pattern) used for measuring the direct contact resistance between the Al alloy film and the transparent pixel electrode. FIG. 20 is a graph showing the relationship between the developer temperature and the etching rate in various Al—Co alloy films. 21 shows the No. used in the example. 19 shows XPS depth profile before and after 19 developer corrosion resistance test.

  The present invention relates to a direct contact technique capable of directly connecting an Al alloy film to a transparent conductive film (pixel electrode) without using a barrier metal layer. In detail, the characteristics required for direct contact technology (when the electrical resistance can be made sufficiently small even when the heat treatment temperature is low, and when the barrier metal layer is omitted and directly connected to the transparent pixel electrode) In particular, an Al alloy film having an extremely excellent resistance (developer resistance) to a developing solution used in the manufacturing process of a display device is provided. It relates to the technology to provide.

  The inventors of the present invention have studied in the direct contact technique from the viewpoint of providing an Al alloy film particularly excellent in developer resistance. Pay particular attention to Ni and Co, which are excellent in reducing contact resistance with transparent conductive films, and study from the viewpoint of improving developer resistance by suppressing an increase in the etching rate (dissolution rate) of the Al alloy film in the development process. It has progressed.

  In the development step, Al is eluted immediately after touching the developer, and the Al alloy film is etched. At this time, if an element that is electrochemically more noble than Al, such as Co, is contained in the Al alloy film, Ni or Co is concentrated on the surface of the Al alloy film and acts as a cathode site to cause galvanic corrosion. Then, the etching rate is accelerated. Therefore, in order to suppress the etching rate in the development process of the Al—Ni alloy film or the Al—Co alloy film (hereinafter, these may be collectively referred to as “Al—Ni / Co alloy film”), the cathode reaction It is necessary to add a suppressor element or to form a protective film (hydroxide) that suppresses the anode reaction of Al.

  Based on such a viewpoint, the present inventors have sought an element that (a) has a cathode reaction suppressing action and (a) easily forms an anode reaction suppressing film in a developer environment.

Among them, (a) the cathode reaction suppressing element is selected such that the exchange current density with the Al film in the development process is 3.0 × 10 ⁻³ A / cm ² or less. According to the examination results of the present inventors, the current density (exchange current density) at the intersection of the cathode curve of various elements obtained by measuring the polarization curves of various elements in the developer environment and the anode curve of Al, It has been found that there is a good correlation with the corrosion rate (dissolution rate), and that this exchange current density satisfies the above range is because an etching rate with no practical problem can be obtained. On the other hand, (a) the element for suppressing the anode reaction of Al was selected from the potential-pH diagram as an element whose hydroxide is stable in the developer environment.

As a result of further intensive investigation of elements applicable to the Al—Ni / Co alloy film among the elements satisfying both of the above (a) and (b), as a result, at least one element belonging to the following group B The inventors have found that the intended purpose can be achieved by using an Al—Ni / Co— (Group B) alloy film to which a predetermined amount is added, and the present invention has been completed.
Group B: Gd, Nd, La, Y, Sc, Pr, Dy, Ce, Ho, Er, Tb, Pm, Tm, Yb, Lu, Hf, Zr, Zn, Mg, Ti, Mn, and Ge.
Gd, Nd, La, Y, Sc, Pr, and Dy are preferable, and elements of Gd, Nd, La, and Y belonging to the group B1 are more preferable.

  In particular, according to the detailed examination results of the present inventors, an Al—Ni / Co alloy film containing no group B element has good developer resistance at a normal developer temperature (room temperature of about 25 ° C.). However, it has been found that the resistance to the developer is lowered and the etching rate is remarkably increased under a temperature environment in which the temperature rises to about 30 ° C. such as in summer (see Examples described later). The elements of Group B used in the present invention were found to be particularly excellent in development resistance under the above temperature environment, and the present invention was completed.

  Hereinafter, it will be described with reference to FIG. 20 that the developer etching rate of the Al—Co alloy film depends on the temperature of the developer (temperature dependency of the etching rate). FIG. 20 is a graph of the results of the Al—Co alloy film. As shown in the examples described later, the same tendency as in FIG. 20 was also observed in the Al—Ni alloy film.

  FIG. 20 is a graph obtained by extracting and plotting a part of the Al alloy film described in Examples described later. The horizontal axis represents the developer temperature (° C.), and the vertical axis represents the etching rate of the Al alloy film (mm / min). ). Here, in order to investigate the temperature dependence of the etching rate, the etching rate when the developer temperature is 25 ° C., 30 ° C., and 35 ° C. is examined. The higher the temperature, the more galvanic corrosion proceeds and the corrosion resistance decreases. In the examples described later, an etching rate of 100 mm / min or less is evaluated as acceptable (excellent developer resistance).

  As is apparent from FIG. 20, in the Al-0.2 atomic% Co alloy film not containing the element of group B, the developer resistance decreases with increasing temperature, and the etching rate exceeds the acceptable value at 30 ° C. On the other hand, all of the examples of the present invention containing Group B elements (strictly, elements of La, Gd, Nd, and Y belonging to Group B1) are good even when the developer temperature is increased to 30 ° C. Developer resistance was obtained. Such excellent developer resistance was maintained even when the temperature was increased to 35 ° C.

  Hereinafter, each element constituting the present invention will be described.

Ni and / or Co belonging to group A is 2.0 atomic% or less (excluding 0 atomic%)
Ni and Co, which are elements belonging to Group A, are useful elements for reducing contact resistance with the transparent conductive film. That is, if Ni or Co is contained as an alloy component in the Al alloy film, conductive Ni / Co-containing precipitates or Ni / Co-containing concentrates are present at the interface between the Al alloy film and the transparent conductive film even at a low heat treatment temperature. An insulating layer is easily formed, and an insulating layer made of Al oxide can be prevented from being formed at the interface, and between the Al alloy film and the transparent pixel electrode (for example, ITO), the precipitate or the concentrated layer is passed through. It seems that most of the contact current flows and the contact resistance can be kept low.

  In the present invention, Ni and Co, which are elements belonging to group A, may be used alone or in combination. When the content of an element belonging to group A (single amount is a single amount, and when both are included is a total amount) is α (atomic%), α is set to 0 in order to effectively exhibit the above action. It is preferable to set it to 0.05 atomic% or more. More preferable α is 0.08 atomic% or more. However, the above action is saturated even if added excessively, and the corrosion resistance in the development process is hindered. Therefore, the upper limit of α is set to 2.0 atomic%. A preferable upper limit of α is 0.5 atomic%, and more preferably 0.3 atomic%.

Belongs to group B (Gd, Nd, La, Y, Sc, Pr, Dy, Ce, Ho, Er, Tb, Pm, Tm, Yb, Lu, Hf, Zr, Zn, Mg, Ti, Mn, and Ge) 0.05-2.5 atomic% of at least one element
Group B elements are useful for improving the developer resistance of Al-Co alloy films. By adding at least one Group B element, the galvanic corrosion rate is suppressed and the amount of corrosion in the development process is reduced. Is done. These elements are presumed to reduce galvanic corrosion with Al since the cathode current in the developer environment is small. Further, among the elements of group B, the elements of Nd, La, Gd, and Y are more excellent in the effect of reducing the corrosion rate because they are easy to stably form a hydroxide useful for preventing galvanic corrosion in a developer environment. Yes. In the present invention, the elements (Nd, La, Gd, Y) that are particularly preferably used may be referred to as elements belonging to the group B1.

  For reference, in FIG. 19 shows the results of depth profile [XPS (X-ray photoelectron spectroscopy)] before and after the developer corrosion test for 19 (Al-0.2 atomic% Co-0.6 atomic% Y). As shown in FIG. 21, when Y is used as an element of group B, it can be seen that Y is concentrated on the surface.

  In order to effectively exhibit such an action, the amount of addition of Group B (single amount when used alone, or total amount when containing two or more types) is 0.05 atomic% or more. The preferable addition amount of Group B is 0.2 atomic% or more, more preferably 0.4 atomic% or more. However, if added excessively, the electrical resistance of the Al alloy film itself after heat treatment increases, so the upper limit is made 2.5 atomic%. A preferable upper limit is 1.0 atomic%, and more preferably 0.8 atomic%.

  Among the elements of group B, Gd, Nd, La, Y, Sc, Pr, and Dy are preferable, and Gd, Nd, La, and Y (elements belonging to group B1) are more preferable.

  In the Al alloy film of the present invention, one or more elements of Group B can be used, and even when two or more elements are used in combination, the etching rate is not hindered and can be used without any trouble.

  Here, when the content of group B1 is β1 (atomic%), the ratio (β1 / α) to the content (α) of group A preferably satisfies 1.5. As a result, a developer etching rate of 50 nm / min or less (in the examples described later, the developer resistance is evaluated as ◎) can be achieved (see the examples described later). The ratio of (β1 / α) is preferably as large as possible. For example, it is preferably 1.8 or more, and more preferably 2 or more.

  The Al alloy film of the present invention contains the specified amount of Ni and / or Co and Group B elements, with the balance being Al and inevitable impurities.

  Furthermore, a known component useful for reducing contact resistance with the transparent conductive film can be added to the Al alloy film of the present invention within a range not impairing the function of the present invention. For example, as shown in the examples described later, Ge may be included in a range of 0.05 to 2.5 atomic%, for example. Alternatively, the contact resistance reducing element described in Patent Documents 1 and 2 (for example, Au, Ag, Cu, Ni, Sr, Sm, Bi, etc.) may be included.

  The Al alloy film is preferably formed by a sputtering method using a sputtering target (hereinafter also referred to as “target”). This is because a thin film having excellent in-plane uniformity of components and film thickness can be easily formed as compared with a thin film formed by ion plating, electron beam vapor deposition or vacuum vapor deposition.

  Further, in order to form the Al alloy film by the sputtering method, the target is Ni and / or Co of 2.0 atomic% or less (not including 0 atomic%), and at least one element belonging to Group B If the Al alloy sputtering target having the same composition as the desired Al alloy film is used, the Al alloy having the desired components and composition can be obtained without misalignment. It is good because a film can be formed.

  Therefore, the present invention also includes a sputtering target having the same composition as the Al alloy film described above within the scope of the present invention. Specifically, Ni and / or Co elements belonging to group A are 2.0 atomic% or less (not including 0 atomic%), and at least one element belonging to group B is 0.05 to 2.5 atoms. % Sputtering targets are also included within the scope of the present invention. The balance is Al and inevitable impurities. As a preferred embodiment, a sputtering target in which the group B element is composed of Gd, Nd, La, Y, Sc, Pr, and Dy; the group B element is Gd, Nd, La, and A sputtering target composed of an element of Y; a sputtering target satisfying a ratio (β1 / α) of the content (β1) of the group B1 to the content (α) of the group A exceeds 1.5. Can be mentioned.

The shape of the target includes those processed into an arbitrary shape (such as a square plate shape, a circular plate shape, or a donut plate shape) according to the shape or structure of the sputtering apparatus.
As a method for producing the above target, a method of producing an ingot made of an Al-based alloy by a melt casting method, a powder sintering method, or a spray forming method, or a preform made of an Al-based alloy (the final dense body is prepared) Examples thereof include a method obtained by producing an intermediate before being obtained) and then densifying the preform by a densification means.

  The present invention also includes a display device characterized in that the Al alloy film is used in a thin film transistor. As an aspect of the display device, the Al alloy film includes a source electrode and / or a drain electrode of a thin film transistor and a signal. Used for the line, and the drain electrode is directly connected to the transparent conductive film; and / or used for the gate electrode and the scanning line.

  Further, the gate electrode and the scanning line, the source electrode and / or the drain electrode, and the signal line are included in the form of an Al alloy film having the same composition.

  The transparent conductive film used in the present invention is preferably indium tin oxide (ITO) or indium zinc oxide (IZO).

  Hereinafter, a preferred embodiment of a display device according to the present invention will be described with reference to the drawings. Hereinafter, a liquid crystal display device (for example, FIG. 1, which will be described in detail later) provided with an amorphous silicon TFT substrate or a polysilicon TFT substrate will be described as a representative example, but the present invention is not limited to this.

(Embodiment 1)
An embodiment of an amorphous silicon TFT substrate will be described in detail with reference to FIG.
FIG. 2 is an enlarged view of a main part A of FIG. 1 (an example of the display device according to the present invention), and illustrates a preferred embodiment of the TFT substrate (bottom gate type) of the display device according to the present invention. It is a schematic cross-sectional explanatory drawing.

  In the present embodiment, Al alloy films are used as the source-drain electrode / signal line (34) and the gate electrode / scanning line (25, 26). In the conventional TFT substrate, a barrier metal layer is formed on the scanning line 25, on the gate electrode 26, and on the signal line 34 (source electrode 28 and drain electrode 29). In the TFT substrate of the form, these barrier metal layers can be omitted.

  That is, according to the present embodiment, the Al alloy film used for the drain electrode 29 of the TFT can be directly connected to the transparent pixel electrode 5 without interposing the barrier metal layer. In such an embodiment, too. As a result, good TFT characteristics comparable to or higher than those of conventional TFT substrates can be realized.

  Next, an example of a method for manufacturing the amorphous silicon TFT substrate according to the present invention shown in FIG. 2 will be described with reference to FIGS. The thin film transistor is an amorphous silicon TFT using hydrogenated amorphous silicon as a semiconductor layer. 3 to 10 are denoted by the same reference numerals as those in FIG.

  First, an Al alloy film having a thickness of about 200 nm is laminated on a glass substrate (transparent substrate) 1a using a sputtering method. The film forming temperature of sputtering was 150 ° C. By patterning this Al alloy film, the gate electrode 26 and the scanning line 25 are formed (see FIG. 3). At this time, in FIG. 4 to be described later, the periphery of the Al alloy film constituting the gate electrode 26 and the scanning line 25 is etched to a taper of about 30 ° to 40 ° so that the coverage of the gate insulating film 27 is improved. It is good to leave.

  Next, as shown in FIG. 4, a gate insulating film 27 is formed of a silicon oxide film (SiOx) having a thickness of about 300 nm by using a method such as plasma CVD. The film formation temperature of the plasma CVD method was about 350 ° C. Subsequently, a hydrogenated amorphous silicon film (αSi—H) having a thickness of about 50 nm and a silicon nitride film (SiNx) having a thickness of about 300 nm are formed on the gate insulating film 27 by using a method such as plasma CVD. Form a film.

Subsequently, as shown in FIG. 5, the silicon nitride film (SiNx) is patterned by backside exposure using the gate electrode 26 as a mask to form a channel protective film. Further, an n ⁺ type hydrogenated amorphous silicon film (n ⁺ a-Si—H) 56 having a thickness of about 50 nm doped with phosphorus is formed thereon, and then a hydrogenated amorphous silicon film is formed as shown in FIG. The (a-Si-H) 55 and the n ⁺ type hydrogenated amorphous silicon film (n ⁺ a-Si—H) 56 are patterned.

Next, a Mo film 53 with a thickness of about 50 nm and Al alloy films 28 and 29 with a thickness of about 300 nm are sequentially stacked thereon using a sputtering method. The film forming temperature of sputtering was 150 ° C. Next, by patterning as shown in FIG. 7, the source electrode 28 integrated with the signal line and the drain electrode 29 that is in direct contact with the transparent pixel electrode 5 are formed. Furthermore, using the source electrode 28 and the drain electrode 29 as a mask, the n ⁺ type hydrogenated amorphous silicon film (n ⁺ a-Si—H) 56 on the channel protective film (SiNx) is removed by dry etching.

  Next, as shown in FIG. 8, a silicon nitride film 30 having a thickness of about 300 nm is formed by using, for example, a plasma CVD apparatus, and a protective film is formed. The film formation temperature at this time is about 250 ° C., for example. Next, after a photoresist layer 31 is formed on the silicon nitride film 30, the silicon nitride film 30 is patterned, and contact holes 32 are formed in the silicon nitride film 30 by, for example, dry etching. At the same time, a contact hole (not shown) is formed in a portion corresponding to the connection with TAB on the gate electrode at the end of the panel.

  Next, after an ashing process using, for example, oxygen plasma, as shown in FIG. 9, the photoresist layer 31 is stripped using, for example, an amine-based stripping solution. Finally, within the range of storage time (about 8 hours), for example, as shown in FIG. 10, an ITO film having a thickness of, for example, about 40 nm is formed and patterned by wet etching to form the transparent pixel electrode 5 To do. At the same time, when the ITO film is patterned for bonding to the TAB at the connection portion of the gate electrode at the end of the panel, the TFT array substrate 1 is completed.

  In the TFT substrate thus manufactured, the drain electrode 29 and the transparent pixel electrode 5 are directly connected.

  In the above description, an ITO film is used as the transparent pixel electrode 5, but an IZO film may be used. Further, polysilicon may be used as the active semiconductor layer instead of amorphous silicon.

  Using the TFT substrate thus obtained, for example, the liquid crystal display device shown in FIG. 1 is completed by the method described below.

  First, for example, polyimide is applied to the surface of the TFT substrate 1 manufactured as described above and dried, and then a rubbing process is performed to form an alignment film.

  On the other hand, the counter substrate 2 forms the light shielding film 9 on the glass substrate by patterning, for example, chromium (Cr) in a matrix. Next, resin-made red, green, and blue color filters 8 are formed in the gaps between the light shielding films 9. A counter electrode is formed by disposing a transparent conductive film such as an ITO film as the common electrode 7 on the light shielding film 9 and the color filter 8. Then, for example, polyimide is applied to the uppermost layer of the counter electrode, and after drying, a rubbing process is performed to form the alignment film 11.

Next, the TFT substrate 1 and the surface of the counter substrate 2 on which the alignment film 11 is formed are arranged so as to face each other, and the TFT substrate 1 is opposed to the TFT substrate 1 by a sealing material 16 made of resin, excluding the liquid crystal sealing port. The 22 substrates are bonded together. At this time, a gap between the two substrates is kept substantially constant by interposing a spacer 15 between the TFT substrate 1 and the counter substrate 2.
By placing the empty cell thus obtained in a vacuum and gradually returning it to atmospheric pressure with the sealing port immersed in liquid crystal, a liquid crystal material containing liquid crystal molecules is injected into the empty cell to form a liquid crystal layer. Form and seal the sealing port. Finally, polarizing plates 10 are attached to both sides of the empty cell to complete the liquid crystal display.

  Next, as shown in FIG. 1, the driver circuit 13 for driving the liquid crystal display device is electrically connected to the liquid crystal display, and is arranged on the side portion or the back surface portion of the liquid crystal display. Then, the liquid crystal display is held by the holding frame 23 including the opening serving as the display surface of the liquid crystal display, the backlight 22 serving as the surface light source, the light guide plate 20, and the holding frame 23, thereby completing the liquid crystal display device.

(Embodiment 2)
An embodiment of a polysilicon TFT substrate will be described in detail with reference to FIG.
FIG. 11 is a schematic cross-sectional explanatory view illustrating a preferred embodiment of a top gate type TFT substrate according to the present invention.

This embodiment is mainly different from Embodiment 1 described above in that polysilicon is used instead of amorphous silicon as an active semiconductor layer and that a top gate type TFT substrate is used instead of a bottom gate type. Yes. Specifically, in the polysilicon TFT substrate of the present embodiment shown in FIG. 11, the active semiconductor film is a polysilicon film not doped with phosphorus (poly-Si) and a polysilicon film into which phosphorus or arsenic is ion-implanted. It differs from the amorphous silicon TFT substrate shown in FIG. 2 described above in that it is formed of (n ⁺ poly-Si). Further, the signal line is formed so as to intersect the scanning line through an interlayer insulating film (SiOx).

  Also in this embodiment, the barrier metal layer formed on the source electrode 28 and the drain electrode 29 can be omitted.

  Next, an example of a method for manufacturing the polysilicon TFT substrate according to the present invention shown in FIG. 11 will be described with reference to FIGS. The thin film transistor is a polysilicon TFT using a polysilicon film (poly-Si) as a semiconductor layer. 12 to 18, the same reference numerals as those in FIG. 11 are given.

First, a silicon nitride film (SiNx) having a thickness of about 50 nm, a silicon oxide film (SiOx) having a thickness of about 100 nm, and a thickness are formed on the glass substrate 1a by a plasma CVD method or the like, for example. A hydrogenated amorphous silicon film (a-Si-H) of about 50 nm is formed. Next, in order to convert the hydrogenated amorphous silicon film (a-Si-H) into polysilicon, heat treatment (about 1 hour at about 470 ° C.) and laser annealing are performed. After the dehydrogenation treatment, the hydrogenated amorphous silicon film (a-Si-H) is irradiated with a laser having an energy of about 230 mJ / cm ² using, for example, an excimer laser annealing apparatus, so that the thickness is about 0. A polysilicon film (poly-Si) of about 3 μm is obtained (FIG. 12).

  Next, as shown in FIG. 13, the polysilicon film (poly-Si) is patterned by plasma etching or the like. Next, as shown in FIG. 14, a silicon oxide film (SiOx) having a thickness of about 100 nm is formed, and a gate insulating film 27 is formed. An Al alloy film with a thickness of about 200 nm and a barrier metal layer (Mo thin film) 52 with a thickness of about 50 nm are stacked on the gate insulating film 27 by sputtering or the like, and then patterned by a method such as plasma etching. Thereby, the gate electrode 26 integral with the scanning line is formed.

Subsequently, as shown in FIG. 15, a mask is formed with a photoresist 31, and, for example, phosphorus is doped at about 1 × 10 ¹⁵ atoms / cm ^{2 at} about 50 keV by using, for example, an ion implantation apparatus, and a polysilicon film (poly- An n ⁺ type polysilicon film (n ⁺ poly-Si) is formed on a part of Si). Next, the photoresist 31 is peeled off, and phosphorus is diffused by heat treatment at about 500 ° C., for example.

Next, as shown in FIG. 16, a silicon oxide film (SiOx) having a thickness of about 500 nm is formed at a substrate temperature of about 250 ° C. using a plasma CVD apparatus, for example, and an interlayer insulating film is formed. The interlayer insulating film (SiOx) and the silicon oxide film of the gate insulating film 27 are dry-etched using a mask patterned with photoresist to form contact holes. A Mo film 53 having a thickness of about 50 nm and an Al alloy film having a thickness of about 450 nm are formed by sputtering and then patterned to form the source electrode 28 and the drain electrode 29 integrated with the signal line. As a result, the source electrode 28 and the drain electrode 29 are contacted to the n ⁺ type polysilicon film (n ⁺ poly-Si) through the contact holes, respectively.

Next, as shown in FIG. 17, a silicon nitride film (SiNx) having a thickness of about 500 nm is formed at a substrate temperature of about 250 ° C. by a plasma CVD apparatus or the like to form an interlayer insulating film. After the photoresist layer 31 is formed on the interlayer insulating film, the silicon nitride film (SiNx) is patterned, and contact holes 32 are formed in the silicon nitride film (SiNx) by, for example, dry etching.
Next, as shown in FIG. 18, after an ashing process using, for example, oxygen plasma, the photoresist is stripped using an amine-based stripping solution in the same manner as in the first embodiment, and then an ITO film is formed. Then, the transparent pixel electrode 5 is formed by patterning by wet etching.

In the polysilicon TFT substrate thus manufactured, the drain electrode 29 is directly connected to the transparent pixel electrode 5.
Next, in order to stabilize the characteristics of the transistor, for example, annealing is performed at about 250 ° C. for about 1 hour to complete a polysilicon TFT array substrate.

  According to the TFT substrate according to the second embodiment and the liquid crystal display device including the TFT substrate, the same effects as those of the TFT substrate according to the first embodiment described above can be obtained.

  Using the TFT array substrate thus obtained, for example, the liquid crystal display device shown in FIG. 1 is completed in the same manner as the TFT substrate of Embodiment 1 described above.

  EXAMPLES Hereinafter, the present invention will be described more specifically with reference to examples. However, the present invention is not limited by the following examples, and should be implemented with appropriate modifications within a range that can meet the above and the following purposes. Are all possible and are within the scope of the present invention.

  An Al alloy film (film thickness = 300 nm) having various alloy compositions shown in Table 1 is obtained by applying a DC magnetron sputtering method (substrate = glass substrate (Eagle 2000 manufactured by Corning)), atmosphere gas = argon, pressure = 2 mTorr, substrate temperature = 25. (° C. (room temperature)).

  For the formation of the Al alloy films having various alloy compositions, Al alloy targets having various compositions prepared by vacuum melting were used as sputtering targets.

  The content of each alloy element in the various Al alloy films used in the examples was determined by ICP emission analysis (inductively coupled plasma emission analysis).

  Using the Al alloy film formed as described above, the electrical resistivity of the Al alloy film itself after the heat treatment, the direct contact resistance when the Al alloy film is directly connected to the transparent pixel electrode (contact resistance with ITO) The resistance to alkaline developer and the resistance to stripping solution as corrosion resistance were measured by the methods shown below.

(1) Electrical resistivity of the Al alloy film itself after heat treatment After forming a 10 μm wide line and space pattern for the Al alloy film and performing a heat treatment at 330 ° C. for 30 minutes in an inert gas atmosphere, The electrical resistivity was measured by the 4-terminal method. And the quality of the electrical resistance of Al alloy film itself after heat processing was determined on the following reference | standard. In this example, ◎, ○, and Δ were accepted.
(Criteria)
A: 4.5 μΩ · cm or less ○: 4.5 μΩ · cm or more 5.5 μΩ · cm or less Δ: 5.5 μΩ · cm or more 6.5 μΩ · cm or less X: 6.5 μΩ · cm or less

(2) Direct contact resistance with the transparent pixel electrode The contact electrical resistance when the Al alloy film and the transparent pixel electrode are in direct contact is the transparent pixel electrode (ITO; indium tin oxide in which 10% by mass of tin oxide is added to indium oxide) ) Is sputtered under the following conditions to produce the Kelvin pattern (contact hole size: 10 μm square) shown in FIG. 19, and four-terminal measurement (current is passed through the ITO-Al alloy film, and ITO-Al alloy at another terminal) The method of measuring the voltage drop between the two was performed. Specifically, the current I is passed between I _{1 and} I ₂ in FIG. 19 and the voltage V between V _{1 and} V ₂ is monitored, whereby the direct contact resistance R of the contact portion C is set to [R = (V ₂ was determined as -V ₁₎ / I _2]. And the quality of the direct contact resistance with ITO was determined on the following reference | standard. In this example, ○ was accepted.

(Conditions for forming transparent pixel electrodes)
・ Atmosphere gas = Argon ・ Pressure = 0.8 mTorr
-Substrate temperature = 25 ° C (room temperature)
(Criteria)
○: Less than 1000Ω ×: 1000Ω or more

(3) Alkali developer resistance (determination of developer etch rate)
After masking the Al alloy film formed on the substrate, it was immersed in a developer (aqueous solution containing 2.38% by mass of TMAH) at 30 ° C. for 2 minutes, washed with pure water for 1 minute, and N ₂ gas. And dried. Thereafter, the masking was peeled off, and the level difference (etching amount) between the test part and the masking part (non-test part) was measured using a palpation-type step meter in total, and the etching rate (nm / min) with the average value as the etching amount. ) Was calculated. Then, the quality of the developer resistance was determined according to the following criteria. In this example, ◎ or ○ was accepted.
(Criteria)
A: Less than 50 nm / min B: Over 50 nm / min 100 nm / min or less Δ: Over 100 nm / min 150 nm / min or less X: Over 150 nm / min

  These results are summarized in Tables 1 and 2. In the composition of each Al alloy film described in Tables 1 and 2, the balance is Al and inevitable impurities.

  From these tables, it can be considered as follows.

  First, No. 1 containing Co as an element of group A was obtained. Consider 1-44, 49-53.

  Of these, No. 36, 44, 52, and 53 are comparative examples that do not contain Group B elements. Co addition can significantly reduce the direct contact resistance with ITO (transparent pixel electrode), but the etching rate is increased and development is performed. Inferior in liquid resistance.

  In contrast, no. 56 is an example in which the total amount of Group B exceeds the upper limit (2.5 atomic%) of the preferable range defined in the present invention, and the electrical resistance after heat treatment increased.

  On the other hand, no. 55 is a conventional example using a pure Al film, and the contact resistance with ITO increased (150,000 μΩ · cm).

  On the other hand, No. further containing Group B elements. The present invention examples 1 to 35, 37 to 43, and 49 to 51 not only achieve a reduction in direct contact resistance with ITO and a reduction in electrical resistance after heat treatment, but are also excellent in developer resistance. I understand that. In particular, according to the present invention, since the etching rate can be suppressed appropriately even at a developer temperature as high as 30 ° C., it is extremely useful in that an Al alloy film excellent in developer resistance can be provided regardless of the environmental temperature.

  Among the above-described examples of the present invention, in particular, the element contains a predetermined group B1 element, and the ratio (β1 / α) of the content (β1) of the group B1 and the content (α) of Co is a preferable range of the present invention ( Over 1.5). Nos. 5 to 8, 17 to 19, 34, and 37 to 41 are extremely excellent in developer resistance.

  The same tendency as described above shows that, as a group A element, No. containing Ni instead of Co. It was recognized also about 45-48. Specifically, these are examples including Group B1 elements in the preferred ratio of the present invention (β1 / α ratio is over 1.5). Compared to 54, developer resistance was improved. Moreover, these also kept the direct contact resistance with ITO, and the electrical resistance after heat processing low.

1 TFT substrate 2 Counter substrate 3 Liquid crystal layer 4 Thin film transistor (TFT)
5 Transparent pixel electrode (transparent conductive film)
6 Wiring section 7 Common electrode 8 Color filter 9 Light shielding film 10 Polarizing plate 11 Alignment film 12 TAB tape 13 Driver circuit 14 Control circuit 15 Spacer 16 Sealing material 17 Protective film 18 Diffuser 19 Prism sheet 20 Light guide plate 21 Reflector 22 Backlight 23 holding frame 24 printed circuit board 25 scanning line 26 gate electrode 27 gate insulating film 28 source electrode 29 drain electrode 30 protective film (silicon nitride film)
31 Photoresist 32 Contact hole 33 Amorphous silicon channel film (active semiconductor film)
34 Signal lines 52 and 53 Barrier metal layer 55 Non-doped hydrogenated amorphous silicon film (a-Si-H)
56 n ⁺ type hydrogenated amorphous silicon film (n ⁺ a-Si-H)

Claims (9)

An Al alloy film directly connected to the transparent conductive film on the substrate of the display device,
The Al alloy film contains 2.0 atomic% or less (not including 0 atomic%) of Ni and / or Co belonging to Group A, and 0.05 to 2.5 of at least one element belonging to Group B. Including atomic%,
The elements of group B are Gd, Nd, La, Y, Sc, Pr, Dy, Ce, Ho, Er, Tb, Pm, Tm, Yb, Lu, Hf, Zr, Zn, Mg, Ti, Mn, and Ge. An Al alloy film for a display device excellent in developer resistance, characterized by comprising:   2. The Al alloy film for a display device according to claim 1, wherein the group B element is composed of Gd, Nd, La, Y, Sc, Pr, and Dy.   3. The Al alloy film for a display device according to claim 1, wherein the element of the group B is composed of elements of Gd, Nd, La, and Y belonging to the group B <b> 1.   The Al alloy film for a display device according to claim 3, wherein a ratio (β1 / α) of the content (β1) of the group B1 and the content (α) of the group A satisfies more than 1.5.   5. A display device, wherein the Al alloy film for a display device according to claim 1 is used for a thin film transistor. 2.0 atomic% or less (not including 0 atomic%) of Ni and / or Co elements belonging to group A, and 0.05 to 2.5 atomic% of at least one element belonging to group B below Sputtering target characterized by the above.
Group B elements: Gd, Nd, La, Y, Sc, Pr, Dy, Ce, Ho, Er, Tb, Pm, Tm, Yb, Lu, Hf, Zr, Zn, Mg, Ti, Mn, and Ge.   The sputtering target according to claim 6, wherein the group B element is composed of Gd, Nd, La, Y, Sc, Pr, and Dy.   The sputtering target according to claim 6 or 7, wherein the element of group B is composed of elements of Gd, Nd, La, and Y belonging to group B1. The sputtering target according to claim 8, wherein a ratio (β1 / α) between the content (β1) of the group B1 and the content (α) of the group A satisfies 1.5.