JP2019005170A - Game machine - Google Patents

Abstract

To prevent processing of stopping the light emission of two (2) or more light emission means from becoming complicated.SOLUTION: If a shift is made to a specific state where progress of games becomes impossible with a BETLED, an amid replay LED, an advantageous section LED, an insertion request LED, and a start valid LED emitting light, the light emission of the BETLED, the amid replay LED, and the advantageous section LED are maintained, but the insertion request LED and the start valid LED are switched off. An output terminal D5 corresponding to the start valid LED and an output terminal D6 corresponding to the insertion request LED are located adjacently.SELECTED DRAWING: Figure 3

Description

  The present invention relates to a gaming machine capable of playing a game.

  As a gaming machine, a predetermined number of bets are set, and a slot machine in which a plurality of types of identification information are variably displayed based on a start operation, and a gaming medium such as a gaming ball is played by a launching device. And a pachinko gaming machine in which a plurality of types of identification information are variably displayed when a game medium is won in a starting area such as a prize opening provided in the gaming area.

  Moreover, as this type of gaming machine, there is a gaming machine having a 7-segment display composed of 7 segments and a plurality of LEDs (see Patent Document 1). In this gaming machine, a 7-segment display and a plurality of LEDs are controlled using 8-bit bit data. Moreover, in this gaming machine, 7 bits out of 8 bits are allocated to data for controlling the light emission of 7 segments, and the remaining 1 bit is used for controlling the light emission of one LED among a plurality of LEDs. Assigned to the data.

Japanese Patent Laid-Open No. 2006-10552

  Even if the matter of executing a turn-off process for turning off two or more LEDs out of a plurality of LEDs that were emitting light when shifted to a specific state can be applied to the gaming machine disclosed in Patent Document 1 Since the output terminals for outputting data for controlling the light emission of the two or more LEDs are separated, there is a problem that the turn-off process becomes complicated.

  The present invention has been conceived in view of such circumstances, and an object of the present invention is to provide a gaming machine that prevents the process of stopping the light emission of two or more light-emitting means from becoming complicated.

(1) A gaming machine (for example, slot machine 1) capable of playing a game,
A plurality of light emitting means (for example, each LED shown in DG5 of the first DG group shown in FIG. 3);
An output port (e.g., first output port 61) provided with a plurality of output terminals (e.g., output terminals D0 to D6) corresponding to each of the plurality of light emitting means;
Control means (for example, main CPU 41a) for controlling the plurality of light emitting means by controlling the output of signals from each of the plurality of output terminals,
When the control means shifts to a specific state (for example, an error state or a setting confirmation state) in which the progress of the game is disabled while the plurality of light emitting means are emitting light, The output of the signal is controlled so as to maintain the light emission of some of the light emitting means (for example, the BETLED, the LED being replayed, and the advantageous section LED shown in FIG. 6C). Controlling the output of the signal so that the light emission of the light emitting means (for example, the input request LED and the start valid LED shown in FIG. 6D) stops,
The output terminals corresponding to the two or more light emitting means are provided adjacent to each other (for example, as shown in the first output port 61 of FIG. 3, the output terminal D1 corresponding to the start valid LED, and the input request LED Is adjacent to the output terminal D6 corresponding to

  According to such a configuration, it is possible to reduce the processing load of the light emission stop processing of the two or more light emitting units when the state is shifted to the specific state.

(2) In the gaming machine of (1) above,
The two or more light-emitting means include light-emitting means (for example, a start valid LED and a turn-on request LED shown in FIG. 6D) indicating that the operation by the player is effective.

  According to such a configuration, when the transition to the specific state where the progress of the game is disabled, the light emission of the light emitting means that suggests that the operation by the player is effective stops, so that the state is the specific state Can be prevented from misidentifying that the player's operation is effective.

(3) In the above gaming machine (1) or (2),
The specific state includes a state (for example, an error state) that is shifted when an abnormality occurs in the gaming machine.

  According to such a configuration, it is possible to prevent the game from proceeding when an abnormality occurs in the gaming machine.

(4) In any of the above gaming machines (1) to (3),
There are a plurality of the partial light emitting means (for example, as shown in FIG. 6C, 1BETLED, 2BETLED, 3BETLED, advantageous section LED19, and LED 20 during replay), which correspond to the partial light emitting means. The output terminals are provided adjacent to each other (for example, as shown in the first output port 61 of FIG. 3, the output terminals D0 to D4 are adjacent to each other).

  According to such a configuration, it is possible to reduce the processing load of the light emission maintaining process of the light emitting unit when the state is shifted to the specific state.

(5) In any of the above gaming machines (1) to (4),
The part of the light emitting means includes a light emitting means (for example, an advantageous section LED shown in FIG. 6C) indicating that the advantageous section is advantageous for the player.

  According to such a configuration, even if the game is shifted to a specific state in which the progress of the game is disabled, it can be suggested to the player that it is an advantageous section.

(6) In any of the above gaming machines (1) to (5),
The output port is also provided with an unused output terminal (for example, the output terminal D7 of the first output port 61 as shown in FIG. 3),
The unused output terminal is provided adjacent to an output terminal corresponding to the two or more light emitting means (for example, the output terminal D7 is provided adjacent to the output terminal D6).

  According to such a configuration, in the light emission stopping process of the light emitting means, it is possible to reduce, for example, that the light emitting means that stops the light emission emits light due to malfunction.

FIG. 2A is a front view of the slot machine 1 according to the present embodiment, and FIG. 2B is a diagram illustrating an example of a main internal configuration of the slot machine 1. It is a figure which shows a 7-segment display. It is a figure which shows an output port, DG, etc. It is a figure which shows the flowchart of a signal switching process. It is a figure which shows switching of a selection signal. It is a figure which shows a timing chart when it transfers to a specific state. It is a figure which shows the timing chart (modified example) when it transfers to a specific state.

  The form for implementing the slot machine 1 which concerns on this invention is demonstrated below based on an Example. In the following embodiment, an example in which the present invention is applied to the slot machine 1 will be described, but a pachinko gaming machine will also be illustrated and described as necessary.

[Configuration of slot machine 1]
FIG. 1A is a front view of the slot machine 1 according to the present embodiment, and FIG. 1B is a diagram showing an example of a main internal configuration of the slot machine 1.

  As shown in FIG. 1A, the slot machine 1 is provided with a liquid crystal display 51 on the front door 1b. A transparent window 3 is formed in the decorative panel 1c located below the liquid crystal display 51 in the front door 1b. The player can visually recognize the reels 2L, 2C, and 2R arranged in parallel inside the housing 1a through the see-through window 3. On each reel, a plurality of types of symbols that can be identified are arranged in a predetermined order.

  As shown in FIG. 1 (a), the front door 1b is determined according to the gaming state within the credit range stored as the gaming value (number of medals) owned by the player as an example of the operating means. The MAXBET switch 6 that is operated when setting a predetermined number of bets, the medal stored as credits, and the medals used for setting the bets are settled (medals for the setting of credits and bets) Used for the production, the settlement switch 10 operated when starting the game, the start switch 7 operated when starting the game, the stop switches 8L, 8C, 8R operated when stopping the rotation of the reels, respectively. For example, an effect switch 56 is provided.

  When playing a game in the slot machine 1, first, a predetermined number of bets (for example, 3) are set by inserting medals into the medal slot 4 or by operating the MAXBET switch 6. As a result, the winning line LN becomes valid and the operation to the start switch 7 becomes valid, and the game can be started. If medals are inserted with the bet number set, the amount is added to the credit.

  When the start switch 7 is operated in a state where the game can be started, the reels 2L, 2C, 2R are rotated to display the symbols in a variable manner. When the stop switches 8L, 8C, 8R are operated, the corresponding reels are rotated. By stopping, three symbols are derived and displayed as display results on the upper, middle, and lower stages of the fluoroscopic window 3. When a specified number of bets (for example, 3) are set, the pay line LN is activated and the game can be started.

  When a combination of winning symbols stops on the winning line LN and a winning occurs, a predetermined number of medals are given to the player according to the winning and the credit is added or the credit reaches the upper limit (50). In this case, medals are paid out from the medal payout exit 9. When a medal is paid out from the medal payout opening 9, the medal is paid out from the medal payout opening 9 by driving a hopper motor (not shown) controlled by the main control unit 41.

  Here, the “game (also referred to as unit game)” in the slot machine 1 means, in a narrow sense, from when the start switch 7 is operated until all reels stop. Since the setting of the bet number before operation 7 and the payout of medals and the transition of the game state are performed after all reels are stopped, these incidental processes are also included in the “game” in a broad sense.

  The front door 1b is provided with a game display unit 13 for notifying information related to a game as an example of a notification unit. The game display unit 13 is provided with a credit display 11, a payout display 12, a 1BETLED14, a 2BETLED15, a 3BETLED16, an insertion request LED17, a start valid LED18, an advantageous section LED19, and a replaying LED20.

  The credit indicator 11 displays the number of medals stored as credits. The payout display 12 displays the number of medals to be paid out when a predetermined combination wins. Further, the payout display 12 displays an error code or the like when an error occurs.

  The 1BETLED 14 is an LED that starts light emission when one medal is bet. The 2BET LED 15 is an LED that starts light emission when two medals are bet. The 3BET LED 16 is an LED that starts light emission when three medals are bet. Further, the 1BETLED14, the 2BETLED15, and the 3BETLED16 are turned off when the game in which a medal is bet ends. Further, “light emission” may be referred to as “lighting”.

  The insertion request LED 17 is an LED that notifies that a medal can be inserted. The insertion request LED 17 starts to emit light when the game is over. The throw-in request LED 17 ends the light emission when the game is started.

  The start valid LED 18 is an LED for notifying that a game start operation can be performed by operating the start switch 7. The start valid LED 18 starts to emit light when the number of bets is set. The start valid LED 18 ends the light emission when the game is started.

  The advantageous section LED 19 is an LED that emits light when in the advantageous section. The advantageous section is a section having a performance related to an instruction function for instructing the player to operate the stop switches 8L, 8C, and 8R. By winning by an advantageous section shift lottery executed under a predetermined condition, it is shifted to an advantageous section. The light emission of the advantageous section LED 19 starts at the end of the game determined to be transferred to the advantageous section in the advantageous section transition lottery (the game won in the advantageous section transition lottery). Further, the advantageous section LED 19 is turned off at the end of the last game of the advantageous section.

  The replaying LED 20 is an LED that emits light during a replay game due to a replay winning. Replay is a winning combination that gives a replay by winning. The replaying LED 20 starts to emit light when the replay wins. Further, the replaying LED 20 is turned off when the replay game is finished.

  Further, since the credit display 11 and the payout display 12 can display numerical values for two digits, they are constituted by two 7-segment displays. The two 7-segment displays are a first 7-segment display and a second 7-segment display.

  The slot machine 1 of the present embodiment also includes a game information display (see FIG. 3). The game information display displays game information based on the game history. The game information is, for example, a medal payout ratio in a predetermined period. The medal payout ratio is a value obtained by dividing the total number of medals paid out by the total number of medals consumed.

  Since the game information display can display 4-digit numerical values, it is composed of four 7-segment displays. The four 7-segment displays include, for example, the first 7-segment display, the second 7-segment display, the third 7-segment display, and the fourth 7-segment display. It is.

  The game information display uses, for example, a 7-segment display of the third digit and a 7-segment display of the fourth digit to display the type of game information, and the 7-segment display of the first digit, 2 The value of game information is displayed using a 7-segment display with a digit.

  The slot machine 1 of the present embodiment also includes a set value display (see FIG. 3). In the present embodiment, the set value display is provided inside the slot machine 1. However, as a modification, the set value display may be provided outside the slot machine 1.

  The set value display displays the set value. The set value is a value that specifies the winning probability in the internal lottery. The set value consists of 6 levels of 1 to 6, with 6 being the most advantageous for the player (highest medal payout rate), and the smaller the value in the order of 5, 4, 3, 2, 1, the lower the degree of advantage. (The medal payout rate is low).

  Further, when the setting change state is controlled, the set value is displayed on the set value display. When the setting change state is controlled, the set value can be changed by a specific operation by a store clerk or the like of the game store. The setting change state is controlled by supplying power to the slot machine 1 after a setting key switch (not shown) is turned on. In addition, when the setting change state is controlled, when the start switch is operated and the setting key switch is turned off, the setting change state ends.

  Also, the set value is displayed on the set value display when the setting check state is being controlled. When the setting confirmation state is controlled, the setting value is displayed on the setting value display, so that a store clerk or the like of the game shop can check the set setting value. The setting confirmation state is controlled by turning on the setting key switch in a state where the bet number is not set. In addition, when the setting confirmation state is controlled, the setting confirmation state is ended by turning off the setting key switch 37.

  Since the set value display can display numerical values (1 to 6) for one digit, it is composed of one 7-segment display.

  In the present embodiment, the game information display is installed inside the slot machine 1. Regardless of whether the front door 1a of the slot machine 1 is open or the front door 1a is closed, the 4-digit 7-segment display emits light, thereby the game information display is a game. Display information.

  Further, in the present embodiment, when the front door 1a is in the closed state, the credit display 11, the payout display 12, and the game display unit 13 emit light with segments and LEDs corresponding to the game state. Further, when the front door 1a is opened, the light emission state of the segments and LEDs when the front door 1a is closed is maintained.

  As shown in FIG. 1 (b), inside the slot machine 1, there is a main control board 40 for controlling the progress of the game (which can be said to control the game) and outputting various commands according to the progress of the game, An effect control board 90 for controlling the effect according to the command is provided. The main control board 40 includes a main control unit 41 that performs processing related to the progress of the game and controls a configuration that is mounted on or connected to the main control board 40. The effect control board 90 includes a sub-control unit 91 that receives a command transmitted from the main control board 40 and performs an effect and controls a configuration mounted on or connected to the effect control board 90.

  The main control unit 41 includes a RAM 41c used as a work memory, a main CPU 41a that performs a control operation according to a program, and the like. The main control unit 41 performs processing related to the progress of the game and directly controls each part of the control circuit mounted on the main control board 40. To control automatically or indirectly.

  When the MAXBET switch 6, the start switch 7, the stop switches 8L, 8C, 8R, and the settlement switch 10 are operated, a detection signal for detecting the operation is input to the main control unit 41. The main control unit 41 detects operations on these various switches based on detection signals from these various switches.

  From the main control unit 41, a control signal for controlling light emission or display control of various displays included in the game display unit 13 is output to the game display unit 13. Various displays included in the game display unit 13 display light emission or predetermined information based on a control signal from the main control unit 41.

  The sub control unit 91 includes a RAM 91c used as a work memory, a sub CPU 91a that performs a control operation according to a program, etc., and performs various controls for performing an effect, and each part of a control circuit mounted on the effect control board 90 Control directly or indirectly. The RAM 91c included in the sub-control unit 91 has a larger storage capacity than the RAM 41c included in the main control unit 41, and can store data necessary for processing such as production and notification of predetermined information.

  When the effect switch 56 is operated, a detection signal for detecting the operation is input to the sub-control unit 91. The sub-control unit 91 detects an operation on the effect switch 56 based on the detection signal from the effect switch 56.

  From the sub-control unit 91, control signals for controlling the liquid crystal display 51 and the speakers 53 and 54 are output to the liquid crystal display 51 and the speakers 53 and 54, respectively.

[7-segment display]
Next, a 7-segment display constituting each of the credit display 11, the payout display 12, and the game information display is shown in FIG. As shown in FIG. 2, the 7-segment display includes seven segments, segment A to segment G, and a segment DP (decimal point). For example, when “1” is displayed on one 7-segment display, segment B and segment C are caused to emit light. Thereby, “1” can be displayed on the 7-segment display. In the following, one segment constituting the seven segments and one LED such as the 1BETLED 14 are collectively referred to as a “light emitting unit”.

[Control by main CPU 41a]
The control by the main CPU 41a will be described with reference to FIG. First, the digit will be described. The “digit” is composed of one or more light emitting units. Hereinafter, the digit is also referred to as “DG”. Two or more DGs are also referred to as a DG group. In the present embodiment, the first DG group includes DG1 to DG6. The second DG group includes DG1 to DG4 different from DG1 to DG4 included in the first DG group. The DG may be referred to as a “group”.

  In the example of FIG. 3, DG1 of the first DG group is a DG including seven segments (segment A to segment G) included in the first 7-segment display of the credit display 11 and an anode. DG2 of the first DG group is a DG including seven segments (segment A to segment G) included in the second 7-segment display of the credit display 11 and an anode. DG3 of the first DG group is a DG including seven segments (segment A to segment G) included in the first 7-segment display of the payout display 12 and an anode. The DG 4 in the first DG group is a DG including seven segments (segment A to segment G) included in the second 7-segment display of the payout display 12 and an anode.

  DG5 of the first DG group is a DG including seven LEDs and an anode. The seven LEDs are 1BETLED14, 2BETLED15, 3BETLED16, input request LED17, start valid LED18, advantageous section LED19, and replaying LED20, respectively. DG6 of the first DG group is a DG including seven segments (segment A to segment G) included in the 7-segment display of the set value display and the anode.

  In FIG. 3, the second 7-segment display (DG2) of the first DG group credit display and the second 7-segment display (DG4) of the second DG group credit display are as follows. In order to simplify the drawing, segment A to segment G are collectively described in one block.

  DG1 of the second DG group is a DG including eight segments (segment A to segment G and segment DP) included in the first 7-segment display of the game information display and an anode. Similarly, DG2 to DG4 of the second DG group include eight segments (segment A to segment G and segment DP) included in the second segment to fourth digit 7-segment display of the game information display, and the anode. DG including.

  Next, the main control board 40 will be described. On the main control board 40, a main CPU 41a and a plurality of output ports are mounted. In the example of FIG. 3, the first output port 61, the second output port 62, and the third output port 63 are described as the plurality of output ports, but there are actually other output ports.

  The first output port 61, the second output port 62, and the third output port 63 each have eight output terminals D0 to D7. Of the eight output terminals D0 to D7 of the first output port 61, the light emission signals S0 to S6 are output from the seven output terminals D0 to D6, respectively. Of the eight output terminals D0 to D7 of the second output port 62, the light emission signals S10 to S17 are output from the eight output terminals D0 to D7, respectively. As described above, the light emission signals S0 to S6 and the light emission signals S10 to S17 are output separately (from different output ports). Among the eight output terminals D0 to D7 of the third output port 63, selection signals DG1 to DG6 are output from the six output terminals D0 to D5, respectively.

  The selection signal DG is a signal for selecting (specifying) the DG of the light emitting unit that is a light emission target. The light emission signals S0 to S6 are signals that specify the light emission mode of the light emitting unit included in the DG selected by the selection signal DG among the six DGs of the first DG group. The light emission signals S10 to S17 are signals that specify the light emission mode of the light emitting unit included in the DG selected by the selection signal DG among the four DGs of the second DG group.

First, the first output port 61 will be described.
The signal line from the output terminal D0 of the first output port 61 is connected to the segment A of each of the DG1 to DG4 of the first DG group, the segment A of the DG6, and the 1BETLED of the DG5 of the first DG group. The light emission signal S0 is output from the output terminal D0 of the first output port 61 under the control of the main CPU 41a. Therefore, the light emission signal S0 is input to the segment A of each of the DG1 to DG4 of the first DG group, the segment A of the DG6, and the 1BETLED of DG5 of the first DG group.

  The signal line from the output terminal D1 of the first output port 61 is connected to the segment B of each of the DG1 to DG4 of the first DG group, the segment B of the DG6, and the 2BETLED of the DG5 of the first DG group. The light emission signal S1 is output from the output terminal D1 of the first output port 61 under the control of the main CPU 41a. Accordingly, the light emission signal S1 is input to the segment B of each of the DG1 to DG4 of the first DG group, the segment B of the DG6, and the 2BETLED of DG5 of the first DG group.

  The signal line from the output terminal D2 of the first output port 61 is connected to the segment C of each of the DG1 to DG4 of the first DG group, the segment C of the DG6, and the 3BETLED of the DG5 of the first DG group. The light emission signal S2 is output from the output terminal D2 of the first output port 61 under the control of the main CPU 41a. Therefore, the light emission signal S2 is input to the segment C of each of the DG1 to DG4 of the first DG group, the segment C of the DG6, and the 3BETLED of DG5 of the first DG group.

  The signal line from the output terminal D3 of the first output port 61 is connected to the segment D of each of the DG1 to DG4 of the first DG group, the segment D of the DG6, and the LED being replayed of the DG5 of the first DG group. The light emission signal S3 is output from the output terminal D3 of the first output port 61 under the control of the main CPU 41a. Accordingly, the light emission signal S3 is input to the segment D of each of the DG1 to DG4 of the first DG group, the segment D of the DG6, and the replaying LED of the DG5 of the first DG group.

  The signal line from the output terminal D4 of the first output port 61 is connected to the segment E of each of the DG1 to DG4 of the first DG group, the segment E of the DG6, and the advantageous section LED of the DG5 of the first DG group. The light emission signal S4 is output from the output terminal D4 of the first output port 61 under the control of the main CPU 41a. Therefore, the light emission signal S4 is input to the segment E of each of the DG1 to DG4 of the first DG group, the segment E of the DG6, and the advantageous section LED of the DG5 of the first DG group.

  The signal line from the output terminal D5 of the first output port 61 is connected to the segment F of each of the DG1 to DG4 of the first DG group, the segment F of the DG6, and the start valid LED of the DG5 of the first DG group. The light emission signal S5 is output from the output terminal D5 of the first output port 61 under the control of the main CPU 41a. Accordingly, the light emission signal S5 is input to each of the segments F of the DG1 to DG4 of the first DG group, the segment F of the DG6, and the start valid LEDs of the DG5 of the first DG group.

  The signal line from the output terminal D6 of the first output port 61 is connected to the segment G of each of the DG1 to DG4 of the first DG group, the segment G of the DG6, and the input request LED of the DG5 of the first DG group. The light emission signal S6 is output from the output terminal D6 of the first output port 61 under the control of the main CPU 41a. Accordingly, the light emission signal S6 is input to the segment G of each of the DG1 to DG4 of the first DG group, the segment G of the DG6, and the input request LED of the DG5 of the first DG group.

Further, the output terminal D7 of the first output port 61 is unused.
Next, the second output port 62 will be described.

  The signal line from the output terminal D0 of the second output port 62 is connected to each segment A of the DG1 to DG4 of the second DG group. The light emission signal S10 is output from the output terminal D0 of the second output port 62 under the control of the main CPU 41a. Accordingly, the light emission signal S10 is input to each segment A of the DG1 to DG4 of the second DG group.

  The signal line from the output terminal D1 of the second output port 62 is connected to each segment B of the DG1 to DG4 of the second DG group. The light emission signal S11 is output from the output terminal D1 of the second output port 62 under the control of the main CPU 41a. Therefore, the light emission signal S11 is input to each segment B of the DG1 to DG4 of the second DG group.

  A signal line from the output terminal D2 of the second output port 62 is connected to each segment C of the DG1 to DG4 of the second DG group. The light emission signal S12 is output from the output terminal D2 of the second output port 62 under the control of the main CPU 41a. Accordingly, the light emission signal S12 is input to each segment C of the DG1 to DG4 of the second DG group.

  The signal line from the output terminal D3 of the second output port 62 is connected to each segment D of the DG1 to DG4 of the second DG group. The light emission signal S13 is output from the output terminal D3 of the second output port 62 under the control of the main CPU 41a. Therefore, the light emission signal S13 is input to each segment D of the DG1 to DG4 of the second DG group.

  The signal line from the output terminal D4 of the second output port 62 is connected to each segment E of the DG1 to DG4 of the second DG group. The light emission signal S14 is output from the output terminal D4 of the second output port 62 under the control of the main CPU 41a. Therefore, the light emission signal S14 is input to each segment E of the DG1 to DG4 of the second DG group.

  A signal line from the output terminal D5 of the second output port 62 is connected to each segment F of the DG1 to DG4 of the second DG group. The light emission signal S15 is output from the output terminal D5 of the second output port 62 under the control of the main CPU 41a. Therefore, the light emission signal S15 is input to each segment F of the DG1 to DG4 of the second DG group.

  The signal line from the output terminal D6 of the second output port 62 is connected to each segment G of the DG1 to DG4 of the second DG group. The light emission signal S16 is output from the output terminal D6 of the second output port 62 under the control of the main CPU 41a. Therefore, the light emission signal S16 is input to each segment G of the DG1 to DG4 of the second DG group.

  The signal line from the output terminal D7 of the second output port 62 is connected to each segment DP of the DG1 to DG4 of the second DG group. The light emission signal S17 is output from the output terminal D7 of the second output port 62 under the control of the main CPU 41a. Therefore, the light emission signal S17 is input to each segment DP of the DG1 to DG4 of the second DG group.

Next, the third output port 63 will be described.
The signal line from the output terminal D0 of the third output port 63 is connected to the anode of DG1 of the first DG group and the anode of DG1 of the second DG group. The selection signal DG1 is output from the output terminal D0 of the third output port 63 under the control of the main CPU 41a. Therefore, the selection signal DG1 is input to the anode of DG1 of the first DG group and the anode of DG1 of the second DG group.

  The signal line from the output terminal D1 of the third output port 63 is connected to the anode of the DG2 of the first DG group and the anode of the DG2 of the second DG group. The selection signal DG2 is output from the output terminal D1 of the third output port 63 under the control of the main CPU 41a. Therefore, the selection signal DG2 is input to the anode of DG2 of the first DG group and the anode of DG2 of the second DG group.

  The signal line from the output terminal D2 of the third output port 63 is connected to the anode of the DG3 of the first DG group and the anode of the DG3 of the second DG group. The selection signal DG3 is output from the output terminal D2 of the third output port 63 under the control of the main CPU 41a. Accordingly, the selection signal DG3 is input to the anode of the DG3 of the first DG group and the anode of the DG3 of the second DG group.

  The signal line from the output terminal D3 of the third output port 63 is connected to the anode of the DG4 of the first DG group and the anode of the DG4 of the second DG group. The selection signal DG4 is output from the output terminal D3 of the third output port 63 under the control of the main CPU 41a. Therefore, the selection signal DG4 is input to the anode of the DG4 of the first DG group and the anode of the DG4 of the second DG group.

  The signal line from the output terminal D4 of the third output port 63 is connected to the anode of DG5 of the first DG group. The selection signal DG5 is output from the output terminal D4 of the third output port 63 under the control of the main CPU 41a. Therefore, the selection signal DG5 is input to the anode of DG5 of the first DG group.

  The signal line from the output terminal D5 of the third output port 63 is connected to the anode of DG6 of the first DG group. The selection signal DG6 is output from the output terminal D5 of the third output port 63 under the control of the main CPU 41a. Therefore, the selection signal DG6 is input to the anode of the DG6 of the first DG group.

  Both the output terminal D6 and the output terminal D7 of the third output port 63 are unused. In the present embodiment, as shown in FIG. 3, the selection signal DG1 to the selection signal DG4 are shared by the first DG group and the second DG group. In other words, the selection signals DG1 to DG4 are shared by the first DG group and the second DG group. The selection signal DG5 and the selection signal DG6 are used in the first DG group, but are not used in the second DG group.

  Further, each of the output terminals D0 to D6 of the first output port 61 corresponds to each of the light emitting units to which the light emission signals output from the output terminals D0 to D6 are input. Further, each of the output terminals D0 to D7 included in the second output port 62 corresponds to each of the light emitting units to which the light emission signals output from the output terminals D0 to D7 are input.

  For example, the output terminal D0 of the first output port 61 includes the segment A of the DG1 of the first DG group, the segment A of the DG2 of the first DG group, the segment A of the DG3 of the first DG group, the segment A of the DG4 of the first DG group, This corresponds to the 1BETLED of DG5 of the 1DG group and the segment A of DG6 of the first DG group. The output terminal D0 of the second output port 62 is connected to the segment A of the DG1 of the second DG group, the segment A of the DG2 of the second DG group, the segment A of the DG3 of the second DG group, and the segment A of the DG4 of the second DG group. It corresponds. In FIG. 3, the signal lines from the output terminals D0 to D6 of the first output port 61 and the signal lines from the output terminals D0 to D7 of the second output port 62 are omitted for simplification of the drawing. doing.

  Further, unused output terminals (NC: Non-Connect), that is, D7 of the first output port 61 and D6 and D7 of the third output port 63, which are not used, are grounded in this embodiment. ing. No signal line is wired between the unused output terminal and the light emitting unit.

  The anode of each DG is an anode common common to the cathodes of the light emitting units included in the DG. For example, the anode of DG1 in the first DG group is an anode common common to the respective first-segment segments A to G of the credit indicator 11.

  The main CPU 41a executes bit control (8-bit control) for the control of the first output port 61, the second output port 62, and the third output port 63. For the selection signal DG output from the third output port 63, for example, when the selection signal DG1 is output, bit control of “00000001” is executed, and when the selection signal DG3 is output, “00000100”. This bit control is executed. In the 8-digit bit notation, the first digit corresponds to the control to the output terminal D0 of each output port, and the eighth digit corresponds to the control to the output terminal D7 of each output port. .

  In addition, when light is emitted from the DG1 to DG4 of the first DG group and the segment A of the DG6, the light emission signal S0 is output from the output terminal D0 of the first output port 61, so that the bit control “00000001” is executed. . Further, when the segment A of the DG1 to DG4 of the second DG group is caused to emit light, the light emission signal S0 is output from the output terminal D0 of the second output port 62, and therefore, bit control “00000001” is executed.

  When the selection signal DG is output from the third output port 63, the selection signal DG is input to the anode of the corresponding DG. Further, when the light emission signal S is output from the first output port 61, the light emission signal S is input to the cathode of the corresponding light emitting unit in the DG of the first DG group. When the light emission signal S is input to the cathode of the light emitting unit, the selection signal DG input to the anode flows to the cathode as a current. In this way, when the current flows from the anode to the cathode, the light emitting unit to which the light emission signal S is input emits light.

  When the light emission signal S is output from the second output port 62, the light emission signal S is input to the cathode of the corresponding light emitting unit in the DG of the second DG group. When the light emission signal S is input to the cathode of the light emitting unit, the selection signal DG input to the anode flows to the cathode as a current. In this way, when the current flows from the anode to the cathode, the light emitting unit to which the light emission signal S is input emits light.

  Thus, it can be said that the selection signals DG1 to DG6 output from the third output port 63 are signals for selecting (designating) the DG that causes the light emitting unit to emit light. The light emission signal S0 to light emission signal S6 output from the first output port 61 and the light emission signal S10 to light emission signal S17 output from the second output port 62 are light emission included in the DG selected by the selection signal DG. It can be said that this is a signal for designating the light emission mode of the part.

  In FIG. 3, the signal lines between the respective output terminals and the corresponding light emitting units may be directly connected or indirectly (for example, via a substrate such as a relay substrate). You may make it connect.

  The state of the slot machine 1 includes a normal state, a setting change state, and a setting confirmation state. The normal state refers to a state during gaming and a state waiting for gaming (for example, a state where a demo screen is displayed). Hereinafter, as the DG state, a state where the light emitting unit can emit light (a state where light can be emitted) is referred to as a “light emitting state”, and a state where the light emitting unit cannot emit light is referred to as a “non-light emitting state”.

  In the normal state, the DG1 to DG5 of the first DG group and the DG1 to DG4 of the second DG group are in a light emitting state, and the other DGs are in a non-light emitting state. In the setting change state and the setting confirmation state, DG6 of the first DG group and DG1 to DG4 of the second DG group are in a light-emission enabled state, and other DGs are in a non-light-emitting state. As a modification, in the setting change state and the setting confirmation state, DG1 to DG4 of the second DG group may be in a non-light emitting state. Further, in the setting change state and the setting confirmation state, the DG1 to DG5 of the first DG group may be allowed to emit light.

  Further, DG1 to DG5 included in the first DG group are all mounted on the display substrate. The display substrate is attached to the inside of the slot machine 1 so that the light emitting units included in DG1 to DG5 are exposed to the outside (see the game display unit 13 shown in FIG. 1). The DG 6 included in the first DG group is mounted on the relay board. DG1 to DG4 included in the second DG group are mounted on the main control board 40. In the description of FIG. 3, the DG1 to DG4 of the second DG group and the main control board 40 are described separately, but in reality, the DG1 to DG4 are mounted on the main control board 40.

  Further, the storage area of the slot machine 1 includes a game program area in which a game program relating to the progress of the game is stored, a game data area in which game data used by the game program is stored, a game RAM area, and a game progress area. It includes a non-game program area in which non-game programs that are not involved are stored, a non-game data area in which non-game data used by the non-game program is stored, a non-game RAM area, and the like. The game program area, the game data area, and the game RAM area are collectively referred to as a game area, and the non-game program area, the non-game data area, and the non-game RAM area are collectively referred to as a non-game area.

  Game programs include, for example, bet number setting, credit settlement / bet settlement, bet processing, internal lottery processing for determining whether or not winning is allowed by random lottery (internal lottery), reel This is a program for executing reel rotation processing related to rotation, payout processing for paying out medals, and the like. The non-game program includes, for example, test signal output processing, foreign object detection processing, door monitoring processing, error processing, and the like. The test signal output process is a process for outputting a test signal generated in relation to a game result. The foreign object detection process is a process for detecting a foreign object in the medal passage by an insertion port sensor that detects a medal inserted from the medal insertion port 4. The door monitoring process is a process for detecting the opening of the front door 1a. The error process is a process for disabling a game when an error is detected.

  The light emitting unit included in the DG of the first DG group is a light emitting unit related to the progress of the game. Therefore, the process to the first output port 61, which is the output port corresponding to the first DG group (the process of creating a light emission signal of the first DG group), is a process executed by the game program. Hereinafter, processing executed by the game program is referred to as “in-capacity processing”.

  On the other hand, the light emitting units included in the DG of the second DG group are light emitting units that are not involved in the progress of the game. Therefore, the process to the second output port 62, which is the output port corresponding to the second DG group (the process of creating the light emission signal of the second DG group), is a process executed by the non-game program. Hereinafter, processing executed by the non-game program is referred to as “out-of-capacity processing”.

  In this way, since the in-capacity processing and the out-of-capacity processing can be separated according to the output port, compared with a gaming machine in which in-capacity processing and out-of-capacity processing are mixed for one output port. , Processing burden can be reduced.

[Signal switching process]
FIG. 4 is a flowchart of signal switching processing executed by the main CPU 41a. This signal switching process is executed by an interrupt process executed every predetermined period (in this embodiment, 0.56 ms).

  First, in ST1, the main CPU 41a clears the selection signal DG from the third output port 63. Here, “clear the signal” means to execute bit control “00000000” in which all of the output ports outputting the signal are “0” in the present embodiment. For example, clearing the selection signal DG means executing bit control of “00000000” for the third output port 63.

  Next, in ST2, the light emission signal of the first output port 61 (that is, the light emission signal of the DG of the first DG group) is cleared. Next, in ST3, bit control is performed on the first output port 61 so as to update and set the light emission signal of the first output port 61 (that is, the light emission signal of the DG of the first DG group). ST2 and ST3 are executed in the capacity process.

  Next, in ST4, the light emission signal of the second output port 62 (that is, the light emission signal of the DG of the second DG group) is cleared. Next, in ST5, bit control is performed for the second output port 62 so as to update and set the light emission signal of the second output port 62 (that is, the light emission signal of the DG of the second DG group). ST4 and ST5 are executed in the out-of-capacity process.

  Next, in ST6, bit control is executed for the third output port 63 so that the selection signal DG from the third output port 63 is updated and set. By this bit control, the updated selection signal is output from the third output port 63.

  Also, until the next signal switching process (after 0.56 ms elapses) is executed, the updated emission signal output from the first output port 61 and the updated emission signal from the second output port 62 are output. The output and the output of the updated selection signal from the third output port 63 are continued.

  Next, the process of FIG. 4 will be described using a specific example. In this specific example, a case will be described in which “14” is displayed on the credit display, “08” is displayed on the payout display, and “0723” is displayed on the game information display in the normal state. Here, the display of “14” on the credit display and the display of “23” on the first and second digits of the game information display will be described. Actually, in addition to the credit indicator, the payout indicator, and the game information indicator, the status LED (DG5 of the first DG group) also emits light according to the gaming state. The game information display unit emits the segment DP, while the credit display unit, the payout display unit, and the set value display unit do not emit the segment DP.

  First, “4” is displayed on the first digit (DG1 of the first DG group) of the credit display, and “3” is displayed on the first digit (DG1 of the second DG group) of the game information display. Will be described. In this process, first, the selection signal DG1 is output from the third output port 63, whereby the DG1 of the first DG group and the DG1 of the second DG group are selected as DGs that cause the segments (light emitting units) to emit light. Further, the bit control for outputting the selection signal DG1 from the third output port 63 is “00000001”, and the bit control is executed for the third output port 63.

  In the period during which the selection signal DG1 is output from the third output port 63, for the first output port 61, processing for displaying “4” on DG1 of the first DG group, that is, segment B, segment C, segment Processing for causing F and segment G to emit light is executed. In the process of causing these segments to emit light, the light emission signal S1, the light emission signal S2, the light emission signal S6, and the light emission signal S7 are output from the first output port 61, and other light emission signals S are not output. That is, bit control of “01100110” is executed for the first output port 61.

  Further, during the period in which the selection signal DG1 is being output from the third output port 63, for the second output port 62, processing for displaying “3” on DG1 of the second DG group, that is, segment A, segment B , Segment C, segment D, segment G, and segment DP are emitted. In the process of emitting these segments, the light emission signal S10, the light emission signal S11, the light emission signal S12, the light emission signal S13, the light emission signal S16, and the light emission signal S17 are output from the second output port 62, and another light emission signal S is output. Do not let it. That is, the bit control of “11001111” is executed for the second output port 62.

  Thus, “4” is displayed on the first digit (DG1 of the first DG group) of the credit display, and “3” is displayed on the first digit (DG1 of the second DG group) of the game information display. As a process of the above, bit control of “01100110” is executed for the first output port 61, bit control of “11001111” is executed for the second output port 62, and bit control of “00000001” is executed for the third output port 63 To do.

  When such a state continues for 0.56 ms, the signal switching process shown in FIG. 4 is executed. In ST1, the selection signal DG is cleared. Specifically, the bit control “00000001” for the third output port 63 is changed to the bit control “0000000”.

  Next, in ST2, the light emission signal of the first output port 61 is cleared. Specifically, the bit control “01100110” for the first output port 61 is changed to the bit control “0000000”.

  Next, in ST3, bit control is executed for the first output port 61 so that the light emission signal of the first output port 61 (that is, the light emission signal of the DG of the first DG group) is updated. Here, the process of updating and setting the light emission signal of the first output port 61, that is, the process of causing the segment B and the segment C to emit light, is performed so that “1” is newly displayed on DG2 of the first DG group. In the process of causing these segments to emit light, the light emission signal S2 and the light emission signal S3 are output from the first output port 61, and other light emission signals S are not output. In other words, as bit control for the first output port 61, updating from “0000000” and bit control “00000110” are executed.

  Next, in ST4, the light emission signal of the second output port 62 is cleared. Specifically, the bit control “11001111” for the second output port 62 is changed to the bit control “0000000”.

  Next, in ST5, the bit control is executed for the second output port 62 so that the light emission signal of the second output port 62 (that is, the light emission signal of the DG of the second DG group) is updated and set. Here, the process for executing the process for newly displaying “2” on DG2 of the second DG group, that is, the segment A, the segment B, the segment D, the segment E, the segment G, and the segment DP are emitted. Execute the process. In the process of emitting these segments, the light emission signal S10, the light emission signal S11, the light emission signal S13, the light emission signal S14, the light emission signal S16, and the light emission signal S17 are output from the second output port 62, and another light emission signal S is output. Do not let it. That is, as the bit control for the second output port 62, the bit control of “11011011” is executed after updating from “0000000”.

  Next, in ST6, bit control is executed for the third output port 63 so that the selection signal DG is updated and set. Here, as bit control for the third output port 63, updating from “0000000” and bit control “00000010” are executed.

  By executing such processing, “4” is displayed in the first digit of the credit indicator, and “3” is displayed in the first digit of the game information indicator, which is executed after 0.56 ms elapses. By the signal switching process, the display of the first digit “4” on the credit display is completed, and “1” is displayed on the second digit of the credit display. At the same time, the display of the first digit “3” on the game information display is terminated, and “2” is displayed on the second digit of the game information display.

  Then, the next signal switching process is executed when 0.56 ms elapses from when the DG signal switching process is started. In the signal switching process, new DG3 of the first DG group (7-segment display of the first digit of the payout display) and DG3 of the second DG group (7-segment display of the third digit of the game information display) are newly added. A numerical value (in this case, “8” is displayed for DG3 of the first DG group, and “7” is displayed for DG4 of the second DG group).

  FIG. 5 is a diagram for explaining switching of the selection signal DG. FIGS. 5A to 5F show the outputs of the selection signals DG1 to DG5 from the output terminals D0 to D5 of the third output port 63, respectively.

  As shown in FIGS. 5A to 5F, the main CPU 41a selects the selection signal DG1 (00000001) → the selection signal DG2 (00000010) → the selection signal DG3 (00000100) → the selection signal DG4 (00001000) → the selection signal. The selection signal DG to be output is switched in the order of DG5 (00010000) → selection signal DG6 (00100000) → selection signal DG1 (00000001) → selection signal DG2 (00000010). The period during which one selection signal DG is output is a predetermined period, and is 0.56 ms in this embodiment. That is, the main CPU 41a switches the selection signal DG to be output every 0.56 ms. For example, when the selection signal DG1 is output, DG1 of the first DG group and DG1 of the second DG group are selected (designated).

  In each of FIGS. 5A to 5F, the process for lowering the selection signal corresponds to ST1 in FIG. 4, and the process for raising the selection signal corresponds to ST6.

  The main CPU 41a switches the output of the light emission signal S from the first output port 61 in synchronization with the switching of the output of the selection signal DG from the third output port 63 (ST2 and ST3), and the second output. The output of the light emission signal S from the port 62 is also switched (ST4 and ST5).

  When any one of the selection signals DG1 to DG4 is output from the third output port 63, the DG corresponding to the output selection signal DG among the DGs of the first DG group can emit light and the second DG group The DG corresponding to the output selection signal DG among the DGs can emit light.

  For the selection signal DG5 and the selection signal DG6 from the third output port 63, DG5 and DG6 exist as corresponding DGs in the first DG group. However, there is no corresponding DG in the second DG group. The bit control of the second output port 62 when the selection signal DG5 or the selection signal DG6 is output will be described. When the selection signal DG5 or the selection signal DG6 is output, non-light emission bit control that does not light any segment of the DG in the second DG group is executed. This non-light emitting bit control is a bit control of “00000000” in which all becomes zero. Therefore, when the selection signal DG5 or the selection signal DG6 is output, the segment included in the second DG group is turned off.

  In the normal state, the DG 6 (set value display) of the first DG is in a non-light emitting state. Therefore, in the normal state, the non-light emitting bit control is executed for the first output port 61 during the period in which the signal DG6 is output from the third output port 63.

  In the setting confirmation state and the setting change state, DG1 to DG5 of the first DG group are in a non-light emitting state. Therefore, in the period in which the signals DG1 to DG5 are output from the third output port 63 in the setting confirmation state and the setting change state, the non-light emitting bit control is executed for the first output port 61.

  As described with reference to FIG. 4 and FIG. 5 and the like, by switching the DG that causes the light emitting unit to emit light every short time (0.56 ms), a technique that makes it appear that a plurality of DGs are substantially simultaneously emitting light, Hereinafter, it is also referred to as “dynamic light emission”. In order to enable all DGs to emit light simultaneously without adopting a configuration that performs dynamic light emission, it is necessary to provide independent wiring for each DG and each light emitting unit. However, with this setting, the number of wires increases, the cost increases, and the assembly burden also increases. In the present embodiment, such a problem can be solved by executing dynamic light emission.

  Further, by executing the dynamic light emission of the present embodiment, the DGs to be lighted are sequentially switched in the signal switching process that is an interrupt process executed every short period (0.56 ms in the present embodiment). Thereby, it can be shown substantially as if a plurality of DGs are simultaneously emitting light (as if they were simultaneously emitting light by human eyes). In addition, if the LED that emits light is changed for each interrupt process, power consumption can be reduced and burn-in of the light emitting unit can also be suppressed. Furthermore, the luminance can be increased by repeating the point emission as compared with the LED that always emits light.

[Specific status]
Next, the specific state will be described. The specific state is one of an error state and the setting confirmation state described above. An error state is a state in which an error is detected. When an error occurs, the gaming machine such as the slot machine 1 and the pachinko gaming machine of this embodiment can detect the error. Here, the error includes, for example, an error based on a failure of a device in the gaming machine, an error based on an increase / decrease in game media in the gaming machine, an error based on an illegal act of the player, and the like.

  The error based on the failure of the device in the gaming machine is, for example, an error detected when a movable body (a combination) provided in the gaming machine does not operate properly. The error based on the increase / decrease in the game media in the gaming machine is an error detected when, for example, there is a shortage of game media in the storage tank storing the game media to be paid out. The game medium is, for example, a medal in the slot machine 1 and a pachinko ball in a pachinko gaming machine. In the slot machine 1, the storage tank is also called a hopper, and an error based on increase / decrease in game media in the gaming machine is also called a hopper error.

  The error based on the player's fraudulent action is, for example, a game medium illegal payout error. The game medium illegal payout error is an error detected by illegally paying out the game medium by performing an illegal operation on the storage unit in which the game medium is stored. Thus, an error state is a state in which an error is detected.

[Timing chart when transitioning to a specific state]
Next, a timing chart when shifting to a specific state will be described with reference to FIG. FIG. 6 (A) is a diagram showing a transition to a specific state. ON indicates that the state has been changed to a specific state, and OFF indicates that the state has not been changed to a specific state. FIG. 6B is a diagram illustrating specific state notification processing for notifying that the state has been shifted to the specific state. ON indicates that the specific state notification process is executed, and OFF indicates that the specific state notification process is not executed. FIG. 6C is a diagram illustrating light emission from the BETLED, the advantageous section LED, and the input request LED. ON indicates that the BETLED, the advantageous section LED, and the insertion request LED are emitting light, and OFF indicates that the BETLED, the advantageous section LED, and the insertion request LED are not emitting light. FIG. 6D is a diagram showing light emission from the input request LED and the start valid LED. ON indicates that the input request LED and the start valid LED are emitting light, and OFF indicates that the input request LED and the start effective LED are not emitting light.

  As shown in FIG. 6B, the specific state notification process is executed at the timing T1 when the state is shifted to the specific state. Further, as shown in FIG. 6C, at the timing T1, light emission from the BETLED, the advantageous section LED, and the input request LED is maintained. Further, as shown in FIG. 6D, the input request LED and the start valid LED are turned off at the timing T1.

  As shown in FIG. 6A, it is assumed that a power interruption occurs at timing T2 (power supply is stopped), and the power interruption is recovered at timing T3 (power supply is resumed). As shown in FIG. 6B, the specific state notification process ends at the timing T2 when the power interruption occurs, and the specific state notification process returns at the timing T3 when the power interruption is restored. As shown in FIG. 6C, at the timing T2 when the power interruption occurs, the BET LED, the advantageous section LED, and the insertion request LED are turned off, and at the timing T3 when the power interruption is restored, the BET LED and the advantageous section LED Then, the input request LED emits light. Further, as shown in FIG. 6D, the turn-off request LED and the start valid LED are kept off at timing T2 and timing T3.

[About gaming machines]
The gaming machine to which the above-described technical idea of the present embodiment is applied is not limited to the slot machine 1 and may be applied to other gaming machines. For example, a concept applicable to a pachinko gaming machine among the above technical ideas may be applied to a pachinko gaming machine.

  For example, it may be a pachinko gaming machine having a 7-segment display (for example, a display for displaying a special figure) composed of a plurality of segments and a plurality of LEDs each for notifying the state of the game. Further, the signals and wirings to the plurality of LEDs and the plurality of segments are, for example, as shown in FIG. In the pachinko gaming machine, the dynamic light emission described above may be executed. Further, in the pachinko gaming machine, when a transition is made to a specific state (for example, an error state), the processing in the timing chart shown in FIG. 6 may be executed.

[About the effects of the gaming machine of this embodiment]
(1) As shown in FIG. 6 (C) and FIG. 6 (D), a plurality of LEDs including a turn-on request LED, a start valid LED, and other LEDs (for example, BETLED) emit light. When the state shifts to a specific state, the turn-on request LED and the start valid LED are turned off, while the light emission of other LEDs is maintained.

  As shown in FIG. 3, in the first output port 61, an output terminal D5 corresponding to the start valid LED and an output terminal D6 corresponding to the input request LED are provided adjacent to each other. The output terminal corresponding to the start valid LED is an output terminal D5 that outputs a light emission signal S5 for controlling the light emission mode of the start valid LED. The output terminal corresponding to the turn-on request LED is an output terminal D6 that outputs a light emission signal S6 for controlling the light emission mode of the turn-on request LED.

  As described above, since the output terminal D5 and the output terminal D6 are adjacent to each other, it is possible to reduce the processing load of the light emission stopping process of the light emitting unit when the state is shifted to the specific state. For example, in the bit control executed for the first output port 61 when the state is shifted to the specific state, “0” that is a bit indicating extinction can be set continuously. Therefore, it is possible to reduce the processing load of the light-emitting means turning-off process when the state is shifted to the specific state.

  In addition, a gaming machine (a first comparison target) that adopts a configuration in which output terminals corresponding to LEDs that are to be turned off (hereinafter also referred to as turned-off LEDs) are separated (not adjacent). For example, a case where the output terminal corresponding to the start valid LED is D0 and the output terminal corresponding to the input request LED is D4 will be described. In this case, there is a case where noise occurs when the bit control is executed to turn off D0 and D4 when the state shifts to the specific state and the selection signal DG5 is output. When the noise occurs, noise may also occur at an output terminal adjacent to D0, for example, the output terminal D1, and bit inversion may occur at the output terminal D1.

  On the other hand, the output terminal corresponding to the start valid LED and the output terminal corresponding to the input request LED are adjacent to each other (D5 and D6). Therefore, even when noise is generated by executing bit control to turn off the output terminal D5 and the output terminal D6, it is less affected by the noise than the first comparison target gaming machine. can do.

  (2) Temporarily, a gaming machine (hereinafter referred to as a second comparison target gaming machine) in which the two LED to be turned off when transitioning to a specific state is included in each of the first DG and the second DG that are different DGs. ), It is necessary to perform bit control for turning off the first output port even when the first DG is selected by the selection signal DG, and the first DG is selected even when the second DG is selected by the selection signal DG. It is necessary to perform bit control for turning off the output port, and the processing becomes complicated.

  On the other hand, in the present embodiment, the two turn-off target LEDs when transitioned to the specific state are included in one DG (DG5). Therefore, only when the DG5 is selected by the selection signal DG, it is only necessary to perform bit control for turning off the first output port, so that the LED is turned off compared to the second comparison target gaming machine. Can be simplified.

  (3) Also, the two LED to be turned off are an LED that suggests that the operation by the player is effective, that is, an insertion request LED and a start valid LED. When the state is shifted to the specific state, the input request LED and the start valid LED are turned off. Therefore, when the state is shifted to the specific state, the notification that the operation by the player is effective ends, so that it is possible to prevent the player from misidentifying that the operation by the player is effective.

  (4) The specific state includes a state (error state) that is shifted when an abnormality (error) occurs in the gaming machine. The error state is a state in which the game is not progressed. Therefore, when an abnormality occurs in the gaming machine, it shifts to a specific state, so that the game can be prevented from proceeding.

  (5) Moreover, even when it shifts to a specific state, LED used as the object of light emission maintenance (henceforth light emission maintenance object LED) is 1st-3rd BETLED, LED during replay, and advantageous area LED. The output terminals D0 to D4 corresponding to the first to third BETLEDs, the LED being replayed, and the advantageous section LEDs are adjacent to each other (see FIG. 3).

  Thereby, in the bit control executed for the first output port 61 when the state is shifted to the specific state, “1” indicating the bit for maintaining the light emission can be set continuously. Therefore, it is possible to reduce the processing load of the light emission maintaining process of the light emitting means when the state is shifted to the specific state.

  Temporarily, when it shifts to a specific state, the output terminal corresponding to the LED to be turned off is sandwiched between the two output terminals corresponding to each of the two LEDs that maintain light emission, for example, corresponding to the LED to be turned off A gaming machine (hereinafter referred to as a third comparison target gaming machine) adopting a configuration in which the output terminal to be D1 is two and the two output terminals corresponding to the two LEDs each maintaining light emission are D0 and D2. explain.

  In this gaming machine, when a transition is made to a specific state, bit control for maintaining light emission for D0 and D2, that is, “1” is set, and bit control for turning off D1, that is, “0” is set. The bit control to be set is executed. Then, in the case of the bit control, for example, bit control for setting “1” is executed for D1 due to bit inversion due to noise generation, so that the light emission of the LED that should originally be turned off is maintained. There is a case.

  On the other hand, in this embodiment, two or more output terminals corresponding to the two LEDs that maintain light emission are adjacent to each other. Therefore, even if noise occurs, for example, the fact that the light emission of the LED that should originally be turned off can be made less likely to occur than in the third comparative gaming machine.

  Further, as shown in the first output port 61 of FIG. 3, the output terminals D0 to D4 corresponding to the light emission maintenance target LEDs are one adjacent terminal group, and the output terminal D5 corresponding to the extinguishing target LED and The output terminal D6 is also a terminal group adjacent to each other.

  (6) Moreover, as shown in FIG.6 (C), light emission of the advantageous area LED is maintained in the timing T1 which changed to the specific state. Therefore, even if the state is shifted to the specific state, it can be suggested to the player that the zone is shifted to the advantageous section.

  (7) Moreover, as shown in FIG. 3, the 1st output port 61 has the output terminal D7 which is an unused output terminal. Further, the unused output terminal D7 is adjacent to the output terminal D6 corresponding to the turn-on request LED which is the LED to be turned off. For the unused output terminal D7, bit control for turning off, that is, “0” is set. Therefore, when the state is shifted to the specific state, it is possible to reduce the fact that “1” is set due to malfunction or the like for the output terminal D6 that should be set to “0”, which is originally a bit to be turned off.

  (8) When it is shifted to the advantageous section, the advantageous section LED emits light. As shown in FIGS. 6 (B) and 6 (C), when a transition is made to an advantageous section, that is, when the transition is made to a specific state when the advantageous section LED is emitting light, a notification of the specific state is made. And the light emission of the advantageous section LED continues. Therefore, even if the specific section shifts to the specific state during the light emission of the advantageous section LED, it is possible to make the store clerk and the player recognize the transition to the specific state and to make the player recognize that the advantageous section is the advantageous section. it can.

  (9) Also, as shown in FIGS. 6A to 6C, when the state is shifted to the specific state, the specific state notification process is terminated at the timing T2 when the interruption occurs, and the interruption is restored. At the timing T3, the completed specific state notification process is resumed. Further, when the power interruption occurs during the light emission of the advantageous section LED, the advantageous section LED is turned off, and when the power interruption is restored, the light emission of the terminated advantageous section LED is resumed. Therefore, even if the power interruption occurs in the specific state, when the power interruption is restored, it is possible to make the store clerk, the player, and the like recognize the specific state. Further, even if a power interruption occurs when the vehicle is shifted to the advantageous section, when the power interruption is restored, the player can recognize that the advantageous section.

  (10) If the light emission time of one DG is shortened, even if the first DG emits light, the luminance due to the light emission is lowered, so that it appears dark to the player or the like. If it does so, it will become difficult for a player etc. to recognize the information currently notified by DG. On the other hand, in this embodiment, as shown in FIG. 3, the light emitting unit is divided into a first DG group and a second DG group. Therefore, it is possible to secure the light emission times of the light emitting units included in the first DG group and the light emitting units included in the second DG group. Therefore, the brightness | luminance by light emission of 1 DG is securable. In addition, by adopting a configuration in which DG is divided into DG groups, for example, even if DG increases due to improvements in gaming machines, the luminance due to the increased emission of DG can be secured. Further, the number of first DG groups and the number of second DG groups are such that the number of first DG groups is six (DG1 to DG6) and the number of second DG groups is four (DG1 to DG4). Even if they are different, the selection signals DG1 to DG4 can be shared by the first DG group and the second DG group. In other words, any one of DG1 to DG4 of the first DG group and any of DG1 to DG4 of the second DG group can be selected by a common selection signal. Therefore, even if the DG increases due to improvement of the gaming machine or the like, it is possible to prevent the number of selection signals from increasing excessively.

  (11) The light-emitting units included in the first DG group of FIG. 3 constitute segments constituting two 7-segment displays constituting a credit indicator, and two 7-segment indicators constituting a payout indicator. Includes segment and status LEDs. That is, the light emitting units included in the first DG group are light emitting units that update the light emitting state in accordance with the progress of the game (so that the progress of the game can be specified).

  On the other hand, the light emitting units included in the second DG group include light emitting units (segments) constituting each of the four 7-segment displays constituting the game information display. That is, the light emitting unit included in the second DG group is a light emitting unit different from the light emitting unit included in the first DG group. In other words, it is not a light emitting unit that updates the light emitting state in accordance with the progress of the game (so that the progress of the game can be specified).

  Therefore, the first DG group and the second DG group are divided depending on whether or not the light emission state is updated as the game progresses. Therefore, the processing load of the bit control of the main CPU 41a can be reduced.

  (12) When the selection signal DG5 or the selection signal DG6, which is a selection signal DG that is not shared by the first DG group and the second DG group, is output, any of the DGs in the second DG group Non-light-emitting bit control that does not cause the segment to emit light is executed. Therefore, it is possible to prevent the light emitting unit included in the second DG group that should not emit light from being accidentally emitted.

  Further, there are DGs that do not emit light depending on the state. For example, in the normal state, the DG 6 of the first DG group does not emit light. Also for the non-light emitting DG 6, the non-light emitting bit control is executed for the first output port 61. As described above, the non-light-emitting bit control is also executed in the bit control for the DG of the second DG group when the selection signal DG5 or the selection signal DG6 is output, and is also executed in the bit control for the DG that does not emit light depending on the state. The Therefore, since the processing can be made common, the processing load can be reduced.

  (13) Also, as shown in the signal switching process described with reference to FIG. 4, first, a selection signal DG clear process (ST1) for clearing the selection signal DG is executed. After the selection signal DG clear process is completed, the light emission signal of the first output port and the light emission signal of the second output port are updated (ST3, ST5). Thereafter, the selection signal DG is updated and set (ST6). According to such a configuration, it is possible to prevent erroneous light emission due to an error in the DG to be selected from being executed due to execution of the selection signal DG clear process for clearing the selection signal DG.

  (14) Further, in ST2 before the light emission signal of the first output port is updated and set, the light emission signal of the first output port is cleared. Further, in ST4 before the light emission signal of the second output port is updated and set, the light emission signal of the second output port is cleared. According to such a configuration, the light emitting unit included in the selected DG is erroneously lighted by executing the light emission signal clear process for clearing the light emission signal of the first output port and the light emission signal of the second output port. Can be prevented.

  Even when the selection signal DG5 or the selection signal DG6 is output, the light emission signal of the second output port 62 is cleared in the same manner as when any of the selection signals DG1 to DG4 is output. The process (ST4) and the light emission signal update setting process (ST5) of the second output port 62 are executed. Therefore, the signal switching process can be made common regardless of the type of the selection signal DG.

  (15) Moreover, as shown in FIG. 3, among the eight output terminals of the first output port 61, the output terminal D7 is an unused output terminal. In all the DGs included in the first DG group, the light emitting units corresponding to the output terminal D7 that is an unused output terminal are all unused. A signal line is not connected to the unused output terminal D7 and the light emitting unit corresponding to the output terminal D7. In other words, the unused output terminal D7 among the eight output terminals of the first output port 61 is not provided with a corresponding light emitting unit in any DG (DG1 to DG6 of the first DG group). Therefore, it is possible to appropriately control the issuing mode of all the light emitting units included in the first DG group, and eliminate the need for wiring from the output terminal D7 of the first output port 61 to each DG included in the first DG group. it can. Therefore, the wiring pattern can be simplified.

  (16) The first output port 61 is mounted on the main control board 40, the DG1 to DG5 included in the first DG group are mounted on the display board, and the DG6 included in the first DG group is mounted on the relay board. That is, the first output port 61 mounted on the main control board 40 includes an unused output terminal D7, and the unused output terminal D7 is any of DG1 to DG6 mounted on the display board and the relay board. A corresponding light emitting section is not provided in the DG. Therefore, a wiring pattern from the unused output terminal D7 mounted on the main control board 40 to the light emitting unit included in each of the plurality of DGs can be eliminated. Therefore, the wiring pattern from the main control board 40 to the display board can be simplified, and the wiring pattern from the main control board 40 to the relay board can be simplified.

  (17) Further, DG1 to DG4 and DG6 of the first DG group are DG (7-segment display) for displaying numbers. Further, the DG 5 of the first DG group is a DG for displaying different game information for each of the plurality of LEDs constituting the DG 5. Thus, since the role of DG can be clarified, the main CPU 41a can control the light emission mode of the light emitting unit according to the role.

  (18) For the output terminals D0 to D6 to be used among the output terminals of the first output port 61, a bit (0 or 1) corresponding to the light emitting unit that emits light is set. Regardless of which DG1 to DG6 is selected by the selection signal DG, the bit control for the unused output terminal D7 of the first output port 61 is “0” which is a bit that does not emit light. Is set. Thus, the light emission signal S output from all the eight output terminals D0 to D7 including the unused output terminals is generated. Therefore, compared with a gaming machine that does not generate a signal from an unused output terminal and generates a light emission signal S output from an output terminal other than the unused output terminal, the generation process of the light emission signal S can be simplified.

  (19) The unused output terminal D7 is an output terminal located on the end side of the eight output terminals. Therefore, since the unused output terminal D7 that does not require a wiring pattern is located on the end side, the wiring pattern can be simplified. In addition, detection processing for detecting the generated 8-digit bit signal while shifting it can be executed to set the eighth-digit bit to “0”, which facilitates handling on the program.

  (20) Further, as shown in FIG. 3, all the DGs in the first DG group have light emitting parts that are not used, while all the DGs in the second DG group have light emitting parts that are not used. not exist. As described above, in this embodiment, the DG group is divided, that is, the output port is divided depending on whether or not there is an unused light emitting unit. Therefore, the bit control to the first output port 61 always sets “0” for the output terminal D7, while the bit control to the second output port 62 always sets “1” for the output terminal D7. . Therefore, in both the first output port 61 and the second output port, the number of bits set in the output terminal D7 can be fixed. Therefore, the burden of bit control to the first output port 61 and bit control to the second output port 62 can be reduced.

  (21) Further, the process for the first output port 61 is executed in the in-capacity process, and the process for the second output port 62 is executed in the out-of-capacity process. In this way, since the in-capacity processing and the out-of-capacity processing can be separated according to the output port, compared with a gaming machine in which in-capacity processing and out-of-capacity processing are mixed for one output port. , Processing burden can be reduced.

  (22) In the process of FIG. 4, a process is executed in which the light emission signal clearing process of the output port is collectively executed, and then the light emission signal update setting process of the output port is collectively executed, that is, ST1 → ST2 → ST4. It is also conceivable to configure a gaming machine (a fourth comparison target gaming machine) of ST3 → ST5 → ST6. However, when this configuration is adopted, the processing flow is in-capacity processing (ST2) → out-capacity processing (ST4) → in-capacity processing (ST3) → out-capacity processing (ST5). That is, the processing becomes complicated because the in-capacity processing and the out-of-capacity processing must be executed alternately.

  On the other hand, in this embodiment, ST2 and ST3 are executed by in-capacity processing, and ST4 and ST5 are executed by out-of-capacity processing, so the processing is simplified compared to the fourth comparison target gaming machine. can do.

[Modification]
As mentioned above, although main embodiment in this invention has been described, this invention is not restricted to said embodiment, A various deformation | transformation and application are possible. Hereinafter, modifications of the above-described embodiment applicable to the present invention will be described.

  (1) FIG. 7 is a view showing a modification of the timing chart described in FIG. The difference between FIG. 6 and FIG. 7 is that the notification of the advantageous section can be executed by both the main control unit 41 (main side) and the sub control unit 91 (sub side). As shown in FIG. 7E, notification of the advantageous section performed by the main control unit 41 (main side) is referred to as “main-side advantageous section notification”, and notification of the advantageous section performed by the sub-control unit 91 (sub-side). This is called “sub-side advantageous section notification”.

  The main-side advantageous section notification is notification using the advantageous section LED. For example, the advantageous section LED is caused to emit light when it is shifted to the advantageous section. The sub-side advantageous section notification is notification using the liquid crystal display 51, and for example, when it is shifted to the advantageous section, information that can specify that the liquid crystal display 51 has been transferred to the advantageous section is displayed. To do.

  The display area of the liquid crystal display 51 is larger than that of the advantageous section LED. Therefore, the advantageous section notification can be executed in such a manner that the sub-side advantageous section notification is more conspicuous than the main-side advantageous section notification.

  In this modified example, as shown in FIGS. 7E and 7F, at the timing T1 when the state is shifted to the specific state, the main advantageous section notification that is not so conspicuous to the player is ended, while the player The noticeable sub-side advantageous section notification is maintained. According to such a structure, even if it transfers to a specific state, it can make a player recognize that it has changed to the advantageous area by the sub side advantageous area alert | report maintained.

  Further, as a modification of FIG. 7, at the timing T <b> 1 at which the state is shifted to the specific state, the sub-side advantageous section notification that is conspicuous to the player is ended, while the main-side advantageous section notification that is not so conspicuous to the player is maintained You may do it. According to such a configuration, the main advantageous section notification that is not so conspicuous is maintained, so that it is possible to make the player recognize that it has been shifted to the advantageous section. Furthermore, since the noticeable sub-side advantageous section notification for the player is completed, the notification of the specific state (FIG. 7B) can be made conspicuous. Therefore, it is possible to make it easier for the player and the store clerk to recognize that the player has shifted to the specific state.

  (2) In the present embodiment, the process of clearing the selection signal DG and the light emission signal S in the signal switching process of FIG. 4 is described as a process of setting “0” for 8 bits. However, the process of clearing the selection signal DG and the light emission signal S may be a process of stopping the output of the selection signal DG and the light emission signal S.

  (3) In the present embodiment, it has been described that the number of DGs included in the first DG group is different from the number of DGs included in the second DG group. However, the number of DGs included in the first DG group may be the same as the number of DGs included in the second DG group. Even with such a configuration, there is an advantageous effect that the selection signal DG can be shared by the first DG group and the second DG group.

  (4) Moreover, in this embodiment, advantageous area LED was illustrated as LED which alert | reports having shifted to the advantageous area. However, it may be possible to shift to any one of a plurality of types of advantageous intervals as the advantageous interval, and an LED corresponding to the type may be provided. For example, CZ (chance zone) and AT (assist time) may exist as advantageous sections. For example, as the advantageous section LED, a CZ lamp for notifying that the vehicle has been shifted to CZ and an AT lamp for notifying that the vehicle has been shifted to AT may be provided.

  (5) In the example of FIG. 3, for all DGs included in the first DG group, one of the eight light emitting units is unused. However, two or more unused DGs may be included for at least one DG among all the DGs included in the first DG group. Even with such a configuration, the same effects as in the present embodiment can be obtained.

  (6) In the example of FIG. 6, as illustrated in FIG. 6D, it has been described that there are two LED to be turned off. However, the number of LED to be turned off may be three or more. In this case, it is preferable that the output terminals corresponding to the three or more turn-off target LEDs are adjacent to each other. Even with such a configuration, the same effects as in the present embodiment can be obtained.

  (7) In this embodiment, as shown in DG5 of the first DG group in FIG. 3, a predetermined event, that is, the set bet number, being replayed, being in an advantageous section, and starting operation is effective. It has been described that all the fact that a medal can be inserted is notified by the light emission of the LED. However, at least one of the predetermined events may be notified using other means together with the light emission of the LED or instead of the light emission of the LED. The other means is, for example, at least one of a liquid crystal display 51 capable of displaying predetermined information and a sound output means capable of outputting predetermined sound.

  (8) In the present embodiment, by outputting a light emission signal from the output terminal of the output port, the light emitting unit corresponding to the output terminal is caused to emit light, and the light emission signal is not output from the output terminal. It has been described that the light emitting unit corresponding to is not caused to emit light. However, the light emitting unit may be switched between light emission and non-light emission by other control. For example, by not outputting a non-light emitting signal from the output terminal of the output port, the light emitting unit corresponding to the output terminal is caused to emit light, and by outputting the non-light emitting signal from the output terminal, light emission corresponding to the output terminal The part may not emit light.

  (9) The plurality of light emitting units of the present embodiment has been described as either emitting light or turning off. However, the type of light emission mode of at least one light emitting unit among the plurality of light emitting units may be two or more. For example, at least one light emitting unit among the plurality of light emitting units may be capable of emitting light in any color among a plurality of colors. For example, the light emitting unit may emit red light and may emit blue light. In this case, the light emission signal designating the light emission mode of the light emitting unit may be a signal designating the emission color.

  The embodiment disclosed this time should be considered as illustrative in all points and not restrictive. The scope of the present invention is defined by the terms of the claims, rather than the description above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

  1 slot machine, 2L, 2C, 2R reel, 8L, 8C, 8R stop switch, 12 payout display, 41 main control unit, 41c RAM, 51 liquid crystal display, 56 effect switch, 91 sub control unit, 91c RAM.

Claims (1)

A gaming machine capable of playing a game,
A plurality of light emitting means;
An output port provided with a plurality of output terminals corresponding to each of the plurality of light emitting means;
Control means for controlling the plurality of light emitting means by controlling the output of signals from each of the plurality of output terminals,
The control means maintains light emission of a part of the plurality of light emitting means when transitioning to a specific state where the progress of the game is disabled while the plurality of light emitting means are emitting light. Controlling the output of the signal as described above, and controlling the output of the signal so that the light emission of two or more light emitting means other than the part of the light emitting means is stopped,
Each of the output terminals corresponding to the two or more light emitting means is provided adjacent to each other.

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