JP2018200689A5 - メモリ内のデータを管理するための装置および方法 - Google Patents

メモリ内のデータを管理するための装置および方法 Download PDF

Info

Publication number
JP2018200689A5
JP2018200689A5 JP2018097209A JP2018097209A JP2018200689A5 JP 2018200689 A5 JP2018200689 A5 JP 2018200689A5 JP 2018097209 A JP2018097209 A JP 2018097209A JP 2018097209 A JP2018097209 A JP 2018097209A JP 2018200689 A5 JP2018200689 A5 JP 2018200689A5
Authority
JP
Japan
Prior art keywords
memory
managing data
data
mme
ready
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2018097209A
Other languages
English (en)
Other versions
JP2018200689A (ja
JP6805205B2 (ja
Filing date
Publication date
Priority claimed from US15/606,549 external-priority patent/US10140027B1/en
Application filed filed Critical
Publication of JP2018200689A publication Critical patent/JP2018200689A/ja
Publication of JP2018200689A5 publication Critical patent/JP2018200689A5/ja
Application granted granted Critical
Publication of JP6805205B2 publication Critical patent/JP6805205B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Description

MME 130がまだデータ読み取り動作を完了していない場合、MMEは、「コマンド保留状態」タイプの読み取りステータス(「準備未完了」応答とも称される)信号を送信することができる。一旦データ読み取り動作が完了すると、MMEは、「転送準備完了(ready to transfer)」(「準備完了(ready)」応答とも称される)読み取りステータス信号を送信し、検索されたデータがMMEバッファ136に保留中であり、ホストバッファ138への転送の準備ができていることを示す。その後、制御部112は、MMEバッファ136からホストバッファ138にデータを転送するための転送(XFER)コマンドを発行し、その後、データが要求元のホストデバイスに転送される。
JP2018097209A 2017-05-26 2018-05-21 メモリ内のデータを管理するための装置および方法 Active JP6805205B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US15/606,549 2017-05-26
US15/606,549 US10140027B1 (en) 2017-05-26 2017-05-26 Data transfers with adaptively adjusted polling times

Publications (3)

Publication Number Publication Date
JP2018200689A JP2018200689A (ja) 2018-12-20
JP2018200689A5 true JP2018200689A5 (ja) 2019-03-07
JP6805205B2 JP6805205B2 (ja) 2020-12-23

Family

ID=64315827

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2018097209A Active JP6805205B2 (ja) 2017-05-26 2018-05-21 メモリ内のデータを管理するための装置および方法

Country Status (5)

Country Link
US (2) US10140027B1 (ja)
JP (1) JP6805205B2 (ja)
KR (1) KR102154781B1 (ja)
CN (1) CN108932110B (ja)
TW (1) TWI672591B (ja)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10474361B1 (en) * 2018-05-02 2019-11-12 Seagate Technology Llc Consolidating non-volatile memory across multiple storage devices for front end processing
KR102655360B1 (ko) * 2018-12-13 2024-04-05 에스케이하이닉스 주식회사 컨트롤러, 데이터 저장 장치 및 그것의 동작 방법
US11086528B2 (en) * 2018-12-14 2021-08-10 SK Hynix Inc. Memory controller and memory system having the same
TWI784120B (zh) * 2019-01-17 2022-11-21 韓商愛思開海力士有限公司 用於儲存裝置之記憶體控制器、儲存裝置、儲存裝置之控制方法以及記錄媒體
US10685722B1 (en) * 2019-01-24 2020-06-16 Western Digital Technologies, Inc. Method and system for improving performance of a storage device using asynchronous independent plane read functionality
CN109979508A (zh) * 2019-03-15 2019-07-05 合肥沛睿微电子股份有限公司 固态硬盘装置与相关的固态硬盘控制电路
TWI718532B (zh) * 2019-05-10 2021-02-11 技嘉科技股份有限公司 固態硬碟以及固態硬碟的效能優化方法
US11669272B2 (en) * 2019-05-31 2023-06-06 Micron Technology, Inc. Predictive data transfer based on availability of media units in memory sub-systems
US10949115B2 (en) 2019-06-24 2021-03-16 Western Digital Technologies, Inc. Flash memory polling
KR20210041829A (ko) * 2019-10-08 2021-04-16 에스케이하이닉스 주식회사 메모리 시스템, 메모리 컨트롤러 및 동작 방법
CN111078146B (zh) * 2019-12-13 2023-11-14 合肥兆芯电子有限公司 存储器管理方法、存储器存储装置及存储器控制电路单元
US11468960B2 (en) 2019-12-31 2022-10-11 Micron Technology, Inc. Semiconductor device with selective command delay and associated methods and systems
CN113867640A (zh) * 2021-09-28 2021-12-31 合肥兆芯电子有限公司 存储器轮询方法、存储器存储装置及存储器控制电路单元
US11836384B2 (en) 2022-03-10 2023-12-05 Western Digital Technologies, Inc. Automatic prediction timers adaptation
CN115269468B (zh) * 2022-09-29 2023-01-24 北京特纳飞电子技术有限公司 状态读取指令发送方法、装置、存储设备和可读存储介质

Family Cites Families (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5159672A (en) * 1989-12-28 1992-10-27 Intel Corporation Burst EPROM architecture
US7953931B2 (en) * 1999-08-04 2011-05-31 Super Talent Electronics, Inc. High endurance non-volatile memory devices
US6804741B2 (en) 2002-01-16 2004-10-12 Hewlett-Packard Development Company, L.P. Coherent memory mapping tables for host I/O bridge
US8533401B2 (en) 2002-12-30 2013-09-10 Intel Corporation Implementing direct access caches in coherent multiprocessors
US7844778B2 (en) 2006-07-11 2010-11-30 International Business Machines Corporation Intelligent cache replacement mechanism with varying and adaptive temporal residency requirements
US20090172213A1 (en) * 2007-12-31 2009-07-02 Sowmiya Jayachandran Command completion detection in a mass storage device
KR101507122B1 (ko) * 2008-04-29 2015-04-01 삼성전자주식회사 반도체 메모리 장치 및 그것의 액세스 방법
US8825940B1 (en) 2008-12-02 2014-09-02 Siliconsystems, Inc. Architecture for optimizing execution of storage access commands
US9176859B2 (en) 2009-01-07 2015-11-03 Siliconsystems, Inc. Systems and methods for improving the performance of non-volatile memory operations
US10079048B2 (en) 2009-03-24 2018-09-18 Western Digital Technologies, Inc. Adjusting access of non-volatile semiconductor memory based on access time
CN101692647B (zh) * 2009-10-12 2012-03-14 清华大学 路由器中采用IPv6头封装IPv4包的隧道转发系统
US8495299B2 (en) 2009-11-16 2013-07-23 Microsoft Corporation Non-blocking data transfer via memory cache manipulation
US9218281B2 (en) 2012-05-04 2015-12-22 Seagate Technology Llc Maintaining ordering via a multi-level map of a solid-state media
US9772651B2 (en) * 2012-09-14 2017-09-26 Samsung Electronics Co., Ltd. Embedded multimedia card (eMMC), host controlling eMMC, and method operating eMMC system including the use of a switch command defining an adjustment delay for a data signal
US9032177B2 (en) * 2012-12-04 2015-05-12 HGST Netherlands B.V. Host read command return reordering based on time estimation of flash read command completion
US9250901B2 (en) 2013-03-12 2016-02-02 Intel Corporation Execution context swap between heterogeneous functional hardware units
US9405672B2 (en) 2013-06-25 2016-08-02 Seagate Technology Llc Map recycling acceleration
US9824004B2 (en) * 2013-10-04 2017-11-21 Micron Technology, Inc. Methods and apparatuses for requesting ready status information from a memory
US9514057B2 (en) * 2013-12-04 2016-12-06 Sandisk Technologies Llc Storage module and method for managing logical-to-physical address mapping
US9093160B1 (en) * 2014-05-30 2015-07-28 Sandisk Technologies Inc. Methods and systems for staggered memory operations
US20160019160A1 (en) * 2014-07-17 2016-01-21 Sandisk Enterprise Ip Llc Methods and Systems for Scalable and Distributed Address Mapping Using Non-Volatile Memory Modules
KR20170001237A (ko) * 2015-06-26 2017-01-04 에스케이하이닉스 주식회사 상태 읽기를 수행하는 메모리 시스템 및 그것의 동작 방법

Similar Documents

Publication Publication Date Title
JP2018200689A5 (ja) メモリ内のデータを管理するための装置および方法
CN105068953B (zh) 用于对等高速外围组件互联存储传输的系统和方法
US9696942B2 (en) Accessing remote storage devices using a local bus protocol
US20220317936A1 (en) Solid-state drive with initiator mode
EP3495955A3 (en) On the fly raid parity calculation
JP2018185814A5 (ja)
JP2018181374A (ja) 不揮発性メモリの制御方法
JP2014182832A5 (ja) 格納装置、不揮発性格納装置及びその運営体系イメージプログラム方法
JP2017120626A5 (ja)
DE602005015743D1 (de) Verfahren und system zur direkten übertragung von daten zwischen speichervorrichtungen in einem speicherbereichnetzwerk
JP2018089936A5 (ja)
KR20180037099A (ko) 비휘발성 스토리지 시스템 및 비휘발성 스토리지 장치들을 위한 데이터 스토리지 액세스 프로토콜
JP2018022487A5 (ja)
WO2013128494A1 (en) Storage system and data transfer control method
US10430079B2 (en) Adjusting storage capacity in a computing system
JP2011508296A5 (ja)
JP2012242961A5 (ja)
JP2016054389A5 (ja)
TW201926056A (zh) 資料冗餘的處理方法及其相關電腦系統
WO2018169619A3 (en) METHODS AND APPARATUSES FOR COPYING DATA PAGE IN AN UNMANNED FLASH MEMORY DEVICE
JP2005275582A5 (ja)
JP2010244532A5 (ja)
AU2015203828B2 (en) Implementing enhanced performance with read before write to phase change memory to avoid write cancellations
TW201705000A (zh) 電腦系統及非揮發性記憶體的控制方法
TWI666901B (zh) 資料傳輸方法與使用此方法的主機系統