JP2018078279A - Display having surface mounting light-emitting element - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide, related to an integrated circuit (IC), in particular, a surface mounting light-emitting element and a light-emitting display manufactured by applying the surface mounting light-emitting element.SOLUTION: A surface mounting light-emitting element 300 includes a first electric contact part 306 formed only on a top surface 302, a second electric contact part 308 formed only on the top surface, and a post 310 extending from a bottom surface 304. A light-emitting display 800 manufactured from the surface mounting light-emitting element and a light-emitting substrate 802 is also provided, where the light-emitting substrate has a top surface 804, and first multiple wells are formed on the top surface. Each well has a bottom surface 808, a sidewall 810, and a first electrical interface 812 and a second electrical interface 814 formed on the bottom surface. The light-emitting substrate further includes a matrix of conductive traces of columns and rows, forms intersections of first multiple columns and rows, where the intersection of each column and row is related to a corresponding well. The first multiple light-emitting elements fill te wells.SELECTED DRAWING: Figure 8B

Description

  The present invention relates generally to integrated circuits (ICs), and more particularly to surface mounted light emitting devices and light emitting displays manufactured using such surface mounted light emitting devices.

  Currently, the popular competitive technologies employed in large displays are liquid crystal displays (LCD) and organic light emitting device (OLED) displays, but recently inorganic LED displays are known. The disadvantages of the LCD directly described by this application are: 1) Low efficiency due to the fact that the light viewed as an image by the user accounts for only about 5% of the light emitted from the backlight; 2) The LC material is completely Since the light cannot be blocked, the low dynamic range is caused by the generation of black pixels. Also, a disadvantage of OLED displays is that blue OLED materials are unreliable and have low efficiency (˜5% QE). When an inorganic micro-LED (uLED) is applied to a display, the display does not absorb light using a color filter and a polarizing plate, and thus can provide very high efficiency. The uLED used in the present invention is an LED having a diameter or a cross-sectional area of 100 micrometers or less. Inorganic uLEDs have a very high contrast because black pixels are set not to emit light. As established in general lighting, for inorganic uLED displays, blue gallium nitride (GaN) LEDs have an efficiency of 35% to 40% and a reliability of over 50000 hours. Sony has already developed a passive matrix of uLEDs arranged in a display array using a pick and place system. However, because large displays require millions of LEDs, displays manufactured by the method are time consuming and costly compared to other technologies.

  The fluid transfer of microfabricated electronic devices, optoelectronic devices and subsystems from donor substrates / wafers to large area and / or non-conventional substrates presents new opportunities to expand the range of applications of electronic and optoelectronic devices. Provided. For example, a display pixel sized LED microstructure, such as a rod, fin or disk, is first assembled on a small wafer and then transferred onto a large panel glass substrate to directly emit light without the need for a backlight. A display can be manufactured.

  Conventional transfer techniques such as ink jet printing or automatic pick and place are optimal for certain applications. However, these conventional techniques are costly and the production volume is very low. Therefore, it cannot be applied to the direct transfer of the LED microstructure.

  For use in direct light emitting displays, the manufacture of inorganic uLED disks has three important processes. These three important processes are each to manufacture uLED disks, to place uLED disks on a transparent substrate and to interconnect uLED disks. Since the fluid assembly process places uLED disks randomly in transparent substrate placement wells, conventional IC-type contact hole opening / metal interconnect designs face significant challenges. In order to place these random distributions, extra tolerances are required in the (opaque) interconnect, which results in a considerable loss of filling factor in the light emitting area. Furthermore, the manufacturing complexity during these interconnections results in poor yields and / or high costs.

  1A and 1B are plan views showing a top contact LED disk located in a well of a substrate (prior art). In FIG. 1A, assuming that GaN is formed at the top of the disk, Dd indicates the diameter of the LED (eg, GaN) disk and Dc indicates the diameter of the microcavity or well of the already placed uLED disk. , Dp indicates the diameter of the p-type doped GaN (p-GaN) region. Region 100 is an n-GaN contact point where p-GaN and MQW have been removed by reactive ion etching (RIE). The inner circular region 102 is a full LED stack with p-GaN on top. A layer of nickel oxide (NiOx) / layer of indium tin oxide (ITO) may be formed on the surface of region 102. Considering typical photolithography misalignment tolerances (up to 2 micrometers (μm)), the circular region 102 is offset by 2 μm from the center of the GaN disk. Since only the circular region 102 can emit light, the emission area filling factor is only about 70.6%, and nearly 30% of the emission area is lost by the opening 100 of the n-GaN.

  FIG. 1B shows the operating region of the anode terminal contact 104 (Dpc). Connections made outside the region 104 with a diameter of 24 μm can cause a short circuit or an open circuit. Conventional metal interconnection to the n-GaN region 100 further reduces the light emitting area filling factor. In this example, the GaN disk emits light in only 31.4% area.

  FIG. 2 is a partial cross-sectional view of a bottom cathode contact structure (prior art). This selection avoids the significant light emitting area filling factor loss associated with conventional top contact LED disks. The bottom interconnect electrode 200 is first deposited and patterned on the substrate 202, and then a microcavity (well) 204 is formed. A thin low melting point metal layer 206 is then coated on the bottom electrode surface within the microcavity 204. Next, a GaN disk 208 (n-GaN 210 / p-GaN 212) is placed in the microcavity 204. After the interlayer dielectric 214 is patterned, the top interconnect electrode 216 is deposited and patterned to complete the entire process.

  The process flow shown in FIG. 2 is relatively simple. The design with a well-selected top metal trace allows the front light emitting area filling factor to reach a maximum value of 85%. The main challenge of this flow is the trade-off between bottom contact rate and bottom electrode area when bottom contact rate, uniformity, reliability, reproducibility, and backside light emitting aperture are required. including.

  It would be advantageous if a large area light emitting display could be efficiently manufactured using a fluid assembly process using surface mount light emitting devices.

  The present invention relates to a direct light emitting display or liquid crystal display (LCD) backlight using an inorganic micro light emitting diode (LED), and can produce a large screen and high dynamic range display having a reasonable cost and high reliability.

  The present invention relates to a direct light emitting display or a liquid crystal display (LCD) backlight using inorganic micro light emitting diodes (LEDs), and can produce a large screen and high dynamic range display with reasonable cost and high reliability. For example, an inorganic micro-LED (uLED) array in a surface mount structure is assembled by a fluid assembly to produce a high dynamic range display. In a conventional planar LED structure assembled on a sapphire substrate, a uLED emitter is fabricated by etching into a small disk. The disk is processed so that an anode and a cathode electrode are formed on the upper surface of the uLED. The resulting uLED is recovered in a suitable solution, such as isopropanol (IPA), acetone or distilled water, so that it is released by the laser lift-off process to form a suspension. These suspensions are deposited on a display substrate having a pre-prepared array of well structures, the well structures comprising electrodes that match the anode and cathode electrodes of the uLED disk. The well structure is a cylindrical opening that is slightly larger than the diameter of the disk. Thus, one uLED can be deposited at a position where the LED electrode in the well contacts the electrode on the substrate. Since each LED electrode directly covers and adjoins the bottom surface of the well, compared to LED disks that require additional interconnect layers and processing to have one or two electrodes exposed to the well opening, The electrical connection is greatly simplified.

  As a result of proper annealing, the uLED is connected to an array electrode on the substrate to be driven by a suitable drive circuit to emit light. The array may be driven as a passive matrix. This turns on each row in turn, and each subpixel in the array is driven by a control current to produce the light it needs. However, due to sampling and driving limitations, such simple driving methods are necessarily limited to relatively few rows. Alternatively, each subpixel may be controlled by a thin film transistor (TFT) drive circuit. A thin film transistor (TFT) drive circuit can control the amount of drive current based on the charge stored in the capacitor. This active matrix (AM) circuitry allows the uLED to be driven for nearly 100% of the time. Therefore, there is no limit to the number of rows in the display other than the power supplied to each column.

Compared to a vertically driven uLED display where the top and bottom surfaces have electrical connections, the surface mount uLED structure provides several main advantages:
1) The small emitter area is optimal for high resolution active matrix (AM) displays, but the overall disk size is large enough for the fluid assembly.
2) The fluid assembly process is the final main operation, so that relatively small glass can be used and after assembly there is no need to return to the LCD fab for metallization.
3) The patterning of the wiring is performed before the well is formed. Thus, misaligned uLEDs do not have metal defects and do not require deep interconnection from the substrate to the well layer.
4) After annealing, the uLED is electrically connected but exposed. Thereby, it is possible to determine whether or not a predetermined uLED emits light by electrical measurement, and to perform pick-and-place repair of a defective uLED.

  These advantages are that they tend to offset the light emitting area of surface mounted LEDs, which are relatively small areas on the LED growth substrate, improving cost per pixel. However, the uLED fabrication process is relatively complex because it has multiple patterning steps including post fabrication that occurs after laser lift-off (LLO).

  Accordingly, a surface mounted light emitting device having a top surface and a bottom surface is provided. The first electrical contact portion is formed only on the top surface, and the second electrical contact portion is also formed only on the top surface. The post extends from the bottom surface. In one embodiment, the surface mount light emitting device is a surface mount light emitting diode (SMLED), which is used for a first semiconductor layer having an n-dopant or a p-dopant and a first semiconductor layer. Manufactured from a second semiconductor layer manufactured with a dopant opposite to the dopant. The multiple quantum well (MQW) layer is interposed between the first semiconductor layer and the second semiconductor layer. Generally, the first semiconductor layer and the second semiconductor layer are gallium nitride (GaN) or aluminum indium gallium phosphide (AlGaInP).

  A light-emitting display manufactured from the surface-mounted light-emitting element and the light-emitting substrate described above is also provided. The light emitting substrate has a top surface in which the first plurality of wells are formed on the top surface of the light emitting substrate. Each well has a first electrical interface formed on the bottom surface, sidewalls and bottom surface and a second electrical interface formed on the bottom surface. The light emitting substrate further includes a matrix of column conductive traces and row conductive traces for forming a first plurality of column and row intersections, each column and row intersection being associated with a corresponding well. The first plurality of light emitting elements fill these wells. In one embodiment, the color modifier covers the bottom surface of each light emitting element (eg, produces a single color, eg, white), and the display includes a liquid crystal display (LCD) substrate that covers the top surface of the light emitting substrate. Including.

  The light emitting display may be a direct light emitting display. In this case, the plurality of first color modifiers cover the bottom surface of the corresponding SMLED, and the plurality of second color modifiers cover the bottom surface of the corresponding SMLED. The first color and the second color are different. If the display is red-green-blue (RGB) and only one type of LED (eg, a blue GaN LED) is used, the multiple light diffusers will cover the bottom surface of the SMLED that is not covered with the corresponding color modifier. cover. As a result, a display having a pixel region is a SMLED in which each pixel region is covered with a first color modifier (eg, green), an SMLED and a color modifier (eg, red) covered with a second color modifier (eg, red). Including SMLED not covered with blue. Alternatively, if blue and green emitting GaN LEDs are used simultaneously, a color modifier need only be used to generate red.

  In one embodiment, the first electrical contact portion (electrode) of each SMLED is arranged in a ring shape having a first diameter, and the first semiconductor layer and the MQW layer of each SMLED have the first electrical contact portion. It is the ring-shaped laminated body which covers. At this time, the second electrical contact portion of each SMLED is formed within the ring-shaped periphery of the first electrical contact portion, and the second semiconductor layer of each SMLED is a disc whose central portion covers the second electrical contact portion. Has a shape. The first electrical interface of each well is configured as a partial ring having a first diameter and partially provided with an opening, and the second electrical interface of each well is a portion of the corresponding first electrical interface. Consists of a trace extending into the opening of the ring. Alternatively, the first semiconductor layer and the MQW layer of each SMLED may be a stacked body that covers the second electrical contact portion, and the second semiconductor layer may cover the first electrical contact portion.

  Alternatively, the top surface of each light emitting element may be a biplanar having a first horizontal plane and a second horizontal plane. Thereby, the 1st electrical contact part of each light emitting element is formed in the 1st horizontal surface of the top surface, and the 2nd electrical contact part of each light emitting element is formed in the 2nd horizontal surface of the top surface. Similarly, the bottom surface of each well is a biplanar having a first horizontal plane and a second horizontal plane, the first interface of each well is formed in the first horizontal plane of the bottom surface, and the second interface of each well is the bottom surface. Formed on the second horizontal plane.

  The light emitting element may use an active matrix (AM) driving circuit. Each drive circuit is connected to the intersection of the corresponding column and row and is connected to the first electrical interface of the corresponding well. The light emitting substrate also includes a network of reference voltage (eg, ground) traces connected to the second electrical interface of each well. Alternatively, the matrix of column and row traces forms a passive matrix (PM), and the column trace at each column-row intersection is connected to the first electrical interface of the corresponding well, and each column-row intersection. The row traces are connected to the second electrical interface of the corresponding well.

  Hereinafter, other details of the surface-mounted light-emitting element and the light-emitting display described above will be provided.

1 is a plan view of a top contact LED disk located in a well of a substrate (prior art). FIG. 1 is a plan view of a top contact LED disk located in a well of a substrate (prior art). FIG. It is a fragmentary sectional view of the contact structure of the cathode of a bottom part (prior art). It is a fragmentary sectional view of a surface mount type light emitting element. It is a fragmentary sectional view at the time of realizing a surface mount type light emitting diode (SMLED) as a surface mount type light emitting element. It is a top view when a surface mount type light emitting diode (SMLED) is realized as a surface mount type light emitting element. It is the fragmentary sectional view which showed the modification of LED of FIG. 4A. It is the fragmentary sectional view which showed the change of the two horizontal surfaces of a light emitting element. It is a bottom view which shows the change of the post | mailbox of a surface mount type light emitting element. It is a bottom view which shows the change of the post | mailbox of a surface mount type light emitting element. It is a top view of a light emission display. It is a fragmentary sectional view of a light emission display. It is a fragmentary sectional view which shows one method which implement | achieved the light emission board | substrate of FIG. 8A as a backlight. It is a fragmentary sectional view which shows one method which implement | achieved the light emission board | substrate of FIG. 8B as a backlight. It is a fragmentary sectional view which shows one method implement | achieved as a display which light-emits a light emission board | substrate directly. It is a fragmentary sectional view which shows one method implement | achieved as a display which light-emits a light emission board | substrate directly. It is a top view of a well bottom. It is a fragmentary sectional view of a light emitting substrate. It is a figure which shows the example of a change of the top view of the well bottom part of FIG. 11A. It is a figure which shows the example of a change of the fragmentary sectional view of the light emission board | substrate of FIG. 11B. It is a fragmentary sectional view which shows the example of a change of a light emitting element. It is a fragmentary sectional view showing the example of change of a well. It is a fragmentary sectional view of the light emitting element located in a well. It is a schematic diagram of the light emitting substrate driven by the drive circuit of the first multiple active matrix (AM). It is a fragmentary sectional view of the light emission board driven by the drive circuit of the 1st plurality active matrix (AM). It is a figure which shows the example of a change of a drive circuit. It is the schematic of the light emitting substrate at the time of implement | achieving a light emitting element using a passive matrix. It is a fragmentary sectional view of the light emission board | substrate at the time of implement | achieving a light emitting element using a passive matrix. FIG. 3 is a partial cross-sectional view of a surface mount uLED designed for fluid assembly. It is a top view which shows the manufacturing process of the light emitting substrate which concerns on one Example. It is a fragmentary sectional view which shows the manufacturing process of the light emitting substrate which concerns on one Example. It is a top view which shows the manufacturing process of the light emitting substrate which concerns on one Example. It is a fragmentary sectional view which shows the manufacturing process of the light emitting substrate which concerns on one Example. It is a top view which shows the manufacturing process of the light emitting substrate which concerns on one Example. It is a fragmentary sectional view which shows the manufacturing process of the light emitting substrate which concerns on one Example. It is a top view which shows the manufacturing process of the light emitting substrate which concerns on one Example. It is a fragmentary sectional view which shows the manufacturing process of the light emitting substrate which concerns on one Example. It is a top view which shows the manufacturing process of the light emitting substrate which concerns on one Example. It is a fragmentary sectional view which shows the manufacturing process of the light emitting substrate which concerns on one Example. It is a fragmentary sectional view which shows the manufacturing process of the light emitting substrate which concerns on one Example. It is a fragmentary sectional view which shows the manufacturing process of the light emitting substrate which concerns on one Example. It is a fragmentary sectional view showing a color generator in which a single color conversion sheet is used. It is a fragmentary sectional view which shows the color generator using the fluorescent substance deposited on the light emitting element. FIG. 3 is a partial cross-sectional view of a light emitting substrate that uses three different LEDs to generate three different colors, respectively. It is an optical intensity table | surface of the light emission board | substrate which produces | generates 3 types of different colors, respectively using 3 types of LED. It is a figure which shows the intensity | strength graph of a white light fluorescent substance. It is a figure which shows the laminated | stacked color filter in an Example. It is a figure which shows the intensity | strength graph of the related laminated color filter.

  FIG. 3 is a partial cross-sectional view of a surface-mounted light emitting device. The surface-mounted light emitting device 300 includes a top surface 302, a bottom surface 304, a first electrical contact portion 306 formed only on the surface of the top surface 302, and a second electrical contact portion 308 formed only on the surface of the top surface 302. Including. Here, “formed only on the surface of the top surface” means that the electrical contact portion or electrode does not extend to the side surface 312 or the bottom surface 304 of the light emitting element. The electrical contact may be a metal, a doped semiconductor, or a transparent conductive oxide (TCO) such as indium tin oxide (ITO). Although not shown as a clear layer, the first electrical contact portion 306 and the second electrical contact portion 308 may be solder, or solder (for example, eutectic solder) used for connecting the light emitting substrate thereafter. ). The surface mount light emitting device 300 further includes a post 310 extending from the bottom surface 304. In one embodiment, post 310 is centered on bottom surface 304. One example of a light emitting element is a light emitting diode (LED). Although not emitting light, other two-terminal surface-mounted light-emitting elements include a photodiode, a thermistor, a pressure sensor, and a piezoelectric element.

  4A and 4B are a partial cross-sectional view and a plan view when a surface-mounted light emitting diode (SMLED) is realized as the surface-mounted light emitting device 300, respectively. The SMLED 300 includes a first semiconductor layer 402 that includes an n-type dopant or a p-type dopant and a second semiconductor layer 404 that includes a dopant that is not used in the first semiconductor layer 402. The multiple quantum well (MQW) layer 406 is located between the first semiconductor layer 402 and the second semiconductor layer 404. The MQW layer 406 is typically a series of quantum well layers not shown (generally five layers, for example, 5 nm indium gallium nitride, alternately arranged, not shown, and 9 nm N It may be type-doped GaN (n-GaN). An aluminum gallium nitride (AlGaN) electron blocking layer (not shown) may be provided between the MQW layer and the P-type doped semiconductor layer. The outer semiconductive layer may be P-type doped GaN (Mg doped) having a thickness of about 200 nm. When used in an MQW with a relatively high indium content, high brightness blue LEDs or green LEDs can be formed. The most practical materials for the first and second semiconductor layers are gallium nitride (GaN) that can emit blue or green light, or aluminum indium gallium phosphide (AlGaInP) that can emit red light. .

  The second electrical contact portion 308 is configured in a ring shape. The second semiconductor layer 404 has a disk shape, and its edge is located below the ring-shaped second electric contact portion 308. The first electrical contact portion 306 is formed inside a ring-shaped second electrical contact portion 308, and the first semiconductor layer 402 and the MQW layer 406 are stacked and installed below the first electrical contact portion 306. Yes. A groove is formed between the ring-shaped second electrical contact portion 308 and the first electrical contact portion 306, and this groove is filled with an electrical insulator 408.

  Conventional LED manufacturing processes (for example, LEDs for light emission) are performed only on one surface before separation from the sapphire substrate. Part of these manufactures is the final step of singulating the LEDs from the sapphire substrate using laser lift-off (LLO). In another manufacturing process, the LEDs are separated from each other by dividing the sapphire substrate without using LLO. However, the SMLED structure requires an electrode to be placed on the surface facing the post. Therefore, this post is formed after separation from the sapphire substrate by laser lift-off in the uLED. During the conventional manufacturing process, no method is provided to keep each LED in a known position, and the LED can be separated from the sapphire substrate so that photolithography can be performed on the bottom of the LED. Accurate xy coordinates are required to accurately place the post at the desired location (eg, center) on the top surface of the LED. An accurate z (vertical) position is required to establish a focal plane and image the post structure with the required size control in the fluid assembly (eg, orientation). That is, in SMLEDLLO, in order to form a post, the SMLED must be localized to the transfer substrate in a controlled manner. A suspension for the fluid assembly is then formed away from the transfer substrate.

  FIG. 5 is a partial cross-sectional view showing a modification of the LED of FIG. 4A. In this embodiment, the first electrical contact portion (electrode) 306 is formed in a ring shape. The first semiconductor layer 402 and the MQW layer 406 are a ring-shaped stacked body positioned below the first electrical contact portion 306. The second electrical contact portion 308 is formed inside the ring-shaped peripheral edge of the first electrical contact portion 306. The second semiconductor layer 404 has a disk shape, and its central portion is located below the ring-shaped second electrical contact portion 308. As shown in FIG. 5, a groove is formed between the ring-shaped first electrical contact portion 306 and the second electrical contact portion 308. The electrical insulator 408 is filled in this groove.

  FIG. 6 is a partial cross-sectional view showing changes in two horizontal planes of the light emitting element. 4A and 5 that the top surface is a horizontal plane and the bottom surface is also a horizontal plane. Here, the term “horizontal plane” means an all flat surface having a root mean square (RMS) roughness of 10 nanometers (nm) or less. Instead, as shown in FIG. 6, the top surface of the surface-mount light-emitting element is a two plane having a first horizontal plane 600 and a second horizontal plane 602. The first electrical contact portion 306 is formed on the first horizontal surface 600 on the top surface, and the second electrical contact portion 308 is formed on the second horizontal surface 602 on the top surface. Although not shown, alternatively, the second electrical contact portion 308 may be formed on the first horizontal surface 600 of the top surface, or the first electrical contact portion 306 may be formed on the second horizontal surface 602 of the top surface. Good.

  7A and 7B are bottom views showing changes in posts of the surface-mounted light emitting device. As shown in FIG. 7A, in one embodiment, the surface mount light emitting device includes a plurality of posts 310 extending from a bottom surface 304. What should be noted here is that the surface-mount light-emitting element 300 does not limit the specific quantity, position, or specific shape with respect to the post. FIG. 7A shows two posts, and FIG. 7B shows a fin-like post. Further, other shapes or a plurality of shapes may be combined. In one embodiment, particularly if there is only one post, the post is centered on the bottom surface of the light emitting device. This tilts one edge of the light emitting element to the fluid flow. 7A and 7B, the post tilts the light emitting element in a direction perpendicular to the vertical axis that exits the light emitting element from the page.

  8A and 8B are a plan view and a partial cross-sectional view of the light-emitting display, respectively. Some examples of light-emitting displays include televisions, computer displays, portable terminal screens, and LCD display backlights, which may be applied to the above examples or used directly as light-emitting displays. The light emitting display 800 includes a light emitting substrate 802 having a top surface 804. The light emitting substrate 802 includes a first plurality of wells 806 formed on the top surface 804 of the light emitting substrate. Each well 806 includes a bottom surface 808, a sidewall 810, a first electrical interface 812 formed on the bottom surface 808 and a second electrical interface 814 formed on the bottom surface 808. Although not shown as a distinct layer, the first electrical interface 812 and the second electrical interface 814 may be solder coated for electrical connection with the light emitting device. The matrix formed by column conductive trace 816 and row conductive trace 818 (ie, 818a and 818b) forms a first plurality of column and row intersections 820. Therein, each first plurality of column and row intersections 820 is associated with a corresponding well 806, respectively. The following describes other details of the interface between the matrix formed by the well and column and row traces. The first plurality of surface mount light emitting devices 300 are located in the well 806. Each surface mount light emitting device 300 includes a top surface 302 that covers a corresponding well bottom surface 808. The surface mounted light emitting device 300 includes a bottom surface 304 and a post 310 extending from the bottom surface 304. A first electrical contact (electrode) 306 is formed on the top surface 302 of the light emitting element and is connected to the first electrical interface 812 of the corresponding well 806. Although not shown as a distinct layer, the first electrical contact 306 and the second electrical contact 308 may be solder or solder coating for connection to the electrical interface of the light emitting substrate. The second electrical contact 308 is formed on the top surface 302 of the light emitting device and is connected to the second electrical interface 814 of the corresponding well 806. It should be noted that the electrical contacts of the light emitting device and the electrical interface of the well can be made from a reflective material (eg, metal) to direct light to the top surface 804 of the light emitting substrate 802.

  Since all the contact portions of the light emitting elements are formed on the top surface 302, the device can be referred to as a surface mount type light emitting element. However, it should be noted that the bottom surface 304 of the light emitting device covers the top surface 302 when the light emitting device is taken into the well 806. As described in the above example, the first electrical contact portion 306 and the second electrical contact portion 308 of the light emitting element are formed only on the top surface 302 of the light emitting element. Thus, it is not necessary to form an electrical interface on the top surface 804 of the light emitting substrate after providing the well. As described above, the light emitting element may be a surface light emitting diode (SMLED), but detailed description thereof is omitted here for the sake of brevity. As described above, in one embodiment, the top surface 302 of each light emitting device is a horizontal plane and the bottom surface 808 of each well is also a horizontal plane. The bottom surface 304 of the light emitting element may also be a horizontal plane.

  The light emitting device has a size that fits into a well cavity. Here, “match” means that two machine parts are combined. A manufactured part needs to be frequently mated with another part. These parts are installed so as to slide freely with respect to each other, or these parts are connected to each other so as to form a single unit or assembly. There are three general combinations. In order to freely rotate or slide an object (for example, a light emitting element) in a well, a gap fit is required. This is usually referred to as a “slip fit”. An interference fit is required to hold the object securely in the well. This interference fit securely holds the object in the well, but an intermediate fit is required if it can be removed or rotated in the well. This is referred to as “stereo or intermediate fit”. A light emitting device typically has a gap fit or a slip fit with respect to the well.

  9A and 9B are partial cross-sectional views showing two different methods for realizing the light emitting substrate of FIGS. 8A and 8B as a backlight. A color modifier 902 covers the bottom surface 304 of each light emitting element, and a liquid crystal display (LCD) substrate 900 covers the modifier. Since many types of LCD substrates 900 are well known in the art, a detailed description of the structure here is omitted for the sake of brevity. That is, the LCD substrate 900 forms a selectively engageable “window” located on each light emitting element 300, and the color modifier 902 changes the color of the light emitted from the light emitting element to the backlight of the LCD display. Convert to the color applied to. For example, when the light emitting element is a GaN LED that emits blue light, the color modifier 902 converts the blue light into white. For example, the color modifier 902 can be a laminate including a red modifier and a green modifier. This will be described in more detail below. In FIG. 9A, the color modifier 902 is directly formed on the surface-mounted light emitting device 300 by, for example, a silk printing process. In FIG. 9B, the color modifier 902 is a layer in the LCD substrate 900.

  FIGS. 10A and 10B are partial cross-sectional views illustrating two different ways of implementing a light emitting substrate as a direct light emitting display. In FIG. 10A, the second plurality of first color modifiers 1000 cover the corresponding second plurality of SMLED bottom surfaces 304, wherein the second plurality of quantities is less than the first plurality of quantities. The second plurality of second color modifiers 1002 cover the corresponding second plurality of SMLED bottom surfaces 304, wherein the second color is different from the first color. It should be noted that the second plurality of light diffusers 1004 cover the bottom surface 304 that is not covered by the corresponding second plurality of SMLED color modifiers. Thus, if only GaNLEDs are used, as a result, in the second plurality of pixel regions (only one pixel region is shown), each pixel region is SMLED 300 (eg, green) covered by the first color modifier 1000, It includes SMLEDs (eg, red) covered by the second color modifier 1002 and SMLEDs (eg, blue) that are not covered by the color modifier. Although a red-green-blue (RGB) display is shown here, other colors can be added to each pixel region by other color modifiers.

  In FIG. 10B, the second plurality of red modifiers 1010 cover the bottom surface 304 of the corresponding second plurality of SMLEDs 300, the second plurality of quantities being less than the first plurality of quantities. The third plurality of light diffusers 1012 cover the bottom surface 304 that is not covered by the corresponding third plurality of SMLED color modifiers. In the RGB display of the present invention, the third plurality of quantities is less than the first plurality of quantities, but equal to twice the second plurality of quantities. As a result, the second multi-pixel region (only one pixel region is shown) has a SMLED 300 (e.g., GaN LED) where each pixel region is covered by a red modifier 1010, a blue SMLED 300 that is not covered by a color modifier 1012. (E.g., GaNLED) and green SMLED 1014 (e.g., GaNLED) not covered by color modifier 1012. In one embodiment, layer 1012 is a light diffuser. In another embodiment, the color combination is realized by both GaN and red-emitting AlGaInPSMLED.

  11A and 11B are a plan view of the well bottom surface and a partial cross-sectional view of the light emitting substrate, respectively. Referring to FIG. 5, the first electrical contact portion 306 of each SMLED 300 is formed in a ring shape having a first diameter. The first semiconductor layer 402 and the MQW 406 of each SMLED 300 are a ring-shaped laminate that is covered by the first electrical contact portion 306. It should be noted that the first semiconductor layer 402 and the MQW layer 406 shown in FIG. 5 are located below the first electrical contact portion 306, but when disposed in the well, the first semiconductor layer 402 and the MQW layer 406 are disposed. Layer 406 is the point that covers the first electrical contact 306. The second electrical contact portion 308 of each SMLED 300 is formed inside the ring-shaped peripheral edge of the first electrical contact portion 306. The second semiconductor layer 404 of each SMLED 300 is disk-shaped and its central portion is covered by a second electrical contact 308 (described above).

  Referring again to FIGS. 11A and 11B, the first electrical interface 812 of each well is formed in a partial ring having a first diameter. The first electrical interface 812 has an opening 1100 and is connected to the column conductive trace 816. The second electrical interface 814 of each well is connected to a row conductive trace 818 that extends to the opening 1100 of the corresponding partial ring of the first electrical interface 812.

  12A and 12B are diagrams showing modified examples of the plan view of the well bottom and the partial cross-sectional view of the light emitting substrate in FIGS. 11A and 11B, respectively. 4A and 4B, the second electrical contact 308 of each SMLED 300 may be formed in a ring shape having a first diameter. The second semiconductor layer 404 of each SMLED 300 is disk-shaped and the edge is covered by a ring-shaped second electrical contact. The first electrical contact portion 306 of each SMLED 300 is formed inside the periphery of the second electrical contact portion 308, respectively. The first semiconductor layer 402 and the MQW layer 406 of each SMLED are a laminate that is covered by the first electrical contact portion 306. Note that, as shown in FIG. 4, the first semiconductor layer 402 and the MQW layer 406 are located below the first electrical contact portion 306, but when disposed in the well, as shown in FIG. The MQW layer 406 covers the first electrical contact portion 306.

  Referring again to FIGS. 12A and 12B, the second electrical interface 814 of each well is formed in a partial ring having a first diameter and has an opening 1100 and is connected to the column conductive trace 816. The first electrical interface 812 of each well is connected to a row conductive trace 818 that extends to the opening 1100 of the corresponding partial ring-shaped second electrical interface 814.

  11B and 12B, another feature to be noted is that the light emitting substrate 802 may include a plurality of horizontal planes. In FIG. 12B, for example, the light emitting substrate 802 includes a glass or plastic layer 1200 and the conductive traces can cover an electrical interface connected to a well of the glass or plastic layer 1200. The transparent material layer 1202 may cover the conductive traces and the glass or plastic layer 1200, and the well may be formed in the transparent material layer 1202. For example, the transparent material layer 1202 can be an insulating material or a polyethylene naphthalate (PEN) film.

  FIG. 13A, FIG. 13B, and FIG. 13C are partial sectional views of a light emitting element change example, a well change example, and a light emitting element located in the well, respectively. In one embodiment, the top surface 302 of each light emitting device is two planes including a first horizontal plane 1300 and a second horizontal plane 1302. The first electrical contact portion 306 is formed on the first horizontal surface 1300 of the top surface 302, and the second electrical contact portion 308 is formed on the second horizontal surface 1302 of the top surface 302. Although not shown, instead, the first electrical contact portion 306 may be formed on the second horizontal surface of the top surface, and the second electrical contact portion 308 may be formed on the first horizontal surface of the top surface. Similarly, the bottom surface 808 of each well is two planes including a first horizontal plane 1304 and a second horizontal plane 1306. Thus, the first electrical interface 812 for each well is formed in the first horizontal plane 1304 at the bottom of the well, and the second electrical interface 814 for each well is formed in the second horizontal plane 1306 at the bottom of the well.

  14A and 14B are a schematic view and a partial cross-sectional view, respectively, of a light emitting substrate driven by a first plurality of active matrix (AM) drive circuits. FIG. 14C is a diagram illustrating a specific modification of the drive circuit. Each drive circuit 1400 is connected to the intersection of the corresponding first plurality of rows and columns, and its output terminal is connected to the corresponding first electrical interface 812 of the well. Alternatively, the output terminal of each drive circuit 1400 may be connected to the second electrical interface 814 of each well. A network of reference voltage (eg, ground) traces 1402 is connected to the second electrical interface 814 of each well. Only the final output transistor 1404 of the drive circuit 1400 is shown in FIG. 14B, and the final output transistor 1404 changes the variable resistance interposed between the DC power supply trace (Vdd) 1406 and the LED. Thus, the output of the corresponding LED 300 is controlled.

  15A and 15B are a schematic view and a partial cross-sectional view, respectively, of a light-emitting substrate when a light-emitting element is realized using a passive matrix. In one embodiment, the series of column conductive traces 816 and row conductive traces 818 form a passive matrix (PM) that is connected to the first electrical interface 812 of the corresponding well. Column traces of column and row intersections 820 and row traces of each first plurality of column and row intersections 820 connected to the second electrical interface 814 of each well.

  The uLED emitter element may be manufactured by a process similar to that used for uLED illumination. However, as described below, the size, shape and structure of the disc have other requirements that do not exist in general lighting. Otherwise, the LEDs can be manufactured on a suitable backplane that can accommodate a large array of uLEDs and are electrically connected to the uLEDs. There are specific requirements for size, shape and position features. As a result, the uLED can be properly localized and connected. Finally, the fluid assembly process is used to localize the uLEDs into an array and establish electrical connections between each uLED and the backplane.

  The size of the emitter is an important differentiation item for the display. Normal lighting, LCD backlights, and emitter (light emitting element) sizes tend to be convenient, and the cost per photon is fully considered. The area of the most common (cheapest) LED of the light source in normal illumination is about 200 × 200 μm, the LED thickness is about 5 μm, and the sapphire thickness is about 100 μm. The aspect ratio of the light emitting element is about 2: 1. In direct emission applications, the uLED emission area is selected to produce sufficient illumination emission for one subpixel. The diameter of the uLED emission area may be smaller than 25 μm. Because of the size of the uLED, it is important that manufacturing requires contact within the area of the device, but the larger the contact, the smaller the emitter area. However, the loss increases as the contact portion becomes smaller due to spreading resistance in the GaN layer.

  uLED manufacturing

  Surface mounted uLEDs used in the manufacture of light emitting displays disclosed in the present invention are manufactured from conventional high brightness LED wafers such as those used in conventional illumination emitters, a technique well known in the art. Also good. The resulting uLED has a diameter of 10 to 100 micrometers ([mu] m) and is generally disc-shaped and is shown in the above-mentioned figures. This disk shape is typical, but may be other planar shapes, such as triangles, squares or hexagons, manufactured by similar methods. The display substrate is also manufactured to have a well structure that matches the uLED shape for the fluid assembly.

  A brief manufacturing flow for one particular type of uLED is shown below.

  1) A method for manufacturing a planar high-intensity blue LED wafer manufactured by a conventional method is as follows.

  a. Referring to FIGS. 4A and 4B, a buffer layer and n-GaN (404) are deposited on a sapphire substrate to form an LED cathode. N-doped GaN is either intrinsic (ie, defect doped) or doped with a small amount of silicon (Si).

  b. Alternating layers (406) of InGaN and GaN are deposited to form a multiple quantum well (MQW).

  c. An AlGaN hole blocking layer and a thin p-GaN layer (402) are deposited to form the LED anode. p-GaN is usually doped with magnesium (Mg).

  d. An ITO current spreading layer is deposited on the p-GaN.

  2) Etching ITO, p-GaN, and MQW to form an LED light emitting region, and providing a mesa that is over-etched to some extent on the n-GaN layer.

  3) Etching n-GaN to the sapphire substrate to form a disk-shaped uLED larger than the mesa formed in 2). This is usually a close packed circular array to make the best use of the device area. Other simple plate shapes such as triangles, squares or hexagons may be used if the aspect ratio is appropriate for the fluid assembly.

  4) An insulating material (408) is deposited in a ring shape to electrically insulate the anode and the cathode. The material includes a light absorbing material to prevent light leakage between the anode and the cathode.

  5) Deposit anode electrode stack (308) to appropriate height. The electrode stack includes a plurality of components in successive layers.

  a. It has a work function matched with n-GaN. For example, a material such as titanium (Ti).

  b. A thick electrode connected to the display substrate well electrode, for example, a laminated structure of indium (In) and tin (Sn) having a thin gold cap for preventing oxidation.

  6) Deposit the cathode electrode stack to an appropriate height. The electrode stack includes a plurality of components in successive layers.

  a. For example, a material such as nickel / gold (Ni / Au), chromium / gold (Cr / Au), or titanium (Ti) that makes good contact with the ITO current spreading layer.

  b. An electrode connected to a display substrate well electrode, for example, a laminated structure of indium (In) and tin (Sn) having a thin gold cap for preventing oxidation.

  7) Affix the top surface of the wafer onto the glass processing substrate via an adhesive coating.

  8) Use laser lift-off (LLO) to remove the sapphire substrate and allow entry to the bottom surface of the uLED structure.

  9) The processing substrate with uLEDs is located in the array, and the side surfaces of n-GaN are processed into orientation posts 310. The post 310 may be, for example, a photopatternable material such as SU-8 (a commonly used epoxy negative photoresist) or a deposited oxide or metal.

  The completed uLED is recovered by dissolving the adhesive and collecting the disks in the fluid suspension. The fluid suspension may be a completed uLED by collecting fluid suspensions that are alcohol, polyol, ketone, halocarbon or (DI) distilled water.

  FIG. 16 is a partial cross-sectional view of a vertical surface mount uLED designed for fluid assembly. There are several limitations in LED structures to improve device performance and fluid assembly production. In one embodiment, as described above, a commercially available GaN LED structure is etched to produce a surface mount uLED (SMuLED). The SMuLED used in the present invention is defined as a device having two electrical contacts (adjacent to the well bottom surface). Specifically, the SMuLED of FIG. 16 includes p + GaN 1600, MQW 1602, n + GaN 1604 and n-GaN 1606. The size of c may be 2 to 4 micrometers, and the size of b may be 1 to 2 micrometers. Most of the properties required for the vertical LED fluid assembly are also important for surface mount uLED structures. The following guidelines may apply to the production of surface fluid assembly vertical uLEDs or surface mounted uLEDs.

  Substrate: Preferably, sapphire is used for laser lift-off. The surface is flat or rough to improve light extraction.

  nGaN thickness (1604 and 1606): The body of the SMuLED consists of n-type GaN (1606) and Si-doped n-type GaN (1604). The thickness of each layer is 3 μm.

  Disc Diameter (d): The uLED thickness “a” determines the disc diameter. Usually, the ratio d / a is in the range of 5 to 50 um. If the disc thickness is ˜5 μm, the disc diameter “d” may be between 30 μm and 120 μm. When the disc thickness is 2 μm, the diameter “d” may be reduced by about 5 μm to 50 μm.

  The ratio of post diameter (e): e / d is between 10% and 20%. For a disk having a diameter of 50 μm, the diameter of the post may be 5 to 10 μm. For a 5 μm disk, the diameter of the post may be 0.5-1 μm.

  Post height (f): The post height is about 30% to 100% of the post diameter. A 1 μm post height can be applied to a 50 μm diameter disk, but a 2 μm height can effectively reverse a misoriented disk in the fluid assembly.

  Stack height (a): The height (a) of the stack “a” is the sum of (“b” + “c” + the height of MQW 1602 + p + −the height of GaN 1600). It is in the range of 7 micrometers.

  Manufacturing and requirements for light-emitting substrates

  17A to 17L are a plan view and a partial cross-sectional view showing a manufacturing process of the light emitting substrate according to one embodiment. The uLED display light emitting substrate (backplane) can be manufactured on a large area glass or plastic substrate of the same equipment group used to manufacture the LCD display by conventional processes. A simple passive matrix production flow for connecting uLEDs in a plurality of columns and a plurality of rows is performed as follows.

  1) Deposit a first layer of interconnected metals on a glass or plastic substrate 1200. The metal is tungsten or Ti / Al / Ti or other low resistance metal. The first metal 1701 is patterned to form interconnects that connect the electrical interfaces in the well bottom surface to the rows and columns. As shown in FIGS. 17A and 17B, the shape of one basic electrode is “C” or a partial ring shape centered on a circle.

2) Referring to FIGS. 17C and 17D, an insulating layer 1700 (silicon dioxide (SiO ₂ ), silicon nitride (Si ₃ N ₄ ) or insulating organic film) is deposited on the first metal 1701, and the contact hole 1702 is formed. Etch and then connect with the second metal to be deposited.

3) Referring to FIGS. 17E and 17F, deposit a second layer metal 1704 interconnect that is tungsten or Ti / Al / Ti or other low resistance metal. The second metal 1704 is patterned. An insulating layer 1706 (SiO ₂ , Si ₃ N ₄ or insulating organic film) is deposited on the second metal 1704.

  4) Referring to FIGS. 17G and 17H, the contact holes 1708 and 1710 are etched and connected to the subsequently deposited third metal.

  5) After depositing and patterning the third local interconnect metal, third metal surfaces 1712 and 1714 are formed. The third local interconnect metal may be titanium, molybdenum (Mo), gold / germanium (Au / Ge) stack, tungsten (W), matching the size and spacing of the anode and cathode electrodes on the uLED. Pattern it into a shape like this. In FIG. 8B, interconnects 1712 and 1714 are shown with electrical interfaces. In this respect, these electrode layers described above are on the same plane. Thus, the electrode surface of the uLED is uniformly positioned on the third metal surfaces 1712 and 1714.

  6) Deposit insulating material 1202 to form a well structure to obtain uLED in fluid assembly process. The insulating material 1202 may be spin-on glass (SOG), tetraethyl orthosilicate (TEOS) oxide or polyimide, and can be patterned by photolithography or etching processes. In any formation method, the well side wall preferably forms an angle larger than 70 degrees. Also, the depth of the well must be approximately the same as the thickness of the uLED. Referring to FIG. 17K, the electrode at the bottom of the well is necessarily open to make contact with the uLED.

  7) Referring to FIG. 17L, after the fluid assembly process, the uLED 300 is installed in the well.

  Surface mount uLED fluid assembly

  The suspension in which the surface mounted uLED is in a liquid is deposited on a prepared substrate. The liquid is flowed to the substrate using a scissor means for directing the flow. Thereby, the flow of uLED flows laterally on the surface of the substrate. Many possible means can be used to make the fluid flow, such as pumps, gravity, brushing, ultrasonic transducers, air knives or nozzles. The important point here is that the disk moves and passes through the surface at a sufficiently fast speed to provide many assembly opportunities, as well as moving the disk away from the well with little force.

  Since uLEDs have a higher density than liquids, they can settle on the surface of the substrate and be captured by open wells. When the disk settles in the well so that the post is directed downward, the edge of the disk bottom surface (attached to the post) is located above the surface of the substrate. The fluid flow also produces a torque that tends to flip the disk from the well. If the disk settles in the well with the post pointing upwards, the flow force will only affect the post and the disk will remain in the well.

  Performing this process with a sufficient quantity of disks in a sufficiently long time increases the number of times the assembly at each location is tried until each well is deposited with a uLED that operates with the post pointing upwards. That is. When assembly is complete, the unused uLEDs can leave the substrate and enter the aquarium or reservoir for recycling, allowing the remaining liquid to evaporate or replace with a second liquid.

  In this regard, it may be appropriate to use a visual inspection method to look for lost disks, defects such as wells blocked by particles, or disks in which the posts in the well are directed downwards. If necessary, defects can be eliminated by repairing a small amount of defects using pick and place technology. It is clear that the structure of one or more emitters per subpixel can be used to compensate for the structure of a single defect by redundancy, and using laser cutting techniques to isolate the shorted uLED from the drive circuit. can do.

As shown in FIG. 17L, after assembly, all uLEDs are oriented so that the anode and cathode electrodes cover and contact the corresponding substrate electrodes. The substrate is then heated to a suitable temperature so that the anode and cathode electrodes interact with the substrate electrode to form a stable mechanical and electrical connection. For In / Sn electrodes, the connection to the Ti substrate electrode may be realized at an annealing temperature of 220 ° C., and this connection is facilitated by applying a liquid flux that destroys the surface oxide. In order to facilitate the electrical connection, the LED electrode made of other materials may be covered with an In / Sn solder layer, and the substrate electrode may be coded with In / Sn solder. Alternatively, an AuGe eutectic solder electrode or an electrode covered with AuGe eutectic solder may be used. However, since AuGe has a higher annealing temperature of 380 ° C., it may not be suitable for certain manufacturing processes. After annealing, the substrate can be cleaned to remove residual flux, and a passivation layer such as polyimide or Si ₃ N ₄ or a similar layer can be deposited to prevent contact between the electrode interface and the environment.

  Passive matrix array

  Referring to FIG. 15A, the uLED array described above can be combined into an array to form a passive matrix array with each row and column having an external drive circuit. As a result, the driving method sets an appropriate driving voltage on each column electrode, and turns on the appropriate row at the same time when the connection of the other row is turned off. The signal is applied for a short time (eg, a few microseconds), the row electrode connection is turned off, and the process is repeated for the next row. In such a method, the illumination time for each row is the refresh time divided by the number of rows. If the refresh time is reasonably short, for example 1/60 second, it will average all that the human visual system has seen to produce a pixel consisting of all rows. However, it is clear that this method is limited to a reasonable number of rows in order to maintain reasonable peak intensity and power.

  Active matrix array

  While the passive matrix array described above is very simple, it has significant drawbacks in producing high resolution displays. Because each row is addressed individually, there is a limit to the number of rows that can be cycled in the display at the actual row duty cycle and power level. In addition, the high light emission required for a short time of the LED shortens the life of the uLED.

  Thus, the advantage of using an active matrix array is that control elements are fabricated on the display substrate to independently control the light emission of each subpixel (LED). In some situations, a low duty cycle is advantageous, but this type of structure per subpixel allows each pixel to emit light continuously. There are a plurality of circuits for realizing this, but the simplest configuration besides uLED is a configuration with two transistors and one storage capacitor. As shown in FIG. 14C, based on the gate voltage setting established by the amount of charge stored in the storage capacitor (Cs), the output transistor 1404 (T1) determines the amount of current flowing from Vdd to Vss through the uLED. To do. Thus, the working pixel is controlled to set an appropriate voltage on the column line and turn on the access gate T2 and wait for a short time until the constant stabilizes the voltage on Cs, then the access gate is turned on. Turn off to hold charge on Cs. Since the POMS device has a combination of high mobility and stability, the circuit can use a low temperature polysilicon (LTPS) thin film transistor (TFT) process to produce a POMS device for the drive transistor T1. Although it is possible to use similar pixels consisting of indium gallium zinc oxide (IGZO) TFTs, IGZO has only 10-20% mobility compared to the same size LTPS transistor. Thus, for a given pixel size, performance yield limitations in IGZO TFTs reduce the brightness of each pixel as compared to LTPS. As is well known, a large number of drive circuits are used in displays that selectively drive light emitting elements, and many of these drive circuits use two or more thin film transistors. The display of the present invention is not limited to any particular type of drive circuit or specific number of transistors in each drive circuit.

  Color generator using blue uLED

  In one embodiment, the light-emitting substrate used as the backlight of the LCD is a single color, usually blue. However, the substrate can also be used for RGB color generators. There are two methods for generating colors (green and red) by down-converting blue LED light.

  FIG. 18 is a partial cross-sectional view of a color generator in which a color conversion sheet is used alone. Similar to the color filter process used in LCD displays, the quantum dot color filter (QDCF) method uses quantum dots (QD) in a matrix that is printed on a substrate by itself. The color conversion sheet 1800 is a diffuser 1802 installed on the blue subpixel 300, a red quantum dot color converter 1804 that generates red and green, respectively, a green quantum dot color converter 1806, and a red that blocks contamination of blue light. A color filter 1808 and a green color filter 1810 are included. Each conversion element is surrounded by an absorber 1812 (black matrix) to prevent light from being scattered to adjacent pixels. The color conversion sheet 1800 is aligned or bonded to the light emitting substrate (1200/1202) on the uLED emitter 300. A layer 1816 refers to an adhesive layer that adheres the light-emitting substrate 1200 to the color conversion sheet 1800.

  FIG. 19 is a partial cross-sectional view of a color generator in which a phosphor deposited on a light emitting element is used. The phosphor may be a conventional ceramic phosphor with a diameter in the micrometer range or a QD with a diameter in the nanometer range. The quantum dot LED (QDLED) method is similar to the QDCF method in which the diffuser 1802, red QD matrix 1804, and green QD matrix 1806 are printed directly on the uLED 300 and surrounded by the black matrix 1812. Thereafter, unwanted blue light contamination on any red and green pixels is absorbed by the red color filter 1808 and the green color filter 1810 bonded to a single light emitting substrate on the color filter sheet 1800. Conventional phosphors are mixed to be received by the phosphor adhesive. Commercially available red and green fluorescent materials have a particle size of about 8 μm in diameter. These particles are mixed with an adhesive material suitable for the printing process. Gravure printing techniques, for example, color the pattern plate, wipe off excess ink from the pattern plate, and then transfer the fluorescent ink pattern from the pattern rate to the light emitting substrate. Other printing techniques such as silk screen printing, flexographic printing, offset printing, extrusion printing, or ink jet printing can also be applied to this process. In one embodiment, the fluorescent ink is heat cured on a heating plate at 140 ° C. for 8 minutes. Other processes are determined by the specific materials used for the phosphor and the adhesive.

  Using this method and two single fluid assembly processes, it is also possible to produce a mixed display with blue, green uLEDs and reds generated utilizing blue uLEDs and red QD color converters.

  The QDCF method has the advantage of leaving the QD material away from the LED. This has a lower temperature and has a smaller thermal shock for the performance and reliability of subsequent QDs. Both methods require a high QD load in order to achieve the high efficiency of the associated thin film in color conversion. In addition, these two methods have room for improvement with respect to the resolution of ink jet printing.

  Color generator using all inorganic uLEDs

  FIG. 20A and FIG. 20B are a partial cross-sectional view and an optical intensity table of a light emitting substrate that respectively generate three different colors using three different LEDs. FIG. 20A shows a cover glass 2000 that is bonded to a substrate 1200 via an adhesive layer 1816. In this method, the color generator can be realized by using three inorganic LEDs 300a, 300b and 300c that emit light of 450 nm (blue), 530 nm (green) and 630 nm (red), respectively. This can be seen from FIG. 20B, where each color provides a very narrow emission peak, providing an optimal color gamut and image. However, there are two important obstacles to this method. A red LED is not manufactured from GaN, and an AlGaInP diode is grown on a GaAs substrate. As a result, the manufacture and recovery of LEDs applied to GaN (blue) LEDs does not apply to red uLEDs. In addition, the three-emitter display requires the development of fluid assembly technology that can match the shape or size of three different LEDs. In addition to being more fragile than GaN-based devices, red LEDs made from AlGaInP have different operating voltages and temperature behavior than Gan LEDs.

  LCD backlight unit (BLU) color conversion

  FIGS. 21A, 21B, and 21C are diagrams showing the intensity graph of the white light phosphor, the stacked color filter of the embodiment, and the related stacked color filter intensity graph, respectively. The uLED light emitting display can be used as a backlight unit (BLU) for local dimming by including a phosphor material that downconverts blue light emitted from the uLED into red and green. Therefore, the BLU is a low resolution copy of the display image and improves the dynamic range by better matching the backlight output to the image. One simple version of BLU is a uniform coating of white light color conversion phosphor. Also, as shown in FIG. 21B, a higher quality version may use a red conversion phosphor 2100 printed on the LED 300, and a green conversion phosphor 2102 is coated on the red conversion phosphor 2100. . Using a high quality quantum dot color converter that adjusts the optical density to allow an accurate amount of blue light to pass through, the spectrum of FIG. 21C is obtained. The printing process may be used to deposit QDs only on uLEDs and supports depositing green layers on red layers by limiting the green light absorption of the red converter. To do. However, in a converter in which red and green are mixed, it is efficient to apply uniformly on the entire substrate, but the cost is high.

  A surface-mount light-emitting device and a method for manufacturing a display using the surface-mount light-emitting device are provided. Although specific materials, sizes and circuit layout examples are described herein, the present invention is not limited to these examples. Those skilled in the art will envision other modifications and embodiments of the invention.

100 region 102 circular region 104 anode terminal contact 200 bottom connection electrode 202 substrate 204 microcavity 206 low melting point metal thin layer 208 GaN disk 210, 1606 n-GaN
212, 1600 p-GaN
214 Interlayer insulation film 216 Top interconnection electrode 300 Surface mount type light emitting device (SMLED), blue subpixel, uLED, uLED emitter 300a Inorganic LED
300b Inorganic LED
300c inorganic LED
302 Top surface 304 Bottom surface 306 First electrical contact 308 Second electrical contact 310 Post 312 Side surface 402 First semiconductor layer 404 Second semiconductor layer 406 Multiple quantum well (MQW) layer
408 Electrical insulator 600, 1300, 1304 First horizontal plane 602, 1302, 1306 Second horizontal plane 800 Light emitting display 802 Light emitting substrate 804 Top surface 806 Well 808 Bottom surface 810 Side wall 812 First electrical interface 814 Second electrical interface 816 Column conductive trace 818 Row Conductive Trace 820 Intersection of First Multiple Columns and Rows 900 LCD Substrate 902 Color Modifier 1000 First Color Modifier 1002 Second Color Modifier 1004 Second Multiple Light Diffuser 1010 Red Modifier 1100 Opening 1200 Glass Or plastic layer 1202 transparent material layer 1400 drive circuit 1402 trace 1404 final output transistor 1406 DC power trace 1600 p + GaN
1602 MQW
1604 n + GaN
1700 Insulating layer 1701 First metal 1702 Contact opening 1704 Second metal 1700, 1706 Insulating layer 1708, 1710 Contact hole 1712, 1714 Third local interconnect metal 1800 Color conversion sheet 1802 Diffuser 1804 Red quantum dot color converter (red QD Matrix)
1806 Green quantum dot color converter (green QD matrix)
1808 Red color filter 1810 Green color filter 1812 Absorber (black matrix)
1816 layer (adhesive layer)
2000 Cover glass 2100 Red conversion phosphor 2102 Green conversion phosphor

Claims (26)

A top surface;
The bottom surface,
A first electrical contact formed only on the top surface;
A second electrical contact formed only on the top surface;
And a post extending from the bottom surface. A surface-mounted light-emitting element that is a surface-mounted light-emitting diode,
a first semiconductor layer having a dopant selected from a first group comprising an n-type dopant and a p-type dopant;
A second semiconductor layer having a dopant not selected from the first group to the first semiconductor layer;
The surface-mount light-emitting device according to claim 1, further comprising a multiple quantum well layer interposed between the first semiconductor layer and the second semiconductor layer.   The surface-mounted light emitting device according to claim 2, wherein the first semiconductor layer and the second semiconductor layer are made of a material selected from the group consisting of gallium nitride (GaN) and aluminum indium gallium phosphide (AlGaInP). element. The first electrical contact portion is configured in a ring shape,
The first semiconductor layer and the multiple quantum well layer are a ring-shaped stacked body positioned below the first electrical contact portion,
The second electrical contact portion is formed in the periphery of the ring-shaped first electrical contact portion,
2. The surface-mount light-emitting element according to claim 1, wherein the second semiconductor layer has a disk shape and a central portion thereof covers the second electrical contact portion.   The surface-mounted light emitting device further includes a groove formed between the ring-shaped first electrical contact portion and the second electrical contact portion, and an electrical insulator filled in the groove. The surface-mount light-emitting element according to claim 4, wherein The second electrical contact portion is formed in a ring shape,
The second semiconductor layer is disk-shaped and its peripheral edge is located below the ring-shaped second electrical contact portion,
The first electrical contact portion is formed in the periphery of the ring-shaped second electrical contact portion,
The surface-mount light-emitting element according to claim 1, wherein the first semiconductor layer and the multiple quantum well layer are a stacked body positioned below the first electrical contact portion.   The surface-mounted light emitting device further includes a groove formed between the ring-shaped first electrical contact portion and the second electrical contact portion, and an electrical insulator filled in the groove. The surface-mount light-emitting element according to claim 6.   The surface-mount light-emitting element according to claim 1, wherein the top surface is a flat surface and the bottom surface is a flat surface. The top surface is two planes having a first horizontal plane and a second horizontal plane;
The said 1st electrical contact part is formed in the said 1st horizontal surface of the said top surface, and the said 2nd electrical contact part is formed in the said 2nd horizontal surface of the said top surface, The Claim 1 characterized by the above-mentioned. Surface mount type light emitting device.   The surface-mount light-emitting element according to claim 1, further comprising a plurality of posts extending from the bottom surface.   The surface-mount light emitting device according to claim 1, wherein the first electrical contact portion and the second electrical contact portion are solder-coded. A luminous display,
A light emitting substrate including a top surface;
A plurality of wells formed on a top surface of the light emitting substrate, each well having a bottom surface, a side wall, a first electrical interface formed on the bottom surface, and a second electricity formed on the bottom surface; A plurality of wells including an interface;
A matrix of column conductive traces and row conductive traces, forming a first plurality of column and row intersections, wherein each column and row intersection is associated with a corresponding well;
A first plurality of surface-mounted light-emitting elements located in the well,
Each surface mount light emitting device
A top surface covering the bottom surface of the well;
The bottom surface,
A first electrical contact formed on the top surface and connected to a first electrical interface of a corresponding well;
A second electrical contact formed on the top surface and connected to a corresponding second electrical interface of the well;
And a post extending from the bottom surface. The light emitting display is:
A color modifier covering the bottom surface of each surface-mount light-emitting element;
The light-emitting display according to claim 12, further comprising a liquid crystal display substrate covering the color modifier. The surface mount type light emitting element is a surface mount type light emitting diode,
Each surface mount light emitting diode
a first semiconductor layer having a dopant selected from a first group comprising an n-type dopant and a p-type dopant;
A second semiconductor layer having a dopant not selected from the first group to the first semiconductor layer;
The light emitting display according to claim 12, further comprising: a multiple quantum well layer interposed between the first semiconductor layer and the second semiconductor layer.   The light-emitting display according to claim 14, wherein the first semiconductor layer and the second semiconductor layer are made of a material selected from the group consisting of gallium nitride (GaN) and aluminum indium gallium phosphide (AlGaInP). A second plurality of first color modifiers covering the bottom surface of the corresponding second plurality of surface mounted light emitting diodes;
A second plurality of second color modifiers covering the bottom surface of the corresponding second plurality of surface mounted light emitting diodes;
The second plurality of numbers is less than the first plurality of numbers,
The light emitting display according to claim 15, wherein the color of the second color modifier is different from the color of the first color modifier.   17. The light emitting display further comprises a second plurality of light diffusers covering the bottom surface not covered by a corresponding second plurality of surface mount light emitting diode color modifiers. Luminous display. The light emitting display further comprises a second plurality of pixel regions;
Each pixel region has a surface mount light emitting diode covered by a first color modifier, a surface mount light emitting diode covered by a second color modifier, and a surface mount light emitting diode not covered by a color modifier. Including
The color of the first color modifier is green, the color of the second color modifier is red, and the surface-mounted light-emitting diode not covered with the color modifier emits blue light. The light-emitting display according to claim 17. The light emitting display further includes:
A second plurality of red color modifiers covering the bottom surface of the corresponding second plurality of surface mount light emitting diodes;
A third plurality of surface mount light emitting diodes not covered by a corresponding third plurality of color modifiers;
A second plurality of pixel regions;
The second plurality of numbers is less than the first plurality of numbers,
The third plurality of numbers is less than the first plurality of numbers and equal to twice the second plurality of numbers;
Surface mounted light emitting diodes where each pixel area is covered by a red color modifier, blue surface mounted light emitting diodes not covered by the color modifier, and green surface mounted light emitting diodes not covered by the color modifier The light-emitting display according to claim 15. The first electrical contact portion of each surface-mounted light emitting diode is formed in a ring shape having a first diameter, and the first semiconductor layer and the multiple quantum well layer of each surface-mounted light emitting diode are the first electrical contact portion. Is a ring-shaped laminate located below
The second electrical contact portion of each surface-mounted light emitting diode is formed on the periphery of the ring-shaped first electrical contact portion,
The second semiconductor layer of each surface-mount type light emitting diode is disk-shaped and its central portion covers the second electrical contact portion,
The first electrical interface of each well is configured as a partial ring having a first diameter and partially provided with an opening,
The light emitting display of claim 14, wherein the second electrical interface of each well is configured such that the trace extends into a ring-shaped opening of a portion of the corresponding first electrical interface. The second electrical contact portion of each surface mount light emitting diode is configured in a ring shape having a first diameter,
The second semiconductor layer of each surface-mounted light emitting diode is disk-shaped and its periphery covers the ring-shaped second electrical contact portion,
The first electrical contact portion of each surface-mount light emitting diode is formed inside the periphery of the ring-shaped second electrical contact portion,
The first semiconductor layer and the multiple quantum well layer of each surface-mount type light emitting diode are stacked bodies covering the first electrical contact portion,
The first electrical interface of each well is configured as a partial ring having a first diameter and partially provided with an opening,
The light emitting display of claim 14, wherein the second electrical interface of each well is configured such that the trace extends into a ring-shaped opening of a portion of the corresponding first electrical interface. The top surface of each light emitting element is a horizontal plane,
The light emitting display according to claim 12, wherein the bottom surface of each light emitting element is a horizontal plane. The top surface of the surface-mounted light-emitting element is a two plane having a first horizontal plane and a second horizontal plane,
The first electrical contact portion of the surface-mounted light emitting device is formed on the first horizontal surface of the top surface,
A second electrical contact portion of the surface-mounted light emitting device is formed on the second horizontal surface of the top surface;
The bottom surface of each well is two planes having a first horizontal plane and a second horizontal plane,
The first electrical interface of each well is formed in the first horizontal surface of the bottom surface;
The light emitting display according to claim 12, wherein the second electrical interface of each well is formed in the second horizontal plane of the bottom surface. The light emitting display further includes a first plurality of active matrix drive circuits and a network of reference voltage traces connected to the second electrical interface of each well;
13. The light emitting display of claim 12, wherein each drive circuit is connected to a first electrical interface connected to the intersection of a corresponding column and row and connected to a corresponding well.   The matrix of column conductive traces and row conductive traces forms a passive matrix, the row traces at the intersection of each column and row are connected to the first electrical interface corresponding to each well, and the intersection of each column and row is 13. The light emitting display of claim 12, wherein a column trace is connected to the second electrical interface corresponding to each well.   The light emitting display further includes a solder coating applied to a device, the device comprising the first electrical contact portion and the second electrical contact portion of the surface mount light emitting device, the first electrical interface of the well, and the It is selected from the group consisting of a second electrical interface, or both the first electrical contact portion and the second electrical contact portion of the surface mount light emitting device and the first electrical interface and the second electrical interface of the well. The light-emitting display according to claim 12.

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