KR20180030455A - Display with surface mount emissive elements - Google Patents

Abstract

A surface mounted light emitting element has an upper surface and a lower surface. A first electrical contact unit is formed only on the upper surface, and a second electrical contact unit is formed only on the upper surface. A post extends from a bottom surface. A light emitting display is also provided wherein the light emitting display is made of the surface mounted light emitting element and a light emitting substrate. The light emitting substrate has an upper surface with a plurality of first wells. Each well has a bottom surface, sidewalls, a first electrical interface formed on the bottom surface, and a second electrical interface formed on the bottom surface. The light emitting substrate also includes a matrix of column and row conductive wires and forms a plurality of first column/row intersections wherein each column/row intersection is associated with a corresponding well. A plurality of first light emitting elements fill the wells.

Description

DISPLAY WITH SURFACE MOUNT EMISSION ELEMENTS [0002]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an integrated circuit (IC), and more particularly, to a light emitting display manufactured using a surface mounted light emitting element and a surface mounted radiating element.

Current competitive technologies for large size displays are liquid crystal displays (LCDs), organic light emitting diode (OLED) displays, and recent inorganic LED displays. The disadvantages of the LCDs handled directly by the present application are that 1) only about 5% of the light generated by the backlight is seen by the user as an image, and 2) low efficiency that the LC material can not completely block light, Range. Disadvantages of OLED displays are low reliability and low efficiency (~ 5% quantum efficiency (QE)) of blue OLED materials. Using an inorganic micro-LED (uLED) on the display provides very high efficiency because the display does not absorb light using color filters and polarizers. As used herein, a uLED is an LED having a diameter or cross-sectional area of less than 100 microns. The inorganic uLED display has a very high contrast because the black pixels are set not to emit light. For inorganic uLED displays, blue gallium nitride (GaN) LEDs have efficiencies of 35-40% and reliability over 50,000 hours, as established in typical lighting. Sony has developed a passive matrix of uLEDs arranged in a display array using a pick-and-place system. However, since large displays require millions of LEDs, displays made with this process require more time and money than other technologies.

It provides a new opportunity to extend the coverage of electronic and optoelectronic devices by fluidly moving micronized electronic devices, optoelectronic devices and subsystems to large area and / or irregular substrates with donor substrates / wafers. For example, an LED microstructure, which represents a pixel size such as a bar, pin or disk, is fabricated first on a small size wafer and then transferred to a large area panel glass substrate to form a direct light emitting display .

Conventional transfer techniques such as inkjet printing or robotic pick-and-place operations are suitable for certain applications. However, these conventional techniques are not cost effective or have low yields and therefore can not be applied to direct transfer to LED microstructures.

There are three main processes for making inorganic uLED disks used in direct-lit displays. This process is a uLED master manufacturing process, a uLED master disposing process on a transparent substrate, and a uLED master interconnecting process. The fluid assembly process makes the contact hole opening / metal interconnection design of the conventional IC type very difficult because it arbitrarily distributes the uLED discs within the transparent substrate placement wells. In order to solve this irregular distribution, an additional tolerance is required in the (opaque) interconnections, so that a large part of the luminescent region filling factor is lost. Also, the complexity required to create such interconnects results in low yields and / or high costs.

Figures 1a and 1b are top plan views of top connected LED discs located in the wells of the substrate (prior art). 1A, D _d represents the diameter of an LED (e.g., GaN) disc, D _c represents the diameter of the micro cavity or well in which the uLED disc is distributed, and D _p is the thickness of the disc The p-doped GaN (p-GaN) region. The region 100 is an n-GaN contact portion where p-GaN and MQW are removed by reactive ion etching (RIE). The inner circular region 102 is an entire LED stack with p-GaN on top. A layer of nickel oxide (NiOx) / indium tin oxide (ITO) may be formed on the surface of the region 102. Considering typical photolithographic misalignment tolerance (up to 2 microns (m)), the circular region 102 is 2 [mu] m away from the center of the GaN disc. Since only the region 102 can emit light, the luminescent region filling factor is only about 70.6%. Almost 30% of the light emitting area is lost due to the n-GaN opening 100.

1B shows a working area for the positive electrode end connection 104 (Dpc). A connection made outside the region 104 having a diameter of 24 mu m may result in a short circuit or an open circuit. Conventional metal interconnections for the n-GaN region 100 further reduce the luminescent region filling factor, which in this example only emits in the 31.4% region of the GaN disc.

2 is a partial cross-sectional view of a bottom cathode contact structure (prior art). This selection prevents significant luminescent area fill factor losses associated with conventional top contact LED discs. The lower interconnect electrode 200 is first evaporated and patterned on the substrate 202, followed by a micro cavity (well) 204. A thin layer of the low melting point metal 206 is coated on the lower electrode surface inside the microcavity 204. [ Then, a GaN disc 208 (n-GaN 210 / p-GaN 212) is distributed to the micro-cavity 204. After patterning the interlayer dielectric 214, the upper interconnect electrode 216 is deposited and patterned to complete the entire process flow.

The process flow described by Figure 2 is relatively simple. The front side luminescent area charging factor can reach up to 85% with the selected upper metal wiring design. The main drawbacks of this flow include lower contact yield, uniformity, reliability and repeatability, and a tradeoff between lower contact yield and lower electrode area where backlit openings are required.

It would be advantageous if large luminescent displays could be efficiently fabricated using fluid assembly processes through the application of surface mounted light emitting devices.

The present invention discloses a direct-lit display or liquid crystal display (LCD) backlight that uses inorganic micro-light-emitting diodes (LEDs) to enable the manufacture of large-area, high dynamic range displays with reasonable cost and high reliability. For example, an inorganic micro-LED (uLED) array in a surface mount configuration can be fabricated by a fluid assembly to create a high dynamic range light emitting display. The uLED light emitters can be fabricated using conventional planar LED structures fabricated on a sapphire substrate The resulting uLED is then ejected and harvested by a laser lift-off process to produce a suitable laser, such as isopropanol (IPA), acetone, or distilled water This suspension is deposited on a prepared display substrate, the prepared display substrate has an array of well structures, the well structure having two electrodes, the two electrodes being connected to the positive and negative electrodes of the uLED disc, The well is a cylindrical opening slightly larger than the diameter of the disc, and one u An LED is deposited in the well and deposited at a location where the LED electrode is in contact with the electrode on the substrate. Because both LED electrodes are directly covered and adjacent to the well bottom surface, one or two electrodes The electrical connection is greatly simplified and further the interconnect layer and processing are required.

As a result of proper annealing, the uLED is connected to the array electrodes on the substrate, and accordingly is powered by appropriate drive circuitry to emit light. The array may be driven with a passive matrix so that each row is sequentially turned on and each sub-pixel of the array is powered on at a controlled current to produce the required brightness. However, due to sampling and power limitations, this simple drive scheme is inevitably limited to a relatively small number of rows. Preferably, each sub-pixel can be controlled by a thin film transistor (TFT) driver circuit, which can control the amount of drive current based on the charge stored in the capacitor. This active matrix (AM) circuit configuration does not limit the number of rows in the display except for the power supplied to each column so that uLED is powered almost 100% of the time.

As compared to current type vertical uLED displays, the surface mount uLED structure provides several key advantages, and the vertical uLED has top surface and bottom surface electrical contacts.

1) The small illuminant area is more suitable for high resolution active matrix (AM) displays, but the overall disc size is large enough for fluid assemblies.

2) The process of the fluid assembly occurs as the last major operation, so smaller glass can be used without returning to the LCD fab for metallization after assembly.

3) Interconnect patterning occurs before the well is formed, so there is no metal defect due to misaligned uLED and there is no need for interconnection with the substrate through the well layer.

4) After annealing, the uLED is electrically connected but exposed, so there is a possibility of an electrical test to check whether a given uLED is lit, followed by a repair of the pickup location of the defective uLED.

This advantage tends to offset the light emitting area of the surface mount LEDs at a relatively small fraction of the area of the LED growth substrate and increases the cost per pixel. In addition, the uLED fabrication process is complex and requires multiple patterning steps, including post fabrication that occurs after laser lift off (LLO).

Thus, the surface mount light emitting element has an upper surface and a bottom surface. The first electrical contact is formed exclusively on the upper surface only, and the second electrical contact is also exclusively formed on the upper surface. The posts extend from the bottom surface. In one aspect, the surface mount light emitting device is a surface mount light emitting diode (SMLED), and the SMLED comprises a first semiconductor layer having an n-dopant or a p-dopant and a second semiconductor layer made of an opposite dopant. A multiple quantum well (MQW) layer is interposed between the first semiconductor layer and the second semiconductor layer. Typically, the first and second semiconductor layers are gallium nitride (GaN) or aluminum gallium indium phosphide (AlGaInP).

As described above, a light-emitting display made of a surface-mounted light-emitting device and a light-emitting substrate is also provided. The light emitting substrate has an upper surface, and a first plurality of wells are formed on the upper surface of the light emitting substrate. Each well has a bottom surface, a side wall, a first electrical interface formed on the bottom surface, and a second electrical interface formed on the bottom surface. The light emitting substrate also includes a matrix of column and row conductive wirings to form a first plurality of column / row intersections, each column / row intersection point being associated with a corresponding well. The first plurality of light emitting elements fill the wells. In one aspect, a color changing structure is coated on each light emitting element bottom surface (e.g., to produce a monochromatic color such as white), and the display includes a liquid crystal display (LCD) substrate coated over the light emitting substrate top surface do.

The light emitting display may also be a direct light emitting display, in which case a first plurality of color conversion structures are coated over the bottom surface of the corresponding SMLED. A second plurality of color conversion structures is coated over the bottom surface of the corresponding SMLED, wherein the second color is different from the first color. When a display is red-green-blue (RGB) and only one type of LED (e.g., a blue GaN LED) is used, a plurality of light diffusion structures are formed on the bottom surface of the SMLED, Respectively. The result is a display with a pixel region, each pixel region comprising a SMLED coated with a first color conversion structure (e.g., green), a SMLED coated with a second color conversion structure (e.g., red) And a SMLED that is not covered with a conversion structure (e.g., blue). If both the blue and green luminescent GaN LEDs are used at the same time, then the color conversion structure preferably produces red only.

In one aspect, the first electrical contact (electrode) of each SMLED is configured as a ring having a first diameter, and the first semiconductor layer and the MQW layer of each SMLED are stacked to cover the first electrical contact, to be. However, the second electrical contact of each SMLED is formed in the first electrical contact ring circumferential region, and the second semiconductor layer of each SMLED has a disk shape in which the middle portion covers the second electrical contact. The first electrical interface of each well is configured as a partial ring having a first diameter and has an opening in the mouth and the second electrical interface of each well is connected to a wire extending to the mouse of the corresponding first electrical interface sub- . Optionally, the first semiconductor layer and the MQW layer of each SMLED cover the stack of the second electrical contact, and the second semiconductor layer covers the first electrical contact.

In yet another variation, the top surface of each light emitting element may be a dual plane having a first horizontal plane and a second horizontal plane, wherein a first electrical contact of each luminous element is formed in a first horizontal plane of the top surface, A second electrical contact of the light emitting element is formed on the second horizontal surface of the upper surface. The bottom surface of each well is a double plane as well as the first and second horizontal surfaces, a first electrical interface of each well is formed in a first horizontal plane of the bottom surface of the well, and a second electrical interface of each well Is formed on the second horizontal surface of the bottom surface of the well.

The light emitting elements are operated using an active matrix (AM) circuit, and each driver circuit is connected to a corresponding column / row intersection point and is connected to a first electrical interface of the corresponding well. However, the light emitting substrate also includes a network of reference voltage (e.g., ground) wirings coupled to the second electrical interface of each well. The matrix of column and row wirings forms a passive matrix PM which is connected to the column wiring of each column / row intersection point connected to the first electrical interface of the corresponding well and to the second electrical interface of each well And row wirings at the column / row intersections.

Additional details of the surface mount light emitting device and the light emitting display described above are provided as follows.

1A and 1B are plan views of an upper contact LED disc placed in a well of a substrate (prior art).
2 is a partial cross-sectional view of a bottom cathode contact structure (prior art).
3 is a partial cross-sectional view of the surface mounted light emitting device.
4A and 4B are a partial cross-sectional view and a plan view of a surface mounted light emitting element implemented as a surface mounted light emitting diode (SMLED), respectively.
5 is a partial cross-sectional view showing a modified example of the LED of Fig. 4A.
6 is a partial cross-sectional view showing a double plane change of the light emitting device.
7A and 7B are bottom views showing surface-mounted light-emitting element post changes.
8A and 8B are a top view and a partial cross-sectional view, respectively, of a light emitting display.
Figs. 9A and 9B are partial cross-sectional views showing two different methods of realizing the light-emitting substrate of Figs. 8A and 8B with a backlight.
10A and 10B are partial cross-sectional views showing different approaches that can be used as a direct light emitting display on a light emitting substrate.
11A and 11B are a plan view of the well bottom surface and a partial sectional view of the light emitting substrate, respectively.
Figs. 12A and 12B are respectively a plan view of the well bottom surface of Figs. 11A and 11B and a modification of the light emitting substrate partial cross-sectional view.
Figs. 13A, 13B and 13C are respectively a modification of the light emitting device, a modification of the well, and a partial cross-sectional view of the light emitting member seated in the well.
14A and 14B are schematic and partial sectional views of a light emitting substrate usable with a first plurality of active matrix (AM) driving circuits, respectively, and Fig. 14C is a diagram showing one specific modification of the driving circuit.
15A and 15B are schematic and partial cross-sectional views of a light emitting substrate on which a light emitting device is operated using a passive matrix.
16 is a partial cross-sectional view of a surface mount uLED designed for a fluid assembly.
17A to 17L show a top view and a partial cross-sectional view of an exemplary light emitting substrate manufacturing process.
18 is a partial cross-sectional view showing color generation using a color reversal sheet.
19 is a partial cross-sectional view of color generation through the use of phosphors deposited on a light emitting element.
FIGS. 20A and 20B are partial cross-sectional and luminous intensity graphs for a light-emitting substrate using three different LED types, respectively, to produce three different colors.
Figs. 21A, 21B and 21C show the white light phosphor intensity graph, the stacked color filter and the related stacked color filter intensity graph, respectively.

3 is a partial cross-sectional view of the surface mounted light emitting device. The surface mounted light emitting device 300 includes a top surface 302, a bottom surface 304, a first electrical contact 306 formed exclusively on the top surface, and a second electrical contact 308 formed exclusively on the top surface, . By "formed exclusively on the upper surface" it is meant that the electrical contact or electrode does not extend to the side 312 or bottom surface 304 of the light emitting element. The electrical contact may be a transparent conductive oxide (TCO) such as a metal, a doped semiconductor, or indium tin oxide (ITO). Although not explicitly shown as separate layers, the electrical contacts 306 and 308 are then solder or coated (eutectic solder, for example) to connect with the light emitting substrate. The light emitting device 300 includes a post 310 extending from the bottom surface 304. In one aspect, the posts 310 are located at the center of the bottom surface 304. A light emitting diode (LED) is presented as an example of the light emitting device. Two other terminal surface mount devices, although not light out, include a photodiode, a thermistor, a pressure sensor and a piezoelectric device.

4A and 4B are a partial cross-sectional view and a plan view, respectively, in which a surface-mounted light-emitting diode (SMLED) is implemented as a surface-mounted light-emitting device. The SMLED 300 includes a first semiconductor layer 402 having an n-type dopant or a p-type impurity and a second semiconductor layer 404 having an impurity not used in the first semiconductor layer 402 . The MQW layer 406 is located between the first semiconductor layer 402 and the second semiconductor layer 404. The MQW layer 406 comprises a series of quantum well layers (typically five layers, not shown, for example, 5 nm of indium gallium nitride (InGaN) and 9 nm of n-doped GaN (n -GaN) are alternately installed). An aluminum gallium nitride (AlGaN) electron blocking layer (not shown) may be provided between the MQW layer and the p-doped semiconductor layer. The outer semiconductor layer may be p-doped GaN (Mg doped) with a thickness of about 200 nm. When a higher indium content is used in the MQW, a high-intensity blue LED or green LED may be formed. The most practical material for the first and second semiconductor layers is one of gallium nitride (GaN) capable of emitting blue or green light or aluminum gallium indium phosphide (AlGAInP) capable of emitting red light.

The second electrical contact 308 is formed in a ring shape, and the second semiconductor layer 404 is formed in a disk shape. A perimeter of the second semiconductor layer 404 is located below the ring of second electrical contact 308 and a first electrical contact 306 is located within the ring of second electrical contact 308 The first semiconductor layer 402 and the MQW layer 406 are stacked under the first electrical contact. A moat is formed between the ring of second electrical contact 308 and the first electrical contact 306 and the groove is filled with an electrical insulator 408.

Conventional LED processes (e.g., LEDs used for light emission) occur only on one surface prior to separation from the sapphire substrate. Some of these processes use a laser lift off (LLO) to isolate the LED from the sapphire substrate as a final step. Another process involves cutting the sapphire substrate without using an LLO to isolate the LED. However, since the SMLED structure requires an electrode on the surface opposite to the post, the uLED forms the post after it is separated from the sapphire substrate. Conventional processes do not provide a way to maintain an already known position of each LED, and the LED may be separated from the sapphire and a photolithographic process may be applied to the bottom of the LED. The exact x-y coordinates are needed to accurately position the post at the desired location (e.g., center) of the LED top surface. Precise z (vertical) coordinates are needed to image the post structure with the focal plane set to the size control (e.g. alignment direction) required for the fluid assembly. That is, in the SMLED LLO, the SMLED places the SMLED on the transfer substrate through the control means to form a post, and then makes a spu- spension to release the fluid assembly from the transfer substrate.

5 is a partial cross-sectional view showing a modified example of the LED of Fig. 4A. In one aspect, the first electrical contact (electrode) 306 is configured in a ring shape, and the first semiconductor layer 402 and the MQW layer 406 are disposed below the first electrical contact, It is a stack. The second electrical contact 308 is formed around the ring of the first electrical contact 306. The second semiconductor layer 404 is disc-shaped, and the middle portion of the second semiconductor layer 404 is located under the second electrical contact. As shown, the grooves are formed between the first electrical contact 306 and the second electrical contact 308. An electrical insulator 408 fills the grooves.

6 is a partial cross-sectional view showing a double plane change of the light emitting device. In Figures 4A and 5, it can be seen that the top surface is planar and the bottom surface is planar. As used herein, "planar" refers to a generally planar surface and has an average surface roughness (RMS) roughness less than 10 nanometers (nm). Alternatively, as shown in FIG. 6, the surface mount light emitting device upper surface is a dual plane having a first horizontal surface 600 and a second horizontal surface 602. A first electrical contact 306 is formed in the first horizontal surface 600 of the upper surface and a second electrical contact 308 is formed in the second horizontal surface 602 of the upper surface. Although not shown, the second electrical contact may be formed on a first horizontal surface of the upper surface, and the first electrical contact may be formed on a second horizontal surface of the upper surface.

7A and 7B are bottom views showing changes in posts of the surface mounted light emitting device. In one aspect, as shown in FIG. 7A, the surface mounted light emitting device may include a plurality of posts 310 extending from the bottom surface 304. It should be noted that the surface mounted light emitting device 300 is not limited to the specific quantity of posts, post arrangement or post shape. Two posts are shown in Figure 7a, and a pin-shaped post is shown in Figure 7b. Combinations of different shapes or multiple shapes are possible. In one aspect, especially in the case of one post, the posts are located at the center of the bottom surface of the light emitting element, and one perimeter of the light emitting element is inclined to the fluid flow. In Figures 7A and 7B, the posts incline the light emitting element in a direction perpendicular to the vertical axis coming from the page.

8A and 8B are a plan view and a partial cross-sectional view, respectively, of a kind of light emitting display. Some examples of such light emitting displays include televisions, computer monitors, screens of portable devices, and backlights of LCD displays, which can be used for some of the examples described above, and can also be used as direct light emitting displays. The light emitting display 800 includes a light emitting substrate 802 having an upper surface 804. The light emitting substrate 802 includes a first plurality of wells 806 formed on the top surface 804 of the light emitting substrate. Each well 806 includes a bottom surface 808, side walls 810, a first electrical interface 812 formed on the bottom surface, and a second electrical interface 814 formed on the bottom surface. Although not explicitly shown as separate layers, the first electrical interface 812 and the second electrical interface 814 are coated solder material for electrically connecting to the light emitting element. The matrix of thermal conduction wirings 816 and row conduction wirings 818 form a first plurality of column / row intersections 820 and each column / row intersection point is associated with a corresponding well 806. Additional details about the interface between the well and the matrix formed by the row and column wirings are provided as follows.

The first plurality of light emitting devices 300 fill the wells 806. Each light emitting device 300 includes a top surface 302 that covers the bottom surface 808 of the corresponding well. The light emitting device 300 includes a bottom surface 304 and a post 310 extending from the bottom surface. A first electrical contact (electrode) 306 is formed in the upper surface 302 of the light emitting device and is connected to the first electrical interface 812 of the corresponding well. Although not shown as distinct layers, the first electrical contact 306 and the second electrical contact 308 are solder or solder coating materials for connection to the light-emitting substrate electrical interface. A second electrical contact 308 is formed in the upper surface 302 of the light emitting device and is connected to a second electrical interface 814 in the corresponding well. It should be noted that the electrical contact of the light emitting device and the electrical interface of the well are formed of a reflective material (e.g., metal) to direct light toward the top surface 804 of the light emitting substrate 802.

Since the contact portions of the light emitting elements are all formed on the upper surface 302, the device can be referred to as a surface mount light emitting element. When the light emitting element is captured in the well 806, the bottom surface 304 of the light emitting element covers the top surface 302. As mentioned above, the first and second electrical contacts 306/308 of the light emitting element are formed only on the light emitting element upper surface 302. Thus, after the well is filled, an electrical interface need not be formed on the top surface 804 of the light-emitting substrate. As described above, the light emitting element may be a surface mounted light emitting diode (SMLED), and a detailed description thereof will not be repeated here. In one embodiment, as defined above, the top surface 302 of each light emitting element is planar, and the bottom surface 808 of each well is planar. The bottom surface 304 of the light emitting device may also be planar.

The light emitting element has a size such that the light emitting element is fitted (fitted) to the inside of the well. As used herein, the term " engagement "means the combination of two mechanical components. It is very frequently required that manufactured parts are interconnected with other parts. They may be designed to slide freely relative to each other, or they may be coupled together to form a single unit or assembly. There are three types of common associations. In order to allow the object (e.g., the light emitting element) to freely rotate or slide within the well, a clearance fit may be desirable, which is commonly referred to as "sliding fit. &Quot; When an object is to be securely fixed in the well, an interference fit may be desirable, which is commonly referred to as interference fit. A transition fit may be desirable if the object should be securely fastened but not allowing it to separate or rotate within the well, which is generally referred to as "intermediate fit or position. &Quot; The light emitting device generally has a clearance fit or a sliding fit to the well.

Figs. 9A and 9B are partial cross-sectional views showing two different methods of realizing the light emitting substrate of Figs. 8A and 8B with a backlight. A color conversion structure 902 covers the bottom surface 304 of each light emitting device and a liquid crystal display (LCD) substrate 900 covers the conversion structure. Since many different types of LCD substrates are well known in the art, the details of their construction are omitted for simplicity. In summary, the LCD substrate 900 forms "windows" that can be selectively coupled to each light emitting device 300, and the color conversion device 902 converts the color of the light emitted by the light emitting device to an LCD display backlight As shown in FIG. For example, when the light emitting element is a GaN LED emitting blue light, the color conversion device 902 can function to convert blue light into white light. For example, the color conversion structure 902 includes a red conversion structure and a green conversion structure, as described in more detail below. In Fig. 9A, the color conversion structure is formed directly on the light emitting element 300, for example, by a printing process. In Fig. 9B, the color conversion structure 902 is one layer in the LCD substrate 900. Fig.

10A and 10B are partial cross-sectional views illustrating two different methods of realizing a light emitting substrate as a direct light emitting display. 10A, a second plurality of first color conversion structures 1000 covers the bottom surface 304 of the corresponding second plurality of SMLEDs 300, and the second plurality is less than the first plurality . A second plurality of second color transformation structures 1002 covers the bottom surface 304 of the corresponding second plurality of SMLEDs 300, and the second color is different from the first color. The second plurality of light diffusing structures 1004 also cover the corresponding second plurality of SMLEDs 300 and do not cover the bottom surface 304 of the color conversion structure. Thus, if only a GaN LED is used, the result is a second plurality of pixel regions (only one pixel region is shown), each pixel region having a SMLED < RTI ID = 0.0 > SMLED 1002 (e.g., red) coated by second color conversion structure 1002 (e.g., green), and SMLED (e.g., blue) not covered by a color conversion structure. Although a red-green-blue (RGB) display is described, it should be understood that other color transform structures may be used to add different colors to each pixel region.

10B, the second plurality of green color conversion structures 1010 cover the bottom surface 304 of the corresponding second plurality of SMLEDs 300, and the second plurality is less than the first plurality. A third plurality of light diffusing structures 1012 covers the corresponding third plurality of SMLEDs 300 and does not cover the bottom surface 304 of the color conversion structure. In the case of the RGB display of the present invention, the third plurality is less than the first plurality, and the second plurality is twice. The result is a second plurality of pixel regions (only one pixel region is shown), each pixel region including a SMLED 300 (e.g., a GaN LED) coated in a red conversion structure 1010, A green SMLED 1014 that is not covered by a blue SMLED 300 (e.g., a GaN LED) and a color conversion structure 1012 that are not covered by a green LED 1012. In one aspect, layer 1012 is a light diffusing structure. In another aspect, color bonding can be enabled using GaN and red emitting AlGaInP SMLED.

11A and 11B are a plan view of the bottom surface of the well and a partial cross-sectional view of the light-emitting substrate, respectively. Referring briefly to Figure 5, the first electrical contact 306 of each SMLED 300 is configured as a ring shape with a first diameter. The first semiconductor layer 402 and the MQW layer 406 of each SMLED 300 are ring-shaped laminates that cover the first electrical contact. Although the first semiconductor layer 402 and the MQW layer 406 are shown in Figure 5 below the first electrical contact 306, the first semiconductor layer 402 and the MQW layer 406, when seated in the well, Lt; RTI ID = 0.0 > electrical contact. ≪ / RTI > A second electrical contact 308 of each SMLED 300 is formed around the first electrical contact 306 ring. The second semiconductor layer 404 of each of the SMLEDs 300 has a disc shape, and a central portion thereof covers the second electrical contact 308 (as described above).

11A and 11B, the first electrical interface 812 of each well is configured as a partial ring having a first diameter, has a mouth 1100 opening, and is connected to a wire 816 . The second electrical interface 814 of each well is connected to the incoming wire 818 extending into the mouse 1100 of the corresponding first electrical interface 812 partial ring.

Figs. 12A and 12B are a plan view of the bottom surface of the wells in Figs. 11A and 11B and a modification of the light emitting substrate partial cross-sectional view, respectively. As shown in FIGS. 12A and 12B, the second electrical contact 308 of each SMLED 300 may be configured as a ring having a first diameter. The second semiconductor layer 404 of each SMLED is disk-shaped, and the periphery thereof covers a ring-shaped second electrical contact. A first electrical contact 306 of each SMLED is formed within the periphery of the second electrical contact 308 ring. The first semiconductor layer 402 and the MQW layer 406 of each SMLED are stacked to cover the first electrical contact 306. Although the first semiconductor layer 402 and the MQW layer 406 located under the first electrical contact 306 are shown in Figure 4a, the first semiconductor layer 402 and the MQW layer 406, when seated in the well, Lt; RTI ID = 0.0 > electrical contact. ≪ / RTI >

Referring to Figures 12A and 12B, the second electrical interface 814 of each well is configured as a partial ring having a first diameter, having a mouth 1100 opening, and connected to a wire 816. The first electrical interface 812 of each well is connected to the incoming wire 818 extending into the mouse 1100 of the corresponding second electrical interface 814 partial ring.

One other feature to be noted with reference to FIGS. 11B and 12B is that the light emitting substrate 802 may be composed of a plurality of horizontal surfaces. 12B, for example, the light-emitting substrate 802 includes a glass or plastic layer 1200, and the conduction wiring covering the layer 1200 is connected to the electrical interface of the well. A transparent material layer 1202 covers the conductive wiring and the layer 1200, and the well is formed in the transparent material layer 1202. [ For example, the transparent material layer 1202 may be a dielectric material or a polyethylene naphthalate (PEN) film.

13A, 13B, and 13C are modification examples of the light emitting device, modification examples of the well, and partial cross-sectional views of the light emitting device that are placed in the well, respectively. In one embodiment, the top surface 302 of each light emitting device is bi-planar with a first horizontal surface 1300 and a second horizontal surface 1302. The first electrical contact 306 is formed on a first horizontal surface 1300 of the upper surface 302 and the second electrical contact 308 is formed on a second horizontal surface of the upper surface. Alternatively, although not shown, the first electrical contact 306 is formed on the second horizontal surface of the upper surface, and the second electrical contact is formed on the first horizontal surface of the upper surface. Likewise, the bottom surface 808 of each well is a dual plane having a first horizontal surface 1304 and a second horizontal surface 1306. A first electrical interface 812 of each well is formed in a first horizontal surface 1304 at the bottom of the well and a second electrical interface 814 of each well is connected to a second horizontal surface 1306 of the well bottom, As shown in FIG.

14A and 14B are schematic and partial cross-sectional views of a light-emitting substrate that is enabled with a first plurality of active matrix (AM) drive circuits, respectively. Fig. 14C shows one specific modification of the driving circuit. Each drive circuit 1400 is coupled to a corresponding column / row intersection and its output is coupled to a first electrical interface 812 of the corresponding well. Alternatively, the output of each driver circuit is coupled to a second electrical interface of each well. The network of reference voltage (e.g., ground) wirings 1402 is connected to a second electrical interface 814 of each well. 14B shows the final output transistor 1404 of the drive circuit that controls the output of the corresponding LED 300 only by changing the variable resistor inserted between the DC power wiring (Vdd) 1406 and the LED.

15A and 15B are schematic and partial cross-sectional views of a light-emitting substrate of a light-emitting element using a passive matrix, respectively. In this phase, a series of column wirings 816 and row wirings 818 form a passive matrix, which is connected to each column / row intersection 820 And a column wiring of each column / row intersection connected to the second electrical interface 814 of each well.

The uLED light emitting device can be fabricated using a process similar to that used for uLED illumination. However, as described below, there is an additional requirement that the size, shape and configuration of the disc is not present in general lighting. Otherwise, the LED may support a large array of uLEDs and be fabricated on a suitable backplane that is electrically connected to the uLEDs. That is, there are specific requirements for the size, shape, and location of features that uLEDs can successfully locate and connect to. Finally, a fluid assembly process can be used to place the uLEDs in an array and establish electrical connections between each uLED and the backplane.

The size of the emitter is an important distinction in the display. In the case of general illumination and LCD backlighting, the size of the light emitter (light emitting element) is any convenient, and an important consideration is the cost per photon. The most common (most inexpensive) LED for general illumination is about 200 X 200 μm in area, the thickness of the LED is about 5 μm, and the thickness of the sapphire is about 100 μm. Therefore, the aspect ratio of the light emitting device is about 2: 1. In direct light emission applications, the uLED emission region is selected to produce sufficient illumination for one subpixel, the diameter of which may be less than 25 mu m. Because of the uLED size, the larger the contact area forms the smaller light emitting area, the more important is the fabrication of the device area needed to make the contact, but the smaller the contact, the greater the loss due to the diffusion resistance of the GaN layer.

uLED production

Surface mount uLEDs used in the light emitting displays described herein can be fabricated from conventional high brightness LED wafers and LED wafers are used to fabricate general light emitting materials as is well known in the art. The resulting uLED has a diameter of 10 to 100 microns (microns) and generally has a disc shape as shown in the above figures. The disc shape is typical, but other planar shapes, such as triangular, square, or hexagonal, for example, may be manufactured in the same manner and the display substrate is fabricated to have a well structure consistent with the uLED shape for the fluid assembly.

In brief, the process flow for manufacturing one particular type of uLED proceeds as follows.

1) A planar high-intensity blue LED wafer is produced in the conventional manner as follows.

a. 4A and 4B, a buffer layer and n-GaN 404 are deposited on a sapphire substrate to form an LED cathode. The N-doped GaN can be doped by intrinsic (i.e., defect-doped) or by the inclusion of a small amount of silicon (Si).

b. InGaN and GaN layers 406 are alternately deposited to form a multiple quantum well structure (MQW).

c. A hole blocking layer of AlGaN and a thin p-GaN layer 402 are deposited to form an LED anode. p-GaN is generally magnesium (Mg) doping.

d. An ITO current diffusion layer is deposited on p-GaN.

2) ITO, p-GaN and MQW layers are etched to form LED light emitting regions, and some overetched mesas are formed in the n-GaN layer.

3) Etch n-GaN on the sapphire substrate to form a larger uLED disk shape than mesas formed in 2). This is typically a dense array of discs to maximize utilization of device area. Other simple plate shapes such as triangular, square or hexagonal may be used as long as the aspect ratio is suitable for the fluid assembly.

4) The insulating material 408 is deposited in a ring shape to electrically insulate the anode and cathode regions. This material also includes a light absorbing material, which prevents light leakage between the anode electrode and the cathode electrode.

5) The anode electrode laminate 308 is deposited at an appropriate height. The electrode stack has several components in a continuous layer.

a. Materials such as titanium (Ti) having a work function that matches that of n-GaN.

b. A thick electrode coupled to a display substrate well electrode, for example a multi-layer structure of indium (In) and tin (Sn) with a thin gold cap to prevent oxidation.

6) The cathode electrode laminate is deposited at a suitable height. The electrode stack has several components in a continuous layer.

a. Materials such as nickel / gold (Ni / Au), chromium / gold (Cr / Au) or Ti which make good contact with the ITO current diffusion layer.

b. An electrode coupled to a display substrate well electrode, for example a multi-layer structure of indium (In) and tin (Sn) with a thin gold cap to prevent oxidation.

7) The upper surface of the wafer is attached to the glass substrate using an adhesive coating layer.

8) The laser lift off (LLO) is used to remove the sapphire substrate and allow access to the bottom surface of the uLED structure.

9) Processed substrates having uLEDs in which the n-GaN is located in an upwards orientation are processed to form the orientation posts 310. The posts may be SU-8 (a commonly used epoxy-based negative photoresist) or a patterned material such as a deposited oxide or metal. The completed uLED collects the dissolution of the adhesive and the fluid suspension, and the fluid suspension may be alcohol, polyol, ketone, halocarbon or DI water.

16 is a partial cross-sectional view of a vertical uLED designed for a fluid assembly. There are many limitations to LED structures to improve device performance and yield of fluid assemblies. In one aspect, as shown, commercially available GaN LED structures can be etched to produce surface mount uLEDs (SMUEDs). As used herein, SMuLED is defined as a device having two electrical contacts (adjacent the well bottom surface). More specifically, the SMuLED of FIG. 16 includes p + GaN 1600, MQW 1606, n + GaN 1604, and n GaN 1606. c size is from 2 to 4 microns, and b size is from 1 to 2 microns. Most of the properties required for fluid assemblies of vertical LEDs are also important in surface mount uLED configurations. The following guidelines can be used in the manufacture of vertical or surface mount uLEDs for surface fluid assemblies.

Substrate : Sapphire for laser lift-off is preferred. The surface may be flat or textured to enhance light extraction.

Thicknesses of n-GaN (1604 and 1606): The body of the SMuLED is composed of intrinsic n-type GaN 1606 and Si-doped n-type GaN 1604. The thickness of each layer may be 3 占 퐉 or less per layer.

Disc diameter (d) : The thickness "a" of the uLED determines the disc diameter. Usually the d / a ratio ranges from 5 to 50um. If the disk thickness is ~ 5 μm, the disk diameter "d" may be 30-120 μm. If the disk thickness is 2 mu m, the diameter "d" can be reduced to 5 mu m-50 mu m.

Post diameter (e) : The ratio of e / d is between 10% and 20%. For a disc having a diameter of 50 mu m, the post diameter may be 5 to 10 mu m. In the case of a 5 μm disc, the post diameter may be 0.5 to 1 μm.

Post height (f) : Post height is about 30% to 100% of the post diameter. For a 50 탆 diameter disc, a post height of 1 탆 can be used, but a 2 탆 height is more effective when reversing a miswound disc in a fluid assembly.

Laminate height (a): the height "a" of the layered product The total number of ( "b" + "c" + height + p + GaN (height 1600) of the MQW (1602)) in the range of 2 to 7 microns .

Fabrication and requirements of light-emitting board

Figs. 17A to 17L show a top view and a partial cross-sectional view of a manufacturing flow of an exemplary light emitting substrate. The uLED display light-emitting substrate (backplane) can be fabricated from large area glass or plastic substrates using existing processes in the same set of equipment used to fabricate LCD displays.

A simple exemplary process flow for creating a single passive matrix array coupling uLEDs to rows and columns proceeds as follows:

1) deposits a first layer of interconnecting metal on a glass or plastic substrate 1200, which may be tungsten or Ti / Al / Ti or other low resistance metal. The first metal 1701 is patterned to form interconnects that connect the electrical interface of the well bottom surface to the rows and columns. The shape of one basic electrode is a " C "shape or a partial ring shape with a center circle, as shown in Figs. 17A and 17B.

2) Referring to FIGS. 17C and 17D, an insulating layer 1700 (silicon dioxide (SiO ₂ ), silicon nitride (Si ₃ N ₄ ) or an insulating organic film) is deposited on the first metal 1701, The contact opening 1702 is etched to connect with the second metal.

3) Referring to Figures 17e and 17f, a second layer of metal interconnect 1704, which may be tungsten or Ti / Al / Ti or another low resistance metal, is deposited. The metal 1704 is patterned. An insulating layer 1706 (SiO ₂ , Si ₃ N ₄ or an insulating organic film) is deposited on the second metal 1704.

4) Referring to FIGS. 17G and 17H, contact openings 1708 and 1710 are etched to connect a third metal layer that is subsequently deposited.

5) depositing a third local interconnect metal and forming 1712 and 1714, which may be Ti, molybdenum (Mo), gold / germanium laminate (Au / Ge) or tungsten (W) after patterning, And to match the size and spacing of the cathode electrode. Interconnects 1712 and 1714 are shown as electrical interfaces in Figure 8b. Referring to Figs. 17I and 17J, the electrode layers as described at this point are in the same plane, so that the electrode surface of the uLED is uniformly placed on the third metal surfaces 1712 and 1714.

6) In the fluid assembly process, an insulating material 1202 is deposited to form a well structure for capturing uLED. It may be spin-on-glass (SOG), tetraethylorthosilicate (TEOS) oxide or polyimide and may be patterned by photolithography or etching. 17K, regardless of how they are formed, the sidewalls of the wells are preferably at least 70 degrees, the depth of the wells is approximately the same as the thickness of the uLEDs, and the electrodes at the bottom of the wells are opened to connect the uLED electrodes .

7) Referring to Figure 17l, after the fluid assembly process, the uLED 300 is seated in the well.

Fluid assembly of surface mount uLED

Surface mount uLEDs are deposited on a prepared substrate in a liquid suspension. Liquid flows through the substrate using some means of inducing flow. Thus, the flow of uLED traverses the surface of the substrate laterally. Many possible techniques that can be used to flow liquid include, for example, pumping, gravity, brushing, ultrasonic transducers, air knives, nozzles, and the like. One point is that the disc passes through the surface at a sufficiently high speed and creates a lot of assembly opportunities without the force that the disc is forced out of the well.

The uLED has a density higher than that of the liquid, so it can be trapped by the wells that are settled and open on the surface of the substrate. When the disc is fixed to the well such that the post is oriented downward, the edge of the bottom of the disc (with the post attached) is located on top of the substrate surface and the fluid flow tends to flip the disc out of the well Apply a certain torque. When the disc is fixed to the well so that the post is oriented upward, only the post is subjected to fluid flow and the disc remains in the well.

When performing this process with a sufficient number of disks for a sufficiently long period of time, the number of assembly attempts at each location is increased, and each well is subjected to assembly attempts until the well has a uLED Go ahead. When the assembly is completed, the unused uLED is removed from the substrate and enters the tank or reservoir for recycling, and the remaining liquid is evaporated or exchanged with the second liquid.

At this point, it may be appropriate to use a naked eye inspection method to find out a missing disc, a well or the like blocked by the particle, or a disc whose post direction in the well is downward. If necessary, a pick and place technique can be used to repair a small number of defects to remove defects. One or more illuminants per subpixel can be used to compensate for a single defect, Strategy can be used to isolate shorted uLEDs in the drive circuit.

As shown in FIG. 171, after assembly, all the uLEDs cover and contact the substrate electrodes corresponding to the anode and cathode electrodes. The substrate is heated to a suitable temperature such that the anode and cathode electrodes interact with the substrate electrode to form stable mechanical and electrical connections. In the case of the In / Sn electrode, the connection with the Ti substrate electrode can be realized at an annealing temperature of 220 ° C, and the coupling process is facilitated by the application of the liquid flux to decompose the surface oxide. The LED electrodes made of different materials may be coated with a layer of In / Sn solder material, or the substrate electrode may be coated with an In / Sn solder material to assist electrical connection. AuGe eutectic solder electrodes or electrodes coated with AuGe process solder material can be used. However, AuGe has a high annealing temperature of 380 DEG C and may not be suitable for some manufacturing processes. After annealing, the substrate may be cleaned to remove residual flux, and a passivation coating such as polyimide or Si ₃ N ₄ may be deposited to prevent contact between the electrode interface and the environment.

Passive matrix array

Referring to FIG. 15A, the uLED array described above may be combined with one array to form a passive matrix array having external driving circuits for each row and column. Thus, the drive method sets the appropriate drive voltage at each column electrode, then turns on the appropriate row and blocks all other rows. The signal is applied for a short time (e.g., several microseconds), the row electrodes are disconnected, and the process is repeated for the next row. Thus, the illumination time of each row is a value obtained by dividing the refresh time by the number of rows. If the playback time is relatively short, the human visual system, like 1/60 second, averages everything to produce an image consisting of all the rows. However, this method is limited to an appropriate number of rows to maintain adequate peak intensity and power.

Active matrix array

The passive matrix array described above is very simple but has significant drawbacks for creating high resolution displays. Since each row is addressed separately, the display cycles through a limited number of rows at the actual duty cycle and power level. Also, the high luminescence required for short duration of LEDs reduces uLED lifetime.

Thus, the advantage of using an active matrix array is that the control elements are fabricated on the display substrate and independently control the emission of each sub-pixel (LED). In some situations a lower operating cycle may be advantageous, but with this structure it can be made to continuously emit light for each subpixel. There are many circuits that can achieve this, but the simplest thing besides the uLED consists of two transistors and a storage capacitor. As shown in Fig. 14C, by setting the gate voltage set by the amount of charge stored in the storage capacitor Cs, the transistor 1404 (T1) determines the amount of current flowing from Vdd to Vss via uLED. Thus, in operation, control of the pixel sets the appropriate voltage on the column line, turns on the access gate T2, waits for some time constant to stabilize the voltage of Cs, And the charge of Cs is maintained. The circuit can fabricate a PMOS device of the driving transistor Tl using a low temperature polysilicon (LTPS) thin film transistor (TFT) process, which has a combination of high mobility and stability. Similar pixels made of indium gallium zinc oxide (IGZO) TFT can be used, but IGZO has a mobility of 10-20% compared to the same size LTPS transistor. For a given pixel size, the limitation of IGZO TFT performance over LTPS degrades the luminance per pixel. As is well known in the art, a large number of driver circuits are used in a display to selectively drive a light emitting device, many of which use two or more TFTs. The display described in the present invention is not limited to any particular type of driver circuit or any particular number of transistors per driver circuit.

blue uLED  Generate used colors

In one aspect, the light-emitting substrate uses a monochrome color for use as an LCD backlight, which is blue in color. However, the substrate can also be used for RGB color generation. There are two ways to generate colors (green and red) by down-conversion of the LED blue light.

18 is a partial cross-sectional view illustrating color generation through use of a separate color conversion sheet. Similar to the color filter process used in LCD displays, the QDCF method uses quantum dots QD in a matrix printed on a separate substrate. The color conversion sheet 1800 includes a diffusion structure 1802 provided in the blue subpixel 300, quantum dot color conversion structures 1804 and 1806 for red and green light respectively, and color filters 1808 and 1810 for blocking blue color contamination Respectively. Each conversion element is surrounded by an absorber 1812 (black matrix) to prevent light from scattering to adjacent pixels. The color conversion sheet 1800 is aligned and bonded to the light emitting substrate 1200/1202 in the uLED light emitting structure 300. Layer 1816 represents an adhesive used to bond light emitting substrate 1200 to color conversion sheet 1800.

19 is a partial cross-sectional view of color generation through the use of phosphors deposited on a light emitting device. The phosphor may be a conventional ceramic phosphor having a diameter in the conventional nanometer range or a QD with a diameter in the micron meter range. The QD LED method is similar to the QDCF method of printing the diffuse structure 1802, the red QD matrix 1804 and the green QD matrix 1806 directly on the uLED 300 and surrounding it with the black matrix 1812 Do. Unnecessary blue light contaminants in the red and green pixels are then absorbed in the color filter sheet 1800 in combination with the red and green color filters 1808 and 1810 of the separate light emitting substrate. Conventional phosphors are mixed and housed in a phosphor binder. Commercially available red and green fluorescent materials have a particle size of about 8 μm diameter. The particles are mixed with a suitable binder suitable for the printing process. Gravure printing techniques require, for example, applying ink to the pattern plate, wiping off excess ink from the pattern plate, and then transferring the phosphor ink pattern from the pattern plate to the light-emitting substrate. Other printing techniques can be applied to processes such as screen printing, flexography, offset, extrusion, or inkjet. In one aspect, the fluorescent ink is thermally cured in a hot plate at 140 占 폚 for 8 minutes. Other processes are determined by the specific materials used in the phosphor and binder.

In addition, using this method and two separate LED fluid assembly flows, a hybrid display is created with blue and green uLEDs, and a red color is created using blue uLED and red QD color conversion structures.

The QDCF method places the QD material away from the LED to lower the temperature, which has the advantage that it does not adversely affect the performance and reliability of the QD. Both methods require a high load of QD to achieve high efficiency color conversion on relatively thin films, and both methods have difficulty in inkjet printing resolution.

All Weapons uLED  Create color to use

20A and 20B are partial cross-sectional and luminance graphs for a light-emitting substrate, each using three different LED types, each producing three different colors. 20A shows that the cover glass 2000 is bonded to the substrate 1200 by an adhesive layer 1816. Fig. In this method, color generation can be realized by using three inorganic LEDs 300a, 300b, and 300c that emit light of 450nm (blue), 530nm (green), and 630nm (red), respectively. As shown in FIG. 20B, this provides a very narrow emission peak for each color, which provides the best color gamut and image appearance. However, there are two major problems with this method. Red LEDs are not made of GaN, but rather are made on GaAs substrates with AlGaInP diodes. As a result, the LED manufacturing and harvesting procedures mentioned for GaN (blue) LEDs are not suitable for red LEDs. In addition, three emitter displays require the development of fluid assembly technology that can align three different LED shapes or sizes. Red LEDs made of AlGaInP are not only more brittle than GaN devices, but also have different operating voltage and temperature characteristics compared to GaN LEDs.

Color conversion of LCD backlight unit (BLU)

Figures 21A, 21B, and 21C show a white light fluorescence intensity graph, a representative laminated color conversion structure, and an associated laminated color conversion structure intensity graph, respectively. The uLED light emitting display may also be used as a local dimming backlight unit (BLU) including a fluorescent material that down converts the blue light emitted by the uLED to produce red and green colors. The BLU therefore becomes a low-resolution copy of the displayed image, increasing the dynamic range by better matching the backlight output to the image requirements. A simple version of BLU is a uniform coating of white light converting phosphor. A more sophisticated version may use a layer of the red conversion phosphor 2100 printed on the LED 300 as shown in FIG. 21B, or the green conversion phosphor 2102 may be coated on the red conversion phosphor 2100 May be used. The spectrum of FIG. 21C is obtained by using a high-quality quantum dot color conversion apparatus having an optical density adjusted so as to pass a proper amount of blue light. The printing process deposits QD only on the LED and deposits a green layer on the red layer by limiting the absorption of the green light of the red conversion structure. However, uniform coating of the entire substrate with mixed red and green conversion structures is costly but effective.

The present invention relates to a surface mounted light emitting device and a display manufacturing method using the surface mounted light emitting device. Examples of specific materials, dimensions, and circuit layout are provided to illustrate the present invention. However, the present invention is not limited to these examples. Other variations and embodiments of the invention may occur to those skilled in the art.

100 --- Display
102 --- First substrate
104 --- upper surface
106, 106-0, 106-n --- Well
108 --- Light blocking material
300 --- Second substrate
302 --- Via surface
400 --- Floor surface
402 --- Light blocking material
404 --- Electrical interface
500, 500-0, 500-n --- Light emitting element
502 --- Electrical contact
504 --- upper surface
506 --- Absorption type light blocking material
508 --- Top surface
600 --- reflective well layer
700 --- absorbing well layer
800-0, 800-n --- reflective coating layer
900-0, 900-n --- absorbing coating layer
1000 --- absorbent material

Claims (26)

In a surface mounted light emitting device,
The upper surface,
Floor,
A first electrical contact formed only on the upper surface,
A second electrical contact formed only on the upper surface, and
And a post extending from the bottom surface.
The method according to claim 1,
The surface mount light emitting element is a surface mount light emitting diode,
a first semiconductor layer comprising a dopant selected from a first group consisting of an n-dopant or a p-dopant,
A second semiconductor layer having a dopant not selected from the first group, and
And a multi quantum well (MQW) layer positioned between the first semiconductor layer and the second semiconductor layer.
3. The method of claim 2,
Wherein the first semiconductor layer and the second semiconductor layer are made of a material selected from the group consisting of gallium nitride (GaN) and aluminum gallium indium phosphide (AlGaInP).
The method according to claim 1,
The first electrical contact is configured in a ring shape,
Wherein the first semiconductor layer and the MQW layer are ring-shaped stacked bodies positioned below the first electrical contact portion,
The second electrical contact is formed in a ring-circumferential region of the first electrical contact,
Wherein the second semiconductor layer is disc-shaped and its central portion is located below the second electrical contact.
5. The method of claim 4,
The surface-mounted light-
A groove formed between the ring of the first electrical contact and the second electrical contact,
Further comprising an electrical insulator to fill the groove.
The method according to claim 1,
The second electrical contact is configured in a ring shape,
Wherein the second semiconductor layer is disc shaped and the periphery of the second semiconductor layer is located below the second electrical contact ring,
The first electrical contact is formed within the second electrical contact ring,
Wherein the first semiconductor layer and the MQW layer are stacked below the first electrical contact.
The method according to claim 6,
The surface-mounted light-
A groove formed between the ring of the first electrical contact and the second electrical contact,
Further comprising an electrical insulator to fill the groove.
The method according to claim 1,
Wherein the upper surface is planar, and the bottom surface is planar.
The method according to claim 1,
Wherein the upper surface is a dual plane having a first horizontal plane and a second horizontal plane,
Wherein the first electrical contact is formed on a first horizontal surface of the upper surface,
And the second electrical contact is formed on a second horizontal surface of the upper surface.

The method according to claim 1,
Wherein the surface mounted light emitting device further comprises a plurality of posts extending from the bottom surface.
The method according to claim 1,
Wherein the first electrical contact portion and the second electrical contact portion are coated with a solder material.
In a light emitting display,
Emitting substrate,
An upper surface,
A first plurality of wells are formed on an upper surface of the light emitting substrate, each well including a bottom surface, a side wall, a first electrical interface formed on the bottom surface, and a second electrical interface formed on the bottom surface,
The matrix formed of the thermal conduction wirings and the row conduction wirings forms a first plurality of column / row intersections, each column / row intersection point being associated with a corresponding well,
A first plurality of surface-mounted light-emitting elements for filling the wells,
An upper surface covering the corresponding well bottom surface,
Floor,
A first electrical contact formed on the top surface and connected to a first electrical interface of the corresponding well,
A second electrical contact formed on the upper surface and connected to a second electrical interface of the corresponding well,
And a post extending from the bottom surface.
13. The method of claim 12,
A color conversion structure covering each light emitting element bottom surface, and
Further comprising a liquid crystal display (LCD) substrate to cover the color conversion structure.
13. The method of claim 12,
Wherein the light emitting element is a surface mounted light emitting diode (SMLED), each SMLED comprises:
a first semiconductor layer comprising a dopant selected from a first group consisting of an n-dopant or a p-dopant,
A second semiconductor layer having a dopant not selected from the first group, and
And a multi quantum well (MQW) layer positioned between the first semiconductor layer and the second semiconductor layer.
15. The method of claim 14,
Wherein the first semiconductor layer and the second semiconductor layer are a material selected from the group consisting of gallium nitride (GaN) and aluminum gallium indium phosphide (AlGaInP).
16. The method of claim 15,
The second plurality of first color conversion structures covering the bottom surface of the corresponding second plurality of SMLEDs, wherein the second plurality is smaller than the first plurality,
A second plurality of second color change structures covering a bottom surface of a corresponding second plurality of SMLEDs, said second color being different from said first color.
17. The method of claim 16,
Characterized in that the light emitting display has a second plurality of light diffusion structures and the second plurality of light diffusion structures cover the bottom surface which is not covered by the corresponding color conversion structure of the second plurality of SMLEDs .
18. The method of claim 17,
The light emitting display having a second plurality of pixel regions,
Each pixel region comprising an SMLED coated with a first color conversion structure, an SMLED coated with a second color conversion structure, and an SMLED not covered with a color conversion structure,
Wherein the first color is green, the second color is red, and the SMLED without the color conversion structure emits blue light.
16. The method of claim 15,
The light emitting display comprising a second plurality of red conversion structures, a third plurality of light diffusion structures and a second plurality of pixel regions,
Said second plurality of red conversion structures covering a bottom surface of a corresponding second plurality of SMLEDs, said second plurality being smaller than said first plurality,
Said third plurality of light diffusing structures covering a bottom surface of a corresponding third plurality of SMLEDs not covered by a color conversion structure, said third plurality being smaller than said first plurality and said second plurality A plurality of double,
Wherein each pixel region of the second plurality of pixel regions comprises an SMLED not covered with a red conversion structure, a blue SMLED not covered with a color conversion structure, and a green SMLED not covered with a color conversion structure. .
15. The method of claim 14,
The first electrical contact of each SMLED is configured as a ring shape having a first diameter,
The first semiconductor layer and the MQW layer of each SMLED are ring-shaped stacked bodies that cover the first electrical contact portion,
A second electrical contact of each SMLED is formed in a ring-circumferential region of the first electrical contact,
The second semiconductor layer of each SMLED is disk-shaped, the central portion covers the second electrical contact,
The first electrical interface of each well is configured as a partial ring having a first diameter and has an opening in the mouth,
Wherein the second electrical interface of each well is set to a mouse of the partial ring whose wiring extends and enters the corresponding first electrical interface.
15. The method of claim 14,
The second electrical contact of each SMLED is configured as a ring shape having a first diameter,
Wherein the second semiconductor layer of each SMLED is disc-shaped and the perimeter lies over the ring of the second electrical contact,
A first electrical contact of each SMLED is formed in a second electrical contact ring peripheral region,
The first semiconductor layer and the MQW layer of each SMLED are stacked to cover the first electrical contact portion,
The first electrical interface of each well being configured as a partial ring having a first diameter, having a mouth opening,
Wherein the first electrical interface of each well is set to a mouse of the sub-ring where the wires extend and enter the corresponding second electrical interface.
13. The method of claim 12,
Wherein the top surface of each light emitting element is planar and the bottom surface of each well is planar.
13. The method of claim 12,
The upper surface of each light emitting element is a dual plane having a first horizontal plane and a second horizontal plane,
A first electrical contact of each luminous means is formed in a first horizontal plane of the upper surface,
A second electrical contact of each luminous means is formed in a second horizontal plane of the upper surface,
The bottom surface of each well is a dual plane having a first horizontal plane and a second horizontal plane,
A first electrical interface of each well is formed in a first horizontal plane of the well,
And a second electrical interface of each well is formed in a second horizontal plane of the well.
13. The method of claim 12,
Wherein the light emitting display comprises a first plurality of active matrix (AM) drive circuits and a reference voltage wiring network,
Each drive circuit being coupled to a corresponding column / row intersection point and coupled to the first electrical interface of a corresponding well,
Wherein the reference voltage wiring network is coupled to a second electrical interface of each well.
13. The method of claim 12,
And a passive matrix (PM) formed of a matrix of the column and row wirings,
Wherein the passive matrix comprises column wirings at each column / row intersection point and row wirings at each column / row intersection point, the column wirings at each column / row intersection point being connected to the first electrical interface of a corresponding well, And row wirings at the column / row intersections are connected to a second electrical interface of each well.
13. The method of claim 12,
Wherein the light emitting display further comprises a solder material applied to the device,
Wherein the device comprises a first and a second electrical contact of the light emitting device and an element selected from the group of the first and second electrical interfaces in the well or an element selected from the group consisting of the first and second electrical contacts of the light emitting element, Wherein the first and second electrical contacts are devices selected from the group of first and second electrical contacts.

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