JP6639451B2 - Display with surface mounted light emitting device - Google Patents

Description

  The present invention generally relates to integrated circuits (ICs), and more particularly, to a surface-mounted light-emitting device and a light-emitting display manufactured using the surface-mounted light-emitting device.

  Currently, the popular rival technologies adopted for large displays are liquid crystal displays (LCDs) and organic light emitting device (OLED) displays, but recently inorganic LED displays are known. The shortcomings of LCDs that this application directly describes are: 1) low efficiency due to the light visible as an image by the user occupying only about 5% of the light emitted from the backlight; 2) complete LC material. This is a low dynamic range due to black pixels being generated because light cannot be blocked. Also, a disadvantage of OLED displays is that blue OLED materials are unreliable and have low efficiency (効率 5% QE). When inorganic micro-LEDs (uLEDs) are applied to a display, the display does not absorb light using a color filter and a polarizing plate, and thus can provide very high efficiency. The uLED used in the present invention is an LED having a diameter or a cross-sectional area of 100 micrometers or less. The inorganic uLED has a very high contrast because the black pixels are set not to emit light. As established in general lighting, for inorganic uLED displays, blue gallium nitride (GaN) LEDs have efficiencies between 35% and 40%, with reliability over 50,000 hours. Sony has already developed a passive matrix of uLEDs arranged in a display array using a pick and place system. However, because large displays require millions of LEDs, displays manufactured by this method are more time consuming and costly compared to other technologies.

  Fluid transfer from donor substrates / wafers of microfabricated electronic devices, optoelectronic devices and subsystems to large-area and / or non-conventional substrates offers new opportunities for expanding the applications of electronic and optoelectronic devices. Offered. For example, LED microstructures, eg, rods, fins or disks, of the size of a display pixel are first assembled on a small wafer and then transferred onto a large panel glass substrate to emit directly without the need for a backlight. A display can be manufactured.

  Conventional transfer techniques, such as inkjet printing or automatic pick and place, are optimal for certain applications. However, these conventional techniques are costly and have very low production. Therefore, it cannot be applied to direct transfer of the LED microstructure.

  For use in direct light emitting displays, the production of inorganic uLED disks has three important processes. These three important processes are respectively manufacturing the uLED disks, placing the uLED disks on a transparent substrate and interconnecting the uLED disks. The conventional IC-type contact hole opening / metal interconnect design faces significant challenges because the fluid assembly process places the uLED disks randomly in the placement wells of the transparent substrate. To place these random distributions, extra tolerances are required in the (opaque) interconnects, but this leads to a considerable loss of the fill factor in the light emitting area. Further, the manufacturing complexity of these interconnects results in poor yield and / or high cost.

  1A and 1B are plan views showing a top contact LED disk located in a well of a substrate (prior art). In FIG. 1A, assuming that GaN is formed on top of the disk, Dd indicates the diameter of the LED (eg, GaN) disk and Dc indicates the diameter of the microcavity or well of the already placed uLED disk. , Dp indicate the diameter of the p-type doped GaN (p-GaN) region. Region 100 is an n-GaN contact point where p-GaN and MQW have been removed by reactive ion etching (RIE). The inner circular region 102 is a stack of full LEDs with p-GaN on top. A layer of nickel oxide (NiOx) / a layer of indium tin oxide (ITO) may be formed on the surface of region 102. Considering the misalignment tolerance of general photolithography (up to 2 micrometers (μm)), the circular region 102 is shifted by 2 μm from the center of the GaN disk. Since only the circular region 102 can emit light, the filling factor of the light emitting area is only about 70.6%, and nearly 30% of the light emitting area is lost by the opening 100 of n-GaN.

  FIG. 1B shows the operating area of the anode terminal contact 104 (Dpc). Connections formed outside the region 104 having a diameter of 24 μm can cause short circuits or open circuits. Conventional metal interconnection to n-GaN region 100 further reduces the emission area fill factor. In this embodiment, the GaN disk emits light only in an area of 31.4%.

  FIG. 2 is a partial cross-sectional view of a bottom cathode contact structure (prior art). This choice avoids the significant emission area fill factor loss associated with conventional top contact LED disks. The bottom interconnect electrode 200 is first deposited and patterned on a substrate 202, and then a microcavity (well) 204 is formed. Then, a low melting metal thin layer 206 is coated on the electrode surface at the bottom inside the microcavity 204. Next, the GaN disk 208 (n-GaN 210 / p-GaN 212) is placed in the microcavity 204. After the interlayer dielectric 214 has been patterned, the top interconnect electrode 216 is deposited and patterned to complete the entire process.

  The process flow shown in FIG. 2 is relatively simple. A design with well-selected top metal traces allows the front emission area fill factor to reach a maximum of 85%. The main challenge of this flow is the trade-off between bottom contact rate and bottom electrode area if bottom contact rate, uniformity, reliability, reproducibility, and back emission apertures are needed including.

  It would be advantageous if a large area light emitting display could be efficiently manufactured by a fluid assembly process using surface mounted light emitting devices.

  The present invention relates to a direct light emitting display or a liquid crystal display (LCD) backlight using an inorganic micro light emitting diode (LED), which can produce a large screen and high dynamic range display with reasonable cost and high reliability.

  The present invention relates to a direct light emitting display or a liquid crystal display (LCD) backlight using an inorganic micro light emitting diode (LED), which can produce a large screen and high dynamic range display with reasonable cost and high reliability. For example, an inorganic micro-LED (uLED) array in a surface mount structure is assembled by a fluid assembly to produce a high dynamic range display. In a conventional planar LED structure assembled on a sapphire substrate, a uLED emitter is manufactured by etching into a small disk. The disk is treated so that an anode and a cathode are formed on the upper surface of the uLED. The resulting uLED is recovered in a suitable solution, for example, isopropanol (IPA), acetone or distilled water, to be released by a laser lift-off process to form a suspension. These suspensions are deposited on a display substrate having an array of previously prepared well structures, the well structures comprising electrodes matching the anode and cathode electrodes of the uLED disk. The well structure is a cylindrical opening slightly larger than the diameter of the disk. Thereby, one uLED can be deposited at a position where the LED electrode in the well contacts the electrode on the substrate. Since any LED electrode directly covers and abuts the bottom surface of the well, compared to an LED disk that requires additional interconnect layers and processing to have one or two electrodes exposed to the well opening. The electrical connection is greatly simplified.

  As a result of proper annealing, the uLED is connected to an array electrode on the substrate to be driven to emit light by a suitable driving circuit. The array may be driven as a passive matrix. This turns on each row in turn, and each sub-pixel in the array is driven by the control current to produce the required light. However, due to sampling and drive limitations, such a simple drive method is necessarily limited to relatively few rows. Alternatively, each sub-pixel may be controlled by a thin film transistor (TFT) drive circuit. A thin film transistor (TFT) drive circuit can control the amount of drive current based on the charge stored in the capacitor. This active matrix (AM) circuit configuration allows the uLED to be driven for nearly 100% of the time. Thus, there is no limit on the number of rows in the display, other than the power supplied to each column.

Compared to current-directed uLED displays whose top and bottom surfaces have electrical connections, the surface-mounted uLED structure offers several main advantages:
1) The area of the small emitter is optimal for high resolution active matrix (AM) displays, but the overall size of the disk is large enough for fluid assemblies.
2) The fluid assembly process is the final main operation, so that relatively small glass can be used and there is no need to return to the LCD fab for metallization after assembly.
3) The wiring patterning is performed before the formation of the well. As a result, there is no metal defect in the misaligned uLED and no deep interconnect from the substrate to the well layer is required.
4) After annealing, the uLEDs are electrically connected but exposed. Thereby, it is possible to determine whether or not a predetermined uLED emits light by electrical measurement and perform pick-and-place repair of a defective uLED.

  These advantages are that they tend to offset the light emitting area of the surface mounted LED, which is a relatively small area on the LED growth substrate, which increases cost per pixel. However, the uLED fabrication process is relatively complicated because it has multiple patterning steps, including fabrication of the post that occurs after laser lift-off (LLO).

  Accordingly, a surface mounted light emitting device having a top surface and a bottom surface is provided. The first electrical contact is formed only on the top surface, and the second electrical contact is formed only on the top surface. The posts extend from the bottom surface. In one embodiment, the surface mounted light emitting device is a surface mounted light emitting diode (SMLED), wherein the SMLED is used for a first semiconductor layer having an n-dopant or a p-dopant and a first semiconductor layer. From a second semiconductor layer made with the opposite dopant. The multiple quantum well (MQW) layer is interposed between the first semiconductor layer and the second semiconductor layer. Generally, the first and second semiconductor layers are gallium nitride (GaN) or aluminum indium gallium phosphide (AlGaInP).

  A light-emitting display manufactured from the surface-mounted light-emitting device and the light-emitting substrate described above is also provided. The light emitting substrate has a top surface in which the first plurality of wells are formed on the top surface of the light emitting substrate. Each well has a bottom surface, side walls and a first electrical interface formed on the bottom surface, and a second electrical interface formed on the bottom surface. The light emitting substrate further includes a matrix of column and row conductive traces for forming a first plurality of column and row intersections, wherein each column and row intersection is associated with a corresponding well. The first plurality of light emitting elements fill these wells. In one embodiment, the color modifier covers the bottom surface of each light emitting element (e.g., produces a single color, e.g., white) and the display comprises a liquid crystal display (LCD) substrate covering the top surface of the light emitting substrate. Including.

  The light emitting display may be a direct light emitting display. In this case, the first plurality of color modifiers cover the bottom surface of the corresponding SMLED, and the second plurality of color modifiers cover the bottom surface of the corresponding SMLED. The first color and the second color are different. If the display is red-green-blue (RGB) and only one type of LED (e.g., blue GaN LED) is used, multiple light diffusers will reduce the bottom surface of the SMLED that is not covered by the corresponding color modifier. cover. As a result, a display having pixel areas may include an SMLED in which each pixel area is covered by a first color modifier (eg, green), an SMLED covered by a second color modifier (eg, red), and a color modifier (eg, Blue). Alternatively, if blue and green light emitting GaN LEDs are used simultaneously, a color modifier need only be used to generate red.

  In one embodiment, the first electrical contact (electrode) of each SMLED is arranged in a ring shape having a first diameter, and the first semiconductor layer and the MQW layer of each SMLED have a first electrical contact. It is a ring-shaped laminate to cover. At this time, the second electrical contact of each SMLED is formed within the ring-shaped periphery of the first electrical contact, and the second semiconductor layer of each SMLED has a central portion covering the disk covering the second electrical contact. It has a shape. The first electrical interface of each well is configured as a partial ring having a first diameter and partially open, the second electrical interface of each well being a portion of the corresponding first electrical interface. The traces are configured to extend into openings in the ring. Alternatively, the first semiconductor layer and the MQW layer of each SMLED may be a laminate covering the second electrical contact, and the second semiconductor layer may cover the first electrical contact.

  Alternatively, the top surface of each light emitting element may be a biplanar having a first horizontal plane and a second horizontal plane. Thereby, the first electric contact of each light emitting element is formed on the first horizontal surface of the top surface, and the second electric contact of each light emitting element is formed on the second horizontal surface of the top surface. Similarly, the bottom surface of each well is a biplanar having a first horizontal plane and a second horizontal plane, the first interface of each well is formed in the first horizontal plane of the bottom surface, and the second interface of each well is the bottom surface. Is formed on the second horizontal plane.

  The light emitting element may use an active matrix (AM) driving circuit. Each drive circuit is connected to a corresponding column and row intersection and to a first electrical interface of a corresponding well. And the light emitting substrate also includes a network of reference voltage (eg, ground) traces connected to the second electrical interface of each well. Alternatively, the matrix of column and row traces forms a passive matrix (PM), wherein the column trace at each column and row intersection is connected to the first electrical interface of the corresponding well and the intersection of each column and row Are connected to the second electrical interface of the corresponding well.

  Hereinafter, other details of the surface-mounted light emitting device and the light emitting display described above will be provided.

1 is a plan view of a top contact LED disk located in a well of a substrate (prior art). 1 is a plan view of a top contact LED disk located in a well of a substrate (prior art). FIG. 2 is a partial cross-sectional view of the contact structure of the bottom cathode (prior art). FIG. 3 is a partial cross-sectional view of a surface mount light emitting device. FIG. 2 is a partial cross-sectional view when a surface-mounted light emitting diode (SMLED) is realized as a surface-mounted light emitting device. It is a top view when a surface mount type light emitting diode (SMLED) is realized as a surface mount type light emitting element. FIG. 4B is a partial cross-sectional view showing a modification of the LED of FIG. 4A. FIG. 4 is a partial cross-sectional view showing a change in two horizontal planes of the light emitting element. It is a bottom view showing change of a post of a surface mount type light emitting element. It is a bottom view showing change of a post of a surface mount type light emitting element. It is a top view of a light emitting display. FIG. 2 is a partial sectional view of a light emitting display. FIG. 8B is a partial cross-sectional view showing one method of realizing the light emitting substrate of FIG. 8A as a backlight. FIG. 9B is a partial cross-sectional view showing one method of realizing the light emitting substrate of FIG. 8B as a backlight. FIG. 5 is a partial cross-sectional view showing one method of realizing a display that directly emits light from a light emitting substrate. FIG. 5 is a partial cross-sectional view showing one method of realizing a display that directly emits light from a light emitting substrate. It is a top view of a well bottom. FIG. 3 is a partial sectional view of a light emitting substrate. It is a figure which shows the example of a change of the top view of the well bottom part of FIG. 11A. FIG. 11B is a diagram showing a modified example of a partial cross-sectional view of the light emitting substrate of FIG. 11B. It is a partial sectional view showing a modification of a light emitting element. It is a fragmentary sectional view showing a modification of a well. FIG. 3 is a partial cross-sectional view of a light emitting element located in a well. FIG. 3 is a schematic diagram of a light emitting substrate driven by a first multiple active matrix (AM) drive circuit. FIG. 2 is a partial cross-sectional view of a light emitting substrate driven by a first multiple active matrix (AM) drive circuit. FIG. 9 is a diagram illustrating a modified example of the drive circuit. FIG. 3 is a schematic view of a light emitting substrate when a light emitting element is realized using a passive matrix. FIG. 3 is a partial cross-sectional view of a light-emitting substrate when a light-emitting element is realized using a passive matrix. FIG. 2 is a partial cross-sectional view of a surface mount uLED designed for a fluid assembly. It is a top view showing the manufacturing process of the light emitting substrate concerning one example. It is a fragmentary sectional view showing the manufacturing process of the light emitting substrate concerning one example. It is a top view showing the manufacturing process of the light emitting substrate concerning one example. It is a fragmentary sectional view showing the manufacturing process of the light emitting substrate concerning one example. It is a top view showing the manufacturing process of the light emitting substrate concerning one example. It is a fragmentary sectional view showing the manufacturing process of the light emitting substrate concerning one example. It is a top view showing the manufacturing process of the light emitting substrate concerning one example. It is a fragmentary sectional view showing the manufacturing process of the light emitting substrate concerning one example. It is a top view showing the manufacturing process of the light emitting substrate concerning one example. It is a fragmentary sectional view showing the manufacturing process of the light emitting substrate concerning one example. It is a fragmentary sectional view showing the manufacturing process of the light emitting substrate concerning one example. It is a fragmentary sectional view showing the manufacturing process of the light emitting substrate concerning one example. FIG. 3 is a partial cross-sectional view illustrating a color generator using a single color conversion sheet. FIG. 4 is a partial cross-sectional view illustrating a color generator using a phosphor deposited on a light emitting element. FIG. 3 is a partial cross-sectional view of a light emitting substrate that utilizes three different LEDs to generate three different colors, respectively. 3 is an optical intensity table of a light emitting substrate that generates three different colors by using three different LEDs. It is a figure showing the intensity graph of white light fluorescent substance. It is a figure showing the laminated color filter in an example. It is a figure which shows the intensity | strength graph of the related laminated color filter.

  FIG. 3 is a partial cross-sectional view of the surface mounted light emitting device. The surface mounted light emitting device 300 includes a top surface 302, a bottom surface 304, a first electrical contact portion 306 formed only on the surface of the top surface 302, and a second electrical contact portion 308 formed only on the surface of the top surface 302. Including. Here, “formed only on the top surface” means that the electrical contact portion or electrode does not extend to the side surface 312 or the bottom surface 304 of the light emitting device. The electrical contact may be a metal, a doped semiconductor or a transparent conductive oxide (TCO) such as indium tin oxide (ITO). Although not shown as distinct layers, the first electrical contact 306 and the second electrical contact 308 may be solder or may be subsequently used to connect a light emitting substrate (e.g., eutectic solder ) May be formed. The surface mount light emitting device 300 further includes a post 310 extending from the bottom surface 304. In one embodiment, post 310 is centrally located on bottom surface 304. One example of a light emitting device is a light emitting diode (LED). Other two-terminal surface mounted light emitting devices that do not emit light include photodiodes, thermistors, pressure sensors, and piezoelectric elements.

  4A and 4B are a partial cross-sectional view and a plan view, respectively, when a surface-mounted light emitting diode (SMLED) is realized as a surface-mounted light emitting device 300. The SMLED 300 includes a first semiconductor layer 402 including an n-type dopant or a p-type dopant and a second semiconductor layer 404 including a dopant not used in the first semiconductor layer 402. The multiple quantum well (MQW) layer 406 is located between the first semiconductor layer 402 and the second semiconductor layer 404. MQW layer 406 typically comprises a series of quantum well layers (not shown) (typically five layers, for example, alternating 5 nm indium gallium nitride and 9 nm N Type-doped GaN (n-GaN)). An aluminum gallium nitride (AlGaN) electron block layer (not shown) may be provided between the MQW layer and the P-type doped semiconductor layer. The outer semiconductive layer may be P-doped GaN (Mg-doped) having a thickness of about 200 nm. When used in MQWs with a relatively high indium content, high brightness blue or green LEDs can be formed. The most practical material for the first and second semiconductor layers is gallium nitride (GaN), which can emit blue or green light, or aluminum indium gallium phosphide (AlGaInP), which can emit red light. .

  The second electric contact portion 308 is formed in a ring shape. The second semiconductor layer 404 is disk-shaped, and its edge is located below the ring-shaped second electrical contact 308. The first electric contact portion 306 is formed inside the ring-shaped second electric contact portion 308, and the first semiconductor layer 402 and the MQW layer 406 are stacked and installed below the first electric contact portion 306. I have. A groove is formed between the ring-shaped second electric contact portion 308 and the first electric contact portion 306, and the groove is filled with an electric insulator 408.

  Conventional LED manufacturing processes (eg, light emitting LEDs) involve only one surface before separation from the sapphire substrate. Part of their manufacture is the final step of using laser lift-off (LLO) to separate the LEDs from the sapphire substrate. In another manufacturing process, the LEDs are separated from each other by dividing the sapphire substrate without using LLO. However, the structure of the SMLED requires that electrodes be placed on the surface facing the post. Thus, this post is formed in the uLED after being separated from the sapphire substrate by laser lift-off. No method is provided during the conventional manufacturing process to keep each LED in a known position, and the bottom of the LED can be photolithographically separated by separating the LED from the sapphire substrate. Precise xy coordinates are required to accurately place the post at the desired location (eg, center) on the top surface of the LED. An accurate z (vertical) position is needed to establish a focal plane and image the structure of the post with the required size control of the fluid assembly (eg, orientation). That is, in SMLEDLLO, the SMLED must be localized on the transfer substrate in a controlled manner to form the post. The suspension for the fluid assembly is then formed off the transfer substrate.

  FIG. 5 is a partial sectional view showing a modification of the LED of FIG. 4A. In this embodiment, the first electric contact portion (electrode) 306 is formed in a ring shape. The first semiconductor layer 402 and the MQW layer 406 are ring-shaped laminates located below the first electrical contact 306. The second electric contact portion 308 is formed inside the ring-shaped periphery of the first electric contact portion 306. The second semiconductor layer 404 has a disk shape, and a central portion thereof is located below the ring-shaped second electrical contact portion 308. As shown in FIG. 5, a groove is formed between the first electrical contact portion 306 and the second electrical contact portion 308 in a ring shape. The electric insulator 408 is filled in this groove.

  FIG. 6 is a partial cross-sectional view showing a change in two horizontal planes of the light emitting device. 4A and 5 that the top surface is a horizontal plane and the bottom surface is also a horizontal plane. Here, the term "horizontal plane" means an all-flat surface having a root mean square (RMS) roughness of 10 nanometers (nm) or less. Alternatively, as shown in FIG. 6, the top surface of the surface mounted light emitting device is a two-plane having a first horizontal plane 600 and a second horizontal plane 602. The first electrical contact 306 is formed on a first horizontal plane 600 on the top surface, and the second electrical contact 308 is formed on a second horizontal plane 602 on the top surface. Although not shown, the second electrical contact 308 may alternatively be formed on the first horizontal surface 600 on the top surface, or the first electrical contact 306 may be formed on the second horizontal surface 602 on the top surface. Good.

  7A and 7B are bottom views showing changes in posts of the surface mount light emitting device. As shown in FIG. 7A, in one embodiment, the surface mounted light emitting device includes a plurality of posts 310 extending from a bottom surface 304. Here, it should be noted that the surface mount type light emitting element 300 does not limit the specific number, position, or specific shape of the posts. FIG. 7A shows two posts, and FIG. 7B shows a fin-like post. Further, other shapes or a plurality of shapes may be combined. In one embodiment, especially when there is only one post, the post is located at the center of the bottom surface of the light emitting device. This inclines one edge of the light emitting element to the fluid flow. 7A and 7B, the post tilts the light emitting device in a direction perpendicular to a vertical axis exiting the paper.

  8A and 8B are a plan view and a partial cross-sectional view of a light emitting display, respectively. Some examples of emissive displays include televisions, computer displays, screens of personal digital assistants and backlights of LCD displays, and may be applied to the above examples or used as direct emissive displays. Light emitting display 800 includes a light emitting substrate 802 having a top surface 804. Light emitting substrate 802 includes a first plurality of wells 806 formed on a top surface 804 of the light emitting substrate. Each well 806 includes a bottom surface 808, sidewalls 810, a first electrical interface 812 formed on the bottom surface 808, and a second electrical interface 814 formed on the bottom surface 808. Although not shown as a distinct layer, the first electrical interface 812 and the second electrical interface 814 may be solder coated for electrical connection with the light emitting device. The matrix formed by the column conductive traces 816 and the row conductive traces 818 (ie, 818a and 818b) forms a first plurality of column and row intersections 820. The intersection 820 of each first plurality of columns and rows is associated with one corresponding well 806. The following describes other details of the interface between the well and the matrix formed by the column and row traces. The first plurality of surface-mounted light emitting devices 300 are located in the well 806. Each surface mount light emitting device 300 includes a top surface 302 that covers the bottom surface 808 of the corresponding well. The surface mount light emitting device 300 has a bottom surface 304 and a post 310 extending from the bottom surface 304. A first electrical contact (electrode) 306 is formed on the top surface 302 of the light emitting device and is connected to the first electrical interface 812 of the corresponding well 806. Although not shown as a distinct layer, the first electrical contact 306 and the second electrical contact 308 may be solder or a solder coating for connection with the electrical interface of the light emitting substrate. A second electrical contact 308 is formed on the top surface 302 of the light emitting device and is connected to a second electrical interface 814 of a corresponding well 806. Note that in order to direct light to the top surface 804 of the light emitting substrate 802, the electrical contacts of the light emitting device and the electrical interfaces of the wells can be made of a reflective material (eg, metal).

  The device can be referred to as a surface-mounted light emitting device, since any contacts of the light emitting device are formed on the top surface 302. It should be noted, however, that when the light emitting device is incorporated into well 806, the bottom surface 304 of the light emitting device covers top surface 302. As described in the above example, the first electrical contact 306 and the second electrical contact 308 of the light emitting device are formed only on the top surface 302 of the light emitting device. Therefore, it is not necessary to form an electrical interface on top surface 804 of the light emitting substrate after the well is provided. As described above, the light emitting device may be a surface light emitting diode (SMLED), but for the sake of brevity, a detailed description is omitted here. As described above, in one embodiment, the top surface 302 of each light emitting element is horizontal and the bottom surface 808 of each well is also horizontal. Also, the bottom surface 304 of the light emitting element may be a horizontal plane.

  The light emitting device has a size that fits into a well cavity. Here, “to be combined” means that two mechanical parts are combined. Manufactured parts often need to mate with other parts. These parts may be mounted to slide freely on each other or they may be connected together to form a single unit or assembly. There are three general combinations. In order to freely rotate or slide an object (for example, a light emitting element) in a well, a clearance fit is required. This is commonly referred to as a "slip fit." An interference fit is required to securely hold the object in the well. While this interference fit holds the object securely in the well, an intermediate fit is required if it allows removal or rotation within the well. This is called a "localization or intermediate fit". Light emitting devices generally have a clearance or sliding fit with respect to the well.

  9A and 9B are partial cross-sectional views illustrating two different methods for realizing the light emitting substrate of FIGS. 8A and 8B as a backlight. A color modifier 902 covers each light emitting element bottom surface 304, and a liquid crystal display (LCD) substrate 900 covers the modifier. Since many types of LCD substrates 900 are well known in the art, a detailed description of such structures is omitted here for brevity. That is, the LCD substrate 900 forms a selectively engagable “window” located on each light emitting element 300, and the color modifier 902 uses the color of the light emitted from the light emitting elements to the backlight of the LCD display. Convert to the color applied to. For example, if the light emitting element is a GaN LED that emits blue light, the color modifier 902 converts the blue light to white. For example, the color modifier 902 can be a laminate including a red modifier and a green modifier. Hereinafter, this will be described in more detail. In FIG. 9A, the color modifier 902 is formed directly on the surface-mounted light emitting device 300 by, for example, a silk printing process. In FIG. 9B, the color modifier 902 is one layer in the LCD substrate 900.

  10A and 10B are partial cross-sectional views illustrating two different ways to implement a light emitting substrate as a direct light emitting display. In FIG. 10A, a second plurality of first color modifiers 1000 covers the bottom surface 304 of the corresponding second plurality of SMLEDs, wherein the second plurality is less than the first plurality. The second plurality of second color modifiers 1002 cover the bottom surface 304 of the corresponding second plurality of SMLEDs, wherein the second color is different from the first color. Note that the second plurality of light diffusers 1004 cover the bottom surface 304 that is not covered by the corresponding second plurality of SMLED color modifiers. Thus, if only GaN LEDs are used, then in a second plurality of pixel areas (only one pixel area is shown), each pixel area will be a SMLED 300 (eg, green) covered by the first color modifier 1000, Includes SMLEDs covered by the second color modifier 1002 (eg, red) and SMLEDs not covered by the color modifier (eg, blue). Although a red-green-blue (RGB) display is shown here, other colors may be added to each pixel area by other color modifiers.

  In FIG. 10B, a second plurality of red modifiers 1010 cover the bottom surface 304 of the corresponding second plurality of SMLEDs 300, wherein the second plurality is less in quantity than the first plurality. The third plurality of light diffusers 1012 cover the bottom surface 304 that is not covered by the corresponding third plurality of SMLED color modifiers. In the RGB display of the present invention, the third plurality is less than the first plurality, but is equal to twice the second plurality. As a result, a second multi-pixel area (only one pixel area is shown) is a SMLED 300 in which each pixel area is covered by a red modifier 1010 (eg, a GaN LED), a blue SMLED 300 not covered by a color modifier 1012. (Eg, a GaN LED) and a green SMLED 1014 (eg, a GaN LED) that is not covered by a color modifier 1012. In one embodiment, layer 1012 is a light diffuser. In another embodiment, the color combination is realized by both GaN and a red emitting AlGaInPSM LED.

  11A and 11B are a plan view of the well bottom surface and a partial cross-sectional view of the light emitting substrate, respectively. Referring to FIG. 5, the first electrical contact portion 306 of each SMLED 300 is formed in a ring shape having a first diameter. The first semiconductor layer 402 and the MQW 406 of each SMLED 300 are a ring-shaped laminate covered by a first electrical contact 306. It should be noted that the first semiconductor layer 402 and the MQW layer 406 shown in FIG. 5 are located below the first electrical contact portion 306, but when the first semiconductor layer 402 and the MQW layer 406 are arranged in the well. Layer 406 is the point that covers first electrical contact 306. The second electrical contact 308 of each SMLED 300 is formed inside the ring-shaped periphery of the first electrical contact 306. The second semiconductor layer 404 of each SMLED 300 is disk-shaped, and its center is covered by a second electrical contact 308 (described above).

  Referring again to FIGS. 11A and 11B, the first electrical interface 812 of each well is formed in a partial ring having a first diameter. First electrical interface 812 has opening 1100 and is connected to column conductive trace 816. The second electrical interface 814 of each well is connected to a row conductive trace 818 that extends to the opening 1100 of the corresponding partial ring of the first electrical interface 812.

  12A and 12B are views showing modified examples of the plan view of the well bottom and the partial cross-sectional view of the light emitting substrate in FIGS. 11A and 11B, respectively. Referring to FIGS. 4A and 4B, the second electrical contact 308 of each SMLED 300 may be formed in a ring shape having a first diameter. The second semiconductor layer 404 of each SMLED 300 is disk-shaped, and the edge is covered by a ring-shaped second electrical contact. The first electric contact portion 306 of each SMLED 300 is formed inside the periphery of the second electric contact portion 308, respectively. The first semiconductor layer 402 and the MQW layer 406 of each SMLED are a stack covered by a first electrical contact 306. It should be noted that the first semiconductor layer 402 and the MQW layer 406 are located below the first electrical contact portion 306 as shown in FIG. And the MQW layer 406 covers the first electrical contact 306.

  Referring again to FIGS. 12A and 12B, the second electrical interface 814 of each well is formed in a partial ring having a first diameter, has an opening 1100, and is connected to a column conductive trace 816. The first electrical interface 812 of each well is connected to a row conductive trace 818 that extends into the opening 1100 of the corresponding partial ring-shaped second electrical interface 814.

  Another feature to note in FIGS. 11B and 12B is that the light emitting substrate 802 may include multiple horizontal planes. In FIG. 12B, for example, the light emitting substrate 802 includes a glass or plastic layer 1200, and the conductive traces can cover an electrical interface connected to a well of the glass or plastic layer 1200. The transparent material layer 1202 may cover the conductive traces and the glass or plastic layer 1200, and the well may be formed in the transparent material layer 1202. For example, the transparent material layer 1202 can be an insulating material or a polyethylene naphthalate (PEN) film.

  FIGS. 13A, 13B, and 13C are partial cross-sectional views of a modified example of the light emitting element, a modified example of the well, and the light emitting element located in the well, respectively. In one embodiment, the top surface 302 of each light emitting element is a two-plane including a first horizontal plane 1300 and a second horizontal plane 1302. First electrical contact 306 is formed on a first horizontal surface 1300 of top surface 302, and second electrical contact 308 is formed on a second horizontal surface 1302 of top surface 302. Although not shown, the first electrical contact 306 may alternatively be formed on a second horizontal surface on the top surface and the second electrical contact 308 may be formed on the first horizontal surface on the top surface. Similarly, the bottom surface 808 of each well is two planes including a first horizontal plane 1304 and a second horizontal plane 1306. Thus, a first electrical interface 812 for each well is formed on a first horizontal plane 1304 at the bottom of the well, and a second electrical interface 814 for each well is formed on a second horizontal plane 1306 at the bottom of the well.

  14A and 14B are a schematic diagram and a partial cross-sectional view of a light emitting substrate driven by a first plurality of active matrix (AM) drive circuits, respectively. FIG. 14C is a diagram showing a specific modification of the drive circuit. Each drive circuit 1400 is connected to a corresponding first plurality of row and column intersections, and its output terminal is connected to the first electrical interface 812 of the corresponding well. Alternatively, the output terminal of each drive circuit 1400 may be connected to the second electrical interface 814 of each well. A network of reference voltage (eg, ground) traces 1402 is connected to the second electrical interface 814 of each well. FIG. 14B shows only the final output transistor 1404 of the drive circuit 1400, which changes the variable resistance interposed between the DC power trace (Vdd) 1406 and the LED. Thus, the output of the corresponding LED 300 is controlled.

  FIGS. 15A and 15B are a schematic view and a partial cross-sectional view of a light emitting substrate when a light emitting element is realized using a passive matrix, respectively. In one embodiment, the series of column conductive traces 816 and row conductive traces 818 form a passive matrix (PM) that is connected to the first electrical interface 812 of the corresponding well. And a row trace of each first plurality of column and row intersections 820 connected to the second electrical interface 814 of each well.

  The uLED emitter element may be manufactured by a process similar to that used for uLED lighting. However, as discussed below, the size, shape, and structure of the disk have other requirements that do not exist in general illumination. Otherwise, the LEDs can be fabricated into a suitable backplane that can accommodate a large array of uLEDs and be electrically connected to the uLEDs. There are specific requirements for the size, shape and position characteristics. This allows the uLED to be properly localized and connected. Finally, the process of fluid assembly is used to localize the uLEDs to the array and establish electrical connections between each uLED and the backplane.

  Emitter size is an important differentiator for displays. The size of normal lighting, LCD backlights, and emitters (light emitting elements) tend to be convenient and the cost per photon is fully considered. The most common (cheapest) LED area of the light source in normal illumination is about 200 × 200 μm, the LED thickness is about 5 μm, and the sapphire thickness is about 100 μm. The aspect ratio of the light emitting element is about 2: 1. In direct emission applications, the uLED emission area is selected to produce sufficient illumination emission for one sub-pixel. The diameter of the uLED light emitting area may be smaller than 25 μm. Due to the size of the uLED, it is important in manufacturing to require contact within the area of the device, but the larger the contact, the smaller the emitter area. However, due to the spreading resistance in the GaN layer, the loss increases as the contact portion is smaller.

  Production of uLED

  The surface mount uLEDs used in the manufacture of the light emitting displays disclosed in the present invention may be manufactured from conventional high brightness LED wafers, such as those used in conventional lighting emitters, a technique well known in the art. Is also good. The resulting uLEDs have diameters of 10 to 100 micrometers (μm), and are generally disc-shaped, and are shown in the above figures. This disk shape is typical, but may be other planar shapes manufactured in a similar manner, for example, triangular, square or hexagonal. The display substrate is also manufactured to have a well structure that matches the uLED shape for the fluid assembly.

  A brief manufacturing flow for one particular type of uLED is shown below.

  1) A method for manufacturing a planar high-intensity blue LED wafer manufactured by a conventional method is as follows.

  a. Referring to FIGS. 4A and 4B, a buffer layer and n-GaN (404) are deposited on a sapphire substrate to form an LED cathode. N-doped GaN is either intrinsic (ie, defect-doped) or doped with a small amount of silicon (Si).

  b. Depositing alternating layers of InGaN and GaN (406) to form a multiple quantum well (MQW).

  c. A hole blocking layer of AlGaN and a thin p-GaN layer (402) are deposited to form an LED anode. p-GaN is usually doped with magnesium (Mg).

  d. An ITO current spreading layer is deposited on p-GaN.

  2) Etching ITO, p-GaN and MQW to form an LED light emitting region, and provide a mesa that is over-etched to some extent in the n-GaN layer.

  3) The n-GaN is etched to the sapphire substrate to form a disk-shaped uLED larger than the mesa formed in 2). This is typically a close-packed circular array to make the best use of the device area. Other simple plate shapes, such as triangular, square or hexagonal, may be used if the aspect ratio is appropriate for the fluid assembly.

  4) An insulating material (408) is deposited in a ring shape to electrically insulate the anode and the cathode. The material includes a light absorbing material to prevent light leakage between the anode and the cathode.

  5) Deposit the anode electrode stack (308) to a suitable height. The electrode stack includes multiple components in successive layers.

  a. It has a work function that matches n-GaN. For example, a material such as titanium (Ti) is used.

  b. A thick electrode connected to the display substrate well electrode, for example, a laminated structure of indium (In) and tin (Sn) having a thin gold cap for preventing oxidation.

  6) Deposit the cathode electrode stack to a suitable height. The electrode stack includes multiple components in successive layers.

  a. A material that makes good contact with the ITO current spreading layer, such as nickel / gold (Ni / Au), chromium / gold (Cr / Au), or titanium (Ti).

  b. An electrode connected to the display substrate well electrode, for example, a laminated structure of indium (In) and tin (Sn) having a thin gold cap for preventing oxidation.

  7) Paste the top surface of the wafer onto the glass processing substrate via an adhesive coating.

  8) Remove the sapphire substrate using laser lift-off (LLO) and allow access to the bottom surface of the uLED structure.

  9) The processing substrate with the uLEDs is located in the array, and the sides of the n-GaN are processed into stereotactic posts 310. Post 310 may be, for example, a photo-patternable material such as SU-8 (a commonly used epoxy-based negative photoresist) or deposited oxide or metal.

  The completed uLED is recovered by dissolving the adhesive and collecting the disks in a fluid suspension. The fluid suspension may be a completed uLED by collecting a fluid suspension that is an alcohol, polyol, ketone, halocarbon or (DI) distilled water.

  FIG. 16 is a partial cross-sectional view of a vertical surface mount uLED designed for a fluid assembly. There are several limitations in LED construction to improve device performance and fluid assembly production. In one embodiment, as described above, a commercially available GaN LED structure is etched to produce a surface mounted uLED (SMuLED). An SMuLED for use in the present invention is defined as a device having two electrical contacts (adjacent to the well bottom surface). Specifically, the SMuLED of FIG. 16 includes p + GaN 1600, MQW 1602, n + GaN 1604, and n-GaN 1606. The size of c may be 2-4 micrometers, and the size of b may be 1-2 micrometers. Most of the properties required for a vertical LED fluid assembly are also important for surface mount uLED structures. The following guidelines can be applied to the production of vertical uLEDs or surface mount uLEDs in surface fluid assemblies.

  Substrate: Preferably, sapphire is used for laser lift-off. The surface is flat or rough to improve light extraction.

  nGaN thickness (1604 and 1606): The body of the SMuLED consists of n-type GaN (1606) and Si-doped n-type GaN (1604). Each layer has a thickness of 3 μm.

  Disk diameter (d): The thickness "a" of the uLED determines the diameter of the disk. Usually, the ratio of d / a is in the range of 5-50 um. For a disk thickness of ５5 μm, the diameter “d” of the disk may be between 30 μm and 120 μm. If the thickness of the disc is 2 μm, the diameter “d” may be reduced by 5 μm to 50 μm.

  The ratio of post diameter (e): e / d is between 10% and 20%. For a 50 μm diameter disk, the post diameter may be 5-10 μm. For a 5 μm disk, the post diameter may be 0.5-1 μm.

  Post height (f): The post height is about 30% to 100% of the post diameter. For a 50 μm diameter disk, a 1 μm post height can be applied, while a 2 μm height can effectively reverse a mis-oriented disk in a fluid assembly.

  Stack height (a): The height (a) of the stack "a" is the sum of ("b" + "c" + the height of the MQW 1602 + p + -the height of the GaN 1600) and is 2 micrometers to In the range of 7 micrometers.

  Manufacturing and requirements of light emitting substrates

  17A to 17L are a plan view and a partial cross-sectional view illustrating a manufacturing process of the light emitting substrate according to one embodiment. The uLED display light emitting substrate (backplane) can be manufactured by a conventional process on a large area glass or plastic substrate of the same equipment group used for manufacturing an LCD display. The production flow of a simple passive matrix connecting uLEDs in multiple columns and multiple rows is as follows.

  1) Deposit a metal interconnected first layer on a glass or plastic substrate 1200. The metal is tungsten or Ti / Al / Ti or other low resistance metal. The first metal 1701 is patterned to form interconnects connecting the electrical interfaces in the bottom surface of the well into rows and columns. As shown in FIGS. 17A and 17B, the shape of one basic electrode is “C” or a partial ring centered on a circle.

2C) Referring to FIG. 17C and FIG. 17D, an insulating layer 1700 (silicon dioxide (SiO ₂ ), silicon nitride (Si ₃ N ₄ ) or an insulating organic film) is deposited on the first metal 1701 and the contact hole 1702 is formed. Etch and then connect with the second metal to be deposited.

3) Referring to FIGS. 17E and 17F, deposit a second layer metal 1704 interconnect that is tungsten or Ti / Al / Ti or other low resistance metal. The second metal 1704 is patterned. In addition, an insulating layer 1706 (SiO ₂ , Si ₃ N ₄ or an insulating organic film) is deposited on the second metal 1704.

  4) Referring to FIGS. 17G and 17H, the contact holes 1708 and 1710 are etched to connect with the subsequently deposited third metal.

  5) After depositing and patterning the third local interconnect metal, third metal surfaces 1712 and 1714 are formed. The third local interconnect metal may be titanium, molybdenum (Mo), gold / germanium (Au / Ge) stack, tungsten (W), matching the size and spacing of the anode and cathode electrodes on the uLED. It is patterned into such a shape. In FIG. 8B, interconnects 1712 and 1714 are shown with electrical interfaces. In this regard, these electrode layers described above are coplanar. Thereby, the electrode surface of the uLED is uniformly located on the third metal surfaces 1712 and 1714.

  6) Deposit insulating material 1202 to form a well structure to obtain uLED in a fluid assembly process. The insulating material 1202 may be spin-on glass (SOG), tetraethyl orthosilicate (TEOS) oxide or polyimide, and may be patterned by a photolithography or etching process. Regardless of the forming method, it is preferable that the well side wall forms an angle larger than 70 degrees. Also, the depth of the well should be about the same as the thickness of the uLED. Referring to FIG. 17K, the electrode at the bottom of the well is always open to make contact with the uLED.

  7) Referring to FIG. 17L, after the fluid assembly process, the uLED 300 is installed in the well.

  Surface mounted uLED fluid assembly

  The suspension of the surface-mounted uLED in liquid is deposited on the prepared substrate. The liquid is flowed over the substrate using some means of directing flow. Thereby, the flow of the uLED flows laterally on the surface of the substrate. Many possible means can be used to move the fluid, such as pumps, gravity, brushing, ultrasonic transducers, air knives or nozzles. The important point here is that the disk moves over the surface at a sufficiently high speed to provide many assembly opportunities, as well as to move the disk away from the well with little force.

  Because uLEDs have a higher density than liquids, they can settle on the surface of the substrate and be caught by open wells. When the disk has settled in the well with the posts facing down, the edge of the disk bottom surface (attached to the post) is located above the substrate surface. Also, the flow of the liquid produces a torque that tends to flip the disk from the well. If the disc settles in the well with the post facing upwards, the force of the flow will only affect the post and the disc will remain in the well.

  Performing this process with a sufficient number of disks in a sufficiently long time increases the number of times to try the assembly at each location until each well has been deposited with uLEDs that act to move the posts upwards. That is. When the assembly is finished, the unused uLEDs will leave the substrate for recycling and enter the aquarium or reservoir, allowing the remaining liquid to evaporate or be replaced by a second liquid.

  In this regard, it may be appropriate to use a visual inspection method to look for defects such as lost disks, wells blocked by particles, or disks in which the posts in the wells face down. If necessary, the defect can be eliminated by repairing a small amount of the defect using a pick and place technique. Obviously, the structure of one or more emitters per sub-pixel can be used to compensate for the structure of a single defect by redundancy, and use a laser cutting method to isolate the shorted uLED from the drive circuit. can do.

As shown in FIG. 17L, after assembly, all uLEDs are oriented such that the anode and cathode electrodes cover and contact the corresponding substrate electrodes. The substrate is then heated to a suitable temperature such that the anode and cathode electrodes interact with the substrate electrodes to form a stable mechanical and electrical connection. For In / Sn electrodes, the connection with the Ti substrate electrode may be realized at an annealing temperature of 220 ° C., and this connection is facilitated by applying a liquid flux that destroys the surface oxide. To facilitate the realization of the electrical connection, the LED electrodes made of other materials may be covered by an In / Sn solder layer, and the substrate electrodes may be coded by In / Sn solder. Alternatively, an AuGe eutectic solder electrode or an electrode coated with AuGe eutectic solder may be used. However, AuGe has a higher annealing temperature of 380 ° C. and may not be suitable for certain manufacturing processes. The flux residue is removed by washing the substrate after annealing, the contact between the electrode interface and the environment can be prevented by and deposited a passivation layer or similar layer, such as polyimide or Si ₃ N _4.

  Passive matrix array

  Referring to FIG. 15A, the above-described uLED arrays can be combined into an array to form a passive matrix array where each row and column has external drive circuitry. Accordingly, the driving method sets an appropriate driving voltage on each column electrode, and turns on the appropriate row at the same time as turning off the connection of the other rows. A signal is applied for a short period of time (eg, a few microseconds), the row electrode connection is turned off, and the process is repeated for the next row. In such a method, the illumination time for each row is the refresh time divided by the number of rows. If the refresh time is reasonably short, for example, 1/60 second, the human visual system averages everything it sees to produce a pixel consisting of all rows. However, it is clear that this method is limited to a reasonable number of rows to maintain reasonable peak intensity and power.

  Active matrix array

  Although the passive matrix array described above is very simple, it has significant drawbacks in producing high resolution displays. Because each row is addressed individually, there is a limit on the number of rows that can be cycled through the display at the actual row duty cycle and power level. Also, the high emission required for short duration of the LED shortens the life of the uLED.

  Therefore, an advantage of using an active matrix array is that the control elements are fabricated on the display substrate and independently control the emission of each sub-pixel (LED). While in some situations a low duty cycle is advantageous, this type of structure per sub-pixel allows each pixel to emit light continuously. Although there are a plurality of circuits for realizing this, the simplest configuration other than the uLED is a configuration using two transistors and one storage capacitor. As shown in FIG. 14C, based on the setting of the gate voltage established by the amount of charge stored in the storage capacitor (Cs), the output transistor 1404 (T1) determines the amount of current flowing from Vdd to Vss through the uLED. I do. Thus, the working pixel is controlled so that an appropriate voltage is set on the column line and the access gate T2 is turned on, and after waiting a short time for the constant to stabilize the voltage on Cs, the access gate is turned off. Turn off to retain the charge on Cs. Because the POMS device has a combination of high mobility and stability, the circuit can use a low-temperature polysilicon (LTPS) thin film transistor (TFT) process to fabricate the drive transistor T1 POMS device. It is possible to use similar pixels consisting of indium gallium zinc oxide (IGZO) TFTs, but IGZO has only 10-20% mobility compared to LTPS transistors of the same size. Thus, for a given pixel size, limiting the performance yield in IGZO TFTs reduces the brightness of each pixel when compared to LTPS. As is well known, a large number of drive circuits are used in displays that selectively drive light emitting elements, and many of these drive circuits use two or more thin film transistors. The display of the present invention is not limited to any particular type of drive circuit or the particular quantity of transistors in each drive circuit.

  Color generator using blue uLED

  In one embodiment, the light emitting substrate used as the backlight of the LCD is monochromatic, usually blue. However, the substrate can also be used for an RGB color generator. There are two methods for generating a color (green and red) by down-conversion of blue LED light.

  FIG. 18 is a partial cross-sectional view of a color generator using a color conversion sheet alone. Similar to the process of color filters used in LCD displays, the quantum dot color filter (QDCF) method uses quantum dots (QD) in a matrix printed on a substrate by itself. The color conversion sheet 1800 includes a diffuser 1802 installed on the blue sub-pixel 300, a red quantum dot color converter 1804 that generates red and green, respectively, a green quantum dot color converter 1806, and a red color that blocks blue light contamination. A color filter 1808 and a green color filter 1810 are provided. Each conversion element is surrounded by an absorber 1812 (black matrix) to prevent scattering of light to adjacent pixels. The color conversion sheet 1800 is aligned or adhered to the light emitting substrate (1200/1202) on the uLED emitter 300. The layer 1816 refers to an adhesive layer that attaches the light-emitting substrate 1200 to the color conversion sheet 1800.

  FIG. 19 is a partial cross-sectional view of a color generator using a phosphor deposited on a light emitting element. The phosphor may be a conventional ceramic phosphor in the micrometer range or a QD in the nanometer range. The method of quantum dot LED (QDLED) is similar to the QDCF method in which a diffuser 1802, a red QD matrix 1804, and a green QD matrix 1806 are printed directly on the uLED 300 and surrounded by a black matrix 1812. Thereafter, unnecessary blue light contamination to any red and green pixels is absorbed by the red color filter 1808 and the green color filter 1810 bonded to a single light emitting substrate on the color filter sheet 1800. Conventional phosphors are mixed to be received by a phosphor adhesive. Commercially available red and green fluorescent materials have a particle size of about 8 μm in diameter. The particles are mixed with an adhesive material suitable for the printing process. Gravure printing techniques, for example, color the pattern plate, wipe excess ink from the pattern plate, and then transfer the fluorescent ink pattern from the pattern rate to the light emitting substrate. Other printing techniques, such as silk screen printing, flexographic printing, offset printing, extrusion printing, or ink jet printing, can also be applied to this process. In one embodiment, the fluorescent ink is thermally cured on a hot plate at 140 ° C. for 8 minutes. Other processes are determined by the specific materials used for the phosphor and the adhesive.

  Using this method and two separate fluid assembly processes, it is also possible to produce a mixed display with blue, green uLEDs and red generated using blue uLEDs and a red QD color converter.

  The QDCF method has the advantage of leaving the QD material away from the LED. This has a lower temperature and a lower thermal shock to the performance and reliability of the subsequent QD. Both methods require high QD loading to achieve high efficiency of the associated thin film in color conversion. Also, these two methods have room for improvement in the resolution of ink jet printing.

  Color generator using all inorganic uLEDs

  FIG. 20A and FIG. 20B are a partial cross-sectional view and an optical intensity table of a light emitting substrate that respectively generates three different colors using three different LEDs. FIG. 20A shows cover glass 2000 bonded to substrate 1200 via adhesive layer 1816. In this way, the color generator can be realized by using three inorganic LEDs 300a, 300b and 300c that emit light at 450 nm (blue), 530 nm (green) and 630 nm (red), respectively. This means that each color provides a very narrow emission peak, as can be seen in FIG. 20B, providing optimal color gamut and image. However, there are two important obstacles to this approach. The red LED is not manufactured from GaN, but is formed by growing an AlGaInP diode on a GaAs substrate. As a result, the manufacture and recovery of LEDs applied to GaN (blue) LEDs does not apply to red uLEDs. Also, a three-emitter display requires the development of fluid assembly technology that can match the shape or size of three different LEDs. Red LEDs made from AlGaInP have different operating voltage and temperature behavior than gan LEDs, in addition to being more brittle than GaN-based devices.

  LCD backlight unit (BLU) color conversion

  21A, 21B, and 21C are diagrams respectively showing an intensity graph of a white light phosphor, a laminated color filter of the embodiment, and an associated laminated color filter intensity graph. The uLED light emitting display can be used as a local dimming backlight unit (BLU) by including a phosphor material that down-converts blue light emitted from the uLED into red and green. Therefore, BLU is a low-resolution copy of the displayed image, and improves the dynamic range by better matching the backlight output with the image. One simple version of BLU is a uniform coating of white light color conversion phosphor. Also, as shown in FIG. 21B, a higher quality version may use a red conversion phosphor 2100 printed on the LED 300, with a green conversion phosphor 2102 coated on the red conversion phosphor 2100. . Using a high quality quantum dot color converter that adjusts the optical density to allow the correct amount of blue light to pass, the spectrum of FIG. 21C is obtained. The printing process may be used to deposit QDs only on the uLEDs, and support depositing the green layer on the red layer by limiting the absorption of the green light of the red converter. I do. However, in a converter in which red and green are mixed, it is efficient to apply uniformly on the entire substrate, but the cost is high.

  Provided are a surface mount light emitting device and a method of manufacturing a display using the surface mount light emitting device. Although specific materials, sizes and circuit layout embodiments are described herein, the invention is not limited to these embodiments. Those skilled in the art will recognize other modifications and embodiments of the present invention.

REFERENCE SIGNS LIST 100 area 102 circular area 104 anode terminal contact 200 bottom connection electrode 202 substrate 204 microcavity 206 low melting point metal thin layer 208 GaN disk 210, 1606 n-GaN
212, 1600 p-GaN
214 interlayer insulating film 216 top interconnection electrode 300 surface mount light emitting device (SMLED), blue sub-pixel, uLED, uLED emitter 300a inorganic LED
300b inorganic LED
300c inorganic LED
302 Top surface 304 Bottom surface 306 First electrical contact portion 308 Second electrical contact portion 310 Post 312 Side surface 402 First semiconductor layer 404 Second semiconductor layer 406 Multiple quantum well (MQW) layer
408 Electrical insulator 600, 1300, 1304 First horizontal plane 602, 1302, 1306 Second horizontal plane 800 Light emitting display 802 Light emitting substrate 804 Top surface 806 Well 808 Bottom surface 810 Side wall 812 First electrical interface 814 Second electrical interface 816 Column conductive trace 818 Row conductive trace 820 Intersection of first plurality of columns and rows 900 LCD substrate 902 Color modifier 1000 First color modifier 1002 Second color modifier 1004 Second plurality of light diffusers 1010 Red modifier 1100 Opening 1200 Glass Or plastic layer 1202 transparent material layer 1400 drive circuit 1402 trace 1404 final output transistor 1406 DC power trace 1600 p + GaN
1602 MQW
1604 n + GaN
1700 Insulating layer 1701 First metal 1702 Contact opening 1704 Second metal 1700, 1706 Insulating layer 1708, 1710 Contact hole 1712, 1714 Third local interconnect metal 1800 Color conversion sheet 1802 Diffuser 1804 Red quantum dot color converter (red QD Matrix)
1806 Green quantum dot color converter (green QD matrix)
1808 Red color filter 1810 Green color filter 1812 Absorber (black matrix)
1816 layers (adhesive layer)
2000 Cover glass 2100 Red conversion phosphor 2102 Green conversion phosphor

Claims (26)

The top surface,
A bottom surface,
A first electrical contact formed only on the top surface,
A second electrical contact formed only on the top surface,
A post extending from the bottom surface, comprising:
The first electrical contact portion and the second electrical contact portion show different conductivity types from each other,
The height of the post is about 30% to 100% of the post diameter;
The post is used to guide the surface mounted light emitting device when assembling the surface mounted light emitting device by a fluid assembly process,
The post is located at the center of the bottom surface or is spaced apart from the bottom surface. A surface-mounted light-emitting device that is a surface-mounted light-emitting diode,
a first semiconductor layer having a dopant selected from a first group including an n-type dopant and a p-type dopant;
A second semiconductor layer having a dopant not selected for the first semiconductor layer from the first group,
The surface-mounted light emitting device according to claim 1, further comprising a multiple quantum well layer interposed between the first semiconductor layer and the second semiconductor layer.   The surface-mounted light emitting device according to claim 2, wherein the first semiconductor layer and the second semiconductor layer are made of a material selected from the group consisting of gallium nitride (GaN) and aluminum indium gallium phosphide (AlGaInP). element. The first electrical contact is configured in a ring shape,
The first semiconductor layer and the multiple quantum well layer are a ring-shaped laminate located below the first electrical contact portion,
The second electrical contact is formed in the periphery of the ring-shaped first electrical contact,
The surface-mounted light emitting device according to claim 2, wherein the second semiconductor layer has a disk shape and a central portion covers the second electrical contact portion.   The surface-mounted light emitting device further includes a groove formed between the ring-shaped first electric contact portion and the second electric contact portion, and an electric insulator filled in the groove. The surface mount type light emitting device according to claim 4, wherein The second electrical contact is formed in a ring shape,
The second semiconductor layer is disk-shaped and a periphery thereof is located below the ring-shaped second electrical contact portion,
The first electrical contact is formed in the periphery of the ring-shaped second electrical contact,
The surface-mounted light emitting device according to claim 2, wherein the first semiconductor layer and the multiple quantum well layer are a stacked body located below the first electrical contact part. The surface-mounted light emitting device further includes a groove formed between the ring-shaped second electric contact portion and the first electric contact portion, and an electric insulator filled in the groove. The surface mount type light emitting device according to claim 6, wherein   The light emitting device according to claim 1, wherein the top surface is a flat surface, and the bottom surface is a flat surface. The top surface is a two-plane having a first horizontal plane and a second horizontal plane,
The method of claim 1, wherein the first electrical contact is formed on the first horizontal surface of the top surface, and the second electrical contact is formed on the second horizontal surface of the top surface. Surface mounted light emitting device.   The surface mount type light emitting device according to claim 1, wherein the surface mount type light emitting device further comprises a plurality of posts extending from the bottom surface.   The light emitting device of claim 1, wherein the first and second electrical contacts are solder-coded. A light emitting display,
A light emitting substrate including a top surface;
A plurality of wells formed on a top surface of the light emitting substrate, wherein each well has a bottom surface, side walls, a first electrical interface formed on the bottom surface, and a second electrical interface formed on the bottom surface. Multiple wells, including interfaces
A matrix of column conductive traces and row conductive traces forming a first plurality of column and row intersections, wherein each column and row intersection is associated with a corresponding well;
Comprising a first plurality of surface-mounted light emitting elements located in the well,
The first electrical interface and the second electrical interface show different conductivity types from each other,
Each surface mount type light emitting element
A top surface covering the bottom surface of the well;
A bottom surface,
A first electrical contact formed on said top surface and connected to a first electrical interface of a corresponding well;
A second electrical contact formed on said top surface and connected to a second electrical interface of a corresponding well;
And a post extending from the bottom surface,
The first electrical contact portion and the second electrical contact portion show different conductivity types from each other,
The light emitting display, wherein the post is located at the center of the bottom surface or is spaced apart from the bottom surface. The light emitting display comprises:
A color changing structure covering the bottom surface of each surface mount light emitting element,
The light emitting display according to claim 12, further comprising: a liquid crystal display substrate covering the color changing structure . The surface mounted light emitting device is a surface mounted light emitting diode,
Each surface mounted light emitting diode
a first semiconductor layer having a dopant selected from a first group including an n-type dopant and a p-type dopant;
A second semiconductor layer having a dopant not selected for the first semiconductor layer from the first group,
The light emitting display according to claim 12, further comprising a multiple quantum well layer interposed between the first semiconductor layer and the second semiconductor layer.   The light emitting display according to claim 14, wherein the first semiconductor layer and the second semiconductor layer are made of a material selected from the group consisting of gallium nitride (GaN) and aluminum indium gallium phosphide (AlGaInP). A second plurality of first color changing structures covering the bottom surface of the corresponding second plurality of surface mount light emitting diodes,
A second plurality of second color changing structures that cover the bottom surface of the corresponding second plurality of surface mount light emitting diodes,
The number of the second plurality is less than the number of the first plurality,
The light emitting display according to claim 15, wherein a color of the second color changing structure is different from a color of the first color changing structure . 17. The light emitting display of claim 16, further comprising a second plurality of light diffusers covering the bottom surface not covered by a corresponding second plurality of surface mounted light emitting diode color changing structures . Light-emitting display. The light emitting display further comprises a second plurality of pixel areas;
Each pixel region has a surface-mounted light emitting diode covered by a first color changing structure , a surface mounted light emitting diode covered by a second color changing structure , and a surface mounted light emitting diode not covered by a color changing structure. Including
The color of the first color changing structure is green, the color of the second color changing structure is red, and the surface-mounted light emitting diodes not covered with the color changing structure emit blue light. A light emitting display according to claim 17. The light emitting display further comprises:
A second plurality of red color changing structures covering the bottom surface of the corresponding second plurality of surface mount light emitting diodes,
A third plurality of surface mount light emitting diodes not covered by a corresponding third plurality of color changing structures ;
A second plurality of pixel areas,
The number of the second plurality is less than the number of the first plurality,
The third plurality is less than the first plurality and equal to twice the second plurality;
And a surface mount-type light-emitting diode is covered by each pixel region is red color changing structure, the blue surface mounted light emitting diode which is not covered by a color change structure, green surface mounted light emitting diode which is not covered by a color change structure The light emitting display according to claim 15, comprising: The first electrical contact of each surface-mounted light emitting diode is formed in a ring shape having a first diameter, and the first semiconductor layer and the multiple quantum well layer of each surface-mounted light-emitting diode are formed by the first electrical contact. A ring-shaped laminate located below the
The second electrical contact of each surface-mounted light emitting diode is formed inside the periphery of the ring-shaped first electrical contact,
The second semiconductor layer of each surface-mounted light emitting diode is disk-shaped and the central part covers the second electrical contact,
The first electrical interface of each well is configured as a partial ring having a first diameter and having an opening in part;
The light emitting display of claim 14, wherein the second electrical interface of each well is configured such that the trace extends into a ring-shaped opening of a portion of the corresponding first electrical interface. The second electrical contact of each surface mount light emitting diode is configured in a ring shape having a first diameter,
The second semiconductor layer of each surface-mounted light-emitting diode is disk-shaped and its periphery covers the ring-shaped second electrical contact,
The first electrical contact of each surface-mounted light emitting diode is formed inside the periphery of the ring-shaped second electrical contact,
The first semiconductor layer and the multiple quantum well layer of each surface-mounted light emitting diode are a laminate covering the first electrical contact,
The first electrical interface of each well is configured as a partial ring having a first diameter and having an opening in part;
The light emitting display of claim 14, wherein the second electrical interface of each well is configured such that the trace extends into a ring-shaped opening of a portion of the corresponding first electrical interface. The top surface of each light emitting element is a horizontal plane,
The light emitting display according to claim 12, wherein the bottom surface of each light emitting element is a horizontal plane. The top surface of the surface-mounted light emitting device is a two-plane having a first horizontal plane and a second horizontal plane,
The first electrical contact of the surface mounted light emitting device is formed on the first horizontal surface of the top surface,
The second electrical contact of the surface-mounted light emitting device is formed on the second horizontal surface of the top surface,
The bottom surface of each well is two planes having a first horizontal plane and a second horizontal plane,
A first electrical interface of each well is formed on the first horizontal surface of the bottom surface;
The light emitting display of claim 12, wherein a second electrical interface of each well is formed on the second horizontal surface of the bottom surface. The light emitting display further includes a first plurality of active matrix drive circuits and a network of reference voltage traces connected to the second electrical interface of each well;
The light emitting display of claim 12, wherein each drive circuit is connected to a first electrical interface connected to a corresponding column and row intersection and to a corresponding well.   The matrix of column conductive traces and row conductive traces forms a passive matrix, and the row traces at each column and row intersection are connected to the first electrical interface corresponding to each well, and each column and row intersection is The light emitting display of claim 12, wherein a column trace is connected to said second electrical interface corresponding to each well.   The light emitting display further includes a solder coating applied to an element, the element including the first and second electrical contacts of the surface mounted light emitting element, the first electrical interface of the well, and the The first electric interface and the second electric interface of the well and the first electric interface and the second electric interface of the surface-mounted light-emitting device. The light-emitting display according to claim 12, wherein:

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