JP2018026570A - 電流生成が向上した半導体デバイス - Google Patents
電流生成が向上した半導体デバイス Download PDFInfo
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Abstract
【解決手段】デバイスは、電荷キャリアの光生成が行なわれて有用な電流を収集できる波長の範囲を増大させる低バンドギャップ吸収領域を含む。低バンドギャップ吸収領域は歪み補償領域によって歪みが釣り合わされてもよく、また、低バンドギャップ吸収領域および歪み補償領域が同じ三元半導体族から形成されてもよい。デバイスは、変成ベース層または格子不整合ベース層を有する太陽電池、サブセル、または他の光電子デバイスであってよく、この場合、低バンドギャップ吸収領域は、太陽光スペクトルの高効率変換のために、多接合セル内の効果的なサブセルのバンドギャップ組み合わせおよび電流バランスを向上させる。
【選択図】図1
Description
1.GaAsの格子定数とInAsの格子定数との間の格子定数の低−%−In GaInAsバリアおよび高−%−In GaInAsウェル;
2.InP格子定数の低−%−In GaInAsバリアおよび高−%−InGaInAsウェル;
3.GaPの格子定数とGaAsの格子定数との間の格子定数の低−%−In GaInPバリアおよび高−%−In GaInPウェル;
4.GaAsの格子定数とInPの格子定数との間の格子定数の低−%−In GaInPバリアおよび高−%−In GaInPウェル;
5.GaAsの格子定数とInAsの格子定数との間の格子定数のGa(In)(P)AsバリアおよびGa(In)NAs(Sb)ウェル;
6.InP格子定数のGa(In)(P)AsバリアおよびGa(In)NAs(Sb)ウェル。
1.GaPの格子定数とInPの格子定数との間の格子定数の無秩序化されたGaInPバリアおよび秩序化されたGaInPウェル;
2.GaPの格子定数とInPの格子定数との間の格子定数の高−Al−% AlGa(In)Pバリアおよび低−Al−% AlGa(In)Pウェル;
3.GaAsの格子定数とInAsの格子定数との間の格子定数の高−Al−% AlGa(In)Asバリアおよび低−Al−% AlGa(In)Asウェル;
4.GaAsの格子定数とInAsの格子定数との間の格子定数の高−P−% GaInPAsバリアおよび低−P−% GaInPAsウェル;
5.GaAsの格子定数とInAsの格子定数との間の格子定数のGa(In)(P)AsバリアおよびGa(In)NAs(Sb)ウェル。
1.GaAsの格子定数とInAsの格子定数との間の格子定数の低−%−In GaInAsバリアおよび高−%−In GaInAsウェル;
2.GaAsの格子定数とGaSbの格子定数との間の格子定数の低−%−Sb GaAsSbバリアおよび高−%−Sb GaAsSbウェル;
3.GaPの格子定数とGaAsの格子定数との間の格子定数の高−%−P GaPAsバリアおよび低−%−P GaPAsウェル;
4.GaPの格子定数とGaAsの格子定数との間の格子定数の低−%−In GaInPバリアおよび高−%−In GaInPウェル;
5.GaAsの格子定数とInPの格子定数との間の格子定数の低−%−In GaInPバリアおよび高−%−In GaInPウェル;
6.GaAsの格子定数とInAsの格子定数との間の格子定数の低−%−N(または、ゼロ−N)GaInNAs(Sb)バリアおよび高−%−N GaInNAs(Sb)ウェル。
1.GaPの格子定数とInPの格子定数との間の格子定数の無秩序化されたGaInPバリアおよび秩序化されたGaInPウェル;
2.GaPの格子定数とInPの格子定数との間の格子定数の高−Al−% AlGa(In)Pバリアおよび低−Al−% AlGa(In)Pウェル;
3.GaAsの格子定数とInAsの格子定数との間の格子定数の高−Al−% AlGa(In)Asバリアおよび低−Al−% AlGa(In)Asウェル;
4.GaPの格子定数とInAsの格子定数との間の格子定数の高−P−% GaInPAsバリアおよび低−P−% GaInPAsウェル;
5.GaAsの格子定数とInAsの格子定数との間の格子定数の低−%−N(または、ゼロ−N)GaInNAs(Sb)バリアおよび高−%−N GaInNAs(Sb)ウェル。
3J−L:格子整合型3接合太陽電池、LBARまたはブラッグ反射器が無い
3J−LW:格子整合型3接合太陽電池、LBARおよびブラッグ反射器を伴う
3J−M:変成3接合太陽電池、LBARまたはブラッグ反射器が無い
3J−MW:変成3接合太陽電池、LBARおよびブラッグ反射器を伴う
また、AM1.5 Direct、ASTM G173−03太陽光スペクトル、すなわち、集光型光起電(CPV)太陽電池を評価して特徴付けるために使用される標準的な太陽光スペクトルにおける光子束に対応する単位波長当たりの電流密度は、1000ワット/cm2の強度に正規化されて、セルの測定された外部量子効率(EQE)と比較するために波長の関数として図中にプロットされる。更に、1000ワット/cm2全強度に正規化される、標準的なAM1.5 DirectASTM G173−03太陽光スペクトルに対応する単位波長当たりの強度も、比較のために波長の関数として図中にプロットされる。
Claims (36)
- ベース層と、
前記ベース層と電気的に接続するエミッタ層であって、前記エミッタ層と共に光起電力セルまたは他の光電子デバイスのp−n接合を形成するエミッタ層と、
前記ベース層および前記エミッタ層のうちの一方または両方に配置される低バンドギャップ吸収領域と
を備える半導体デバイス。 - 前記低バンドギャップ吸収領域が、前記光起電力セルまたは前記光電子デバイスの前記p−n接合の片側の空間電荷領域に組み込まれている、請求項1に記載の半導体デバイス。
- 前記低バンドギャップ吸収領域が、前記光起電力セルまたは前記光電子デバイスの前記p−n接合の片側の準中性領域に組み込まれている、請求項1に記載の半導体デバイス。
- 前記低バンドギャップ吸収領域が、前記光起電力セルまたは前記光電子デバイスの前記p−n接合の片側の空間電荷領域および準中性領域に組み込まれている、請求項1に記載の半導体デバイス。
- 前記低バンドギャップ吸収領域が、前記光起電力セルまたは前記光電子デバイスの前記p−n接合の両側の空間電荷領域に組み込まれている、請求項1に記載の半導体デバイス。
- 前記低バンドギャップ吸収領域が、前記光起電力セルまたは前記光電子デバイスの前記p−n接合の両側の空間電荷領域および準中性領域に組み込まれている、請求項1に記載の半導体デバイス。
- 前記低バンドギャップ吸収領域が前記ベース層の空間電荷領域に組み込まれている、請求項1に記載の半導体デバイス。
- 前記低バンドギャップ吸収領域が前記エミッタ層の空間電荷領域に組み込まれている、請求項1に記載の半導体デバイス。
- 前記低バンドギャップ吸収領域が前記ベースの準中性領域に組み込まれている、請求項1に記載の半導体デバイス。
- 前記低バンドギャップ吸収領域が前記エミッタ層の準中性領域に組み込まれている、請求項1に記載の半導体デバイス。
- 前記低バンドギャップ吸収領域が前記ベース層の空間電荷領域および準中性領域に組み込まれている、請求項1に記載の半導体デバイス。
- 前記低バンドギャップ吸収領域が前記エミッタ層の空間電荷領域および準中性領域に組み込まれている、請求項1に記載の半導体デバイス。
- 前記低バンドギャップ吸収領域が2次元である、請求項1に記載の半導体デバイス。
- 前記低バンドギャップ吸収領域が1次元である、請求項1に記載の半導体デバイス。
- 前記低バンドギャップ吸収領域が0次元である、請求項1に記載の半導体デバイス。
- 前記低バンドギャップ吸収領域が1つ以上の低バンドギャップ吸収領域を含んでいる、請求項1に記載の半導体デバイス。
- 前記光起電力セルが1つ以上の小格子定数歪み補償領域を更に含んでいる、請求項16に記載の半導体デバイス。
- 格子不整合形態を有している、請求項1ないし請求項17のいずれか1項に記載の半導体デバイス。
- 変成形態を有している、請求項1ないし請求項17のいずれか1項に記載の半導体デバイス。
- 前記光起電力セルが多接合デバイスのサブセルである、請求項1ないし請求項19のいずれか1項に記載の半導体デバイス。
- 1つ以上の裏面電界層を更に備えている、請求項1ないし請求項20のいずれか1項に記載の半導体デバイス。
- 前記ベースがp型変成GaInAsベースである、請求項1ないし請求項21のいずれか1項に記載の半導体デバイス。
- 前記エミッタがn型GaInAsエミッタである、請求項1ないし請求項22のいずれか1項に記載の半導体デバイス。
- 1つ以上の前記低バンドギャップ吸収領域が前記ベースまたは前記エミッタよりも低いバンドギャップを有している、請求項1ないし請求項23のいずれか1項に記載の半導体デバイス。
- 1つ以上の前記低バンドギャップ吸収領域および1つ以上の前記小格子定数歪み補償領域が前記ベースまたは前記エミッタよりも低いバンドギャップを有している、請求項1ないし請求項23のいずれか1項に記載の半導体デバイス。
- 前記ベースが秩序化されている、請求項1ないし請求項25のいずれか1項に記載の半導体デバイス。
- 前記ベースが無秩序化されている、請求項1ないし請求項25のいずれか1項に記載の半導体デバイス。
- 前記ベースには秩序化および無秩序化の両方がなされている、請求項1ないし請求項25のいずれか1項に記載の半導体デバイス。
- 前記光起電力セルが3接合デバイスの中央サブセルである、請求項1に記載の半導体デバイス。
- 前記光起電力セルが多接合デバイスの上端サブセルである、請求項1に記載の半導体デバイス。
- 前記光起電力セルが多接合デバイスの下端サブセルである、請求項1に記載の半導体デバイス。
- 前記光起電力セルは、上端サブセルと下端サブセルとの間に位置づけられる多接合デバイスのサブセルである、請求項1に記載の半導体デバイス。
- 基板を更に含み、1つ以上の更なるセルが、前記基板の前記ベース層とは反対側で成長される、請求項1ないし請求項32のいずれか1項に記載の半導体デバイス。
- 前記セルが逆成長される、請求項1ないし請求項33のいずれか1項に記載の半導体デバイス。
- 請求項1ないし請求項34のいずれか1項に記載の格子不整合半導体デバイスまたは変成半導体デバイスを形成する方法であって、
半導体デバイスのベース、エミッタ、またはベースおよびエミッタに1つ以上の低バンドギャップ吸収領域を形成することを含む方法。 - 前記1つ以上の低バンドギャップ吸収領域に隣接する1つ以上の小格子定数歪み補償領域を形成することを更に含む請求項35に記載の方法。
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JP2009026887A (ja) * | 2007-07-18 | 2009-02-05 | Omron Corp | 太陽電池 |
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JP2021524225A (ja) * | 2018-06-28 | 2021-09-09 | エアバス・ディフェンス・アンド・スペース・エスアーエス | 衛星の太陽光発電機を試験するための装置 |
US11183970B2 (en) | 2018-06-28 | 2021-11-23 | Airbus Defence And Space Sas | Device for testing a satellite solar array |
JP7090752B2 (ja) | 2018-06-28 | 2022-06-24 | エアバス・ディフェンス・アンド・スペース・エスアーエス | 衛星の太陽光発電機を試験するための装置 |
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JP6650916B2 (ja) | 2020-02-19 |
EP3444848A1 (en) | 2019-02-20 |
TW201246586A (en) | 2012-11-16 |
JP2014514746A (ja) | 2014-06-19 |
EP2689465A1 (en) | 2014-01-29 |
WO2012128848A1 (en) | 2012-09-27 |
JP6259393B2 (ja) | 2018-01-10 |
EP2689465B1 (en) | 2022-07-20 |
TWI666785B (zh) | 2019-07-21 |
US20120240987A1 (en) | 2012-09-27 |
US10170652B2 (en) | 2019-01-01 |
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