JP2017539082A - ウェハ接合用の低温接着性樹脂 - Google Patents
ウェハ接合用の低温接着性樹脂 Download PDFInfo
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- JP2017539082A JP2017539082A JP2017522935A JP2017522935A JP2017539082A JP 2017539082 A JP2017539082 A JP 2017539082A JP 2017522935 A JP2017522935 A JP 2017522935A JP 2017522935 A JP2017522935 A JP 2017522935A JP 2017539082 A JP2017539082 A JP 2017539082A
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- Prior art keywords
- wafer
- adhesive
- phenoxy resin
- device wafer
- handling
- Prior art date
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Classifications
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76898—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
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- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
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-
- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68381—Details of chemical or physical process used for separating the auxiliary support from a device or wafer
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- Condensed Matter Physics & Semiconductors (AREA)
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Abstract
Description
10:半導体デバイス
11:ゲート構造体
12:ゲート誘電体
13:ゲート導電体
14:ゲート側壁スペーサ
15:デバイスウェハの前面
16:ソース領域
17:ドレイン領域
18:絶縁領域
20:接着剤層
25:ハンドリングウェハ
26:デバイスウェハの背面
30:ビア相互接続
Claims (18)
- フェノキシ樹脂を含む接着剤でハンドリングウェハをデバイスウェハの前面に接合することと、
前記デバイスウェハが前記ハンドリングウェハに接着係合している状態で前記デバイスウェハの背面から前記デバイスウェハを薄化することと、
前記フェノキシを含む接着剤をレーザ剥離によって除去することであって、ここで前記デバイスウェハが前記ハンドリングウェハから分離される、除去することと、
を含む、半導体デバイスを形成するための方法。 - 前記ハンドリングウェハは、ガラスを含む、請求項1に記載の方法。
- 前記ハンドリングウェハを前記デバイスウェハに接合する前に、少なくとも1つの半導体デバイスを前記デバイスウェハの前記前面上に形成することをさらに含む、前記請求項のいずれかに記載の方法。
- 前記ハンドリングウェハを前記デバイスウェハに接合することが、
前記デバイスの前記前面にスピンオン堆積によって前記フェノキシ樹脂の接着剤層を塗工することと、
前記接着剤層を前記ハンドリングウェハに接触させることと、
前記接着剤層を300℃未満の温度で硬化することと、
を含む、前記請求項のいずれかに記載の方法。 - 前記フェノキシ樹脂は、ポリオキシ(2−ヒドロジ−1,3−プロパンジイル)オキシ−1,4−フェニレン(1−メチルエチリデン)−1,4−フェニレンを含む、前記請求項のいずれかに記載の方法。
- 前記フェノキシ樹脂は、160℃から210℃までの範囲の温度において、且つ前記デバイスウェハ及びハンドリングウェハの少なくとも一方に対して8インチウェハサイズの面積当たり少なくとも1000mbarの圧力下で、100〜10,000Pa・秒の範囲の粘度を有する、前記請求項のいずれかに記載の方法。
- 前記デバイスウェハを薄化することが、平坦化又は化学機械研磨を含む、前記請求項のいずれかに記載の方法。
- 前記フェノキシ樹脂は、43,000から57,000までの範囲の分子量を有する、前記請求項のいずれかに記載の方法。
- 前記デバイスウェハの背面を貫く、少なくとも1つの半導体デバイスに対する相互接続を形成することをさらに含む、請求項3に記載の方法。
- 前記レーザ剥離は、エキシマレーザを含む、前記請求項のいずれかに記載の方法。
- フェノキシ樹脂を含む接着剤でハンドリングウェハをデバイスウェハの前面に接合することであって、前記接着剤は、300℃未満の温度で硬化され、硬化したフェノキシ樹脂は、1×105Pa・秒より高い粘度を有することができる、接合することと、
前記デバイスウェハが前記ハンドリングウェハに接着係合している状態で前記デバイスウェハの背面から前記デバイスウェハを薄化することと、
前記フェノキシ樹脂を含む接着剤を除去することであって、ここで前記デバイスウェハが前記ハンドリングウェハから分離される、除去することと、
を含む、半導体デバイスを形成するための方法。 - 前記ハンドリングウェハは、ガラスを含む、請求項11に記載の方法。
- 前記ハンドリングウェハを前記デバイスウェハに接合する前に、少なくとも1つの半導体デバイスを前記デバイスウェハの前記前面上に形成することをさらに含む、請求項11又は請求項12のいずれかに記載の方法。
- 前記フェノキシ樹脂は、ポリオキシ(2−ヒドロジ−1,3−プロパンジイル)オキシ−1,4−フェニレン(1−メチルエチリデン)−1,4−フェニレンを含む、請求項11から請求項13までのいずれかに記載の方法。
- 前記接着剤を除去することは、レーザ剥離を含む、請求項11から請求項14までのいずれかに記載の方法。
- フェノキシ樹脂を含む接着剤で第1の半導体基板を第2の半導体基板に接合することを含み、前記接着剤は、300℃未満の温度で硬化され、150℃から250℃までの範囲の温度において100から10,000Pa・秒の範囲の粘度を有する、
接着剤接合の方法。 - 前記フェノキシ樹脂は、ポリオキシ(2−ヒドロジ−1,3−プロパンジイル)オキシ−1,4−フェニレン(1−メチルエチリデン)−1,4−フェニレンを含む、請求項16に記載の方法。
- 前記フェノキシ樹脂は、43,000から57,000までの範囲の分子量を有する、請求項16又は請求項17のいずれかに記載の方法。
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