JP2017519418A5 - - Google Patents

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Publication number
JP2017519418A5
JP2017519418A5 JP2016567410A JP2016567410A JP2017519418A5 JP 2017519418 A5 JP2017519418 A5 JP 2017519418A5 JP 2016567410 A JP2016567410 A JP 2016567410A JP 2016567410 A JP2016567410 A JP 2016567410A JP 2017519418 A5 JP2017519418 A5 JP 2017519418A5
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JP
Japan
Prior art keywords
wires
wire
current
current flow
voltage sources
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2016567410A
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English (en)
Japanese (ja)
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JP2017519418A (ja
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Publication date
Priority claimed from US14/278,682 external-priority patent/US9710412B2/en
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Publication of JP2017519418A publication Critical patent/JP2017519418A/ja
Publication of JP2017519418A5 publication Critical patent/JP2017519418A5/ja
Pending legal-status Critical Current

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JP2016567410A 2014-05-15 2015-05-11 N階乗電圧モードドライバ Pending JP2017519418A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US14/278,682 2014-05-15
US14/278,682 US9710412B2 (en) 2014-05-15 2014-05-15 N-factorial voltage mode driver
PCT/US2015/030227 WO2015175439A1 (en) 2014-05-15 2015-05-11 N-factorial voltage mode driver

Publications (2)

Publication Number Publication Date
JP2017519418A JP2017519418A (ja) 2017-07-13
JP2017519418A5 true JP2017519418A5 (cg-RX-API-DMAC7.html) 2018-06-14

Family

ID=53277048

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2016567410A Pending JP2017519418A (ja) 2014-05-15 2015-05-11 N階乗電圧モードドライバ

Country Status (6)

Country Link
US (1) US9710412B2 (cg-RX-API-DMAC7.html)
EP (1) EP3143740A1 (cg-RX-API-DMAC7.html)
JP (1) JP2017519418A (cg-RX-API-DMAC7.html)
KR (1) KR20170005102A (cg-RX-API-DMAC7.html)
CN (1) CN106462527B (cg-RX-API-DMAC7.html)
WO (1) WO2015175439A1 (cg-RX-API-DMAC7.html)

Families Citing this family (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9288089B2 (en) 2010-04-30 2016-03-15 Ecole Polytechnique Federale De Lausanne (Epfl) Orthogonal differential vector signaling
US9251873B1 (en) 2010-05-20 2016-02-02 Kandou Labs, S.A. Methods and systems for pin-efficient memory controller interface using vector signaling codes for chip-to-chip communications
CN105379170B (zh) 2013-04-16 2019-06-21 康杜实验室公司 高带宽通信接口方法和系统
KR102299815B1 (ko) 2014-02-02 2021-09-10 칸도우 랩스 에스에이 제한된 isi 비율을 갖는 저전력 칩 대 칩 통신을 위한 방법 및 장치
US9363114B2 (en) 2014-02-28 2016-06-07 Kandou Labs, S.A. Clock-embedded vector signaling codes
US9509437B2 (en) 2014-05-13 2016-11-29 Kandou Labs, S.A. Vector signaling code with improved noise margin
US11240076B2 (en) 2014-05-13 2022-02-01 Kandou Labs, S.A. Vector signaling code with improved noise margin
US9112550B1 (en) 2014-06-25 2015-08-18 Kandou Labs, SA Multilevel driver for high speed chip-to-chip communications
KR102288337B1 (ko) 2014-07-10 2021-08-11 칸도우 랩스 에스에이 증가한 신호대잡음 특징을 갖는 벡터 시그널링 코드
US9432082B2 (en) 2014-07-17 2016-08-30 Kandou Labs, S.A. Bus reversable orthogonal differential vector signaling codes
CN106576087B (zh) 2014-08-01 2019-04-12 康杜实验室公司 带内嵌时钟的正交差分向量信令码
KR101978470B1 (ko) 2015-06-26 2019-05-14 칸도우 랩스 에스에이 고속 통신 시스템
US10055372B2 (en) 2015-11-25 2018-08-21 Kandou Labs, S.A. Orthogonal differential vector signaling codes with embedded clock
WO2017190102A1 (en) * 2016-04-28 2017-11-02 Kandou Labs, S.A. Low power multilevel driver
EP3610576B1 (en) 2017-04-14 2022-12-28 Kandou Labs, S.A. Pipelined forward error correction for vector signaling code channel
CN115333530A (zh) 2017-05-22 2022-11-11 康杜实验室公司 多模式数据驱动型时钟恢复方法和装置
US10116468B1 (en) 2017-06-28 2018-10-30 Kandou Labs, S.A. Low power chip-to-chip bidirectional communications
US10693587B2 (en) 2017-07-10 2020-06-23 Kandou Labs, S.A. Multi-wire permuted forward error correction
KR102349415B1 (ko) * 2017-08-07 2022-01-11 삼성전자주식회사 펄스 진폭 변조 송신기 및 펄스 진폭 변조 수신기
US10496583B2 (en) 2017-09-07 2019-12-03 Kandou Labs, S.A. Low power multilevel driver for generating wire signals according to summations of a plurality of weighted analog signal components having wire-specific sub-channel weights
US10467177B2 (en) 2017-12-08 2019-11-05 Kandou Labs, S.A. High speed memory interface
KR102498475B1 (ko) 2017-12-28 2023-02-09 칸도우 랩스 에스에이 동기식으로 스위칭된 다중 입력 복조 비교기
US10554450B2 (en) * 2018-03-14 2020-02-04 Samsung Display Co., Ltd. High resolution voltage-mode driver
US12063034B2 (en) 2022-08-30 2024-08-13 Kandou Labs SA Line driver impedance calibration for multi-wire data bus
WO2024049482A1 (en) 2022-08-30 2024-03-07 Kandou Labs SA Pre-scaler for orthogonal differential vector signalling

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3360861B2 (ja) * 1993-03-02 2003-01-07 株式会社ソニー木原研究所 シリアルディジタルデータの伝送方法及び伝送装置
US6005895A (en) * 1996-12-20 1999-12-21 Rambus Inc. Apparatus and method for multilevel signaling
US6556628B1 (en) * 1999-04-29 2003-04-29 The University Of North Carolina At Chapel Hill Methods and systems for transmitting and receiving differential signals over a plurality of conductors
US6452420B1 (en) * 2001-05-24 2002-09-17 National Semiconductor Corporation Multi-dimensional differential signaling (MDDS)
US7167527B1 (en) * 2002-05-02 2007-01-23 Integrated Memory Logic, Inc. System and method for multi-symbol interfacing
US7358869B1 (en) 2003-08-20 2008-04-15 University Of Pittsburgh Power efficient, high bandwidth communication using multi-signal-differential channels
JP2005086662A (ja) * 2003-09-10 2005-03-31 Seiko Epson Corp 半導体装置
US7227382B1 (en) 2005-02-01 2007-06-05 Advanced Micro Devices, Inc. Transmit based equalization using a voltage mode driver
US7567616B2 (en) * 2005-02-17 2009-07-28 Realtek Semiconductor Corp. Feedback equalizer for a communications receiver
US8222917B2 (en) * 2005-11-03 2012-07-17 Agate Logic, Inc. Impedance matching and trimming apparatuses and methods using programmable resistance devices
US7746937B2 (en) * 2006-04-14 2010-06-29 Formfactor, Inc. Efficient wired interface for differential signals
CN101356787B (zh) * 2006-04-27 2011-11-16 松下电器产业株式会社 多路复用差动传送系统
WO2008151251A1 (en) * 2007-06-05 2008-12-11 Rambus, Inc. Techniques for multi-wire encoding with an embedded clock
WO2009046014A2 (en) * 2007-10-01 2009-04-09 Rambus Inc. Simplified receiver for use in multi-wire communication
US8848810B2 (en) * 2008-03-05 2014-09-30 Qualcomm Incorporated Multiple transmitter system and method
US7710144B2 (en) * 2008-07-01 2010-05-04 International Business Machines Corporation Controlling for variable impedance and voltage in a memory system
EP2412136B1 (en) 2009-03-27 2017-03-01 Rambus Inc. Voltage mode transmitter equalizer
US20110133773A1 (en) 2009-12-04 2011-06-09 Uniram Technology Inc. High Performance Output Drivers and Anti-Reflection Circuits
ES2909145T3 (es) 2010-02-02 2022-05-05 Nokia Technologies Oy Generación de señales diferenciales
US8208578B2 (en) * 2010-06-21 2012-06-26 North Carolina State University Systems, methods, and computer readable media for fractional pre-emphasis of multi-mode interconnect
US9071220B2 (en) * 2013-03-07 2015-06-30 Qualcomm Incorporated Efficient N-factorial differential signaling termination network

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