JP2017516353A - 集積回路間(i2c)バス上でインバンドで追加情報を送信するための方法 - Google Patents

集積回路間(i2c)バス上でインバンドで追加情報を送信するための方法 Download PDF

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JP2017516353A
JP2017516353A JP2016559318A JP2016559318A JP2017516353A JP 2017516353 A JP2017516353 A JP 2017516353A JP 2016559318 A JP2016559318 A JP 2016559318A JP 2016559318 A JP2016559318 A JP 2016559318A JP 2017516353 A JP2017516353 A JP 2017516353A
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bus
signal
secondary data
data
scl
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JP2017516353A5 (enExample
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祥一郎 仙石
祥一郎 仙石
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クアルコム,インコーポレイテッド
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    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • G06F13/4291Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus using a clocked protocol
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/36Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/362Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control
    • G06F13/364Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control using independent requests or grants, e.g. using separated request and grant lines
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/64Hybrid switching systems
    • H04L12/6418Hybrid transport
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Dc Digital Transmission (AREA)
  • Information Transfer Systems (AREA)
JP2016559318A 2014-04-02 2015-04-01 集積回路間(i2c)バス上でインバンドで追加情報を送信するための方法 Pending JP2017516353A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US14/243,459 US9710423B2 (en) 2014-04-02 2014-04-02 Methods to send extra information in-band on inter-integrated circuit (I2C) bus
US14/243,459 2014-04-02
PCT/US2015/023898 WO2015153773A1 (en) 2014-04-02 2015-04-01 Methods to send extra information in-band on inter-integrated circuit (i2c) bus

Publications (2)

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JP2017516353A true JP2017516353A (ja) 2017-06-15
JP2017516353A5 JP2017516353A5 (enExample) 2018-04-26

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JP2016559318A Pending JP2017516353A (ja) 2014-04-02 2015-04-01 集積回路間(i2c)バス上でインバンドで追加情報を送信するための方法

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US (3) US9710423B2 (enExample)
EP (2) EP3333717A1 (enExample)
JP (1) JP2017516353A (enExample)
KR (1) KR20160140847A (enExample)
CN (1) CN106170781A (enExample)
WO (1) WO2015153773A1 (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2019012335A (ja) * 2017-06-29 2019-01-24 矢崎総業株式会社 情報設定装置及び電子機器
WO2022163246A1 (ja) * 2021-01-29 2022-08-04 ソニーセミコンダクタソリューションズ株式会社 送信装置および通信システム

Families Citing this family (34)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2015126983A1 (en) * 2014-02-18 2015-08-27 Qualcomm Incorporated Technique to avoid metastability condition and avoid unintentional state changes of legacy i2c devices on a multi-mode bus
US9710423B2 (en) 2014-04-02 2017-07-18 Qualcomm Incorporated Methods to send extra information in-band on inter-integrated circuit (I2C) bus
CA2957265C (en) * 2014-08-15 2022-05-17 Vtech Electronics, Ltd. Electronic toy with radial independent connector and associated communication protocol
US9397871B2 (en) 2014-09-30 2016-07-19 Infineon Technologies Ag Communication devices
US9665528B2 (en) 2014-11-20 2017-05-30 International Business Machines Corporation Bus serialization for devices without multi-device support
GB2537856A (en) * 2015-04-28 2016-11-02 Nordic Semiconductor Asa Communication between intergrated circuits
US9628255B1 (en) * 2015-12-18 2017-04-18 Integrated Device Technology, Inc. Methods and apparatus for transmitting data over a clock signal
US9479182B1 (en) 2015-07-02 2016-10-25 Integrated Device Technology, Inc. Methods and apparatus for synchronizing operations using separate asynchronous signals
US20170104607A1 (en) * 2015-10-13 2017-04-13 Qualcomm Incorporated Methods to avoid i2c void message in i3c
US10229086B2 (en) * 2015-12-26 2019-03-12 Intel Corporation Technologies for automatic timing calibration in an inter-integrated circuit data bus
US10872055B2 (en) * 2016-08-02 2020-12-22 Qualcomm Incorporated Triple-data-rate technique for a synchronous link
CN106937070B (zh) * 2017-03-10 2020-03-10 成都振芯科技股份有限公司 一种fpd-link低电压差分信号视频传输中的双向控制方法
CN107239430A (zh) * 2017-06-05 2017-10-10 上海爱信诺航芯电子科技有限公司 通信方法、装置及系统
US10372663B2 (en) * 2017-07-25 2019-08-06 Qualcomm Incorporated Short address mode for communicating waveform
US10423551B2 (en) 2017-09-07 2019-09-24 Qualcomm Incorporated Ultra-short RFFE datagrams for latency sensitive radio frequency front-end
US10545886B2 (en) 2017-12-05 2020-01-28 Qualcomm Incorporated Clock line driving for single-cycle data over clock signaling and pre-emption request in a multi-drop bus
US20190171611A1 (en) * 2017-12-05 2019-06-06 Qualcomm Incorporated Protocol-framed clock line driving for device communication over master-originated clock line
US11126218B2 (en) * 2018-07-25 2021-09-21 Integrated Device Technology, Inc. Fast protection switching in distributed systems
US11119966B2 (en) * 2018-09-07 2021-09-14 Qualcomm Incorporated Mixed-mode radio frequency front-end interface
US20200097434A1 (en) * 2018-09-26 2020-03-26 Qualcomm Incorporated Enhanced high data rate technique for i3c
US11188493B2 (en) * 2019-01-18 2021-11-30 Tektronix, Inc. Bus decode and triggering on digital down converted data in a test and measurement instrument
FR3093198B1 (fr) * 2019-02-22 2021-02-12 St Microelectronics Grenoble 2 Transmission de données liées sur bus I2C
CN113906402B (zh) 2019-05-31 2023-10-27 ams国际有限公司 集成电路间(i2c)装置
BR112023004807A2 (pt) * 2020-09-17 2023-04-18 Huawei Tech Co Ltd Método e aparelho de comunicação baseada em circuito inter-integrado
US11567882B2 (en) * 2020-11-03 2023-01-31 Himax Imaging Limited Method and apparatus for delivering multiple commands through virtual burst-mode transmission and initialization of image sensor
KR20220098947A (ko) * 2021-01-05 2022-07-12 삼성전자주식회사 반도체 장치 및 이를 포함하는 전자 장치
CN113114550B (zh) * 2021-04-07 2022-06-21 中国科学院苏州生物医学工程技术研究所 一种i2c通信控制方法、设备及存储介质
US11927546B2 (en) * 2021-04-30 2024-03-12 Baker Hughes Holdings Llc Systems and methods for operating non-destructive testing devices
CN113992470B (zh) * 2021-10-14 2023-06-16 上海艾为电子技术股份有限公司 数据发送方法和接收方法、主设备、从设备及电子设备
KR102454640B1 (ko) 2022-01-04 2022-10-14 (주)파인디어칩 적응형 uart 시리얼 인터페이스를 구비한 집적회로
KR102468986B1 (ko) * 2022-01-04 2022-11-22 (주)파인디어칩 노이즈 환경 내 데이터 통신 안정성을 구비한 집적회로
US11948486B2 (en) 2022-01-04 2024-04-02 FINDEACHIP Inc. Integrated circuit having universal asynchronous receiver/transmitter for data communication stability in noise environment
US12373357B2 (en) * 2023-09-27 2025-07-29 Advanced Micro Devices, Inc. Systems and methods for data communication bus address sharing
CN117215983B (zh) * 2023-11-09 2024-03-22 辉芒微电子(深圳)股份有限公司 I2c接口规避错误起始和停止条件的电路结构及方法

Citations (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5341131A (en) * 1991-03-29 1994-08-23 Hitachi, Ltd. Communications system and a system control method
US5559502A (en) * 1993-01-14 1996-09-24 Schutte; Herman Two-wire bus system comprising a clock wire and a data wire for interconnecting a number of stations and allowing both long-format and short-format slave addresses
JPH08316973A (ja) * 1995-05-23 1996-11-29 Hitachi Ltd 通信処理手段
JP2002535882A (ja) * 1999-01-15 2002-10-22 テレフオンアクチーボラゲツト エル エム エリクソン(パブル) インターフェースの選択的交互使用
JP2005514815A (ja) * 2001-12-19 2005-05-19 トムソン ライセンシング ソシエテ アノニム メモリを保護する装置および方法
JP2007325156A (ja) * 2006-06-05 2007-12-13 Seiko Epson Corp 受信装置および送受信システム
US20100325325A1 (en) * 2003-04-11 2010-12-23 Fernald Kenneth W Integrated Multi-Function Point-Of-Load Regulator Circuit
US20110255560A1 (en) * 2008-12-17 2011-10-20 Stmicroelectronics (Rousset) Sas Transmission over an 12c bus
WO2012114672A1 (ja) * 2011-02-23 2012-08-30 パナソニック株式会社 信号伝送装置
JP2012199830A (ja) * 2011-03-22 2012-10-18 Fujitsu Component Ltd 信号伝送システム、信号伝送方法、送信機及び受信機
JP2013538026A (ja) * 2010-09-24 2013-10-07 ローベルト ボッシュ ゲゼルシャフト ミット ベシュレンクテル ハフツング バスシステムの加入者局間の最適化されたデータ伝送のための方法及び加入者局

Family Cites Families (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6078192A (en) * 1997-09-18 2000-06-20 Ericsson, Inc. Circuit and method for using the I2 C serial protocol with multiple voltages
DE19833693C2 (de) * 1998-07-27 2002-11-07 Wolf Gmbh Richard Schnittstelle für I·2·C-Bus
US7088137B2 (en) * 2004-05-04 2006-08-08 International Business Machines Corporation System, method and program product for extending range of a bidirectional data communication bus
CN100426274C (zh) * 2005-08-08 2008-10-15 中兴通讯股份有限公司 避免i2c总线锁定的方法与装置
US7514962B2 (en) * 2006-04-28 2009-04-07 Stmicroelectronics Pvt. Ltd. Configurable I2C interface
US7953162B2 (en) 2006-11-17 2011-05-31 Intersil Americas Inc. Use of differential pair as single-ended data paths to transport low speed data
EP2115606B1 (en) * 2007-02-19 2011-01-12 Nxp B.V. Integrated circuit and electronic device
US7692450B2 (en) * 2007-12-17 2010-04-06 Intersil Americas Inc. Bi-directional buffer with level shifting
US7882282B2 (en) * 2008-05-21 2011-02-01 Silicon Laboratories Inc. Controlling passthrough of communications between multiple buses
US7944245B2 (en) * 2008-12-18 2011-05-17 Stmicroelectronics Pvt. Ltd. Pulse filtering module circuit, system, and method
US7999596B2 (en) * 2009-03-26 2011-08-16 Texas Instruments Incorporated Digital suppression of spikes on an 12C bus
WO2010115142A2 (en) 2009-04-03 2010-10-07 Mesosystems Technology Inc. Method and apparatus for capturing viable biological particles over an extended period of time
SG189197A1 (en) 2010-10-06 2013-05-31 Sharp Kk Electronic device and serial data communication method
JP5655562B2 (ja) * 2010-12-28 2015-01-21 ソニー株式会社 電子機器、電子機器の制御方法、送信装置および受信装置
US9037892B2 (en) * 2011-04-13 2015-05-19 International Business Machines Corporation System-wide power management control via clock distribution network
US8945335B2 (en) * 2011-08-04 2015-02-03 Apple Inc. Adhesive stack with a central shear layer
US9098645B2 (en) 2012-06-22 2015-08-04 Lenovo Enterprise Solutions (Singapore) Pte. Ltd. Increasing data transmission rate in an inter-integrated circuit (‘I2C’) system
US8558577B1 (en) * 2012-07-31 2013-10-15 Hewlett-Packard Development Company, L.P. Systems and methods for bidirectional signal separation
DE102012110732B3 (de) 2012-11-09 2013-06-13 R.Stahl Schaltgeräte GmbH Buskommunikationsvorrichtung
US9582457B2 (en) * 2013-06-12 2017-02-28 Qualcomm Incorporated Camera control interface extension bus
US9684624B2 (en) * 2014-01-14 2017-06-20 Qualcomm Incorporated Receive clock calibration for a serial bus
US9852104B2 (en) * 2014-02-20 2017-12-26 Qualcomm Incorporated Coexistence of legacy and next generation devices over a shared multi-mode bus
US9319178B2 (en) * 2014-03-14 2016-04-19 Qualcomm Incorporated Method for using error correction codes with N factorial or CCI extension
US9710423B2 (en) 2014-04-02 2017-07-18 Qualcomm Incorporated Methods to send extra information in-band on inter-integrated circuit (I2C) bus
US10108511B2 (en) * 2015-06-15 2018-10-23 Qualcomm Incorporated Test for 50 nanosecond spike filter
US20170104607A1 (en) * 2015-10-13 2017-04-13 Qualcomm Incorporated Methods to avoid i2c void message in i3c

Patent Citations (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5341131A (en) * 1991-03-29 1994-08-23 Hitachi, Ltd. Communications system and a system control method
US5559502A (en) * 1993-01-14 1996-09-24 Schutte; Herman Two-wire bus system comprising a clock wire and a data wire for interconnecting a number of stations and allowing both long-format and short-format slave addresses
JPH08316973A (ja) * 1995-05-23 1996-11-29 Hitachi Ltd 通信処理手段
JP2002535882A (ja) * 1999-01-15 2002-10-22 テレフオンアクチーボラゲツト エル エム エリクソン(パブル) インターフェースの選択的交互使用
JP2005514815A (ja) * 2001-12-19 2005-05-19 トムソン ライセンシング ソシエテ アノニム メモリを保護する装置および方法
US20100325325A1 (en) * 2003-04-11 2010-12-23 Fernald Kenneth W Integrated Multi-Function Point-Of-Load Regulator Circuit
JP2007325156A (ja) * 2006-06-05 2007-12-13 Seiko Epson Corp 受信装置および送受信システム
US20110255560A1 (en) * 2008-12-17 2011-10-20 Stmicroelectronics (Rousset) Sas Transmission over an 12c bus
JP2013538026A (ja) * 2010-09-24 2013-10-07 ローベルト ボッシュ ゲゼルシャフト ミット ベシュレンクテル ハフツング バスシステムの加入者局間の最適化されたデータ伝送のための方法及び加入者局
WO2012114672A1 (ja) * 2011-02-23 2012-08-30 パナソニック株式会社 信号伝送装置
JP2012199830A (ja) * 2011-03-22 2012-10-18 Fujitsu Component Ltd 信号伝送システム、信号伝送方法、送信機及び受信機

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2019012335A (ja) * 2017-06-29 2019-01-24 矢崎総業株式会社 情報設定装置及び電子機器
WO2022163246A1 (ja) * 2021-01-29 2022-08-04 ソニーセミコンダクタソリューションズ株式会社 送信装置および通信システム
US12438692B2 (en) 2021-01-29 2025-10-07 Sony Semiconductor Manufacturing Corporation Transmission device and communication system

Also Published As

Publication number Publication date
EP3126994A1 (en) 2017-02-08
WO2015153773A1 (en) 2015-10-08
EP3333717A1 (en) 2018-06-13
US20180196777A1 (en) 2018-07-12
KR20160140847A (ko) 2016-12-07
US20150286606A1 (en) 2015-10-08
US9928208B2 (en) 2018-03-27
CN106170781A (zh) 2016-11-30
US20150286608A1 (en) 2015-10-08
US9710423B2 (en) 2017-07-18
EP3126994B1 (en) 2018-09-12

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