JP2017510006A - インバンド割込みを用いたカメラ制御インターフェース拡張 - Google Patents

インバンド割込みを用いたカメラ制御インターフェース拡張 Download PDF

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Publication number
JP2017510006A
JP2017510006A JP2016563906A JP2016563906A JP2017510006A JP 2017510006 A JP2017510006 A JP 2017510006A JP 2016563906 A JP2016563906 A JP 2016563906A JP 2016563906 A JP2016563906 A JP 2016563906A JP 2017510006 A JP2017510006 A JP 2017510006A
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Japan
Prior art keywords
bus
line
slave
master device
irq
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JP2016563906A
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Japanese (ja)
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JP2017510006A5 (enExample
Inventor
祥一郎 仙石
祥一郎 仙石
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クアルコム，インコーポレイテッド
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Publication of JP2017510006A publication Critical patent/JP2017510006A/ja
Publication of JP2017510006A5 publication Critical patent/JP2017510006A5/ja
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/24—Handling requests for interconnection or transfer for access to input/output bus using interrupt
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4063—Device-to-bus coupling
    • G06F13/4068—Electrical coupling
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4221—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • G06F13/4295—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus using an embedded synchronisation

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Information Transfer Systems (AREA)
  • Bus Control (AREA)
  • Small-Scale Networks (AREA)
JP2016563906A 2014-01-14 2015-01-13 インバンド割込みを用いたカメラ制御インターフェース拡張 Pending JP2017510006A (ja)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201461927102P 2014-01-14 2014-01-14
US61/927,102 2014-01-14
US14/595,030 US9690725B2 (en) 2014-01-14 2015-01-12 Camera control interface extension with in-band interrupt
US14/595,030 2015-01-12
PCT/US2015/011256 WO2015108885A1 (en) 2014-01-14 2015-01-13 Camera control interface extension with in-band interrupt

Publications (2)

Publication Number Publication Date
JP2017510006A true JP2017510006A (ja) 2017-04-06
JP2017510006A5 JP2017510006A5 (enExample) 2018-02-15

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
JP2016563906A Pending JP2017510006A (ja) 2014-01-14 2015-01-13 インバンド割込みを用いたカメラ制御インターフェース拡張

Country Status (6)

Country Link
US (1) US9690725B2 (enExample)
EP (1) EP3095038B1 (enExample)
JP (1) JP2017510006A (enExample)
KR (1) KR20160107247A (enExample)
CN (1) CN106415518A (enExample)
WO (1) WO2015108885A1 (enExample)

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US12353344B2 (en) 2020-12-09 2025-07-08 Sony Semiconductor Solutions Corporation Communication apparatus and communication method
WO2025243887A1 (ja) * 2024-05-21 2025-11-27 ソニーセミコンダクタソリューションズ株式会社 バスシステム、バス制御装置およびバス制御方法

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US10353837B2 (en) 2013-09-09 2019-07-16 Qualcomm Incorporated Method and apparatus to enable multiple masters to operate in a single master bus architecture
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WO2017172269A1 (en) * 2016-03-31 2017-10-05 Qualcomm Incorporated Method and apparatus to enable multiple masters to operate in a single master bus architecture
WO2017189206A1 (en) * 2016-04-27 2017-11-02 Qualcomm Incorporated I3c high data rate (hdr) always-on image sensor 8-bit operation indicator and buffer over threshold indicator
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US10614009B2 (en) * 2018-03-16 2020-04-07 Qualcomm Incorporated Asynchronous interrupt with synchronous polling and inhibit options on an RFFE bus
US11030133B2 (en) * 2018-08-30 2021-06-08 Qualcomm Incorporated Aggregated in-band interrupt based on responses from slave devices on a serial data bus line
US10599601B1 (en) 2019-01-16 2020-03-24 Qorvo Us, Inc. Single-wire bus (SuBUS) slave circuit and related apparatus
US10725945B1 (en) 2019-03-01 2020-07-28 Texas Instruments Incorporated Integrated circuit with combined interrupt and serial data output
US11119958B2 (en) 2019-04-18 2021-09-14 Qorvo Us, Inc. Hybrid bus apparatus
US11226924B2 (en) 2019-04-24 2022-01-18 Qorvo Us, Inc. Single-wire bus apparatus supporting slave-initiated operation in a master circuit
CN110401585B (zh) * 2019-07-11 2021-08-17 上海申矽凌微电子科技有限公司 可中断串行总线通讯方法、系统及介质
TWI800689B (zh) * 2019-10-21 2023-05-01 瑞昱半導體股份有限公司 電子裝置、網路交換器以及中斷傳輸與接收方法
US10983942B1 (en) 2019-12-11 2021-04-20 Qorvo Us, Inc. Multi-master hybrid bus apparatus
US11144490B2 (en) * 2020-01-09 2021-10-12 Qualcomm Incorporated Optimal I3C in-band interrupt handling through reduced slave arbitration cycles
FR3109042A1 (fr) * 2020-04-01 2021-10-08 Schneider Electric Industries Sas Système de communication sans fil
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EP3940544A1 (de) * 2020-07-14 2022-01-19 VEGA Grieshaber KG Verfahren zur datenübertragung und schaltungsanordnung dafür
US11595576B2 (en) 2020-08-18 2023-02-28 Samsung Electronics Co., Ltd. Using an image sensor for always-on application within a mobile device
US11409677B2 (en) 2020-11-11 2022-08-09 Qorvo Us, Inc. Bus slave circuit and related single-wire bus apparatus
US11489695B2 (en) 2020-11-24 2022-11-01 Qorvo Us, Inc. Full-duplex communications over a single-wire bus
US12092689B2 (en) 2021-12-08 2024-09-17 Qorvo Us, Inc. Scan test in a single-wire bus circuit
US11706048B1 (en) 2021-12-16 2023-07-18 Qorvo Us, Inc. Multi-protocol bus circuit
US12182052B2 (en) 2022-01-20 2024-12-31 Qorvo Us, Inc. Slave-initiated communications over a single-wire bus
CN115632900B (zh) * 2022-08-31 2023-09-01 超聚变数字技术有限公司 一种计算设备
US12124401B2 (en) * 2023-01-17 2024-10-22 Qualcomm Incorporated Interrupt management on a one-wire bidirectional bus

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Also Published As

Publication number Publication date
US9690725B2 (en) 2017-06-27
EP3095038B1 (en) 2017-11-29
EP3095038A1 (en) 2016-11-23
CN106415518A (zh) 2017-02-15
WO2015108885A1 (en) 2015-07-23
KR20160107247A (ko) 2016-09-13
US20150199287A1 (en) 2015-07-16

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