JP2017228679A - 半導体装置およびその製造方法 - Google Patents
半導体装置およびその製造方法 Download PDFInfo
- Publication number
- JP2017228679A JP2017228679A JP2016124326A JP2016124326A JP2017228679A JP 2017228679 A JP2017228679 A JP 2017228679A JP 2016124326 A JP2016124326 A JP 2016124326A JP 2016124326 A JP2016124326 A JP 2016124326A JP 2017228679 A JP2017228679 A JP 2017228679A
- Authority
- JP
- Japan
- Prior art keywords
- insulating film
- film
- semiconductor device
- trench
- gate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 97
- 238000004519 manufacturing process Methods 0.000 title claims description 22
- 238000000034 method Methods 0.000 claims description 33
- 239000000758 substrate Substances 0.000 claims description 16
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 15
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 15
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 12
- 229920005591 polysilicon Polymers 0.000 claims description 12
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 8
- 239000004020 conductor Substances 0.000 claims description 8
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 8
- 238000005530 etching Methods 0.000 claims description 7
- 238000005229 chemical vapour deposition Methods 0.000 claims description 6
- 230000003647 oxidation Effects 0.000 claims description 6
- 238000007254 oxidation reaction Methods 0.000 claims description 6
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims description 3
- 229910052799 carbon Inorganic materials 0.000 claims description 3
- 238000000059 patterning Methods 0.000 claims description 2
- 230000001590 oxidative effect Effects 0.000 claims 1
- 102100038837 2-Hydroxyacid oxidase 1 Human genes 0.000 abstract description 45
- 101001015570 Arabidopsis thaliana Glycolate oxidase 1 Proteins 0.000 abstract description 41
- 101001031589 Homo sapiens 2-Hydroxyacid oxidase 1 Proteins 0.000 abstract description 41
- 239000010410 layer Substances 0.000 description 96
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 20
- 229910010271 silicon carbide Inorganic materials 0.000 description 19
- 230000004048 modification Effects 0.000 description 13
- 238000012986 modification Methods 0.000 description 13
- 230000015556 catabolic process Effects 0.000 description 12
- 230000005684 electric field Effects 0.000 description 12
- 239000011229 interlayer Substances 0.000 description 9
- 238000000206 photolithography Methods 0.000 description 8
- 230000006872 improvement Effects 0.000 description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 5
- 229910052710 silicon Inorganic materials 0.000 description 5
- 239000010703 silicon Substances 0.000 description 5
- 101710160338 2-Hydroxyacid oxidase 1 Proteins 0.000 description 4
- 239000012535 impurity Substances 0.000 description 4
- 230000003071 parasitic effect Effects 0.000 description 4
- 102100032912 CD44 antigen Human genes 0.000 description 3
- 230000004888 barrier function Effects 0.000 description 3
- 230000008901 benefit Effects 0.000 description 3
- 238000005468 ion implantation Methods 0.000 description 3
- 108010069264 keratinocyte CD44 Proteins 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 description 2
- 230000010354 integration Effects 0.000 description 2
- 229910000838 Al alloy Inorganic materials 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910000147 aluminium phosphate Inorganic materials 0.000 description 1
- 239000000470 constituent Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/7813—Vertical DMOS transistors, i.e. VDMOS transistors with trench gate electrode, e.g. UMOS transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
- H01L21/02233—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
- H01L21/02236—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02529—Silicon carbide
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
- H01L21/31111—Etching inorganic layers by chemical means
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
- H01L29/0692—Surface layout
- H01L29/0696—Surface layout of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/0843—Source or drain regions of field-effect devices
- H01L29/0847—Source or drain regions of field-effect devices of field-effect transistors with insulated gate
- H01L29/0852—Source or drain regions of field-effect devices of field-effect transistors with insulated gate of DMOS transistors
- H01L29/0856—Source regions
- H01L29/0865—Disposition
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1025—Channel region of field-effect devices
- H01L29/1029—Channel region of field-effect devices of field-effect transistors
- H01L29/1033—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1095—Body region, i.e. base region, of DMOS transistors or IGBTs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
- H01L29/1608—Silicon carbide
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42356—Disposition, e.g. buried gate electrode
- H01L29/4236—Disposition, e.g. buried gate electrode within a trench, e.g. trench gate electrode, groove gate electrode
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42364—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity
- H01L29/42368—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity the thickness being non-uniform
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/45—Ohmic electrodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/51—Insulating materials associated therewith
- H01L29/511—Insulating materials associated therewith with a compositional variation, e.g. multilayer structures
- H01L29/513—Insulating materials associated therewith with a compositional variation, e.g. multilayer structures the variation being perpendicular to the channel plane
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66053—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide
- H01L29/66068—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66674—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/66712—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/66734—Vertical DMOS transistors, i.e. VDMOS transistors with a step of recessing the gate electrode, e.g. to form a trench gate electrode
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/02255—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by thermal treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/0445—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising crystalline silicon carbide
- H01L21/048—Making electrodes
- H01L21/049—Conductor-insulator-semiconductor electrodes, e.g. MIS contacts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
- H01L29/41725—Source or drain electrodes for field effect devices
- H01L29/41766—Source or drain electrodes for field effect devices with at least part of the source or drain electrode having contact below the semiconductor surface, e.g. the source or drain electrode formed at least partially in a groove or with inclusions of conductor inside the semiconductor
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
Description
本明細書において、「電子部品」とは、電子を利用した部品を意味し、特に、半導体内の電子を利用した部品は「半導体部品」となる。この「半導体部品」の例としては、半導体チップを挙げることができる。したがって、「半導体チップ」を包含する語句が「半導体部品」であり、「半導体部品」の上位概念が「電子部品」となる。
図1は、パワートランジスタが形成された半導体チップCHPの平面レイアウト構成を示す平面図である。図1に示すように、半導体チップCHPは、矩形形状をしており、中央部にパワートランジスタが形成されたセル領域CRが設けられている。このセル領域CRの表面には、ソース電極SEであるソースパッドSPDが形成されており、このソースパッドSPDに離間して内包されるようにゲートパッドGPDが設けられている。ゲートパッドGPDは、セル領域CRを囲むように延在するゲート配線GLと接続されている。そして、このゲート配線GLを囲む外側に、ソースパッドSPDと接続されたソース配線SLが設けられている。
上述した半導体チップCHPのセル領域CRには、例えば、トレンチゲート型のパワートランジスタが形成されている。以下では、関連技術におけるトレンチゲート型のパワートランジスタの断面構造について説明し、その後、関連技術におけるパワートランジスタに対する本発明者の改善の検討事項について説明することにする。
図3は、本実施の形態における単位トランジスタの断面構造を示す断面図である。この単位トランジスタは、図1に示すセル領域CRに形成されている。図3に示すように、本実施の形態における単位トランジスタは、例えば、SiCを含む半導体基板1Sを有し、この半導体基板1S上にn型半導体層からなるドリフト層EPIが形成されている。このとき、半導体基板1Sとドリフト層EPIは、単位トランジスタ(パワートランジスタ)のドレイン領域として機能する。特に、ドリフト層EPIは、ドレイン領域と後述するソース領域SRとの間の耐圧を確保する機能を有しており、本実施の形態では、例えば、ドリフト層EPIをシリコンよりもバンドギャップの大きなワイドバンドギャップ半導体であるSiC(炭化シリコン)から構成している。ここで、SiCの絶縁破壊強度は、Si(シリコン)の絶縁破壊強度よりも大きいため、本実施の形態では、シリコンを使用する場合よりも、耐圧を確保するためのドリフト層EPIの厚さを薄くすることができるとともに、ドリフト層EPIの不純物濃度を高くすることができる。この結果、ドリフト層EPIに起因するオン抵抗の上昇を抑制することができる。つまり、本実施の形態では、半導体基板1Sおよびドリフト層EPIをSiCから構成することにより、耐圧とオン抵抗の低減の両立を図ることができる。
次に、本実施の形態における特徴点について説明する。本実施の形態における特徴点は、例えば、図3に示すように、ゲート絶縁膜GOX1を膜厚が異なる部位を有するように構成している点にある。具体的には、図3に示すように、ゲート絶縁膜GOX1のうち、ソース領域SRと接するトレンチTRの角部を覆う部位の膜厚を、チャネル層CHと接する部位の膜厚よりも厚くし、かつ、ドリフト層EPIと接するトレンチTRの角部を覆う部位の膜厚を、チャネル層CHと接する部位の膜厚よりも厚くしている。これにより、本実施の形態によれば、電界集中が発生しやすいトレンチTRの角部において、ゲート絶縁膜GOX1の破壊を防止することができ、これによって、半導体装置の信頼性を向上できる。
本実施の形態におけるトレンチゲート型の単位トランジスタは、上記のように構成されており、以下に、その製造方法について、図面を参照しながら説明する。
続いて、本実施の形態の変形例について説明する。図15は、本変形例におけるトレンチゲート型の単位トランジスタの断面構成を示す断面図である。図15に示す本変形例では、トレンチTRの内部にだけゲート電極GE1が形成されている。すなわち、本変形例では、ゲート電極GE1の上面がソース領域SRの上面よりも低い位置にある、いわゆる「リセスゲート構造」をしている。この変形例においても、ソース領域SRと接するトレンチTRの角部を覆う部位のゲート絶縁膜GOX1の膜厚と、ドリフト層EPIと接するトレンチTRの角部を覆う部位の膜厚とを、それぞれ、チャネル層CHと接する部位の膜厚よりも厚くするという実施の形態における特徴点を採用することができる。
CH チャネル層
CR セル領域
EPI ドリフト層
FF1 第1膜厚部
FF4 第4膜厚部
FP 第1部位
GE ゲート電極
GOX1 ゲート絶縁膜
IF1 絶縁膜
IF2 絶縁膜
IF3 絶縁膜
SF2 第2膜厚部
SP 第2部位
SR ソース領域
TF3 第3膜厚部
TP 第3部位
TR トレンチ
Claims (12)
- パワートランジスタが形成されたセル領域を含み、
前記セル領域には、
半導体基板と、
前記半導体基板上に形成されたドリフト層と、
前記ドリフト層上に形成されたチャネル層と、
前記チャネル層上に形成されたソース領域と、
前記ソース領域と前記チャネル層とを貫通して、前記ドリフト層に達するトレンチと、
前記トレンチの内壁に形成されたゲート絶縁膜と、
前記トレンチを埋め込むゲート電極と、
が形成されている、半導体装置であって、
前記ゲート絶縁膜は、
前記チャネル層と接する第1部位と、
前記第1部位と繋がり、かつ、前記ソース領域と接する第2部位と、
前記第1部位と繋がり、かつ、前記ドリフト層と接する第3部位と、
を有し、
前記第2部位は、
前記第1部位と繋がる第1膜厚部と、
前記第1膜厚部と繋がり、かつ、前記第1膜厚部よりも膜厚が厚く、かつ、前記ソース領域と接する前記トレンチの第1角を覆う第2膜厚部と、
を含み、
前記第3部位は、
前記第1部位と繋がる第3膜厚部と、
前記第3膜厚部と繋がり、かつ、前記第3膜厚部よりも膜厚が厚く、かつ、前記トレンチの底面に形成された第4膜厚部と、
を含む、半導体装置。 - 請求項1に記載の半導体装置において、
前記第2膜厚部は、前記ソース領域の上面と接するはみ出し部分を有し、
前記ゲート電極は、前記はみ出し部分上にも形成されている、半導体装置。 - 請求項1に記載の半導体装置において、
前記ゲート電極の上面は、前記ソース領域の上面よりも低い、半導体装置。 - 請求項1に記載の半導体装置において、
前記ゲート絶縁膜の前記第1部位は、
前記チャネル層と接する第1絶縁膜と、
前記第1絶縁膜上に形成され、かつ、前記第1絶縁膜よりも膜厚の厚い第3絶縁膜と、
から構成され、
前記ゲート絶縁膜の前記第2部位を構成する前記第1膜厚部は、
前記第1絶縁膜と、
前記第3絶縁膜と、
から構成され、
前記ゲート絶縁膜の前記第2部位を構成する前記第2膜厚部は、
前記第3絶縁膜よりも膜厚の厚い第2絶縁膜と、
前記第2絶縁膜上に形成された前記第3絶縁膜と、
から構成されている、半導体装置。 - 請求項4に記載の半導体装置において、
前記第1絶縁膜は、炭素を含有する、半導体装置。 - 請求項4に記載の半導体装置において、
前記第1絶縁膜は、酸化シリコン膜であり、
前記第2絶縁膜は、酸化シリコン膜であり、
前記第3絶縁膜は、酸化シリコン膜である、半導体装置。 - 請求項1に記載の半導体装置において、
前記半導体基板は、SiCを含む、半導体装置。 - 請求項1に記載の半導体装置において、
前記ゲート絶縁膜の前記第1部位は、しきい値電圧を調整する機能を有し、
前記第1部位の膜厚によって、前記しきい値電圧が決定される、半導体装置。 - (a)ドリフト層が形成された半導体基板を準備する工程、
(b)前記ドリフト層にチャネル層を形成する工程、
(c)前記チャネル層の表面にソース領域を形成する工程、
(d)前記ソース領域と前記チャネル層とを貫通して、前記ドリフト層に達するトレンチを形成する工程、
(e)前記トレンチの内壁から前記ソース領域上にわたって導体膜を形成する工程、
(f)前記導体膜上に絶縁膜を形成する工程、
(g)前記絶縁膜を異方性エッチングする工程、
(h)前記(g)工程後、前記絶縁膜から露出する前記導体膜を酸化して第2絶縁膜を形成する工程、
(i)前記(h)工程後、前記絶縁膜を除去する工程、
(j)前記(i)工程後、未酸化の前記導体膜を除去する工程、
(k)前記(j)工程後、露出する前記トレンチの内壁に第1絶縁膜を形成する工程、
(l)前記(k)工程後、前記第1絶縁膜上から前記第2絶縁膜上にわたって、第3絶縁膜を形成する工程、
(m)前記(l)工程後、前記第3絶縁膜をパターニングすることにより、前記第1絶縁膜と前記第2絶縁膜と前記第3絶縁膜とを含むゲート絶縁膜を形成する工程、
(n)前記(m)工程後、前記ゲート絶縁膜と接するゲート電極を形成する工程、
を備える、半導体装置の製造方法。 - 請求項9に記載の半導体装置の製造方法において、
前記半導体基板は、SiCを含み、
前記導体膜は、ポリシリコン膜であり、
前記絶縁膜は、窒化シリコン膜であり、
前記第1絶縁膜は、酸化シリコン膜であり、
前記第2絶縁膜は、酸化シリコン膜であり、
前記第3絶縁膜は、酸化シリコン膜である、半導体装置の製造方法。 - 請求項10に記載の半導体装置の製造方法において、
前記第2絶縁膜は、熱酸化法により形成され、
前記第3絶縁膜は、CVD法により形成される、半導体装置の製造方法。 - 請求項9に記載の半導体装置の製造方法において、
前記第1絶縁膜と前記第2絶縁膜と前記第3絶縁膜のうち、
前記第1絶縁膜の膜厚は、最も薄い、半導体装置の製造方法。
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2016124326A JP6750969B2 (ja) | 2016-06-23 | 2016-06-23 | 半導体装置の製造方法 |
US15/627,333 US10109733B2 (en) | 2016-06-23 | 2017-06-19 | Semiconductor device for power transistor |
CN201710475891.XA CN107546270B (zh) | 2016-06-23 | 2017-06-21 | 半导体器件及其制造方法 |
US16/137,279 US10256339B2 (en) | 2016-06-23 | 2018-09-20 | Semiconductor device for power transistor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2016124326A JP6750969B2 (ja) | 2016-06-23 | 2016-06-23 | 半導体装置の製造方法 |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2020110210A Division JP7076500B2 (ja) | 2020-06-26 | 2020-06-26 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2017228679A true JP2017228679A (ja) | 2017-12-28 |
JP6750969B2 JP6750969B2 (ja) | 2020-09-02 |
Family
ID=60675635
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2016124326A Active JP6750969B2 (ja) | 2016-06-23 | 2016-06-23 | 半導体装置の製造方法 |
Country Status (3)
Country | Link |
---|---|
US (2) | US10109733B2 (ja) |
JP (1) | JP6750969B2 (ja) |
CN (1) | CN107546270B (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2022050802A (ja) * | 2020-09-18 | 2022-03-31 | 株式会社東芝 | 半導体装置の製造方法 |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10325982B1 (en) * | 2018-05-17 | 2019-06-18 | Northrop Grumman Systems Corporation | Drain ledge for self-aligned gate and independent channel region and drain-side ridges for SLCFET |
CN113745316A (zh) * | 2021-08-31 | 2021-12-03 | 深圳市威兆半导体有限公司 | 屏蔽栅mosfet器件、芯片和终端设备 |
CN113851523B (zh) * | 2021-09-02 | 2022-12-13 | 深圳市威兆半导体股份有限公司 | 一种屏蔽栅mosfet及制作方法 |
US20230197771A1 (en) * | 2021-12-16 | 2023-06-22 | Nanya Technology Corporation | Memory device having word lines with reduced leakage |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001127072A (ja) * | 1999-10-26 | 2001-05-11 | Hitachi Ltd | 半導体装置 |
JP2002222950A (ja) * | 2001-01-25 | 2002-08-09 | Denso Corp | 炭化珪素半導体装置の製造方法 |
JP2007242943A (ja) * | 2006-03-09 | 2007-09-20 | Fuji Electric Device Technology Co Ltd | Mos型半導体装置の製造方法 |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6455378B1 (en) * | 1999-10-26 | 2002-09-24 | Hitachi, Ltd. | Method of manufacturing a trench gate power transistor with a thick bottom insulator |
JP5729331B2 (ja) * | 2011-04-12 | 2015-06-03 | 株式会社デンソー | 半導体装置の製造方法及び半導体装置 |
JP2013232533A (ja) * | 2012-04-27 | 2013-11-14 | Rohm Co Ltd | 半導体装置および半導体装置の製造方法 |
-
2016
- 2016-06-23 JP JP2016124326A patent/JP6750969B2/ja active Active
-
2017
- 2017-06-19 US US15/627,333 patent/US10109733B2/en active Active
- 2017-06-21 CN CN201710475891.XA patent/CN107546270B/zh active Active
-
2018
- 2018-09-20 US US16/137,279 patent/US10256339B2/en active Active
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001127072A (ja) * | 1999-10-26 | 2001-05-11 | Hitachi Ltd | 半導体装置 |
JP2002222950A (ja) * | 2001-01-25 | 2002-08-09 | Denso Corp | 炭化珪素半導体装置の製造方法 |
JP2007242943A (ja) * | 2006-03-09 | 2007-09-20 | Fuji Electric Device Technology Co Ltd | Mos型半導体装置の製造方法 |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2022050802A (ja) * | 2020-09-18 | 2022-03-31 | 株式会社東芝 | 半導体装置の製造方法 |
JP7404204B2 (ja) | 2020-09-18 | 2023-12-25 | 株式会社東芝 | 半導体装置の製造方法 |
US11929403B2 (en) | 2020-09-18 | 2024-03-12 | Kabushiki Kaisha Toshiba | Method of manufacturing semiconductor device |
Also Published As
Publication number | Publication date |
---|---|
JP6750969B2 (ja) | 2020-09-02 |
CN107546270A (zh) | 2018-01-05 |
CN107546270B (zh) | 2022-05-03 |
US20190027597A1 (en) | 2019-01-24 |
US10256339B2 (en) | 2019-04-09 |
US10109733B2 (en) | 2018-10-23 |
US20170373183A1 (en) | 2017-12-28 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US11257944B2 (en) | Semiconductor device and semiconductor device manufacturing method | |
US8952430B2 (en) | Semiconductor device and method for manufacturing semiconductor device | |
US8723254B2 (en) | Semiconductor device and manufacturing method thereof | |
JP6750969B2 (ja) | 半導体装置の製造方法 | |
JP2017162909A (ja) | 半導体装置 | |
US9614073B2 (en) | Semiconductor device, and manufacturing method for same | |
KR100970282B1 (ko) | 트렌치 mosfet 및 그 제조방법 | |
US20140027845A1 (en) | Semiconductor device | |
JP2018182235A (ja) | 半導体装置および半導体装置の製造方法 | |
JP2018082114A (ja) | 半導体装置の製造方法 | |
JP5223291B2 (ja) | 半導体装置の製造方法 | |
US20150076592A1 (en) | Semiconductor device and method of manufacturing the semiconductor device | |
JP2020136472A (ja) | 半導体装置 | |
US20110284923A1 (en) | Semiconductor device and manufacturing method of the same | |
KR20180111534A (ko) | 반도체 장치 및 그 제조 방법 | |
JP5556863B2 (ja) | ワイドバンドギャップ半導体縦型mosfet | |
US20200312997A1 (en) | Semiconductor device | |
JP2008306022A (ja) | 半導体装置 | |
CN112864248B (zh) | Sgtmosfet器件及制造方法 | |
JP7076500B2 (ja) | 半導体装置 | |
US11121247B2 (en) | Semiconductor device and method for manufacturing same | |
US7507630B2 (en) | Method of fabricating a semiconductor device | |
CN114188416A (zh) | 半导体装置及其制造方法 | |
JP2020004883A (ja) | 半導体装置、電気装置及び半導体装置の製造方法 | |
JP3659195B2 (ja) | 半導体装置及びその製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20181113 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20190827 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20190830 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20191025 |
|
A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20200331 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20200626 |
|
A911 | Transfer to examiner for re-examination before appeal (zenchi) |
Free format text: JAPANESE INTERMEDIATE CODE: A911 Effective date: 20200706 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20200721 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20200813 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 6750969 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |