JP2017118068A5 - - Google Patents

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Publication number
JP2017118068A5
JP2017118068A5 JP2015255104A JP2015255104A JP2017118068A5 JP 2017118068 A5 JP2017118068 A5 JP 2017118068A5 JP 2015255104 A JP2015255104 A JP 2015255104A JP 2015255104 A JP2015255104 A JP 2015255104A JP 2017118068 A5 JP2017118068 A5 JP 2017118068A5
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JP
Japan
Prior art keywords
layer
wiring
barrier film
insulating layer
forming
Prior art date
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Application number
JP2015255104A
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English (en)
Japanese (ja)
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JP6676370B2 (ja
JP2017118068A (ja
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Priority to JP2015255104A priority Critical patent/JP6676370B2/ja
Priority claimed from JP2015255104A external-priority patent/JP6676370B2/ja
Priority to US15/381,964 priority patent/US9780032B2/en
Publication of JP2017118068A publication Critical patent/JP2017118068A/ja
Publication of JP2017118068A5 publication Critical patent/JP2017118068A5/ja
Application granted granted Critical
Publication of JP6676370B2 publication Critical patent/JP6676370B2/ja
Active legal-status Critical Current
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JP2015255104A 2015-12-25 2015-12-25 配線基板及び配線基板の製造方法 Active JP6676370B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2015255104A JP6676370B2 (ja) 2015-12-25 2015-12-25 配線基板及び配線基板の製造方法
US15/381,964 US9780032B2 (en) 2015-12-25 2016-12-16 Wiring substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2015255104A JP6676370B2 (ja) 2015-12-25 2015-12-25 配線基板及び配線基板の製造方法

Publications (3)

Publication Number Publication Date
JP2017118068A JP2017118068A (ja) 2017-06-29
JP2017118068A5 true JP2017118068A5 (enExample) 2018-11-22
JP6676370B2 JP6676370B2 (ja) 2020-04-08

Family

ID=59087965

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2015255104A Active JP6676370B2 (ja) 2015-12-25 2015-12-25 配線基板及び配線基板の製造方法

Country Status (2)

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US (1) US9780032B2 (enExample)
JP (1) JP6676370B2 (enExample)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102595293B1 (ko) * 2018-02-12 2023-10-30 삼성전자주식회사 인쇄 회로 기판 및 이를 포함하는 반도체 패키지
JP7714865B2 (ja) * 2020-07-09 2025-07-30 Ｔｏｐｐａｎホールディングス株式会社 多層配線基板及び多層配線基板の製造方法
KR20240178720A (ko) 2023-06-23 2024-12-31 삼성전기주식회사 인쇄회로기판
WO2026094475A1 (ja) * 2024-10-28 2026-05-07 パナソニックＩｐマネジメント株式会社 インターポーザ及び電子部品モジュール

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05144811A (ja) 1991-11-22 1993-06-11 Hitachi Ltd 薄膜半導体装置及びその製造方法
JP2003023252A (ja) 2001-07-10 2003-01-24 Ibiden Co Ltd 多層プリント配線板
US6812110B1 (en) * 2003-05-09 2004-11-02 Micron Technology, Inc. Methods of forming capacitor constructions, and methods of forming constructions comprising dielectric materials
TWI420722B (zh) * 2008-01-30 2013-12-21 歐斯朗奧托半導體股份有限公司 具有封裝單元之裝置
JP5672832B2 (ja) * 2010-08-06 2015-02-18 富士通セミコンダクター株式会社 半導体装置とその製造方法

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