JP2017117906A - Multilayer circuit board manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method of manufacturing a multilayer circuit board that is simple and high in reliability.SOLUTION: A method of manufacturing a multilayer circuit board having mutually-connected electric circuit and interlayer connection hole comprises an insulating layer forming step (a) of forming an insulating layer on a circuit forming surface of a core substrate or a circuit board on which a first electric circuit is formed, a coating forming step (b) of forming a resin coating on the outer surface of the insulating layer, a circuit groove forming step (c) of forming a groove having a depth equal to or greater than the thickness of the resin coating with respect to the outer surface of the resin film, thereby exposing the circuit board on which the core substrate or the first electric circuit is formed, a catalyst deposition step (d) of depositing plating catalyst on the surface of the resin coating and the surface of the circuit groove, a coating removing step (e) of removing the resin coating film from the insulating layer, a plating treatment step (f) of subjecting the insulating layer to electroless plating to form a plating film on a part where the plating catalyst remains, and an etching step (g) of removing the plating portion protruding from the surface of the insulating layer by etching.SELECTED DRAWING: Figure 1

Description

  The present invention belongs to the technical field of multilayer circuit boards, and particularly relates to a method for manufacturing a multilayer circuit board using an additive method.

  2. Description of the Related Art In recent years, in electronic devices such as mobile information terminals such as mobile phones, computers and peripheral devices, and various information home appliances, higher functionality and downsizing are rapidly progressing. Accordingly, circuit boards mounted on these electric devices are increasingly required to have higher density of electric circuits. In order to realize such a high density circuit board, a method for accurately forming a circuit having a narrower line width and line spacing is required. In high-density wiring, short-circuiting or migration between wirings is likely to occur. Further, in a narrow width wiring, the mechanical strength of the wiring is lowered, and the circuit is easily cut off by an impact or the like. Furthermore, as the number of stacked layers increases, the unevenness generated on the circuit formation surface becomes larger, so that it becomes difficult to form a fine circuit.

  Conventionally, a subtractive method and an additive method are known as a method of forming a circuit on a circuit board. The subtractive method is a method of forming a circuit by removing (subtractive) a metal foil other than a portion where a circuit is desired to be formed on the surface of the metal foil-clad laminate. On the other hand, the additive method is a method of forming a circuit by performing electroless plating only on a portion on the insulating base material where the circuit is to be formed.

  In general, the subtractive method is a method of leaving a metal foil only in a circuit formation portion by etching a thick metal foil. According to this method, a portion of the metal to be removed is wasted. On the other hand, the additive method does not waste metal because the electroless plating film can be formed only on the portion where the metal wiring is to be formed. Also in this respect, the additive method is a preferable circuit forming method.

  The full additive method, which is one of conventional representative additive methods, is performed as follows, for example. First, a plating catalyst is deposited on the surface of the insulating substrate. Next, a photoresist layer is formed on the plating catalyst. Next, the surface of the photoresist layer is exposed through a photomask on which a predetermined circuit pattern is formed. Next, the circuit pattern is developed. Then, by applying electroless plating to the surface of the circuit pattern formed by development, metal wiring is formed on the circuit pattern portion. An electric circuit is formed on the insulating base material by such a process.

  In the conventional additive method described above, the plating catalyst is deposited on the entire surface of the insulating substrate. As a result, the following problems have arisen. That is, when the photoresist layer is developed with high accuracy, the plating film can be formed only on the portion not protected by the photoresist. However, if the photoresist layer is not developed with high accuracy, a plating film may be unnecessarily formed in a portion where a circuit is not originally desired to be formed. This occurs because the plating catalyst is deposited on the entire surface of the insulating substrate. Unnecessarily formed plating films cause short circuits and migration between adjacent circuits. Such a short circuit or migration is more likely to occur when a circuit having a narrow line width and line interval is formed.

  In order to cope with such a problem, for example, it has been reported that the following technique described in Patent Document 1 is applied. First, a protective film of resin is coated on the insulating substrate. Next, grooves and through holes corresponding to the circuit pattern are drawn and formed on the insulating substrate coated with the protective film by machining or laser beam irradiation. Next, an activation layer is formed on the entire surface of the insulating substrate. Next, the activation layer is left only on the inner wall surface of the groove and the through hole by peeling off the resin protective film. Then, by plating the insulating base material, a conductive layer is selectively formed only on the inner surfaces of the activated grooves and through holes.

JP 58-186994 A

  In the method of forming the embedded circuit in the insulating base as described above, when forming the embedded circuit in the insulating base, a circuit groove for circuit formation is formed on the insulating base by laser processing or the like. Various circuits having different depths and areas can be formed by applying electroless plating to the circuit grooves.

  However, according to the conventional technology, when circuit wiring with different depths and areas is plated at a time, plating unevenness causes unfilled conductors in the circuit portion, via portion, and pad portion, or overplating higher than the insulating layer surface. As a result, the circuit surface becomes non-uniform or short-circuited, causing problems in reliability. Further, when the circuit surface becomes non-uniform, there is a problem that component mounting on the circuit becomes difficult due to poor contact. Furthermore, when the number of layers is increased, unevenness on both sides of the circuit due to uneven plating may cause the insulating layer to be non-uniformly laminated, thereby causing unevenness on the surface of the insulating layer. If the surface of the insulating layer is not flat, the focal point will be displaced during laser processing, which will adversely affect the laser processing, and the insulating layer will become non-uniform, resulting in poor board mounting and poor connection due to unexpected warpage. Such a problem will occur.

  The present invention has been made in view of such circumstances, and in manufacturing a multilayer circuit board including a step of forming grooves of different sizes and depths, the conductor formation by the groove formation and alignment and plating treatment is simplified. It is an object of the present invention to provide a manufacturing method that can be manufactured and that can reliably perform component mounting.

  A method of manufacturing a multilayer circuit board according to one aspect of the present invention is a method of manufacturing a multilayer circuit board having an electrical circuit and an interlayer connection hole that are connected to each other, and the core substrate or the first electrical circuit is formed. An insulating layer forming step (a) for forming an insulating layer on the circuit forming surface of the circuit board, a film forming step (b) for forming a resin coating on the outer surface of the insulating layer, and the outer surface of the resin coating as a reference A circuit groove forming step (c) for exposing the core substrate or the circuit board on which the first electric circuit is formed by forming a groove having a depth equal to or greater than a thickness of the resin film; and a surface of the resin film; A catalyst deposition step (d) for depositing a plating catalyst on the surface of the circuit groove, a coating removal step (e) for removing the resin coating from the insulating layer, and electroless plating on the insulating layer In the part where the catalyst remains Plating step of forming a Tsu key film (f), and characterized in that it comprises the etching process is removed by etching (g) plating portion projecting from the insulating layer surface.

  Furthermore, in the above manufacturing method, the resin film is preferably a resin film that can be dissolved or removed from the insulating layer by dissolving or swelling with a predetermined liquid.

  Further, the catalyst deposition step includes a step of treating in an acidic catalyst metal colloid solution, and the coating peeling step includes a step of swelling or dissolving the resin coating in an alkaline solution, wherein the resin coating comprises the acidic catalyst. A resin film that does not swell or dissolve in the metal colloid solution and swells or dissolves in the alkaline solution is preferable.

  Furthermore, it is preferable that the circuit groove forming step includes forming grooves having different sizes and depths by laser processing in order to provide the circuit pattern for electric circuit and the hole for interlayer connection.

  In addition, it is preferable that the plating treatment step includes that the circuit groove is completely filled by plating by selectively forming a plating film in the circuit groove where the plating catalyst remains.

  Further, in the above manufacturing method, the etching step is preferably an etching process using an organic acid-based alkaline etching agent.

  Moreover, the said manufacturing method may be provided with the multilayering process which multilayers by repeating the said insulating-layer formation process (a)-the said etching process (g).

  ADVANTAGE OF THE INVENTION According to this invention, the manufacturing method of a multilayer circuit board simple and reliable can be provided.

FIG. 1 shows a circuit board preparation step, (a) an insulating layer formation step, (b) a film formation step, (c) a circuit groove formation step, and (d) in a method for manufacturing a multilayer circuit substrate according to an embodiment of the present invention. It is sectional drawing which shows a catalyst deposition process, (e) film removal process, (f) plating process, and (g) etching process. FIG. 2 is a schematic view showing a multilayering process in the method for manufacturing a multilayer circuit board according to an embodiment of the present invention. FIG. 3 is a schematic view of the substrate before (A) and after the etching process (B) as viewed from the surface. 4 is a cross-sectional view of the substrate before (A) and after the etching process (B) shown in FIG. FIG. 5 is a cross-sectional view showing a comparison of component mounting after plating on a conventional substrate (A) and a substrate (B) of the present invention. FIG. 6 is a cross-sectional view comparing the state of the conventional substrate (A) and the substrate (B) of the present invention after the multilayering step (after the formation of the second insulating layer).

  A method of manufacturing a multilayer circuit board according to an embodiment of the present invention is a method of manufacturing a multilayer circuit board having an electrical circuit and an interlayer connection hole that are connected to each other, and a core substrate or a first electrical circuit is formed. An insulating layer forming step (a) for forming an insulating layer on the circuit forming surface of the circuit board, a film forming step (b) for forming a resin coating on the outer surface of the insulating layer, and the outer surface of the resin coating as a reference A circuit groove forming step (c) for exposing the core substrate or the circuit board on which the first electric circuit is formed by forming a groove having a depth equal to or greater than a thickness of the resin film; and a surface of the resin film; A catalyst deposition step (d) for depositing a plating catalyst on the surface of the circuit groove, a coating removal step (e) for removing the resin coating from the insulating layer, and electroless plating on the insulating layer The part where the catalyst remains Plating step of forming a plating film (f), and characterized in that it comprises the etching process is removed by etching (g) plating portion projecting from the insulating layer surface.

With this configuration, the manufacturing method of the present invention has the following advantages:
First, by forming grooves of different sizes and depths in a single groove forming process, the alignment process required at the time of groove formation can be performed only once. This is considered to solve the problem of misalignment, which is a problem when forming fine wiring.

  In addition, it is considered that simplification of the manufacturing process can be realized by forming conductors collectively by plating after forming grooves having different sizes and depths.

  Unnecessary plated portions protruding from the surface of the insulating layer are removed, the insulating layer portion and the circuit portion are planarized, and a short circuit can be prevented from occurring. Further, it is possible to realize component mounting on the circuit surface by flattening the circuit surface.

  Furthermore, by flattening the insulating layer and the circuit part, the formation of irregularities in the insulating layer on the lower circuit part that occurs during multilayering is suppressed, and the adverse effect on laser processing due to focal length deviation is suppressed, insulating. It is considered that the occurrence of irregular warpage due to the non-uniform layer can be suppressed.

  Hereinafter, the manufacturing method according to the present embodiment will be specifically described with reference to the drawings as necessary.

  FIG. 1 is a process diagram (cross-sectional view) for explaining an embodiment of a production method according to the present invention.

<Circuit board preparation process>
In the manufacturing method of this embodiment, first, as shown in the beginning of FIG. 1, a circuit board 1 on which a core board or a first electric circuit is formed is prepared (circuit board preparation step). In addition, the formation method of a 1st circuit board is not ask | required here. For example, it may be formed by a conventionally known circuit forming method such as a subtractive method or an additive method. Further, the circuit board may be formed on only one side or may be formed on both sides. A multilayer circuit board may also be used.

  In addition, as the core substrate and the circuit substrate, various organic substrates conventionally used for manufacturing a multilayer circuit substrate can be employed without any particular limitation. Specific examples of the organic substrate include substrates made of epoxy resin, acrylic resin, polycarbonate resin, polyimide resin, polyphenylene sulfide resin, polyphenylene ether resin, cyanate resin, benzoxazine resin, bismaleimide resin, and the like. The form of the core substrate is not particularly limited, such as a sheet, a film, a prepreg, and a three-dimensional shaped molded body. The thickness of the core substrate is also not particularly limited. For example, in the case of a sheet, a film, a prepreg, etc., the thickness is about 10 to 500 μm, preferably about 20 to 200 μm.

<Insulating layer forming step (a)>
Next, as shown in FIG. 1A, the insulating layer 2 is formed on the upper surface (circuit forming surface) of the circuit substrate 1 on which the core substrate or the first circuit is formed (insulating layer forming step). The form of the insulating layer 2 is not particularly limited. Specific examples include a sheet, a film, a prepreg, and a three-dimensional molded article formed by applying a resin solution. The thickness of the insulating layer 2 is not particularly limited. Specifically, in the case of a sheet, film, or prepreg, for example, the thickness is preferably 10 to 200 μm, and more preferably about 20 to 100 μm. The insulating layer 2 may contain inorganic fine particles such as silica particles. The insulating layer 2 can be formed, for example, by laminating a sheet, a film, or a prepreg on the upper surface of the substrate 1, pressing them together, and curing them, or by curing them by heating and pressing. The insulating layer 2 can also be formed by applying a resin solution to the upper surface of the substrate 1 and then curing it. In addition, a material to be an insulating layer may be put in using a mold and a frame mold, and pressed and cured to form a three-dimensional molded body, or a sheet, film, or prepreg is punched out. A three-dimensional shaped article or the like may be formed by laminating the hollowed material on the upper surface of the substrate 1 and pressurizing them, followed by curing, or curing by heating and pressing.

  As the insulating layer 2, various organic substrates conventionally used for manufacturing a multilayer circuit board can be used without any particular limitation. Specific examples of organic substrates include those conventionally used in the manufacture of multilayer circuit boards, such as epoxy resins, acrylic resins, polycarbonate resins, polyimide resins, polyphenylene sulfide resins, polyphenylene ether resins, cyanate resins, benzoxazine resins, bis Examples include a substrate made of maleimide resin or the like.

  The epoxy resin is not particularly limited as long as it is an epoxy resin constituting various organic substrates that can be used for manufacturing a circuit board. Specifically, for example, bisphenol A type epoxy resin, bisphenol F type epoxy resin, bisphenol S type epoxy resin, aralkyl epoxy resin, phenol novolac type epoxy resin, alkylphenol novolac type epoxy resin, biphenol type epoxy resin, naphthalene type epoxy resin , Dicyclopentadiene type epoxy resins, epoxidized products of condensates of phenols and aromatic aldehydes having a phenolic hydroxyl group, triglycidyl isocyanurate, alicyclic epoxy resins, and the like. Furthermore, the epoxy resin, nitrogen-containing resin, and silicone-containing resin that are brominated or phosphorus-modified to impart flame retardancy are also included. Moreover, as said epoxy resin and resin, said each epoxy resin and resin may be used independently, and may be used in combination of 2 or more type.

  Moreover, when comprising a base material with said each resin, in order to make it harden | cure, a hardening | curing agent is generally contained. The curing agent is not particularly limited as long as it can be used as a curing agent. Specific examples include dicyandiamide, phenolic curing agents, acid anhydride curing agents, aminotriazine novolac curing agents, and cyanate resins.

  As said phenol type hardening | curing agent, a novolak type, an aralkyl type, a terpene type etc. are mentioned, for example. Further examples include phosphorus-modified phenolic resins or phosphorus-modified cyanate resins for imparting flame retardancy. Moreover, as said hardening | curing agent, said each hardening | curing agent may be used independently, and may be used in combination of 2 or more type.

  Although not particularly limited, it is preferable to use a resin or the like that has a good laser light absorption rate in a wavelength region of 100 nm to 400 nm because a circuit pattern is formed by laser processing. For example, specifically, a polyimide resin or the like can be given.

  The insulating base material (insulating layer) may contain a filler. The filler may be inorganic fine particles or organic fine particles, and is not particularly limited. By containing the filler, the filler is exposed in the laser processed part, and it is possible to improve the adhesion between the plating due to the unevenness of the filler and the resin.

Specific examples of the material constituting the inorganic fine particles include aluminum oxide (Al ₂ O ₃ ), magnesium oxide (MgO), boron nitride (BN), aluminum nitride (AlN), silica (SiO ₂ ), High dielectric constant fillers such as barium titanate (BaTiO ₃ ) and titanium oxide (TiO ₂ ); magnetic fillers such as hard ferrite; magnesium hydroxide (Mg (OH) ₂ ), aluminum hydroxide (Al (OH) ₂ ), Antimony trioxide (Sb ₂ O ₃ ), antimony pentoxide (Sb ₂ O ₅ ), guanidine salts, zinc borate, molybdate compounds, zinc stannate, and other inorganic flame retardants; talc (Mg ₃ (Si ₄ O ₁₀₎ (OH) 2), barium sulfate (BaSO _4), calcium carbonate (CaCO _3), mica, and the like. As said inorganic fine particle, the said inorganic fine particle may be used independently, and may be used in combination of 2 or more type. Since these inorganic fine particles have high thermal conductivity, relative dielectric constant, flame retardancy, particle size distribution, color tone freedom, etc., when selectively exerting a desired function, appropriate blending and particle size design should be performed. And high filling can be easily performed. Although not particularly limited, it is preferable to use a filler having an average particle diameter equal to or smaller than the thickness of the insulating layer, more preferably 0.01 μm to 10 μm, and still more preferably a filler having an average particle diameter of 0.05 μm to 5 μm. It is good.

  The inorganic fine particles may be surface-treated with a silane coupling agent in order to improve dispersibility in the insulating base material. The insulating base material may contain a silane coupling agent in order to increase the dispersibility of the inorganic fine particles in the insulating base material. The silane coupling agent is not particularly limited. Specific examples include silane coupling agents such as epoxy silane, mercapto silane, amino silane, vinyl silane, styryl silane, methacryloxy silane, acryloxy silane, and titanate. As said silane coupling agent, the said silane coupling agent may be used independently, and may be used in combination of 2 or more type.

  The insulating layer 2 may contain a dispersant in order to improve the dispersibility of the inorganic fine particles in the insulating base material. The dispersant is not particularly limited. Specific examples include dispersants such as alkyl ether, sorbitan ester, alkyl polyether amine, and polymer. As said dispersing agent, the said dispersing agent may be used independently, and may be used in combination of 2 or more type.

  Specific examples of the organic fine particles include rubber fine particles.

  For example, when using a prepreg as the substrate 1 and the insulating layer 2, the insulating layer 2 may be stacked on the upper surface (circuit forming surface) of the substrate 1 and heated and pressed to be cured.

  Note that the types of materials and resins constituting the substrate 1 and the types and materials of the materials constituting the insulating layer 2 may be different from each other. However, from the viewpoint of satisfactorily adhering and laminating the substrate 1 and the insulating layer 2, it is preferable that the types be familiar with each other, and it is more preferable that the types are typically the same.

<Film formation process (b)>
Next, as shown in FIG.1 (b), the resin film 3 is formed in the outer surface part of the insulating layer 2 (film formation process). The resin film (resist) 3 is not particularly limited as long as it can be removed in a film removal step described later. The resin film 3 is preferably a resin film that can be easily dissolved or removed from the upper surface of the insulating layer 2 by dissolving or swelling with a predetermined liquid. Specifically, for example, a film made of a soluble resin that can be easily dissolved by an organic solvent or an alkaline solution, a film made of a swellable resin that can swell with a predetermined liquid (swelling liquid), and the like can be given. Note that the swellable resin film does not substantially dissolve in a predetermined liquid and swells in a predetermined liquid as well as a resin film that easily peels off from the surface of the insulating layer 2 due to swelling. Furthermore, at least a part is dissolved, and the resin film that is easily peeled off from the surface of the insulating layer 2 by swelling or dissolution thereof, or dissolved in a predetermined liquid, and easily dissolved from the surface of the insulating layer 2 by dissolution. A resin film that peels off is also included. By using such a resin film, the resin film can be easily and satisfactorily removed from the surface of the insulating layer. If the resin film is collapsed when removing the resin film, the plating catalyst deposited on the resin film will be scattered, and the scattered plating catalyst will be re-deposited on the insulating layer, and an unnecessary plating film will be formed on that part. There is a problem. Such a problem can be prevented because the resin film can be easily and satisfactorily removed from the surface of the insulating layer.

  The method for forming the resin coating 3 is not particularly limited. Specifically, for example, a liquid material capable of forming the resin coating 3 is applied to the upper surface (outer surface) of the insulating layer 2 and then dried, or the liquid material is applied to a support substrate and then dried. For example, a method of transferring the resin film formed on the surface of the insulating layer 2 may be used. Moreover, as another method, the method of bonding the resin film which consists of the resin film 3 previously formed on the upper surface (outer surface) of the insulating layer 2 etc. are mentioned. The method for applying the liquid material is not particularly limited. Specifically, for example, conventionally known spin coating method, bar coater method and the like can be mentioned.

  As a material for forming the resin coating 3, any resin can be used without particular limitation as long as it can be easily dissolved or removed from the surface of the insulating layer 2 by dissolving or swelling with a predetermined liquid. Preferably, a resin having a degree of swelling with respect to a predetermined liquid is 50% or more, more preferably 100% or more, and still more preferably 500% or more. In addition, when the degree of swelling is too low, the resin film tends to be difficult to peel.

  The swelling degree (SW) of the resin film is calculated from the weight m (b) before swelling and the weight m (a) after swelling, as follows: “swelling degree SW = {(m (a) −m (b)) / m (b )} × 100 (%) ”.

  Such a resin film is formed by applying an elastomer suspension or emulsion to the surface of the insulating layer 2 and then drying, or by applying an elastomer suspension or emulsion to a support substrate and then drying. Can be easily formed by a method of transferring the film to the surface of the insulating layer 2.

  Specific examples of the elastomer include diene elastomers such as a styrene-butadiene copolymer, acrylic elastomers such as an acrylate ester copolymer, and polyester elastomers. According to such an elastomer, it is possible to easily form a resin film having a desired degree of swelling by adjusting the degree of crosslinking or gelation of the elastomer resin particles dispersed as a suspension or emulsion.

  Such a resin film is particularly preferably a film whose degree of swelling varies depending on the pH of the swelling liquid. When such a coating is used, the resin in the pH in the catalyst deposition step can be obtained by differentiating the liquid conditions in the catalyst deposition step described later and the liquid conditions in the coating removal step described later. The coating film 3 maintains a high adhesion to the insulating layer 2, and the resin coating 3 can be easily peeled and removed at the pH in the coating removal step.

  More specifically, for example, the catalyst deposition step described later includes a step of treating in an acidic catalyst metal colloid solution having a pH in the range of 1 to 3, for example, and the coating removal step described later is alkaline in the range of pH 12 to 14. When the step of swelling the resin coating in the solution is provided, the resin coating has a swelling degree of 60% or less, further 40% or less with respect to the acidic catalyst metal colloid solution, and a swelling degree with respect to the alkaline solution of 50%. % Or more, preferably 100% or more, and more preferably 500% or more.

  Examples of such resin coatings are used for sheets formed from elastomers having a predetermined amount of carboxyl groups, dry film resists for patterning printed wiring boards (hereinafter sometimes referred to as “DFR”), and the like. Examples thereof include a sheet obtained by completely curing a photocurable alkali-developing resist, a thermosetting or alkali-developing sheet, and the like.

  Specific examples of the elastomer having a carboxyl group include diene elastomers such as a styrene-butadiene copolymer having a carboxyl group in the molecule by containing a monomer unit having a carboxyl group as a copolymerization component, and acrylic. Examples include acrylic elastomers such as acid ester copolymers, and polyester elastomers. According to such an elastomer, a resin film having a desired degree of alkali swelling can be formed by adjusting the acid equivalent, the degree of crosslinking or the degree of gelation of the elastomer dispersed as a suspension or emulsion. Moreover, the swelling degree with respect to the predetermined | prescribed liquid used in a film removal process can be enlarged, and the resin film which melt | dissolves with respect to the said liquid can also be formed easily. The carboxyl group in the elastomer swells the resin film with respect to the alkaline aqueous solution and acts to peel the resin film from the surface of the insulating layer 2. The acid equivalent is the polymer molecular weight per carboxyl group.

  Specific examples of the monomer unit having a carboxyl group include (meth) acrylic acid, fumaric acid, cinnamic acid, crotonic acid, itaconic acid, maleic anhydride, and the like.

  The content ratio of the carboxyl group in the elastomer having such a carboxyl group is preferably 100 to 2000, more preferably 100 to 800 in terms of acid equivalent. When the acid equivalent is too small (when the number of carboxyl groups is relatively large), the compatibility with a pretreatment solution for electroless plating is reduced due to a decrease in compatibility with a solvent or other composition. Tend. In addition, when the acid equivalent is too large (when the number of carboxyl groups is relatively small), the peelability with respect to the alkaline aqueous solution tends to decrease.

  The molecular weight of the elastomer is preferably 10,000 to 1,000,000, more preferably 20,000 to 500,000, and more preferably 20,000 to 60,000. If the molecular weight of the elastomer is too large, the releasability tends to decrease, and if it is too small, the viscosity decreases, making it difficult to maintain a uniform thickness of the resin film and before electroless plating. There is also a tendency that the resistance to the treatment liquid also decreases.

  In addition, as DFR, for example, an acrylic resin, an epoxy resin, a styrene resin, a phenol resin, a urethane resin, or the like containing a predetermined amount of a carboxyl group is used as a resin component, and a photopolymerization initiator is included. A sheet of curable resin composition may be used. Specific examples of such DFR include a dry film of a photopolymerizable resin composition as disclosed in JP-A-2000-231190, JP-A-2001-201851, and JP-A-11-212262. Sheets obtained by curing, and commercially available as an alkali development type DFR, for example, UFG series manufactured by Asahi Kasei Kogyo Co., Ltd. may be mentioned.

  Examples of other resin coatings include rosin-based resins containing carboxyl groups (for example, “NAZDAR229” manufactured by Yoshikawa Chemical Co., Ltd.) and phenol-based resins (for example LEKTRACHEM). Manufactured "104F").

  The resin coating 3 is formed on the surface of the insulating layer 2 by applying a resin suspension or emulsion using a conventionally known coating means such as a spin coat method or a bar coater method, followed by drying, or a support substrate. After the DFR is bonded to the surface of the insulating layer 2 using a vacuum laminator or the like, it can be easily formed by curing the entire surface.

  For example, the thickness of the resin coating 3 is preferably 10 μm or less, and more preferably 5 μm or less. Moreover, 0.1 micrometer or more is preferable and 1 micrometer or more is further more preferable. When the thickness is too thick, the accuracy tends to be lowered when the fine circuit groove is formed by laser processing or machining. Moreover, when the thickness is too thin, it tends to be difficult to form the resin film 3 having a uniform film thickness.

  Moreover, as the resin film 3, for example, a resin film mainly composed of a resin (carboxyl group-containing acrylic resin) made of an acrylic resin having a carboxyl group with an acid equivalent of about 100 to 800 can also be used. .

  In addition to the above, the following is also suitable as the resin coating 3. That is, as a characteristic required for the resist material constituting the resin film, for example, (1) an insulating base material (circuit board, insulating layer, etc.) on which the resin film is formed is immersed in a catalyst deposition process described later. Resistant to liquid (plating nucleation chemical solution) is high, (2) Resin film (resist) is easily removed by the film removal process described later, for example, the process of immersing the insulating base material on which the resin film is formed in alkali (3) High film formability, (4) Easy dry film (DFR) formation, (5) High storage stability, and the like. As the plating nucleation chemical solution, as will be described later, for example, in the case of an acidic Pd—Sn colloid catalyst system, all are acidic (for example, pH 1 to 3) aqueous solutions. Moreover, in the case of an alkaline Pd ion catalyst system, the catalyst imparting activator is a weak alkali (pH 8 to 12), and the others are acidic. From the above, it is necessary to withstand pH 1 to 11, and preferably pH 1 to 12, as the resistance to the plating nucleating solution. In addition, being able to withstand is that when a sample on which a resist is formed is immersed in a chemical solution, swelling and dissolution of the resist are sufficiently suppressed, and the resist plays a role as a resist. The immersion temperature is generally room temperature to 60 ° C., the immersion time is 1 to 10 minutes, and the resist film thickness is generally about 1 to 10 μm, but is not limited thereto. As the alkali stripping chemical used in the film removal step, as will be described later, for example, an aqueous NaOH solution or an aqueous sodium carbonate solution is common. Its pH is 11 to 14, and it is desirable that the resist film can be easily removed preferably at pH 12 to 14. The NaOH aqueous solution concentration is about 1 to 10%, the treatment temperature is room temperature to 50 ° C., the treatment time is 1 to 10 minutes, and the immersion or spray treatment is generally performed, but is not limited thereto. Since a resist is formed on an insulating material, film formability is also important. A uniform film formation without repelling or the like is necessary. Moreover, although it is made into a dry film for the simplification of a manufacturing process, reduction of material loss, etc., the flexibility of a film is required in order to ensure handling property. Also, a dry film resist is pasted on the insulating material with a laminator (roll, vacuum). The pasting temperature is room temperature to 160 ° C., and the pressure and time are arbitrary. Thus, adhesiveness is required at the time of pasting. For this reason, the resist formed into a dry film is generally used as a three-layer structure sandwiched by a carrier film and a cover film to prevent dust from adhering, but is not limited thereto. The best preservation is that it can be stored at room temperature, but it must also be refrigerated or frozen. As described above, it is necessary to prevent the composition of the dry film from being separated at low temperatures or to be cracked due to a decrease in flexibility.

  From the above viewpoint, as the resin coating 3, (a) at least one monomer of carboxylic acid or acid anhydride having at least one polymerizable unsaturated group in the molecule, and (b) ( It may be a polymer resin obtained by polymerizing a) at least one monomer that can be polymerized with a monomer, or a resin composition containing this polymer resin. Known techniques include JP-A-7-281437, JP-A-2000-231190, JP-A-2001-201851, and the like. (A) As an example of the monomer, (meth) acrylic acid, fumaric acid, cinnamic acid, crotonic acid, itaconic acid, maleic anhydride, maleic acid half ester, butyl acrylate, etc. may be mentioned alone or Two or more types may be combined. Examples of the monomer (b) are generally non-acidic and have (1) a polymerizable unsaturated group in the molecule, but are not limited thereto. It is selected so as to maintain various properties such as resistance in the plating process and flexibility of the cured film. Specifically, methyl (meth) acrylate, ethyl (meth) acrylate, iso-propyl (meth) acrylate, n-butyl (meth) acrylate, sec-butyl (meth) acrylate, tert-butyl (meth) acrylate, 2 -There are hydroxylethyl (meth) acrylates and 2-hydroxylpropyl (meth) acrylates. Further, there are esters of vinyl alcohol such as vinyl acetate, (meth) acrylonitrile, styrene or polymerizable styrene derivatives. It can also be obtained by polymerization of only a carboxylic acid or acid anhydride having one polymerizable unsaturated group in the molecule. Furthermore, a monomer having a plurality of unsaturated groups can be selected as the monomer used for the polymer so that three-dimensional crosslinking can be performed. In addition, reactive functional groups such as epoxy groups, hydroxyl groups, amino groups, amide groups, and vinyl groups can be introduced into the molecular skeleton.

  When a carboxyl group is contained in the resin, the amount of the carboxyl group contained in the resin is preferably 100 to 2000, preferably 100 to 800, and more preferably 100 to 600 in terms of acid equivalent. If the acid equivalent is too low, the compatibility with the solvent or other composition is lowered and the resistance to the plating pretreatment solution is lowered. If the acid equivalent is too high, the peelability is lowered. Further, the composition ratio of the monomer (a) is preferably 5 to 70% by mass.

  The resin composition may contain the polymer resin as an essential component as a main resin (binder resin), and may contain at least one of oligomers, monomers, fillers, and other additives. The main resin is preferably a linear polymer having thermoplastic properties. In order to control fluidity and crystallinity, it may be branched by grafting. The molecular weight is about 1,000 to 500,000 in terms of weight average molecular weight, and preferably 5,000 to 50,000. When the weight average molecular weight is small, the flexibility of the film and the resistance to the plating nucleation solution (acid resistance) are lowered. On the other hand, when the molecular weight is large, the alkali peelability and the sticking property when a dry film is formed deteriorate. Furthermore, a crosslinking point may be introduced to improve resistance to plating nucleus chemicals, suppress thermal deformation during laser processing, and control flow.

  Any monomer or oligomer may be used as long as it is resistant to plating nucleation chemicals and can be easily removed with alkali. Further, in order to improve the sticking property of the dry film (DFR), it can be considered that it is used as a tackifier as a plasticizer. Further, it is conceivable to add a crosslinking agent in order to increase various resistances. Specifically, methyl (meth) acrylate, ethyl (meth) acrylate, iso-propyl (meth) acrylate, n-butyl (meth) acrylate, sec-butyl (meth) acrylate, tert-butyl (meth) acrylate, 2 -There are hydroxylethyl (meth) acrylates and 2-hydroxylpropyl (meth) acrylates. Further, there are esters of vinyl alcohol such as vinyl acetate, (meth) acrylonitrile, styrene or polymerizable styrene derivatives. It can also be obtained by polymerization of only a carboxylic acid or acid anhydride having one polymerizable unsaturated group in the molecule. Furthermore, a polyfunctional unsaturated compound may be included. Any of the above monomers or oligomers obtained by reacting the monomers may be used. In addition to the above monomers, it is possible to include two or more other photopolymerizable monomers. Examples of monomers include 1,6-hexanediol di (meth) acrylate, 1,4-cyclohexanediol di (meth) acrylate, polypropylene glycol di (meth) acrylate, polyethylene glycol di (meth) acrylate, polyoxyethylene Polyoxyalkylene glycol di (meth) acrylate such as polyoxypropylene glycol di (meth) acrylate, 2-di (p-hydroxyphenyl) propane di (meth) acrylate, glycerol tri (meth) acrylate, dipentaerythritol penta (meth) Acrylate, trimethylolpropane triglycidyl ether tri (meth) acrylate, bisphenol A diglycidyl ether tri (meth) acrylate, 2,2-bis (4-methacryloxy) Pointer ethoxyphenyl) propane, there is a polyfunctional (meth) acrylate containing urethane groups. Any of the above monomers or oligomers obtained by reacting the monomers may be used.

  The filler is not particularly limited, but silica, aluminum hydroxide, magnesium hydroxide, calcium carbonate, clay, kaolin, titanium oxide, barium sulfate, alumina, zinc oxide, talc, mica, glass, potassium titanate, wollastonite, sulfuric acid Magnesium, aluminum borate, an organic filler, etc. are mentioned. Moreover, since the preferable thickness of a resist is as thin as 0.1-10 micrometers, the thing with a small filler size is preferable. Although it is preferable to use a material having a small average particle size and cut coarse particles, the coarse particles can be crushed during dispersion or removed by filtration.

  Examples of other additives include a photopolymerizable resin (photopolymerization initiator), a polymerization inhibitor, a colorant (dye, pigment, coloring pigment), a thermal polymerization initiator, and a crosslinking agent such as epoxy and urethane.

  In the circuit groove forming step to be described next, the resin coating 3 is subjected to laser processing or the like, and therefore it is necessary to impart a laser ablation property to the resist material. As the laser processing machine, for example, a carbon dioxide laser, an excimer laser, a UV-YAG laser, or the like is selected. These laser processing machines have various intrinsic wavelengths, and productivity can be improved by using a material having a high UV absorption rate for these wavelengths. Among them, the UV-YAG laser is suitable for fine processing, and the laser wavelength is 3rd harmonic 355 nm and 4th harmonic 266 nm. Therefore, as a resist material (material for the resin coating 3), Therefore, it is desirable that the UV absorption rate is relatively high. The higher the UV absorptivity, the finer the resist processing and the higher the productivity. However, the present invention is not limited to this, and it may be better to select a resist material having a relatively low UV absorption rate. The lower UV absorption rate, the more UV light passes through the resist, so that the UV energy can be concentrated on the processing of the insulating layer 2 below, and the result is particularly preferable when the insulating layer 2 is a material that is difficult to process. Is obtained. As described above, it is preferable to design the resist material according to the ease of laser processing of the resist, the ease of laser processing of the insulating layer 2, and the relationship thereof.

<Circuit groove forming step (c)>
Next, as shown in FIG. 1C, a circuit groove 4 is formed by forming a groove having a predetermined depth at least equal to or greater than the thickness of the resin film 3 from the upper surface (outer surface) of the resin film 3. (Circuit pattern formation process). The circuit groove 4 is formed by laser processing, cutting processing, embossing processing, or the like. The groove of the circuit groove 4 is mainly a groove for an electric circuit and an interlayer connection hole (via), and may be a groove having a different size and depth depending on the application. Further, depending on the situation, the circuit groove 4 may include an electrode pad hole.

  In this case, when the circuit groove 4 is formed by the thickness of the resin coating 3, the insulating layer 2 is not dug and the circuit groove 4 is placed on the upper surface (outer surface) of the insulating layer 2 (FIG. Not shown). On the other hand, when the circuit groove 4 is formed exceeding the thickness of the resin coating 3, the insulating layer 2 is dug as shown in each circuit groove 4 in FIG. The circuit groove 4 is embedded in the upper surface (outer surface).

  The depth and width of the circuit groove 4 are not particularly limited. The depth and width of the groove can be appropriately set according to the application, such as for electric circuits, interlayer connection holes (vias), and pads. When laser processing is used, a fine groove having a line width of 20 μm or less can be easily formed.

  In a preferred embodiment, the depth of the groove is 20 μm or less, more preferably 15 μm or less. The width of the groove is preferably 20 μm or less, and more preferably 15 μm or less.

  The method for forming the circuit groove 4 is not particularly limited. Specifically, cutting by laser processing, dicing processing, etc., embossing, etc. are used. In order to form a highly accurate fine circuit groove 4 having a different size and depth, laser processing is preferable. According to laser processing, the digging depth of the insulating layer 2 can be easily adjusted by controlling the output (energy or power) of the laser. As the embossing, for example, embossing with a fine resin mold used in the field of nanoimprinting can be preferably used.

  By forming the predetermined circuit groove 4 in this way, a portion where an electroless plating film is provided later to form a circuit or the like is defined.

  Further, according to the present embodiment, the circuit grooves 4 having different sizes and depths can be formed by a single groove forming process, and the alignment necessary for forming the grooves is only performed once. There is. Thereby, it is considered that the problem of misalignment, which has been a problem when forming fine wiring, can be solved.

<Catalyst deposition process>
Next, as shown in FIG. 1D, the plating catalyst 5 is deposited on the surface of the resin coating 3 and the surface of the circuit groove 4 (catalyst deposition step). That is, this is a step of depositing the plating catalyst 5 on the entire surface where the circuit groove 4 is formed and the surface where the circuit groove 4 is not formed. Here, the plating catalyst 5 is a concept including its precursor.

  The plating catalyst 5 is a catalyst that is applied in advance in order to form the plating film only on the portion where the electroless plating film is desired to be formed in the plating process described later. The plating catalyst 5 can be used without any particular limitation as long as it is known as a catalyst for electroless plating. Alternatively, the precursor of the plating catalyst 5 may be deposited in advance, and the plating catalyst 5 may be generated after the resin coating 3 is removed. Specific examples of the plating catalyst 5 include, for example, metal palladium (Pd), platinum (Pt), silver (Ag), and the like, and precursors that generate these.

  Examples of the method of depositing the plating catalyst 5 include a method of treating with an acidic Pd—Sn colloidal solution treated under acidic conditions of pH 1 to 3 and then treating with an acid solution. More specifically, the following methods can be mentioned.

First, oil or the like adhering to the surface of the insulating layer 2 in which the circuit groove 4 is formed is washed with hot water in a surfactant solution (cleaner / conditioner) for a predetermined time. Next, if necessary, a soft etching treatment is performed with a sodium persulfate-sulfuric acid based soft etching agent. And it pickles further in acidic solutions, such as sulfuric acid aqueous solution of pH 1-2, and aqueous hydrochloric acid. Next, a pre-dip treatment is performed in which a chloride ion is adsorbed on the surface of the insulating layer 2 by dipping in a pre-dip solution mainly containing a stannous chloride aqueous solution having a concentration of about 0.1%. Thereafter, Pd and Sn are aggregated and adsorbed by further dipping in an acidic catalytic metal colloid solution such as acidic Pd—Sn colloid having pH 1 to 3 containing stannous chloride and palladium chloride. Then, an oxidation-reduction reaction (SnCl ₂ + PdCl ₂ → SnCl ₄ + Pd ↓) is caused between the adsorbed stannous chloride and palladium chloride. Thereby, the metal palladium which is the plating catalyst 5 is deposited.

  In addition, as an acidic catalyst metal colloid solution, a well-known acidic Pd-Sn colloid catalyst solution etc. can be used, and the commercially available plating process using an acidic catalyst metal colloid solution may be used. Such a process is systematized and sold by, for example, Rohm & Haas Electronic Materials.

  By such a catalyst deposition process, the plating catalyst 5 can be deposited on the surface of the resin film 3 and the surface of the circuit groove 4 as shown in FIG.

<Film removal process>
Next, as shown in FIG.1 (e), the resin film 3 is removed from the insulating layer 2 (film removal process). That is, when the resin film 3 is made of a soluble resin, the resin film 3 is dissolved using an organic solvent or an alkaline solution and removed from the surface of the insulating layer 2. When the resin coating 3 is made of a swellable resin, the resin coating 3 is swollen using a predetermined liquid, and is peeled off from the surface of the insulating layer 2 and removed.

  According to this coating removal process, the plating catalyst 5 can remain only on the surface of the insulating layer 2 where the circuit groove 4 is formed. On the other hand, the plating catalyst 5 deposited on the surface of the resin coating 3 is removed from the insulating layer 2 together with the resin coating 3. Here, from the viewpoint of preventing the plating catalyst 5 removed from the insulating layer 2 from scattering and re-depositing on the surface of the insulating layer 2, the resin coating 3 collapses apart when removed from the insulating layer 2. It is preferable that the whole can be removed without being continuous.

  The liquid that dissolves or swells the resin coating 3 can be easily removed or removed from the insulating layer 2 without substantially decomposing or dissolving the substrate 1, the insulating layer 2, and the plating catalyst 5. Any liquid that can be dissolved or swollen to the extent can be used without particular limitation. Such a resin film removing liquid can be appropriately selected depending on the type and thickness of the resin film 3. Specifically, for example, when a photocurable epoxy resin is used as the resist resin, an organic solvent, a resist remover in an alkaline aqueous solution, or the like is used. For example, when the resin film 3 is formed of an elastomer such as a diene elastomer, an acrylic elastomer, and a polyester elastomer, or as the resin film 3, (a) a polymerizable unsaturated group is included in the molecule. It is obtained by polymerizing at least one monomer of carboxylic acid or acid anhydride having at least one and at least one monomer that can be polymerized with (b) (a) monomer. In the case of a polymer resin to be produced, or a resin composition containing this polymer resin, or formed from the aforementioned carboxyl group-containing acrylic resin, for example, hydroxylation at a concentration of about 1 to 10% An aqueous alkali solution such as an aqueous sodium solution can be preferably used.

  In the case of using a plating process that is performed under acidic conditions as described above in the catalyst deposition step, the resin film 3 has a swelling degree of 60% or less, preferably 40% or less under acidic conditions. It is formed of an elastomer such as a diene elastomer, an acrylic elastomer, and a polyester elastomer that has a degree of swelling of 50% or more under alkaline conditions, or (a) polymerizable in the molecule. Polymerizing at least one monomer of carboxylic acid or acid anhydride having at least one unsaturated group and at least one monomer capable of polymerizing with (b) (a) monomer Or a resin composition containing this polymer resin, or the above-mentioned carboxyl group-containing acrylic resin. It is preferably formed from the system resin. Such a resin coating is easily dissolved or swollen by being immersed in an alkaline aqueous solution having a pH of 11 to 14, preferably a pH of 12 to 14, such as a sodium hydroxide aqueous solution having a concentration of about 1 to 10%. Then, it is removed by dissolution or peeling. In addition, in order to improve solubility or peelability, you may irradiate with an ultrasonic wave during immersion. Moreover, you may remove by peeling with a light force as needed.

  Examples of the method for removing the resin coating 3 include a method of immersing the insulating layer 2 coated with the resin coating 3 in a resin coating removal liquid for a predetermined time. Moreover, in order to improve dissolution removal property or peeling removal property, it is particularly preferable to irradiate ultrasonic waves during immersion. In addition, when it is difficult to remove or remove, for example, it may be peeled off with a light force as necessary.

<Plating process>
Next, as shown in FIG. 1 (f), the insulating layer 2 is subjected to electroless plating to form an electroless plating film 6 in the portion of the circuit groove 4 where the plating catalyst 5 remains to form the insulating layer 2. A circuit is formed. Alternatively, the metal pillar connected to the substrate 1 can be formed by forming the plating film 6 in the groove for the interlayer connection hole (via).

  By such electroless plating treatment, the electroless plating film 6 is deposited on the portion where the circuit groove 4 is formed. By this process, the conductors can be filled in the circuit grooves having different sizes and depths, and the manufacturing process can be simplified.

  In this embodiment, it is preferable that the circuit groove 4 is completely filled with the plating film 6 as shown in FIG. Alternatively, it is preferable to perform plating so that the plating film 6 slightly protrudes from the circuit groove 4. The specific plating time is not particularly limited, but can be appropriately changed according to the size of the via hole and the trench. For example, the plating process can be performed by immersing the substrate in an electroless plating solution for 30 to 600 minutes. By setting the plating time longer, the circuit groove 4 can be plated (overplated) to a level protruding from the surface of the insulating layer 2. The plating temperature is not particularly limited as long as metal ions such as copper ions cause a reduction reaction. However, the temperature of the plating solution is set to 20 to 90 ° C. from the viewpoint of efficiently performing the reduction reaction. It is preferable that the temperature is set to 50 to 70 ° C.

  As described above, the circuit groove 4 is plated (over-plated) to a level protruding from the surface of the insulating layer 2, and in the etching process described later, this protruding portion is removed to remove the insulating layer. The circuit portion can be flattened, the occurrence of a short circuit can be prevented, and the occurrence of poor connection due to unfilled holes can be suppressed.

  As an electroless plating method, the insulating layer 2 partially coated with the plating catalyst 5 is immersed in an electroless plating solution, and an electroless plated film is deposited only on the portion where the plating catalyst 5 is deposited. Such a method can be used.

  Examples of the metal used for electroless plating include copper (Cu), nickel (Ni), cobalt (Co), and aluminum (Al). Of these, plating mainly composed of Cu is preferable because of its excellent conductivity. Moreover, when Ni is included, it is preferable from the point which is excellent in corrosion resistance and adhesiveness with a solder.

  The film thickness of the electroless plating film is not particularly limited. Specifically, for example, it is preferably about 0.1 to 10 μm, more preferably about 1 to 5 μm.

  Through the plating process, an electroless plating film is deposited only on the portion of the surface of the insulating layer 2 where the plating catalyst 5 remains. Therefore, a conductor layer can be formed in a portion where a circuit, a via or the like is to be formed. On the other hand, the deposition of the electroless plating film on the portion where the circuit groove 4 is not formed can be suppressed.

<Etching process>
Next, as shown in FIG. 1G, the plating film 6 protruding from the surface of the insulating layer 2 out of the plating film 6 formed by the plating process is removed by etching to form a circuit 7. To do.

  Specifically, first, the amount of protrusion is measured for the plating film 6 protruding from the surface of the insulating layer 2 in FIG. The measurement is performed, for example, using a scanning confocal laser microscope LEXT OLS3000 manufactured by OLYMPUS, and measuring the height of the protruding portion protruding from the substrate surface. The amount to be etched is set according to the obtained measurement amount, and the etching process is performed. The etching treatment is not particularly limited, but can be performed using an etching agent.

  The etchant used in the present embodiment is preferably an alkaline etchant. Specifically, an alkaline compound containing an amine compound as a main component, and at least a hydrogen peroxide solution and sulfuric acid can be used. By using such an etching agent, it is considered that the plating film at the overplated portion can be efficiently and easily removed. It is preferable that the etching agent further contains an organic acid. Furthermore, the etching solution is preferably a microetching solution.

  The etching process of this embodiment can be performed, for example, by spraying the etching agent as described above on the substrate. The spray conditions are not particularly limited as long as the overplated portion can be processed without excess or deficiency, but from the viewpoint of adjusting the etching processing amount, the aqueous solution temperature should be set to 20 ° C to 40 ° C, and the spray pressure should be set to about 0.01 MPa to 0.2 MPa. It is preferable that the spray treatment time is appropriately determined according to the amount of overplated portion and the treatment conditions.

  By such an etching process, it is possible to remove the excessive plating film 6 and form a highly reliable circuit and interlayer connection via. FIG. 3 shows the surface of the substrate before and after etching. The figure on the left shows the state before etching, and it can be seen that the adjacent circuits are short-circuited due to overplating. The right figure shows the state after the etching process, but the short circuit that occurred before the etching is eliminated.

  FIG. 4 is a cross-sectional view of the substrate before and after etching. As in FIG. 3, the left figure shows the state before etching, and the right figure shows the state after the etching process. As is apparent from FIG. 4, the surface of both the embedded circuit portion and the via portion is flattened after the etching process.

  A circuit board having a circuit or a via on the surface of the insulating layer 2 can be manufactured through the steps (a) to (g) as described above.

  Furthermore, as shown in FIG. 2, multilayering is performed on the obtained circuit board by repeating the steps (a) to (g) described above, and a multilayer circuit board can be manufactured. A solder resist may be formed on the circuit board thus obtained for circuit protection.

  According to the manufacturing method of the present embodiment, alignment at the time of groove formation can be performed once, and grooves of different depths and sizes can be filled (filled) at a time, so that the manufacturing process is simplified. Productivity also increases. In addition, since the insulating layer and the circuit portion / via portion are flattened, components can be mounted on the circuit surface, and a short circuit can be eliminated.

  FIG. 5 is a cross-sectional view comparing an embedded circuit (left diagram) created by a conventional manufacturing method with an embedded circuit (right diagram) created according to the present embodiment. In the conventional manufacturing method, when the filling of the plating film 6 serving as the conductor into the circuit groove 4 is insufficient, when the component 9 is mounted on the circuit, an unfilled hole is formed. It can be seen that the connection with 9 is insufficient. In addition, even when the circuit groove 4 is sufficiently filled with the plating film 6, it can be seen that the circuit portion and the mounting component 9 are not sufficiently connected due to excessive unevenness of the plating film 6 on the circuit surface. On the other hand, in the circuit board obtained by the manufacturing method of the present embodiment shown in the right figure of FIG. 5, the surface of the circuit 7 and the surface of the insulating layer 2 are flattened, so that the component 9 can be mounted on the surface of the circuit 7. ing.

  FIG. 6 is a cross-sectional view showing the multilayer circuit board (left figure) obtained by the conventional method and the multilayer circuit board (right figure) produced by the manufacturing method of the present embodiment, obtained through the multilayering process. In the conventional manufacturing method, when the circuit groove 4 is not sufficiently filled with the plating film 6 serving as a conductor, when the second insulating layer (second insulating layer) 12 is formed thereon, The resin forming the insulating layer is filled, and a dent is generated on the surface of the second insulating layer 12. If the dent is generated, there is a problem that the laser processing of the second and subsequent layers, component mounting, and the like are hindered. In the present embodiment, by flattening the substrate surface, the insulating layer can be formed flat also in the second and subsequent layers, and a highly reliable multilayer circuit board can be manufactured.

  As described above, the present specification discloses various modes of technology, of which the main technologies are summarized below.

  A method of manufacturing a multilayer circuit board according to one aspect of the present invention is a method of manufacturing a multilayer circuit board having an electrical circuit and an interlayer connection hole that are connected to each other, and the core substrate or the first electrical circuit is formed. An insulating layer forming step (a) for forming an insulating layer on the circuit forming surface of the circuit board, a film forming step (b) for forming a resin coating on the outer surface of the insulating layer, and the outer surface of the resin coating as a reference A circuit groove forming step (c) for exposing the core substrate or the circuit board on which the first electric circuit is formed by forming a groove having a depth equal to or greater than a thickness of the resin film; and a surface of the resin film; A catalyst deposition step (d) for depositing a plating catalyst on the surface of the circuit groove; a coating removal step (e) for swelling and removing the resin coating from the insulating layer; and electroless plating on the insulating layer. Due to residual plating catalyst Plating (f) forming a plating film on a portion that, and characterized in that it comprises the etching process is removed by etching (g) plating portion projecting from the insulating layer surface.

  With such a configuration, it is possible to provide a simple and reliable method for manufacturing a multilayer circuit board. In particular, since the insulating layer and the circuit portion / via portion are flattened by the etching step, it is possible to mount components on the circuit surface and eliminate a short circuit.

  Furthermore, in the above manufacturing method, the resin film is preferably a resin film that can be dissolved or removed from the insulating layer by dissolving or swelling with a predetermined liquid. By using such a resin film, the resin film can be easily and satisfactorily removed from the surface of the insulating layer, so that the effects described above can be obtained more reliably.

  Further, the catalyst deposition step includes a step of treating in an acidic catalyst metal colloid solution, and the coating peeling step includes a step of swelling or dissolving the resin coating in an alkaline solution, wherein the resin coating comprises the acidic catalyst. A resin film that does not swell or dissolve in the metal colloid solution and swells or dissolves in the alkaline solution is preferable.

  Thereby, since the resin film can be easily and satisfactorily removed from the surface of the insulating layer, the above-described effects can be obtained more reliably.

  Furthermore, it is preferable that the circuit groove forming step includes forming grooves having different sizes and depths by laser processing in order to provide the circuit pattern for electric circuit and the hole for interlayer connection. As a result, alignment at the time of groove formation can be performed at a time, and grooves with different depths and sizes can be filled and filled (filling) at the same time, which simplifies the manufacturing process and improves productivity. Conceivable.

  In addition, it is preferable that the plating treatment step includes that the circuit groove is completely filled by plating by selectively forming a plating film in the circuit groove where the plating catalyst remains. Thereby, it is considered that the insulating layer and the circuit portion / via portion are more reliably planarized.

  Furthermore, in the manufacturing method, it is preferable that the etching step is an etching process using an alkaline etchant containing an amine compound as a main component and further containing at least a hydrogen peroxide solution and sulfuric acid. As a result, the overplated portion of the plating film is removed, and the above effect is considered to be obtained more reliably.

  Moreover, it is preferable that the alkaline etching agent further contains an organic acid. Thereby, it is thought that the said effect is acquired more reliably.

  Moreover, the said manufacturing method may be provided with the multilayering process which multilayers by repeating the said insulating-layer formation process (a)-the said etching process (g).

1 Core or circuit board 2,12 Insulating layer 3,13 Resin coating 4,14 Circuit groove (electric circuit groove and interlayer connection hole)
5,15 Plating catalyst 6,16 Electroless plating film 7,17 Via for circuit or interlayer connection 8 Solder ball 9 Mounting parts

Claims (8)

A method of manufacturing a multilayer circuit board having electrical circuits and interlayer connection holes connected to each other,
An insulating layer forming step (a) for forming an insulating layer on the circuit forming surface of the core substrate or the circuit board on which the first electric circuit is formed;
A film forming step (b) for forming a resin film on the outer surface of the insulating layer;
A circuit groove forming step of exposing the core substrate or the circuit board on which the first electric circuit is formed by forming a groove having a depth equal to or greater than the thickness of the resin film with reference to the outer surface of the resin film. (C),
A catalyst deposition step (d) for depositing a plating catalyst on the surface of the resin coating and the surface of the circuit groove;
A film removing step (e) for removing the resin film from the insulating layer;
A plating treatment step (f) for forming a plating film on the portion where the plating catalyst remains by performing electroless plating on the insulating layer, and an etching step (g) for removing the plating portion protruding from the surface of the insulating layer by etching. )
A method for manufacturing a multilayer circuit board.   The method for producing a multilayer circuit board according to claim 1, wherein the resin coating is a resin coating that can be dissolved or removed from the insulating layer by dissolving or swelling with a predetermined liquid. The catalyst deposition step comprises a step of treating in an acidic catalyst metal colloid solution, and the coating stripping step comprises a step of swelling or dissolving the resin coating in an alkaline solution;
3. The multilayer circuit board according to claim 1, wherein the resin film is a resin film that does not swell or dissolve in the acidic catalyst metal colloid solution and swells or dissolves in the alkaline solution. Method.   4. The circuit groove forming step according to claim 1, wherein the circuit groove forming step includes forming grooves having different sizes and depths by laser processing in order to provide a circuit pattern for an electric circuit and an interlayer connection hole. Manufacturing method for multilayer circuit board.   5. The plating process according to claim 1, wherein the plating treatment step includes that the circuit groove is completely filled by plating by selectively forming a plating film in the circuit groove where the plating catalyst remains. The manufacturing method of the multilayer circuit board as described.   The multilayer circuit board according to claim 1, wherein the etching step is an etching process using an alkaline etchant containing an amine compound as a main component and further containing at least a hydrogen peroxide solution and sulfuric acid. Method.   The manufacturing method of the multilayer circuit board in any one of Claims 1-6 in which the said alkaline etching agent contains an organic acid further. The manufacturing method of the multilayer circuit board in any one of Claims 1-7 provided with the multilayering process which multilayers by repeating the said insulating-layer formation process (a)-the said etching process (g).

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