JP2017117509A - メモリセル - Google Patents

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Publication number
JP2017117509A
JP2017117509A JP2016246994A JP2016246994A JP2017117509A JP 2017117509 A JP2017117509 A JP 2017117509A JP 2016246994 A JP2016246994 A JP 2016246994A JP 2016246994 A JP2016246994 A JP 2016246994A JP 2017117509 A JP2017117509 A JP 2017117509A
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JP
Japan
Prior art keywords
transistor
memory cell
gate
voltage
present
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2016246994A
Other languages
English (en)
Japanese (ja)
Other versions
JP2017117509A5 (enExample
Inventor
ヤン・ファン・ハウト
Van Houdt Jan
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Interuniversitair Microelektronica Centrum vzw IMEC
Original Assignee
Interuniversitair Microelektronica Centrum vzw IMEC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Interuniversitair Microelektronica Centrum vzw IMEC filed Critical Interuniversitair Microelektronica Centrum vzw IMEC
Publication of JP2017117509A publication Critical patent/JP2017117509A/ja
Publication of JP2017117509A5 publication Critical patent/JP2017117509A5/ja
Pending legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0441—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing multiple floating gate devices, e.g. separate read-and-write FAMOS transistors with connected floating gates
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0441—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing multiple floating gate devices, e.g. separate read-and-write FAMOS transistors with connected floating gates
    • G11C16/045—Floating gate memory cells with both P and N channel memory transistors, usually sharing a common floating gate
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/26—Sensing or reading circuits; Data output circuits
    • G11C16/28—Sensing or reading circuits; Data output circuits using differential sensing or reference cells, e.g. dummy cells
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/701—IGFETs having ferroelectric gate insulators, e.g. ferroelectric FETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/68—Floating-gate IGFETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/69—IGFETs having charge trapping gate insulators, e.g. MNOS transistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/689—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having ferroelectric layers

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Memories (AREA)
  • Read Only Memory (AREA)
  • Non-Volatile Memory (AREA)
JP2016246994A 2015-12-21 2016-12-20 メモリセル Pending JP2017117509A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP15201495 2015-12-21
EP15201495.7 2015-12-21

Publications (2)

Publication Number Publication Date
JP2017117509A true JP2017117509A (ja) 2017-06-29
JP2017117509A5 JP2017117509A5 (enExample) 2019-12-12

Family

ID=54979498

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2016246994A Pending JP2017117509A (ja) 2015-12-21 2016-12-20 メモリセル

Country Status (2)

Country Link
US (1) US9847109B2 (enExample)
JP (1) JP2017117509A (enExample)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10937783B2 (en) 2016-11-29 2021-03-02 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device and manufacturing method thereof
US9966465B1 (en) * 2017-06-23 2018-05-08 United Microelectronics Corp. Non-volatile memory device
US10957373B2 (en) 2018-07-05 2021-03-23 Samsung Electronics Co., Ltd. Semiconductor memory device
US10839893B2 (en) * 2018-09-28 2020-11-17 Kneron (Taiwan) Co., Ltd. Memory cell with charge trap transistors and method thereof capable of storing data by trapping or detrapping charges
WO2021202575A1 (en) * 2020-03-31 2021-10-07 The Regents Of The University Of California Apparatus and method for changing the functionality of an integrated circuit using charge trap transistors
CN112349775B (zh) * 2020-09-16 2022-12-02 清华大学 超陡亚阈值摆幅器件及其制备方法
US12026605B2 (en) * 2020-12-03 2024-07-02 International Business Machines Corporation FeFET unit cells for neuromorphic computing

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20010038555A1 (en) * 2000-04-27 2001-11-08 Kiyoshi Kato Nonvolatile memory and semiconductor device
JP2002043447A (ja) * 2000-04-27 2002-02-08 Semiconductor Energy Lab Co Ltd 不揮発性メモリおよび半導体装置
JP2008042189A (ja) * 2006-07-14 2008-02-21 Semiconductor Energy Lab Co Ltd 不揮発性メモリ
US7596024B2 (en) * 2006-07-14 2009-09-29 Semiconductor Energy Laboratory Co., Ltd. Nonvolatile memory

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5581501A (en) * 1995-08-17 1996-12-03 Altera Corporation Nonvolatile SRAM cells and cell arrays
US5648930A (en) * 1996-06-28 1997-07-15 Symbios Logic Inc. Non-volatile memory which is programmable from a power source
JP3378879B2 (ja) * 1997-12-10 2003-02-17 松下電器産業株式会社 不揮発性半導体記憶装置及びその駆動方法
US6002610A (en) * 1998-04-30 1999-12-14 Lucent Technologies Inc. Non-volatile memory element for programmable logic applications and operational methods therefor
US7212438B2 (en) * 2005-02-25 2007-05-01 Infineon Technologies Ag Semiconductor device and method of operating a semiconductor device
US7301821B1 (en) * 2005-10-13 2007-11-27 Actel Corporation Volatile data storage in a non-volatile memory cell array
TW200812074A (en) * 2006-07-04 2008-03-01 Nxp Bv Non-volatile memory and-array

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20010038555A1 (en) * 2000-04-27 2001-11-08 Kiyoshi Kato Nonvolatile memory and semiconductor device
JP2002043447A (ja) * 2000-04-27 2002-02-08 Semiconductor Energy Lab Co Ltd 不揮発性メモリおよび半導体装置
JP2008042189A (ja) * 2006-07-14 2008-02-21 Semiconductor Energy Lab Co Ltd 不揮発性メモリ
US7596024B2 (en) * 2006-07-14 2009-09-29 Semiconductor Energy Laboratory Co., Ltd. Nonvolatile memory

Also Published As

Publication number Publication date
US20170178698A1 (en) 2017-06-22
US9847109B2 (en) 2017-12-19

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