JP2017084962A5 - - Google Patents
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- Publication number
- JP2017084962A5 JP2017084962A5 JP2015211723A JP2015211723A JP2017084962A5 JP 2017084962 A5 JP2017084962 A5 JP 2017084962A5 JP 2015211723 A JP2015211723 A JP 2015211723A JP 2015211723 A JP2015211723 A JP 2015211723A JP 2017084962 A5 JP2017084962 A5 JP 2017084962A5
- Authority
- JP
- Japan
- Prior art keywords
- wiring pattern
- insulating layer
- board according
- wiring board
- wiring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000010410 layer Substances 0.000 claims 12
- 239000002184 metal Substances 0.000 claims 6
- 239000000758 substrate Substances 0.000 claims 6
- 238000004519 manufacturing process Methods 0.000 claims 3
- 238000000034 method Methods 0.000 claims 2
- 239000004065 semiconductor Substances 0.000 claims 2
- 230000003746 surface roughness Effects 0.000 claims 2
- 239000002335 surface treatment layer Substances 0.000 claims 2
- 238000005530 etching Methods 0.000 claims 1
- 238000007788 roughening Methods 0.000 claims 1
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2015211723A JP6626687B2 (ja) | 2015-10-28 | 2015-10-28 | 配線基板、半導体装置及び配線基板の製造方法 |
| US15/297,782 US9799595B2 (en) | 2015-10-28 | 2016-10-19 | Careless wiring substrate having an insulation layer with a bulged covering portion and semiconductor device thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2015211723A JP6626687B2 (ja) | 2015-10-28 | 2015-10-28 | 配線基板、半導体装置及び配線基板の製造方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2017084962A JP2017084962A (ja) | 2017-05-18 |
| JP2017084962A5 true JP2017084962A5 (enExample) | 2018-09-13 |
| JP6626687B2 JP6626687B2 (ja) | 2019-12-25 |
Family
ID=58637397
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2015211723A Active JP6626687B2 (ja) | 2015-10-28 | 2015-10-28 | 配線基板、半導体装置及び配線基板の製造方法 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US9799595B2 (enExample) |
| JP (1) | JP6626687B2 (enExample) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR102513086B1 (ko) * | 2018-10-01 | 2023-03-23 | 삼성전자주식회사 | 반도체 패키지 |
| JP7548086B2 (ja) * | 2021-03-19 | 2024-09-10 | 三菱電機株式会社 | 半導体装置の製造方法 |
| TWI803312B (zh) * | 2021-12-23 | 2023-05-21 | 南亞科技股份有限公司 | 具有多堆疊載體結構之半導體元件 |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4800253B2 (ja) * | 2007-04-04 | 2011-10-26 | 新光電気工業株式会社 | 配線基板の製造方法 |
| JP5003812B2 (ja) * | 2009-12-10 | 2012-08-15 | イビデン株式会社 | プリント配線板及びプリント配線板の製造方法 |
| JP5675443B2 (ja) * | 2011-03-04 | 2015-02-25 | 新光電気工業株式会社 | 配線基板及び配線基板の製造方法 |
| US8923008B2 (en) * | 2011-03-08 | 2014-12-30 | Ibiden Co., Ltd. | Circuit board and method for manufacturing circuit board |
| JP6223909B2 (ja) * | 2013-07-11 | 2017-11-01 | 新光電気工業株式会社 | 配線基板及びその製造方法 |
-
2015
- 2015-10-28 JP JP2015211723A patent/JP6626687B2/ja active Active
-
2016
- 2016-10-19 US US15/297,782 patent/US9799595B2/en active Active
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