JP2017084914A - Printed wiring board and method of manufacturing the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a printed wiring board provided with a plurality of field vias formed by performing field plating of a via hole under hole, in which the field vias are adjoining at narrow intervals, and packing of which is improved, and to provide a method of manufacturing the same.SOLUTION: In a printed wiring board 100 including a core layer 10 having conductive metal layers 2 formed on the opposite sides of an insulation resin 1, and a plurality of field vias formed in the core layer 10 while opening at least one end, the field vias 3 are tapered to become smaller continuously toward the bottom, and at least one of adjoining field vias 3 is formed from the face in the different direction of the front and rear faces of the core layer 10.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a printed wiring board and a manufacturing method thereof.

In recent years, with the enhancement of functionality and performance of electronic devices, semiconductor devices used in these electronic devices are becoming thinner and smaller. With the thinning and miniaturization of this semiconductor device, there is a demand for thinning and high-density mounting of printed wiring boards.
In order to make the printed wiring board thinner and more densely packed, it is preferable to narrow the gap (pitch) between via holes filled with a plurality of conductors provided on the printed wiring board.

Examples of the printed wiring board that narrows the gap between the via holes include the following printed wiring board.
In Patent Document 1, in order to narrow the gap between via holes, a tapered via-hole conductor (filled via) that penetrates the ground layer through an insulating portion and reaches the power supply layer in the multilayer core substrate, and the power supply layer at the insulating portion. A multilayer core substrate is shown in which tapered via-hole conductors that pass through to the ground layer are alternately arranged in parallel to narrow the gap between the via holes.
Further, in Patent Document 2, a tapered through hole whose diameter decreases from the upper surface to the lower surface of the core substrate and a tapered through hole whose diameter decreases from the lower surface of the core substrate to the upper surface are formed by laser processing, respectively. A printed wiring board is shown.

  However, when the via hole of the printed wiring board serves as a heat radiating part, if the gap between adjacent via holes is narrow, when the via hole pilot hole (hole) is processed with a laser, the heat of the laser is stagnated and the insulating resin of the core substrate There was a problem that the adhesion of the conductive metal foil was weakened and the conductive metal foil was peeled off. Furthermore, in the non-penetrating shape having the bottom in the via hole pilot hole, there is a problem that the laser processing causes the bottom of the via hole pilot hole to penetrate through the bottom of the laser due to the stagnation of the heat of the laser. If the gap between the via holes is wide, it is difficult to reduce the size of the printed wiring board. Furthermore, when a filled via is formed in a via hole by filled plating, filling from one side has a problem of filling property in the via hole.

  When forming a via-hole conductor as a heat dissipation part by the semi-additive method, the copper post is formed by using pattern plating, so the number of processes is increased compared to the case of using the subtractive method of forming a via hole by filled plating. There was a problem that the required time (lead time) was increased and the cost was high.

JP 2006-114741 A JP 2011-100908 A

The present invention relates to a printed wiring board provided with a plurality of filled vias formed by filling plated via hole pilot holes, and provides a printed wiring board in which filled vias are adjacent to each other in a narrow gap and its filling property is improved, and a manufacturing method thereof. This is the issue.
Moreover, another subject of this invention is providing the manufacturing method of the printed wiring board which suppressed cost.

The present invention has been completed in order to solve the above problems, and has the following configuration.
(1) A printed wiring board comprising: a core layer in which a conductive metal layer is formed on both surfaces of an insulating resin; and a plurality of filled vias formed by opening at least one of the core layers. At least one of them is a filled via formed from surfaces in different directions on the front and back surfaces of the core layer.
(2) The printed wiring board according to (1), wherein the filled via has a tapered shape that continuously decreases toward the bottom.
(3) The printed wiring board according to (1) or (2), wherein the filled vias are arranged in a hexagonal manner.
(4) The printed wiring board according to (1) or (2), wherein the filled vias are arranged in a square lattice.
(5) The printed wiring board according to any one of (1) to (4), wherein a plurality of filled vias are electrically connected to each other.
(6) A step of obtaining a core layer in which a conductive metal layer is formed on both surfaces of an insulating resin, and laser processing from the front and back surfaces of the core layer, respectively, and at least one of the adjacent via hole pilot holes is open. One includes a step of forming a plurality of via hole pilot holes formed from surfaces in different directions on the front and back surfaces of the core layer, and a step of forming a filled via by plating the via hole pilot holes. A method for manufacturing a printed wiring board.
(7) The via hole pilot hole is formed in a tapered shape whose diameter continuously decreases toward the bottom by laser processing, and at least one of the adjacent via hole pilot holes has a different taper direction. The manufacturing method of the printed wiring board as described in (6) formed.
(8) The via hole pilot hole is formed from the front and back surfaces of the core layer so that the two-dimensional arrangement is a hexagonal filling arrangement with respect to the core layer. (6) or (7) Production method.
(9) The via hole pilot hole is formed from the front and back surfaces of the core layer so that the two-dimensional arrangement is a square lattice arrangement with respect to the core layer. The printed wiring board according to (6) or (7), Production method.
(10) A step of laminating a second insulating resin layer on at least one surface of the core substrate, and forming a second via hole pilot hole connected to the filled via by laser processing on the second insulating resin layer. The method for producing a printed wiring board according to any one of (6) to (9), further comprising: providing a second filled via by plating.

According to the present invention, since at least one of the adjacent filled vias formed in the core layer is formed from surfaces in different directions on the front and back surfaces of the core layer, the adjacent filled vias are formed more than the filled via formed only on one side. The gap is reduced, and the number of filled vias that are biased to one side is divided in half, so that the fillability of filled vias is improved.
In addition, since the number of manufacturing steps is less than that of semi-additive formation, manufacturing costs and manufacturing time can be reduced.

It is explanatory drawing which shows one Embodiment of the printed wiring board which concerns on this invention. It is explanatory drawing which shows the via hole pilot hole which concerns on the printed wiring board of this invention. (A) And (b) is explanatory drawing which shows the via hole pilot hole in the conventional printed wiring board. (A) is a top view of the core layer which concerns on the printed wiring board of this invention, (b) is the bottom view. (A) is a top view of the core layer which concerns on the printed wiring board of this invention, (b) is the bottom view. (A) is a top view of the core layer which concerns on the printed wiring board of this invention, (b) is the bottom view. (A) is a top view of the core layer which concerns on the printed wiring board of this invention, (b) is the bottom view. It is explanatory drawing which shows other embodiment of the printed wiring board which concerns on this invention. (A)-(h) is explanatory drawing which shows one Embodiment of the manufacturing method of the printed wiring board concerning this invention.

As shown in FIG. 1, a printed wiring board 100 according to an embodiment of the present invention has a core layer 10 composed of an insulating resin 1 and a conductive metal foil 2 (conductive metal layer) formed on both surfaces thereof. A plurality of filled vias 3 are provided, and a second filled via 5 connected to the filled via 3 is provided on the second insulating resin 4 laminated on the core layer 10 and the conductive metal foil 2 ′ formed on the surface thereof. It is a thing.
Further, the filled via 3 is formed such that at least one of the adjacent filled vias 3 with respect to the front and back surfaces (upper and lower surfaces) of the core layer 10 is formed from surfaces in different directions on the front and back surfaces of the core layer 10. The upper surface filled via 31 formed and the lower surface filled via 32 formed from the lower surface side are included.

  Examples of the material forming the insulating resin 1 include organic resins such as epoxy resin, bismaleimide-triazine resin, polyimide resin, polyphenylene ether (PPE) resin, and the like. These organic resins may be used in combination of two or more. When using an organic resin as the insulator 1, it is preferable to mix and use a reinforcing material in the organic resin. Examples of the reinforcing material include glass fiber, glass nonwoven fabric, aramid nonwoven fabric, aramid fiber, and polyester fiber. Two or more of these reinforcing materials may be used in combination. The insulating resin 1 is preferably formed from an organic resin containing glass material such as glass fiber. Furthermore, the insulating resin 1 may contain inorganic fillers such as silica, barium sulfate, talc, clay, glass, calcium carbonate, and titanium oxide.

  The conductive metal foil 2 formed on both surfaces of the insulating resin 1 serves as a seed layer for electrolytic field plating. The conductive metal foil 2 is not particularly limited as long as it is electrically connected, but for example, a copper foil or a thin copper foil is preferable.

The filled via 3 in the present embodiment is formed on the front and back surfaces of the core layer 10. More specifically, as shown in FIG. 2, via holes L3a are provided by irradiating laser L (arrows shown) from the surfaces in different directions on the front and back surfaces of the core layer 10, respectively. It is formed by filling a conductor material (filled plating). As this conductor material, for example, copper plating is good, and the copper plating may be chemical copper plating (electroless copper plating), but electrolytic copper plating is more suitable.
Note that examples of the laser L used in laser processing include a CO ₂ laser and a UV-YAG laser.

  As shown in FIG. 2, the via-hole prepared hole 3 a includes an upper-surface via-hole prepared hole 31 a formed from the upper surface with respect to the upper and lower surfaces of the core layer 10, and a lower-surface via-hole prepared hole 32 a formed from the lower surface of the core layer 10. Are arranged side by side so as to be adjacent to each other. The upper surface via hole pilot hole 31 a is electrolytically filled to form the upper surface filled via 31, and the lower surface via hole pilot hole 32 a is similarly the lower surface filled via 32. In FIG. 2, the upper surface via hole prepared holes 31a and the lower surface via hole prepared holes 32a are alternately formed. However, the present invention is not limited to this. It is sufficient that at least one of 3a is formed from surfaces in different directions on the front and back surfaces of the core layer 10.

As shown in FIG. 3A, in the conventional printed wiring board in which the via hole pilot holes 30a and 30a ′ are provided by irradiating the laser L from one side, if the gap A of the via hole pilot hole 30a is wide, the insulating resin 1 and the conductive metal foil 2 are strong, and the conductive metal foil 2 on the bottom surface of the via hole prepared hole 30a is not peeled off from the insulating resin 1 during laser processing. However, as shown in FIG. 3B, when the gap B of the via hole pilot hole 30a ′ is narrow, the support of the copper foil that receives the laser L is very narrow. The adhesive strength with the conductive metal foil 2 is weakened, and the conductive metal foil 2 may be peeled off from the insulating resin 1. Further, when the heat stagnation is large, the copper foil is torn during laser irradiation, and the bottom surface of the via hole prepared hole 30a ′ penetrates. In a narrow gap, the support of the copper foil that receives the laser L is very narrow, so the adhesion strength is weak, and the copper foil may be broken during laser irradiation.
The via hole pilot hole 3a shown in FIG. 2 has a narrow gap between adjacent via hole pilot holes 3, but is provided by laser processing from the front and back surfaces of the core layer 10, respectively. Irradiation frequency is low. Therefore, heat does not stagnate and damage is reduced. The penetration of the laser L (copper foil breakage) is suppressed.

As shown in FIG. 2, the via hole prepared hole 3 a formed by laser processing is formed in a tapered shape whose diameter continuously decreases toward the bottom. That is, this tapered shape is formed such that the diameter on the bottom surface side Y is smaller than the opening surface side X. As described above, the upper surface via hole prepared hole 31a and the lower surface via hole prepared hole 32a of the via hole prepared hole 3a are formed from surfaces in different directions on the front and back surfaces of the core layer 10 at least one of the adjacent via hole prepared holes 3a. ing. Therefore, the opening surface side X and the bottom surface side Y of the via hole pilot hole 3a are arranged in parallel on one side.
As described above, the gap C of the via hole prepared hole 3a shown in FIG. 2 is narrower than the conventional gap A provided with the via hole prepared hole 30a from only one side of the core layer 10 shown in FIG. can do. Thereby, the plating area can be increased as compared with the one-side laser processing, and a higher heat dissipation effect can be obtained.
Further, as shown in FIG. 3B described above, even when the gap between the via hole pilot holes is narrowed, the adhesion between the insulating resin 1 and the conductive metal foil 2 does not become weak. It does not penetrate the bottom.

The taper angles of the upper surface via hole prepared hole 31a and the lower surface via hole prepared hole 32a may be different but are preferably the same, and are preferably, for example, 5 to 20 degrees with respect to the vertical line of the via hole prepared hole 3a.
Further, the diameters of the opening surface side X and the bottom surface side Y of the via hole prepared hole 3a are not particularly limited, but for example, X: Y = 5: 4 is preferable.

A second insulating resin 4 is laminated on at least one surface of the core layer 10 provided with the filled via 3, and the first insulating resin 4 and the conductive metal foil 2 ′ provided on the surface thereof are connected to the filled via 3. A second filled via 5 is provided. In the printed wiring board 100 shown in FIG. 1, the second insulating resin 4 and the second filled via 5 are laminated on the upper and lower surfaces of the core layer 10 one by one, but are not limited to one layer. For example, the second insulating resin 4 and the second filled via 5 may be alternately laminated to form a multilayer buildup layer. In this case, filled vias are formed in the laminated insulating resin layers, and the plurality of filled vias are electrically connected to the filled vias 3 of the core layer 10.
In the case where the filled via serves as a heat dissipation portion, electrical connection is not essential, but since the filled via is formed by electrolytic filling plating, electrical connection is optimal for high heat conduction.

  A solder resist (not shown) may be provided on the surface of the printed wiring board 100. The solder resist can be formed by spray coating, roll coating, curtain coating, screen method, etc., applying photosensitive liquid solder resist and drying, or pasting photosensitive dry film / solder resist with roll lamination . Thereafter, exposure and development may be performed to open the pad portion and heat cure.

(Arrangement of filled vias in the core layer)
4 to 7 show the arrangement of the filled vias 3 in the core layer 10, and FIGS. 4A to 7A are top views of the core layer 10, respectively. (B) is a bottom view (bottom view) of the core layer 10. That is, the upper surface filled via 31 is provided on the upper surface of the core layer 10, and the lower surface filled via 32 is provided on the lower surface.
The arrangement of the upper surface filled via 31 and the lower surface filled via 32 is such that at least one of the adjacent filled vias 3 is a filled via 3 formed from surfaces in different directions on the front and back surfaces of the core layer 10. -As shown to Fig.6 (a) and (b), arrangement | positioning is a hexagonal filling arrangement | positioning. The arrangement shown in FIGS. 7A and 7B is a square lattice arrangement. The filled via 3 arranged in this way has a portion where the upper surface filled via 31 and the lower surface filled via 32 arranged on one side are adjacent to each other.
The hexagonal packing arrangement and the tetragonal lattice arrangement shown in FIGS. 4 to 7A and 7B ensure the density of the filled vias 3 on both sides of the core layer 10 and eliminate the adjacent filled vias 3 on one side of the core layer 10. This is the structure. That is, if the filled vias 3 (via hole pilot holes 3a) are formed by shifting the adjacent filled vias 3 on the upper and lower surfaces of the core layer 10 and arranged in a hexagonal filling arrangement or a square lattice arrangement, the density of the filled vias 3 arranged is high, In addition, since it is formed on the front and back surfaces (upper and lower surfaces) of the core layer, thermal stress during laser processing can be reduced as compared with the case where all of the filled vias 3 are formed on one side of the core layer 10.

One of the filled vias 3 described above is open with respect to the front and back surfaces (upper and lower surfaces) of the core layer 10, but both may be open.
A printed wiring board 101 shown in FIG. 8 is provided with a plurality of filled vias 3 ′ penetrating a core layer 10 composed of an insulating resin 1 and a conductive metal foil 2 (conductive metal layer) formed on both surfaces thereof.
Filled via 3 ′ is formed by filling plated through holes (not shown) penetrating core layer 10. The filled via 3 ′ includes a first through filled via 33 that is tapered from one surface (upper surface) of the core layer 10 to the other surface (lower surface), and one of the other surfaces (lower surface) of the core layer 10 ′. The second through filled via 34 having a tapered shape over the surface (upper surface) is arranged side by side so as to be adjacent to each other. In addition, the filled via 3 ′ with the top and bottom opened and the filled via 3 with one opened may be mixed with the core layer 10.

Next, the manufacturing method of one Embodiment of the printed wiring board concerning this invention is demonstrated. The method for producing a printed wiring board according to the present invention includes the following steps (I) to (VI).
(I) A step of preparing a core layer in which a conductive metal foil is formed on both surfaces of an insulating resin.
(II) A plurality of via hole pilot holes, at least one of which is laser-processed into the core layer, wherein at least one of adjacent via hole pilot holes is formed from surfaces in different directions on the front and back surfaces of the core layer. A process of forming a pilot hole.
(III) The inner surface of the via hole pilot hole is desmeared (resin roughening) and filled with conductive material (electrolytic filled plating), then a dry film is formed, exposed and developed, and etched to form a filled via in the core layer Process.
(IV) A step of laminating a second insulating resin and a conductive metal foil on the surfaces of the core layer and filled via.
(V) A step of forming a second via hole prepared hole by laser processing the second insulating resin immediately above the filled via.
(VI) After the inner surface of the second via hole pilot hole is desmeared (resin roughening) and filled with a conductive material (electrolytic field plating), a dry film is formed, exposed and developed, etched, and etched. Forming filled vias;

  A method for manufacturing a printed wiring board according to the present invention will be described with reference to FIGS. In addition, the description about the member mentioned above is abbreviate | omitted.

  First, the core layer 10 in which the conductive metal foil 2 such as a copper foil or a thin copper foil is formed on both surfaces of the insulating resin 1 is prepared (FIG. 9A).

  Next, as shown in FIG. 9B, via hole prepared holes 3 a are respectively formed from the front and back surfaces of the core layer 10 by laser processing. The via hole prepared hole 3 a is formed such that the opening direction of at least one of the adjacent via hole prepared holes 3 a differs from the front and back surfaces of the core layer 10. The via hole prepared hole 3 a may penetrate the core layer 10.

  Next, a conductor material is filled into the via hole prepared hole 3a from which the residue (not shown) of the core layer 10 (insulating resin 1) remaining on the inner surface of the via hole prepared hole 3a by laser processing is removed by desmearing. After (electrolytic filling plating), a dry film (not shown) is attached to the surface of the core layer 10 by a known method, exposed and developed, and after etching, the dry film is peeled off, as shown in FIG. As shown, the filled via 3 is formed in the core layer 10.

Next, as shown in FIG. 9D, after the second insulating resin 4 and the conductive metal foil 2 ′ are laminated on the surfaces of the core layer 10 and the filled via 3, at least directly above the opening direction of the filled via 3. A second via hole prepared hole 5a for forming the second filled via 5 is formed by laser processing (FIGS. 9E and 9F). The materials of the second insulating resin 4 and the conductive metal foil 2 ′ may be the same as those of the insulating resin 1 and the conductive metal foil 2.
In addition, in the insulating resin 4 for forming the second filled via 5, by using a thinner interlayer thickness than the insulating resin 1, the fillability of the electrolytic filled plating of the second filled via 5 is improved, and the first The taper shape of the second filled via 5 can be suppressed as much as possible so that the plating occupancy secured by the filled via 3 is not reduced.

  Next, as shown in FIG. 9G, the second via hole prepared hole 5a is filled with a conductor material (filled plating) to form the second filled via 5. The method for forming the second filled via 5 is the same as that for the filled via 3 and is omitted. The second filled via 5 is electrically connected to the filled via 3 and the printed wiring board 100 is completed. Thereafter, a solder resist (not shown) may be formed at a predetermined position on the surface.

In the manufacturing method of the printed wiring board 100 described above, the filled via 3 is formed by filled plating. Therefore, the number of processes is reduced compared to the case of forming a copper post as a heat dissipation part in a semi-additive process of forming a conductor (copper post) as a heat dissipation part using pattern plating, and the time required to complete the substrate can be reduced, and Cost can be reduced.
Furthermore, at least one of the adjacent filled vias 3 is a filled via 3 formed from surfaces in different directions on the front and back surfaces of the core layer 10, and the gap between the filled vias 3 can be narrowed. A printed wiring board having higher heat dissipation than the method of forming can be produced.

DESCRIPTION OF SYMBOLS 1 Insulation resin 2, 2 'Conductive metal foil 3, 3' Filled via 3a Via hole pilot hole 4 Second insulating resin 5 Second filled via 5a Second via hole pilot hole 10 Core layer 30a, 30a 'Via hole pilot hole 31 Upper surface Filled via 31a Upper surface via hole pilot hole 32 Lower surface filled via 32a Lower surface via hole pilot hole 33 First through filled via 34 Second through filled via 100, 101 Printed wiring board L Laser A, B, C Gap

Claims (10)

A core layer in which a conductive metal layer is formed on both sides of an insulating resin;
A printed wiring board comprising a plurality of filled vias formed by opening at least one of the core layers,
At least one of the adjacent filled vias is a filled via formed from surfaces in different directions on the front and back surfaces of the core layer.   The printed wiring board according to claim 1, wherein the filled via has a tapered shape that continuously decreases toward the bottom.   The printed wiring board according to claim 1, wherein the filled via is arranged in a hexagonal filling manner.   The printed wiring board according to claim 1, wherein the filled vias are arranged in a square lattice.   The printed wiring board according to claim 1, wherein the plurality of filled vias are electrically connected to each other. Obtaining a core layer having a conductive metal layer formed on both sides of an insulating resin;
Laser processing is performed from the front and back surfaces of the core layer, and at least one of the adjacent via hole pilot holes is below a plurality of via holes formed from surfaces in different directions on the front and back surfaces of the core layer. Forming a hole;
Forming a filled via by plating the via hole pilot hole.   The via hole pilot hole is formed in a tapered shape whose diameter continuously decreases toward the bottom by laser processing, and at least one of the adjacent via hole pilot holes is formed so that the direction of the tapered shape is different. The manufacturing method of the printed wiring board of Claim 6.   The printed wiring board manufacturing method according to claim 6 or 7, wherein the via hole pilot holes are formed from the front and back surfaces of the core layer so that the two-dimensional arrangement of the core layer is a hexagonal filling arrangement.   The printed wiring board manufacturing method according to claim 6 or 7, wherein the via hole pilot holes are formed from the front and back surfaces of the core layer so that the two-dimensional arrangement is a square lattice arrangement with respect to the core layer. Laminating a second insulating resin layer on at least one side of the core substrate;
The method further comprises: forming a second via hole pilot hole connected to the filled via by laser processing in the second insulating resin layer, and providing a second filled via by filling plating. A method for producing a printed wiring board according to claim 1.

Images