JP2017063187A - 半導体デバイス、シリコンウェハ、及びシリコンウェハの製造方法 - Google Patents

半導体デバイス、シリコンウェハ、及びシリコンウェハの製造方法 Download PDF

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Publication number
JP2017063187A
JP2017063187A JP2016164702A JP2016164702A JP2017063187A JP 2017063187 A JP2017063187 A JP 2017063187A JP 2016164702 A JP2016164702 A JP 2016164702A JP 2016164702 A JP2016164702 A JP 2016164702A JP 2017063187 A JP2017063187 A JP 2017063187A
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Prior art keywords
boron
silicon
doping
type dopant
type
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JP2016164702A
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Japanese (ja)
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JP2017063187A5 (enExample
Inventor
ニコ カスパリ,
Caspary Nico
ニコ カスパリ,
ヘルムート エーフナー,
Oefner Helmut
ヘルムート エーフナー,
シュルツェ, ハンス−ヨアヒム
Schulze Hans-Joachim
ハンス−ヨアヒム シュルツェ,
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Infineon Technologies AG
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Infineon Technologies AG
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Publication of JP2017063187A5 publication Critical patent/JP2017063187A5/ja
Pending legal-status Critical Current

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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/393Body regions of DMOS transistors or IGBTs 
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B15/00Single-crystal growth by pulling from a melt, e.g. Czochralski method
    • C30B15/02Single-crystal growth by pulling from a melt, e.g. Czochralski method adding crystallising materials or reactants forming it in situ to the melt
    • C30B15/04Single-crystal growth by pulling from a melt, e.g. Czochralski method adding crystallising materials or reactants forming it in situ to the melt adding doping materials, e.g. for n-p-junction
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/02Elements
    • C30B29/06Silicon
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B30/00Production of single crystals or homogeneous polycrystalline material with defined structure characterised by the action of electric or magnetic fields, wave energy or other specific physical conditions
    • C30B30/04Production of single crystals or homogeneous polycrystalline material with defined structure characterised by the action of electric or magnetic fields, wave energy or other specific physical conditions using magnetic fields
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/01Manufacture or treatment
    • H10D12/031Manufacture or treatment of IGBTs
    • H10D12/032Manufacture or treatment of IGBTs of vertical IGBTs
    • H10D12/035Etching a recess in the emitter region 
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/411Insulated-gate bipolar transistors [IGBT]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/411Insulated-gate bipolar transistors [IGBT]
    • H10D12/441Vertical IGBTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/64Double-diffused metal-oxide semiconductor [DMOS] FETs
    • H10D30/66Vertical DMOS [VDMOS] FETs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/60Impurity distributions or concentrations
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/83Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • H10D62/834Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge further characterised by the dopants
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D8/00Diodes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D8/00Diodes
    • H10D8/01Manufacture or treatment
    • H10D8/045Manufacture or treatment of PN junction diodes

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  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
JP2016164702A 2015-08-26 2016-08-25 半導体デバイス、シリコンウェハ、及びシリコンウェハの製造方法 Pending JP2017063187A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102015114177.9A DE102015114177A1 (de) 2015-08-26 2015-08-26 Halbleitervorrichtung, Siliziumwafer und Verfahren zum Herstellen eines Siliziumwafers
DE102015114177.9 2015-08-26

Publications (2)

Publication Number Publication Date
JP2017063187A true JP2017063187A (ja) 2017-03-30
JP2017063187A5 JP2017063187A5 (enExample) 2019-08-15

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JP2016164702A Pending JP2017063187A (ja) 2015-08-26 2016-08-25 半導体デバイス、シリコンウェハ、及びシリコンウェハの製造方法

Country Status (3)

Country Link
US (3) US20170062568A1 (enExample)
JP (1) JP2017063187A (enExample)
DE (1) DE102015114177A1 (enExample)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2021186944A1 (ja) * 2020-03-17 2021-09-23 信越半導体株式会社 シリコン単結晶基板中のドナー濃度の制御方法
WO2021199687A1 (ja) * 2020-04-02 2021-10-07 信越半導体株式会社 シリコン単結晶基板中のドナー濃度の制御方法
JP2025019238A (ja) * 2019-06-17 2025-02-06 富士電機株式会社 半導体装置および半導体装置の製造方法

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* Cited by examiner, † Cited by third party
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DE102014107590B3 (de) * 2014-05-28 2015-10-01 Infineon Technologies Ag Halbleitervorrichtung, Siliziumwafer und Verfahren zum Herstellen eines Siliziumwafers
DE102016015475B3 (de) * 2016-12-28 2018-01-11 3-5 Power Electronics GmbH IGBT Halbleiterstruktur
DE212018000097U1 (de) * 2017-01-25 2019-07-31 Rohm Co., Ltd. Halbleitervorrichtung
US10431462B2 (en) * 2017-02-15 2019-10-01 Lam Research Corporation Plasma assisted doping on germanium
JP7173312B2 (ja) 2019-05-16 2022-11-16 富士電機株式会社 半導体装置および半導体装置の製造方法
US11585010B2 (en) * 2019-06-28 2023-02-21 Globalwafers Co., Ltd. Methods for producing a single crystal silicon ingot using boric acid as a dopant and ingot puller apparatus that use a solid-phase dopant
WO2021125064A1 (ja) 2019-12-18 2021-06-24 富士電機株式会社 半導体装置および半導体装置の製造方法
WO2021181644A1 (ja) 2020-03-13 2021-09-16 三菱電機株式会社 半導体装置およびその製造方法
DE102020120933A1 (de) 2020-08-07 2022-02-10 Infineon Technologies Ag Verfahren zum herstellen von cz-siliziumwafern
US12495596B2 (en) 2021-09-15 2025-12-09 Fuji Electric Co., Ltd. Semiconductor device and manufacturing method
US20230112094A1 (en) * 2021-10-11 2023-04-13 Globalwafers Co., Ltd. Modeling thermal donor formation and target resistivity for single crystal silicon ingot production

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JPS59190292A (ja) * 1983-04-08 1984-10-29 Shin Etsu Handotai Co Ltd 半導体シリコン単結晶の抵抗率制御方法
JPS61163188A (ja) * 1985-01-14 1986-07-23 Komatsu Denshi Kinzoku Kk シリコン単結晶引上法における不純物のド−プ方法
JPH03199193A (ja) * 1989-12-27 1991-08-30 Nippon Steel Corp シリコン単結晶の製造方法
JPH03247585A (ja) * 1990-02-23 1991-11-05 Sumitomo Metal Ind Ltd 結晶成長方法
JPH1029894A (ja) * 1996-07-15 1998-02-03 Hitachi Ltd 単結晶シリコンの比抵抗調整方法および単結晶シリコン製造装置
JP2003048798A (ja) * 2001-08-06 2003-02-21 Sharp Corp 結晶シートの製造装置、結晶シートの製造方法、それを用いて得られる結晶シートおよび太陽電池
JP2004307305A (ja) * 2003-04-10 2004-11-04 Sumitomo Mitsubishi Silicon Corp シリコン単結晶及び単結晶育成方法
JP2006344977A (ja) * 2005-06-08 2006-12-21 Infineon Technologies Ag 阻止ゾーンを半導体基板に製造する方法、および、阻止ゾーンを有する半導体部品
JP2010531805A (ja) * 2007-06-27 2010-09-30 カリソーラー インク 補償シリコン原料から製造されたインゴットの抵抗率を制御する方法およびシステム
JP2011093778A (ja) * 2009-09-29 2011-05-12 Shin Etsu Handotai Co Ltd シリコン単結晶ウェーハおよびシリコン単結晶の製造方法
JP2012136398A (ja) * 2010-12-27 2012-07-19 Covalent Materials Corp シリコン単結晶引上げ用シリカガラスルツボ
JP2013087008A (ja) * 2011-10-17 2013-05-13 Siltronic Ag n型シリコン単結晶およびその製造方法
JP2015037194A (ja) * 2013-08-14 2015-02-23 インフィネオン テクノロジーズ アーゲーInfineon Technologies Ag 半導体ディスクの後ドーピング方法
DE202015102716U1 (de) * 2014-05-28 2015-06-15 Infineon Technologies Ag Halbleitervorrichtung, Siliziumwafer und Siliziumstab

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JP2000077350A (ja) 1998-08-27 2000-03-14 Mitsubishi Electric Corp 電力用半導体装置及びその製造方法
CN102687277B (zh) 2009-11-02 2016-01-20 富士电机株式会社 半导体器件以及用于制造半导体器件的方法
EP2800143B1 (en) 2011-12-28 2020-04-08 Fuji Electric Co., Ltd. Semiconductor device and method for producing semiconductor device
DE102012020785B4 (de) 2012-10-23 2014-11-06 Infineon Technologies Ag Erhöhung der Dotierungseffizienz bei Protonenbestrahlung
CN104347408B (zh) * 2013-07-31 2017-12-26 中芯国际集成电路制造(上海)有限公司 半导体装置及其制造方法

Patent Citations (14)

* Cited by examiner, † Cited by third party
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JPS59190292A (ja) * 1983-04-08 1984-10-29 Shin Etsu Handotai Co Ltd 半導体シリコン単結晶の抵抗率制御方法
JPS61163188A (ja) * 1985-01-14 1986-07-23 Komatsu Denshi Kinzoku Kk シリコン単結晶引上法における不純物のド−プ方法
JPH03199193A (ja) * 1989-12-27 1991-08-30 Nippon Steel Corp シリコン単結晶の製造方法
JPH03247585A (ja) * 1990-02-23 1991-11-05 Sumitomo Metal Ind Ltd 結晶成長方法
JPH1029894A (ja) * 1996-07-15 1998-02-03 Hitachi Ltd 単結晶シリコンの比抵抗調整方法および単結晶シリコン製造装置
JP2003048798A (ja) * 2001-08-06 2003-02-21 Sharp Corp 結晶シートの製造装置、結晶シートの製造方法、それを用いて得られる結晶シートおよび太陽電池
JP2004307305A (ja) * 2003-04-10 2004-11-04 Sumitomo Mitsubishi Silicon Corp シリコン単結晶及び単結晶育成方法
JP2006344977A (ja) * 2005-06-08 2006-12-21 Infineon Technologies Ag 阻止ゾーンを半導体基板に製造する方法、および、阻止ゾーンを有する半導体部品
JP2010531805A (ja) * 2007-06-27 2010-09-30 カリソーラー インク 補償シリコン原料から製造されたインゴットの抵抗率を制御する方法およびシステム
JP2011093778A (ja) * 2009-09-29 2011-05-12 Shin Etsu Handotai Co Ltd シリコン単結晶ウェーハおよびシリコン単結晶の製造方法
JP2012136398A (ja) * 2010-12-27 2012-07-19 Covalent Materials Corp シリコン単結晶引上げ用シリカガラスルツボ
JP2013087008A (ja) * 2011-10-17 2013-05-13 Siltronic Ag n型シリコン単結晶およびその製造方法
JP2015037194A (ja) * 2013-08-14 2015-02-23 インフィネオン テクノロジーズ アーゲーInfineon Technologies Ag 半導体ディスクの後ドーピング方法
DE202015102716U1 (de) * 2014-05-28 2015-06-15 Infineon Technologies Ag Halbleitervorrichtung, Siliziumwafer und Siliziumstab

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2025019238A (ja) * 2019-06-17 2025-02-06 富士電機株式会社 半導体装置および半導体装置の製造方法
WO2021186944A1 (ja) * 2020-03-17 2021-09-23 信越半導体株式会社 シリコン単結晶基板中のドナー濃度の制御方法
JPWO2021186944A1 (enExample) * 2020-03-17 2021-09-23
JP7334849B2 (ja) 2020-03-17 2023-08-29 信越半導体株式会社 シリコン単結晶基板中のドナー濃度の制御方法
WO2021199687A1 (ja) * 2020-04-02 2021-10-07 信越半導体株式会社 シリコン単結晶基板中のドナー濃度の制御方法
JP2021163929A (ja) * 2020-04-02 2021-10-11 信越半導体株式会社 シリコン単結晶基板中のドナー濃度の制御方法
JP7264100B2 (ja) 2020-04-02 2023-04-25 信越半導体株式会社 シリコン単結晶基板中のドナー濃度の制御方法

Also Published As

Publication number Publication date
US10566424B2 (en) 2020-02-18
US10957767B2 (en) 2021-03-23
US20170062568A1 (en) 2017-03-02
US20180097064A1 (en) 2018-04-05
US20200161424A1 (en) 2020-05-21
DE102015114177A1 (de) 2017-03-02

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