JP2017059597A - Chip resistor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a chip resistor for uniformly dispersing heat generation from a resistor while securing an electrode area of an electrode for wire bonding connection.SOLUTION: A first square surface electrode 11 (electrode 4 for wire bonding) is disposed in the almost central part on the upper surface of an insulating substrate 10, a second surface electrode 12 is formed so as to surround the first surface electrode 11 while being separated from the first surface electrode 11 by a predetermined distance, and a resistor 5 is formed between these first surface electrode 11 and the second surface electrode 12. Furthermore, a side electrode 20 connected to a back electrode 25 is formed on each side surface of the insulating substrate 10. As a result, an electrode area can be widely secured on the surface of the insulating substrate 10, current uniformly flows in the entire resistor 5, and a current path is dispersed.SELECTED DRAWING: Figure 2

Description

  The present invention relates to a chip resistor having an electrode for wire bonding connection.

  The downsizing of electronic devices on which various electronic components are mounted increases the mounting density of components in the devices, and it may be difficult to form pads and lands that are conductor patterns for connecting components on a circuit board. Therefore, it has been conventionally performed to provide an electrode for wire bonding on the resistance element and to electrically connect the resistance element and the wiring on the circuit board by wire bonding.

  As a chip resistor having an electrode for wire bonding, for example, Patent Document 1 includes a lower surface electrode 60 as shown in FIG. 6 and the like, and an auxiliary electrode 50 functioning as an electrode for wire bonding is used as a pair of upper surface electrodes 30. A chip resistor formed on each upper surface is disclosed. In Patent Document 1, the resistor 20 is disposed between the upper surface electrodes 30, the end of the upper surface electrode 30 overlaps with the end of the resistor 20, and the protective film 40 covers the upper surface of the resistor 20. .

  Patent Document 2 discloses a small chip resistor capable of wire bonding. In Patent Document 2, a resistor (resistive film) is formed so as to straddle between a first electrode and a second electrode formed separately on a chip substrate, and wire bonding is possible on the first electrode. A large electrode area is secured, and an electrical connection is obtained by placing a wire on the electrode.

JP 2006-12959 A Japanese Patent Laid-Open No. 9-162002

  The above-mentioned resistors by wire bonding mounting require a wide electrode area for connecting wires, but in order to meet the recent demand for miniaturization of resistors, a wide electrode area is secured on a limited insulating substrate. Then, the area of the resistor is inevitably narrowed. When the area of the resistor is narrowed, there is a problem that the temperature rise due to heat generation of the resistor becomes large, and it becomes difficult to apply the wire bonding connection to the high-power resistor.

  In the case of the chip resistor of Patent Document 1 described above, the wire bonding electrode (auxiliary electrode) is formed on the upper surface of each of the pair of upper surface electrodes, and the resistor is disposed between the upper surface electrodes. There is a problem of being pressed. As a result, there is a problem that it is difficult to increase the resistance of the chip resistor due to the restriction that the area of the resistor is sufficiently secured or the resistor cannot be extended for a long time.

  Further, the chip resistor disclosed in Patent Document 2 has a configuration in which the first electrode and the second electrode are spaced apart from each other at a position deviated from substantially the center in the longitudinal direction of the chip base to one end side. Therefore, it is possible to secure a wide electrode area without reducing the area of the resistor so much, but heat generation in the resistor is concentrated on one side of the substrate, for example, stress is concentrated when subjected to a thermal shock such as a heat cycle, This can cause cracks in the resistor or the insulating substrate.

  The present invention has been made in view of the above-described problems, and an object of the present invention is to provide a chip resistor that can secure a sufficient electrode area for wire bonding connection and can evenly distribute heat generated from the resistor. Is to provide a vessel.

  The following configuration is provided as means for achieving the above object and solving the above-described problems. That is, the chip resistor of the present invention includes an insulating substrate, a surface electrode formed in a substantially central portion of the surface of the insulating substrate, a back electrode formed on the back surface of the insulating substrate, and each side surface of the insulating substrate. And a side electrode connected to the back electrode, and a resistor connecting the surface electrode and the side electrode.

  For example, an insulating protective film is formed in a region of the surface of the insulating substrate excluding the surface electrode.

  The chip resistor of the present invention includes an insulating substrate, a first surface electrode formed at a substantially central portion of the surface of the insulating substrate, a back electrode formed on the back surface of the insulating substrate, and the insulating substrate. A side electrode formed on each side surface and connected to the back surface electrode, connected to the side electrode, and insulated from the first surface electrode so as to surround the first surface electrode while being separated by a predetermined distance. A second surface electrode formed along the periphery of the surface of the substrate; and a resistor for connecting the first surface electrode and the second surface electrode, wherein the first surface electrode is an electrode for wire bonding connection. It is characterized by.

  For example, the shortest distance between the first surface electrode and the second surface electrode is substantially equal in the length direction and the width direction of the insulating substrate. For example, the resistor is formed so as to surround the first surface electrode. Further, for example, the resistor is formed by being divided into one or a plurality of places between the first surface electrode and the second surface electrode. Furthermore, for example, an insulating protective film is formed in a region excluding the first surface electrode on the surface of the insulating substrate.

  According to the present invention, while suppressing the electrode area for wire bonding connection and sufficiently securing the area of the resistor, the current flows uniformly through the entire resistor and the current path is dispersed, thereby generating heat from the resistor. Chip resistors that can be evenly distributed can be provided.

It is a top view of the chip resistor concerning the 1st example of an embodiment of the present invention. It is sectional drawing when cut | disconnecting along an A-A 'arrow line in FIG. It is a flowchart which shows the manufacturing process of the chip resistor which concerns on the example of this embodiment in time series. It is a figure which shows the groove | channel for a division | segmentation of an insulated substrate. It is a figure which shows a mode that the 1st surface electrode, the 2nd surface electrode, and the back surface electrode were formed in the insulated substrate. It is a figure which shows a mode that the resistor was formed in the insulated substrate. It is a figure which shows a mode that the protective film and the electrode for wire bonding connection were formed in the insulated substrate. It is a figure which shows a mode that the side part electrode was formed in 4 side surfaces of a chip resistor. It is a figure which shows the example which divided and formed the resistor in four different places. It is a figure which shows the example (the 1) formed by dividing a resistor into two different places. It is a figure which shows the example (the 2) formed by dividing a resistor into two different places. It is a figure which shows the example which divided and formed the resistor in three different places. It is a figure which shows the example (the 1) which formed the resistor in one place. It is a figure which shows the example (the 2) which formed the resistor in one place. It is a figure which shows the example (the 3) formed by dividing a resistor into two different places. It is a figure which shows the modification of the example which divided and formed the resistor in four different places.

Embodiments according to the present invention will be described below in detail with reference to the accompanying drawings.
<First Embodiment>
FIG. 1 is a plan view (top view) of the chip resistor according to the first embodiment of the present invention, and FIG. 2 is cut along the line AA ′ (dashed line) in FIG. It is sectional drawing when doing. As shown in FIGS. 1 and 2, the chip resistor 1 according to the present embodiment has an insulating substrate 10 whose overall shape is a rectangular parallelepiped and has a substantially square planar shape, and a substantially central portion of the upper surface of the insulating substrate 10. The first surface electrode 11 is formed and the first surface electrode 11 is formed so as to surround the first surface electrode 11 while being separated from the first surface electrode 11 by a predetermined distance along the upper surface end portion (peripheral portion) of the insulating substrate 10. 2 surface electrodes 12. The insulating substrate 10 is made of, for example, an alumina sintered body having electrical insulation.

Further, a resistor 5 made of, for example, ruthenium oxide (RuO ₂ ) is formed on the upper surface of the insulating substrate 10 so as to fill a gap between the first surface electrode 11 and the second surface electrode 12. Therefore, the resistor 5 and the second surface electrode 12 have a square shape so as to surround the first surface electrode 11 when viewed in plan. Further, side electrodes 20 are formed on the four side surfaces of the insulating substrate 10, and a back electrode 25 is formed on the entire lower surface of the insulating substrate 10 to solder-connect the chip resistor 1 to a circuit board, a lead frame, or the like. ing. Here, the second front electrode 12, the side electrode 20, and the back electrode 25 are electrically connected to each other.

  In the above example, the first surface electrode 11 is formed at the center of the upper surface of the insulating substrate 10, the second surface electrode 12 is formed so as to surround the first surface electrode 11, and the resistor 5 is formed between these electrodes. The resistor 5 is formed so as to connect the first surface electrode 11 on the upper surface of the insulating substrate 10 and the four side electrodes 20 corresponding to the respective side surfaces of the insulating substrate 10 without providing the second surface electrode 12. May be.

  Further, the chip resistor 1 according to the present embodiment is formed such that the distance between each side of the square first surface electrode 11 and each side of the corresponding second surface electrode 12 is the same. The That is, the shortest distances in the corresponding side directions of the first surface electrode 11 and the second surface electrode 12 are equal in the length direction and the width direction of the insulating substrate 10. When the second surface electrode 12 is not provided as described above, the shortest distance from each side of the first surface electrode 11 to each side of the insulating substrate 10 corresponding thereto is equal.

  In the chip resistor according to the present embodiment, as shown in FIG. 2, for example, nickel (Ni) plating, tin (Sn) plating, palladium (Pd) plating is formed on the first surface electrode 11. Alternatively, the wire bonding connection electrode 4 is formed by gold (Au) plating. The upper portion of the resistor 5 is covered with a protective film 3 made of, for example, a heat-resistant epoxy resin, and the protective film 3 is formed so that the wire bonding connection electrode 4 is exposed. .

  The 1st surface electrode 11, the 2nd surface electrode 12, and the back surface electrode 25 are formed using a silver (Ag) or silver (Ag) -palladium (Pd) paste, for example, and the side electrode 20 is made of, for example, silver ( Ag) It is formed by applying a paste. Further, the back electrode 25 may be formed using copper (Cu) or a conductive adhesive. Further, for example, the plating layer 9 of nickel (Ni) or tin (Sn) may be formed so as to cover the entire side electrode 20 and the back electrode 25 and a part of the second surface electrode 12.

  When the chip resistor 1 is mounted, the back electrode 25 is soldered to the printed wiring board, and the wire bonding connection electrode 4 is made of a wire made of gold (Au) or aluminum (Al) as shown in FIG. One end of 2 is connected and the other end is connected to the wiring pattern of the printed wiring board. The connection of the wire is performed by, for example, ultrasonic welding. In addition, illustration of the wire 2 is abbreviate | omitted in FIG.

  Next, a manufacturing process of the chip resistor according to the present embodiment will be described. FIG. 3 is a flowchart showing the manufacturing process of the chip resistor according to the present embodiment in time series. First, in step S1 of FIG. 3, a large-sized insulating substrate for chip resistors is prepared, and in step S3, a dividing groove is formed. Specifically, as shown in FIG. 4, a primary division groove 31 and a secondary division are provided as a substrate division groove on each of the front and back surfaces of a large insulating substrate 30 (for example, an alumina substrate, a ceramic substrate, etc.). A groove 33 is formed.

  In step S5, as shown in FIG. 5B, the back surface electrode 25 is formed in each region of the insulating substrate 30 surrounded by the primary dividing groove 31 and the secondary dividing groove 33. In the subsequent step S7, the first surface electrode 11 and the second surface electrode 12 are formed (see FIGS. 5A and 5B). As shown in FIG. 5, the first surface electrode 11 is formed at the center of the upper surface of the insulating substrate 10, and the second surface electrode 12 is formed along with the first surface electrode 11 along the periphery of the upper surface of the insulating substrate 10. It is formed so as to surround the first surface electrode 11 while being separated by a distance. At this time, as shown in FIG. 5B, the second surface electrode 12 is formed so that the outer peripheral end portion 12a of the second surface electrode 12 and the side end portion 10a of the insulating substrate 10 are flush with each other. FIG. 5B is a cross-sectional view with respect to the horizontal center line of the plan view of the chip resistor (FIG. 5A).

  In step S9, the resistor 5 is formed. Specifically, as shown in FIG. 6, the gap between the first surface electrode 11 and the second surface electrode 12 (the square-shaped portion 15 in FIG. 5A) is filled, and further, the first surface electrode 11 and the second surface electrode 12 are filled. The resistor 5 is screen-printed and fired so as to cover the end regions of the outer peripheral portion of the surface electrode 11 and the inner peripheral portion of the second surface electrode 12.

  Here, the first surface electrode 11 and the second surface electrode 12 are formed in the same process using the same material, and then the resistor 5 is formed. However, the present invention is not limited to this. For example, the resistor 5 is formed. After that, the second surface electrode 12 may be formed. In addition, the first surface electrode 11, the second surface electrode 12, and the back electrode 25 may be formed in the same process, and the order of forming them is not limited to the above.

  The resistance value of the chip resistor 1 is adjusted, for example, by changing the width of the first surface electrode 11 and the second surface electrode 12, that is, the distance between these electrodes, or adjusting the width of the resistor 5. A desired resistance value is obtained by adjusting the thickness of the film. If necessary, the resistance value is adjusted by making a cut (trimming groove) in a part of the resistor 5 with a laser beam, sandblast, or the like.

  In step S <b> 11, as shown in FIG. 7, the protective film 3 is formed so as to cover the entire resistor 5 and a part of the second surface electrode 12 and expose a part of the first surface electrode 11. In the subsequent step S13, the wire bonding connection electrode 4 is formed on the exposed portion of the first surface electrode 11 (see FIG. 7). The first surface electrode 11 may also serve as the wire bonding connection electrode 4 without forming the wire bonding connection electrode 4 on the first surface electrode 11.

  In step S15, a primary break is performed with the groove 31 of the large insulating substrate 30 as a dividing line, and the large insulating substrate 30 is divided into strips. In step S17, the substrates divided into strips are stacked, and, for example, resin silver (Ag) paste is applied to both fractured surfaces (also referred to as first side surfaces) and dried (cured). Side electrodes 20 are formed on two side surfaces.

  In step S19, the chip resistor is divided into pieces by a secondary break with the groove 33 of the insulating substrate divided into strips as a dividing line. In step S21, for example, silver (Ag) paste is applied to the remaining two side surfaces (also referred to as second side surfaces) of the four side surfaces of the chip resistor to form the side electrodes 20. Thereafter, the silver (Ag) paste is dried and fired. Thereby, as shown in FIG. 8A, the side electrodes 20 are formed on the four side surfaces of the chip resistor. Further, as can be seen from FIG. 8B, the second electrode 20 and the back electrode 25 are electrically connected by the side electrode 20.

  The formation of the side electrode 20 is not limited to the above-described method. For example, the insulating substrate divided into strips is divided into pieces, and one side is held in a silver (Ag) paste while holding it. The side electrodes 20 may be formed by dipping in the silver (Ag) paste in the same manner for the remaining three side surfaces. Further, for example, a method may be adopted in which a silver (Ag) paste is immersed in a sponge or the like and pressed against each of the four side surfaces of the individual pieces of the insulating substrate.

  Furthermore, the plating layer 9 may be formed of nickel (Ni), tin (Sn), or the like so as to cover the entire side electrode 20 and the back surface electrode 25 and a part of the second surface electrode 12. The plating layer 9 and the wire bonding connection electrode 4 may be formed in the same process using the same material. In this case, step S13 in FIG. 3 is omitted. On the other hand, when the plating layer 9 and the wire bonding connection electrode 4 are formed using different materials, or when the wire bonding connection electrode 4 is not formed, in the step of forming the plating layer 9, The plating is prevented from adhering to the electrode 4 or the first surface electrode 11.

  As described above, in the chip resistor according to the present embodiment, a square wire bonding electrode is arranged at substantially the center of the upper surface of the insulating substrate, and the resistor is surrounded by the wire bonding electrode. By forming, a wide electrode area can be secured on the surface of the insulating substrate, and highly reliable wire bonding is possible. Further, the second surface electrode is formed so as to surround the first surface electrode while being separated from the first surface electrode by a predetermined distance, and a resistor is formed between the first surface electrode and the second surface electrode. Thus, the resistor is defined in a predetermined shape, and variation in resistance value can be reduced.

  Further, since the side electrodes of the chip resistor are formed on the four side surfaces of the insulating substrate, particularly when the plating layer is formed, when the chip resistor is mounted on the wiring substrate, these four side surfaces are formed. Since the solder fillet is formed, it is possible to perform soldering with high stability and reliability, and to suppress the so-called Manhattan phenomenon (chip standing phenomenon) and the occurrence of cracks due to heat cycle.

  In addition, since the wire bonding electrode is disposed almost at the center of the upper surface of the insulating substrate, it is not necessary to consider the directionality during mounting, and handling as a chip resistor is facilitated.

  Furthermore, since the square first surface electrode is formed in the center of the upper surface of the insulating substrate having a square shape, from each side of the first surface electrode to the side electrode corresponding to each side of the corresponding insulating substrate. When the second surface electrode is formed, the distance from each side of the first surface electrode to each side of the second surface electrode facing it is the same. That is, since the shortest distance in each side direction of the first surface electrode and the second surface electrode is equal in the width direction and the length direction of the insulating substrate, the entire resistor formed between the first surface electrode and the second surface electrode Current flows uniformly and current paths are dispersed. As a result, since the heat generated from the resistor is also dispersed, the temperature rise is reduced, and a configuration suitable for a chip resistor for high power can be achieved. Moreover, since the concentration of stress when subjected to thermal shock is alleviated, the occurrence of cracks in the resistor and the insulating substrate can be suppressed.

  The present invention is not limited to the embodiment described above, and various modifications are possible. In the chip resistor according to the first embodiment described above, the square surface electrode is formed at the center of the surface of the insulating substrate whose overall shape is a rectangular parallelepiped and whose planar shape is a square, but the present invention is not limited to this. For example, although not shown, a circular surface electrode is formed at the center of the surface of an insulating substrate having a circular planar shape (the entire shape is a column), and the surface electrode and side portions formed on the peripheral side surface of the insulating substrate It is good also as a structure which connects an electrode with a resistor. Alternatively, a circular first surface electrode is formed at the center of the surface of the insulating substrate having a circular planar shape, and the first surface electrode and a ring-shaped second surface electrode formed at the periphery of the surface of the insulating substrate. It is good also as a structure which forms a resistor between.

  With this configuration, the distance from the peripheral edge of the surface electrode to the peripheral edge of the insulating substrate (peripheral edge of the side electrode) is the same in all directions. Further, when the second surface electrode is formed, the distance between the peripheral edge of the first surface electrode and the peripheral edge of the second surface electrode is the same, and the shortest in all directions between the first surface electrode and the second surface electrode. The distance becomes equal. As a result, when compared with the resistor of the chip resistor according to the first embodiment, in the entire resistor formed between the surface electrode and the side electrode or between the first surface electrode and the second surface electrode. , Current flows more evenly and the current path is dispersed.

<Second Embodiment>
In the chip resistor according to the first embodiment, the resistor 5 is formed so as to surround the periphery of the first surface electrode 11 on the upper surface of the insulating substrate 10. The resistor is divided and formed on the upper surface of the substrate 10. Hereinafter, the example which formed the resistor in 1-4 places is demonstrated.

  9 to 15 are plan views of the chip resistor according to the second embodiment of the present invention. In each of these chip resistors, a first surface electrode 61 is formed at a substantially central portion of the upper surface of the insulating substrate 50, and the first surface electrode 61 and the predetermined surface along the upper surface end (peripheral portion) of the insulating substrate 50. A second surface electrode 62 is formed so as to surround the first surface electrode 61 while being spaced apart. Further, side electrodes 80 are formed over the four side surfaces of the insulating substrate 50. 9 to 15, the protective film and the plating layer are not shown.

  Among the chip resistors shown in FIGS. 9 to 15, FIGS. 9 to 11 divide the resistor on the upper surface of the insulating substrate 50 so as to be symmetric with respect to the horizontal or vertical center line of the substrate plane. This is an example formed. 12 to 15 are examples in which the resistor is formed so as to be biased to a part of the upper surface of the insulating substrate 50. When any of the chip resistors is divided into 2 to 4 locations, the shape and resistance value of each resistor are set to be the same, and the same material is used in the same process. Form.

  The chip resistor shown in FIG. 9 is an example in which the resistor is divided into four different locations so as to be symmetric with respect to the horizontal and vertical center lines of the insulating substrate 50. Here, each of the divided resistors 65a to 65d is formed so as to straddle the first surface electrode 61 and the second surface electrode 62 surrounding it.

  The chip resistor of FIG. 10 is an example in which the resistors are divided so as to be symmetric with respect to the vertical center line of the insulating substrate 50, and resistors 65e and 65f are formed at two different locations. Further, the chip resistor of FIG. 11 is an example in which the resistor is divided so as to be symmetric with respect to the horizontal center line of the insulating substrate 50. In the example shown in FIG. 11, the areas of the resistors 65g and 65h formed at two different locations are made larger than those of the resistors shown in FIGS. 9 and 10, and the heat generated from the resistors is dispersed.

  On the other hand, the chip resistor of FIG. 12 is an example in which the resistor is divided into three different locations to form resistors 65i to 65k. Moreover, the chip resistor of FIG. 13, FIG. 14 is an example which formed the resistor in one place. That is, in FIG. 13, one resistor 65 l is formed so as to straddle the first surface electrode 61 and the second surface electrode 62. In FIG. 14, a U-shaped resistor 65m is formed between the first surface electrode 61 and the second surface electrode 62, and the resistor 65m is enlarged to dissipate heat. Further, FIG. 15 shows an example in which the resistor is formed by dividing the resistor into two portions in the diagonal direction of the insulating substrate 50. Here again, the resistor 65n is formed so as to straddle between the first surface electrode 61 and the second surface electrode 62. , 65o.

  In the chip resistor according to the second embodiment, as shown in FIGS. 9 to 15, the resistor is formed so as to be biased to a part of the upper surface of the insulating substrate, or divided into 2 to 4 portions. In this case, the second surface electrode 62 covers the upper surface end of the insulating substrate 50 and the side electrode 80 covers the entire side surface (four side surfaces) of the insulating substrate 50. However, the present invention is not limited to this. For example, FIG. 16 shows an example in which the resistor is divided into four different positions so as to be symmetric with respect to the horizontal and vertical center lines of the insulating substrate 50 and formed as resistors 65p to 65s. Then, the second surface electrode is divided into four corresponding to the four sides of the insulating substrate 50, and each is formed on the upper surface end portion of the insulating substrate 50 (second surface electrodes 62a to 62d). The side electrodes are also divided into four side surfaces of the insulating substrate 50 to form side electrodes 80a to 80d, which are electrically connected to the second surface electrodes 62a to 62d.

  As described above, according to the chip resistor according to the second embodiment, by dividing the resistor on the insulating substrate, the heat generated from the resistor is dispersed, and thereby the temperature rise is alleviated. The effect is to be played. Further, by forming the side electrodes corresponding to each of the four side surfaces of the insulating substrate, the side electrodes are provided on the four side surfaces, and solder fillets are formed on these four surfaces during mounting. Therefore, the chip resistor can be mounted on the circuit board in a stable state, and the occurrence of cracks due to the chip standing phenomenon and heat cycle can be suppressed.

  Furthermore, when the trimming groove is formed in the resistor by a laser or the like, the trimming part is specified by forming the resistor in one to four places like the chip resistor according to the second embodiment. There is an advantage that it becomes easy and trimming is easy.

DESCRIPTION OF SYMBOLS 1 Chip resistor 2 Wire 3 Protective film 4 Wire bonding connection electrode 5, 65a to 65s Resistor 10, 50 Insulating substrate 11, 61 First surface electrode 12, 62, 62a to 62d Second surface electrode 20, 80, 80a ˜80d Side electrode 25 Back electrode 30 Large insulating substrate 31 Groove for primary division 33 Groove for secondary division

Claims (7)

An insulating substrate;
A surface electrode formed at substantially the center of the surface of the insulating substrate;
A back electrode formed on the back surface of the insulating substrate;
A side electrode formed on each side of the insulating substrate and connected to the back electrode;
A chip resistor comprising a resistor for connecting the surface electrode and the side electrode. The chip resistor according to claim 1, wherein an insulating protective film is formed in a region of the surface of the insulating substrate excluding the surface electrode. An insulating substrate;
A first surface electrode formed substantially at the center of the surface of the insulating substrate;
A back electrode formed on the back surface of the insulating substrate;
A side electrode formed on each side of the insulating substrate and connected to the back electrode;
A second surface electrode connected to the side electrode and formed along the periphery of the surface of the insulating substrate so as to surround the first surface electrode while being spaced apart from the first surface electrode by a predetermined distance;
A chip resistor comprising a resistor for connecting the first surface electrode and the second surface electrode. 4. The chip resistor according to claim 3, wherein the shortest distance between the first surface electrode and the second surface electrode is substantially equal in the length direction and the width direction of the insulating substrate. The chip resistor according to claim 3, wherein the resistor is formed so as to surround the first surface electrode. 5. The chip resistor according to claim 3, wherein the resistor is divided into one or a plurality of locations between the first surface electrode and the second surface electrode. 6. 7. The chip resistor according to claim 3, wherein an insulating protective film is formed in a region of the surface of the insulating substrate excluding the first surface electrode.