JP6599759B2 - Chip resistor - Google Patents

Description

  The present invention relates to a chip resistor that is surface-mounted on a circuit board by soldering.

  In general, a chip resistor is a rectangular parallelepiped insulating substrate made of ceramics, a pair of front electrodes opposed to each other at a predetermined interval on the upper surface of the insulating substrate, and an insulating substrate straddling the pair of front electrodes A resistor provided on the upper surface of the substrate, an insulating protective film provided so as to cover the resistor, a pair of back electrodes disposed opposite to each other at a predetermined interval on the lower surface of the insulating substrate, and a front electrode, A pair of end face electrodes provided on both end faces of the insulating substrate so as to conduct the back electrode and a pair of external electrodes formed by plating the outer surfaces of these end face electrodes are provided.

  In the chip resistor configured in this way, after printing the solder paste on the land provided on the circuit board, the external electrode is mounted on the land with the back electrode facing downward, and the solder paste is applied in this state. It is surface-mounted on a circuit board by melting and solidifying.

  In recent years, the mounting density of circuit boards has increased dramatically with the downsizing and higher functionality of electronic devices. Accordingly, the mounting area of chip resistors has been reduced, and the spacing between adjacent chip resistors has been reduced. Narrow adjacent mounting is desired. In order to cope with such narrow adjacent mounting, as described in Patent Document 1, chip resistors in which external electrodes having the same width are formed on four surfaces (upper and lower surfaces and both side surfaces) excluding both end surfaces of the insulating substrate. A vessel has been proposed.

JP 2002-208502 A

  Of the six surfaces constituting the rectangular parallelepiped insulating substrate, the two opposing surfaces having the largest area are the first surface, the two opposing surfaces adjacent to the short side of the first surface are the second surface, and the length of the first surface When the two opposing surfaces adjacent to the side are the third surface, a surface electrode, a resistor, and a protective film are formed on one of the first surfaces as in the chip resistor described in Patent Document 1. In addition, if external electrodes that are electrically connected to the surface electrode are formed on the four surfaces (both the first surface and both third surfaces) excluding the second surface, the third surface has a smaller area than the first surface. Can be used as a mounting surface, so that it is possible to perform narrow adjacent mounting in which the interval between adjacent chips is narrowed.

  In this case, it becomes a tower type mounting in which the height dimension is larger than the short side dimension of the third surface which is the mounting surface, and the external electrode and the land are soldered in a posture with the first surface facing sideways, When the external electrode having a larger area than the external electrode formed on the third surface is formed on the first surface like the chip resistor described in Patent Document 1, the solder paste is melted and solidified. Due to the solder contraction, the first surface side is easily pulled, and as a result, there arises a problem that the chip resistor is mounted in a tilted or tilted state.

  The present invention has been made in view of the above-described prior art, and an object of the present invention is to provide a chip resistor that can be mounted adjacent to each other while ensuring a stable mounting posture.

  As one form for achieving the above object, the chip resistor according to the present invention includes, as the first surface, two opposing surfaces having the largest area among the six surfaces constituting the rectangular parallelepiped insulating substrate made of ceramics. In the chip resistor in which the two opposing surfaces adjacent to the short side of the first surface are the second surface and the two opposing surfaces adjacent to the long side of the first surface are the third surface, Either one is provided with a pair of internal electrodes facing each other with a predetermined interval, a resistor straddling between the internal electrodes, and an insulating protective film covering the resistor, and the pair of internal electrodes External electrodes that are electrically connected to the internal electrodes are provided at both longitudinal ends of the first surface and the pair of third surfaces, respectively, and the dimensions along the longitudinal direction of the external electrodes provided on the first surface are Dimensions along the longitudinal direction of the external electrode provided on the third surface And the configuration that is set to be smaller than.

  In the chip resistor configured in this way, the resistor and the internal electrode are formed on one of the two first surfaces having the largest area among the six surfaces of the rectangular parallelepiped insulating substrate. A tower-type tower with a narrower chip interval by setting the third surface adjacent to the long side of the first surface as a mounting surface on the circuit board in a posture in which the first surface on which the body is formed is directed sideways. Narrow adjacent mounting can be supported. Moreover, in this chip resistor, the dimension along the longitudinal direction of the external electrode formed on the first surface facing sideways is larger than the dimension along the longitudinal direction of the external electrode formed on the third surface serving as the mounting surface. Since it is set to be small, it is not pulled to the first surface side due to the shrinkage of the solder, and it is possible to mount in a stable posture that is difficult to fall down despite being a tower type that supports narrow adjacent mounting.

  As another form for achieving the above object, the chip resistor of the present invention has two opposing faces having the largest area among the six faces constituting the rectangular parallelepiped insulating substrate made of ceramic. In the chip resistor, the second opposing surface adjacent to the short side of the first surface is the second surface, and the two opposing surfaces adjacent to the long side of the first surface are the third surface. A pair of internal electrodes facing each other with a predetermined interval, a resistor straddling between the internal electrodes, and an insulating protective film covering the resistor are provided on either one of the surfaces, An external electrode that is electrically connected to the internal electrode is provided at both ends in the longitudinal direction of the pair of third surfaces, and the external electrode is not provided on the pair of first surfaces.

  Even in the chip resistor configured as described above, the resistor and the internal electrode are formed on one of the two first surfaces having the largest area among the six surfaces of the rectangular parallelepiped insulating substrate. A tower-type tower with a narrower chip interval by setting the third surface adjacent to the long side of the first surface as a mounting surface on the circuit board in a posture in which the first surface on which the body is formed is directed sideways. Narrow adjacent mounting can be supported. Moreover, in this chip resistor, although the external electrode that is electrically connected to the internal electrode is formed on the third surface that is the mounting surface, the external electrode is not formed on the first surface that faces the side, so that the shrinkage of the solder It is not pulled by the first surface side, and it can be mounted in a stable posture that is difficult to fall despite being a tower type that supports narrow adjacent mounting, and a short circuit accident between narrow adjacent chips Can be prevented.

  In the above configuration, the external electrodes may not be formed on the pair of second surfaces. However, if an external electrode that is electrically connected to the internal electrode is also formed on these second surfaces, the external electrode is formed between the land and the second surface. Since the solder fillet is formed, a more stable chip resistor can be mounted.

  In the above configuration, the protective film only needs to cover at least the resistor. However, when the protective film covers the entire surface of the first surface including the internal electrode and the resistor, the protective film faces sideways during mounting. Since the surface of the first surface is flat, it is preferable for mounting the chip resistors narrowly adjacent to each other.

  In the above configuration, when the auxiliary auxiliary protective film is provided on the entire surface of the first surface opposite to the first surface on which the resistor is formed, the two first surfaces of the insulating substrate are protected. Since it is covered by the film and the auxiliary protective film, the appearance is the same regardless of which of the two third surfaces is the mounting surface, and a chip resistor can be realized suitably for bulk mounting.

  According to the chip resistor of the present invention, it is possible to mount narrowly adjacently while ensuring a stable mounting posture.

It is a perspective view of the chip resistor concerning the example of a 1st embodiment of the present invention. It is explanatory drawing which shows the mounting state of this chip resistor. It is explanatory drawing which shows the manufacturing process of this chip resistor. It is explanatory drawing which shows the manufacturing process of this chip resistor. It is explanatory drawing which shows the manufacturing process of this chip resistor. It is a perspective view of the chip resistor concerning the example of a 2nd embodiment of the present invention. It is the perspective view which looked at the chip resistor concerning the example of a 3rd embodiment of the present invention from one direction. It is the perspective view which looked at the chip resistor which concerns on the example of 3rd Embodiment from the other direction. It is explanatory drawing which shows the manufacturing process of this chip resistor. It is explanatory drawing which shows the manufacturing process of this chip resistor. It is a perspective view of the chip resistor concerning the example of a 4th embodiment of the present invention. It is explanatory drawing which shows the manufacturing process of this chip resistor. It is explanatory drawing which shows the manufacturing process of this chip resistor. It is a perspective view of the chip resistor concerning the example of a 5th embodiment of the present invention. It is a perspective view of the chip resistor concerning the example of a 6th embodiment of the present invention. It is explanatory drawing which shows the manufacturing process of this chip resistor.

  Hereinafter, embodiments of the invention will be described with reference to the drawings. As shown in FIG. 1, a chip resistor according to a first embodiment of the present invention includes a rectangular parallelepiped insulating substrate 1 and a pair of internal electrodes provided on one side surface of the insulating substrate 1 with a predetermined interval. 2, a rectangular resistor 3 provided so as to be connected to these internal electrodes 2, a protective film 4 made of a resin provided so as to cover both the internal electrodes 2 and the resistors 3, and an insulating substrate 1 It is mainly configured by external electrodes 5 provided at both ends in the longitudinal direction on both side surfaces and external electrodes 6 provided at both ends in the longitudinal direction on the upper and lower surfaces of the insulating substrate 1.

  The insulating substrate 1 is made of ceramics. Of the six surfaces constituting the insulating substrate 1, the two opposing surfaces having the largest area are the first surface and the two opposing surfaces adjacent to the short side of the first surface are the second surfaces. If the two opposing surfaces adjacent to the long side of the surface and the first surface are the third surface, nothing is formed on the second surface located on the front side and the back side in the figure, but on the right side in the figure A pair of internal electrodes 2, a resistor 3, a protective film 4, and a pair of external electrodes 5 are formed on the first surface facing and are not shown, but on the first surface on the opposite side facing the left side in the figure. Is formed with a pair of external electrodes. Further, a pair of external electrodes 6 are formed on the third surface located on the upper surface side in the figure, and although not shown, a pair of external electrodes are also formed on the third surface located on the lower surface side in the figure. ing.

  Here, as shown in FIG. 1, the short side dimension (long side dimension of the second surface) of the first surface of the insulating substrate 1 is H, the long side dimension of the first surface and the third surface is L, and the second surface. Assuming that the short side dimension of the third surface is W, in the chip resistor according to this embodiment, for example, H = 0.1 mm, L = 0.2 mm, and W = 0.05 mm. The insulating substrate 1 is obtained by dicing a large substrate described later by dicing along a primary dividing line and a secondary dividing line extending vertically and horizontally.

  The pair of internal electrodes 2 are obtained by screen-printing Ag-based paste on one first surface of the insulating substrate 1 and then drying and firing. The internal electrodes 2 are somewhat inward from both short sides of the first surface. It is formed in a rectangular shape at a position apart from each other.

  The resistor 3 is formed by screen-printing a resistor paste such as ruthenium oxide on one first surface of the insulating substrate 1 and then drying and firing the resistor 3. Both ends in the longitudinal direction of the resistor 3 are connected to the internal electrode 2. overlapping. Although not shown, the resistor 3 is formed with a trimming groove for adjusting the resistance value.

  The protective film 4 is an overcoat layer in which an epoxy resin paste is screen-printed on one first surface of the insulating substrate 1 and is heat-cured. Although not shown, a resistor is provided on the lower surface side of the protective film 4. An undercoat layer covering 3 is formed. The undercoat layer is obtained by screen-printing glass paste, drying and firing. Since the protective film 4 is formed so as to cover the internal electrode 2 and the resistor 3 except for both ends in the longitudinal direction of the first surface, the left side and the upper and lower sides of the internal electrode 2 positioned on the near side in the figure are The right side piece and the upper and lower sides of the internal electrode 2 located on the far side in the drawing are exposed from between the insulating substrate 1 and the protective film 4.

  The external electrode 5 is formed by sputtering Ni—Cr or the like. The external electrode 5 is formed in a strip shape at both ends in the longitudinal direction of the first surface of the insulating substrate 1 and is exposed from the side end portion of the protective film 4. 2 is conducting. The external electrode 6 is also formed by sputtering Ni—Cr or the like. The external electrode 6 is formed at both ends in the longitudinal direction of the third surface of the insulating substrate 1 and is exposed from the upper and lower ends of the protective film 4. Conducted. These external electrodes 5 and 6 are simultaneously formed by a masking sputtering method to be described later, but the width dimension (dimension along the longitudinal direction of the first surface) of the external electrode 5 formed on the first surface is the third surface. The dimension is set to be sufficiently smaller (for example, about 1/5) than the dimension along the longitudinal direction of the external electrode 6 formed in (1). Although not shown, in order to improve solderability, the surfaces of the external electrodes 5 and 6 are subjected to electrolytic plating such as Ni and Sn.

  As shown in FIG. 2, the chip resistor configured as described above is mounted on the land 21 provided on the circuit board 20 with the third surface of the insulating substrate 1 facing downward, and formed on the third surface. The external electrodes 6 and lands 21 thus formed are surface-mounted on the circuit board 20 by joining them with solder 22. That is, among the six surfaces of the rectangular parallelepiped insulating substrate 1, the two first surfaces having the largest area are in a posture facing sideways, and the short side dimension of the third surface serving as the mounting surface (FIG. 1). The height W of the second surface (dimension H in FIG. 1) is larger than the dimension W), and it is possible to cope with narrow adjacent mounting in which the interval between adjacent chips is narrowed.

  In addition, in this chip resistor, the dimension along the longitudinal direction of the external electrode 5 formed on the first surface facing sideways during mounting is in the longitudinal direction of the external electrode 6 formed on the third surface serving as the mounting surface. Since the area of the external electrode 5 on the first surface is smaller than the area of the external electrode 6 on the third surface, the insulating substrate 1 is pulled toward the first surface due to the shrinkage of the solder 22. In spite of the fact that it is a tower type that supports narrow adjacent mounting, it can be mounted in a stable posture that is hard to fall down.

  Next, a manufacturing method of the chip resistor configured as described above will be described with reference to FIGS.

  First, as shown in FIG. 3A and FIG. 4A, a large-sized substrate 30 made of ceramic from which a large number of insulating substrates 1 are taken is prepared. Although the large-sized substrate 30 is not formed with a primary dividing groove or a secondary dividing groove, the large-sized substrate 30 is formed into a lattice-like primary dividing line L1 and a secondary dividing line L2 (indicated by a one-dot chain line in the figure) in a later process. Each of the squares that are diced along the two lines L1 and L2 is a chip formation region for one piece. FIG. 3 shows a state in which the large-sized substrate 30 is viewed in plan, and FIG. 4 shows a state in which one chip forming region in FIG.

  Then, an Ag-based paste is printed on the surface of such a large-sized substrate 30 (corresponding to one first surface of the insulating substrate 1) so as to overlap the secondary dividing line L2, and this is dried and fired. As shown in FIGS. 3B and 4B, a plurality of pairs of internal electrodes 2 are formed on the surface of the large substrate 30 so as to face each other with the chip formation region interposed therebetween.

  Next, a resistor paste such as ruthenium oxide is screen-printed on the surface of the large-sized substrate 30 and then dried and fired to form a pair of internal electrodes 2 as shown in FIGS. 3 (c) and 4 (c). A plurality of resistors 3 are formed between them. Note that the order of forming the internal electrode 2 and the resistor 3 may be reversed.

  Next, as a means for reducing damage to the resistor 3 when the trimming grooves are formed, a glass paste is screen-printed on the surface of the large-sized substrate 30 and dried and fired, so that most of the internal electrodes 2 and the resistor 3 are formed. After forming an undercoat layer (not shown) that covers the entire surface, a trimming groove is formed on the resistor 3 from above the undercoat layer to adjust the resistance value. Thereafter, an epoxy resin paste is screen-printed from above the undercoat layer and heat-cured, thereby reducing the width along the secondary dividing line L2, as shown in FIGS. 3 (d) and 4 (d). A protective film 4 is formed to cover almost the entire chip formation region except for the portion.

  Next, the large substrate 30 is cut with a dicing blade along the primary dividing line L1, thereby obtaining a strip-shaped substrate 30A in which a plurality of resistors 3 are arranged in a line as shown in FIG. Dicing along the primary dividing line L1 cuts the strip-shaped internal electrode 2 and the protective film 4 in the width direction, and the cut surfaces of the internal electrode 2 are exposed at both end surfaces in the width direction of the strip-shaped substrate 30A. In addition, the cut surfaces by dicing at this time, that is, both end surfaces in the width direction of the strip-shaped substrate 30 </ b> A correspond to the third surfaces of the insulating substrate 1.

  Next, as shown in FIG. 5A, after stacking the plurality of strip-shaped substrates 30A with the surface on which the internal electrode 2 and the resistor 3 are formed facing upward, as shown in FIG. 5B. In addition, the non-electrode portion of the strip-shaped substrate 30A is covered with the mask M. Then, as shown in FIG. 5C, after Ni—Cr or the like is sputtered on the portion of the strip-shaped substrate 30A that is not covered with the mask M in this state, as shown in FIG. 5D. Then, by removing the mask M, the external electrode 6 connected to the cut surface of the internal electrode 2 is formed on the end surface of the strip-shaped substrate 30A as shown in FIG. At that time, since the metal film such as Ni—Cr formed by masking sputtering wraps around not only the end face of the strip-shaped substrate 30A but also the front and back surfaces, the strip-shaped substrate 30A has a strip shape along the first dividing line L1. And the external electrode 5 is formed on the back surface of the strip-shaped substrate 30A. If the metal film formed by masking sputtering does not sufficiently wrap around the surface of the strip-shaped substrate 30A, the external electrode 5 is not formed at the center in the width direction of the strip-shaped substrate 30A. Therefore, both the external electrode 5 and the internal electrode 2 are exposed on the surface of the strip-shaped substrate 30A.

  Thereafter, the strip-shaped substrate 30A is cut with a dicing blade along the secondary dividing line L2, so that the external electrodes 5 formed on both the front and back surfaces of the strip-shaped substrate 30A and the external electrodes 6 formed on both end surfaces are respectively provided. Dividing into two, individual chip elements having the same outer shape as the chip resistor are obtained. Note that the cut surface by dicing at this time corresponds to the second surface of the insulating substrate 1.

  Finally, by applying electrolytic plating such as Ni and Sn to the external electrodes 5 and 6 of the individual chip elements, a chip resistor as shown in FIG. 1 is completed.

  FIG. 6 is a perspective view of a chip resistor according to the second embodiment of the present invention, and parts corresponding to those in FIG.

  The chip resistor shown in FIG. 6 is different from the first embodiment described above in that the external electrode 6 is formed on the pair of third surfaces of the insulating substrate 1, but the pair of first surfaces of the insulating substrate 1. The external electrode is not formed on the substrate, and the other configuration is basically the same.

  That is, in the chip resistor according to the second embodiment, the protective film 4 is formed so as to cover the entire first surface of the insulating substrate 1 including the pair of internal electrodes 2 and the resistor 3. No external electrode is formed on the first surface opposite to the surface. External electrodes 6 are formed at both longitudinal ends of the two third surfaces of the insulating substrate 1, and these external electrodes 6 are connected to the internal electrodes 2 exposed from the upper and lower sides of the insulating substrate 1 and the protective film 4. Has been.

  Also in the chip resistor according to the second embodiment configured as described above, the first surface having the largest area on which the internal electrode 2 and the resistor 3 are formed is directed to the side, and the long side of the first surface is formed. By making the adjacent third surface a mounting surface on the circuit board, it is possible to cope with a tower-type narrow adjacent mounting in which the chip interval is narrowed. Moreover, in this chip resistor, although the external electrode 6 that is electrically connected to the internal electrode 2 is formed on the third surface serving as the mounting surface, the external electrode does not exist on the first surface facing sideways, The insulating substrate 1 is never pulled to the first surface side due to the solder contraction, so that it is possible to mount narrowly adjacent with a more stable posture. Furthermore, since the entire first surface is covered with the protective film 4 and no external electrode exists on the first surface facing sideways, it is possible to prevent a short circuit accident between chips due to narrow adjacent mounting.

  The chip resistor according to the second embodiment can be manufactured by substantially the same process as that of the first embodiment except that the protective film 4 is formed on the entire first surface. That is, in the step shown in FIG. 3D in the first embodiment, the internal electrode 2 and the resistor 3 are included instead of forming a plurality of band-shaped protective films 4 in the region sandwiched between the secondary dividing lines L2. The protective film 4 may be formed so as to cover the entire chip formation region of the large-sized substrate 30.

  FIG. 7 is a perspective view of a chip resistor according to a third embodiment of the present invention, FIG. 8 is a perspective view of the chip resistor viewed from the opposite side, and FIGS. 9 and 10 show a method of manufacturing the chip resistor. It is explanatory drawing shown, and the same code | symbol is attached | subjected to the part corresponding to FIGS.

  As shown in FIGS. 7 and 8, the chip resistor according to the third embodiment includes a rectangular parallelepiped insulating substrate 1 and a pair of longitudinally formed ends of one first surface of the insulating substrate 1. An internal electrode 2, a resistor 3 formed so as to be connected to the internal electrode 2, and a protective film 4 formed so as to cover the entire first surface including the internal electrode 2 and the resistor 3. A pair of internal electrodes 7 formed at both ends in the longitudinal direction of the other first surface of the insulating substrate 1, and an auxiliary protective film 8 formed so as to cover the other first surface including these internal electrodes 7 And external electrodes 9 and 10 formed at the four corners of the pair of third surfaces of the insulating substrate 1.

  The external electrode 9 formed near the protective film 4 is electrically connected to the internal electrode 2 connected to the resistor 3, and these external electrodes 9 are obtained by reducing the width of the external electrode 6 in the second embodiment. Functionally the same. The auxiliary protective film 8 is made of the same resin material as that of the protective film 4, and the external electrode 10 formed near the auxiliary protective film 8 is connected to the internal electrode 7. However, the internal electrode 7 covered with the auxiliary protective film 8 is not electrically connected to the resistor 3, and the external electrode 10 near the auxiliary protective film 8 connected to the internal electrode 7 is not electrically involved. Since it is an electrode, the internal electrode 7 may be omitted and only the auxiliary protective film 8 may be formed on the other third surface.

  A manufacturing method of the chip resistor according to the third embodiment configured as described above will be described with reference to FIGS. 9 and 10. First, as shown in FIGS. A large-sized substrate 40 made of ceramic from which a large number of substrates 1 are taken is prepared. On both the front and back surfaces of the large substrate 40, a bottomed dividing groove 41 is provided in advance at a position corresponding to the primary dividing line L1 shown in FIG. 3, but the dividing line L indicated by a one-dot chain line in the figure. Is an expected line to be diced in a later process, and these dividing lines L are not provided on the large-sized substrate 40.

  Then, an Ag-based paste is printed on the surface of such a large-sized substrate 40 (corresponding to one first surface of the insulating substrate 1) so as to overlap the dividing line L, and this is dried and baked, whereby FIG. As shown in FIG. 10B and FIG. 10B, a plurality of pairs of internal electrodes 2 are formed on the surface of the large substrate 40 so as to face each other with the chip formation region interposed therebetween. Further, before and after this, an Ag-based paste is printed on the back surface of the large-sized substrate 40 (corresponding to the other first surface of the insulating substrate 1) so as to overlap with the dividing line L, and this is dried and fired. As shown in FIG. 10B, a plurality of pairs of internal electrodes 7 are formed on the back surface of the large substrate 40 so as to face each other with the chip formation region interposed therebetween. At that time, since the Ag-based paste which is the material of the internal electrode 2 and the internal electrode 7 is printed so as to cross the dividing grooves 41, the Ag-based paste flows into the dividing grooves 41 on both the front and back surfaces of the large substrate 40.

  Next, a resistor paste such as ruthenium oxide is screen-printed on the surface of the large-sized substrate 40, dried and fired, thereby forming a pair of internal electrodes 2 as shown in FIGS. 9 (c) and 10 (c). A plurality of resistors 3 are formed between them.

  Next, as a means for reducing damage to the resistor 3 when the trimming groove is formed, a glass paste is screen-printed on the surface of the large substrate 40, dried and baked, and an unillustrated undercoat covering each chip formation region. After forming the coat layer, trimming grooves are formed in the resistor 3 from above the undercoat layer to adjust the resistance value. Thereafter, the epoxy resin paste is screen printed from above the undercoat layer and cured by heating, thereby including the internal electrode 2 and the resistor 3 as shown in FIG. 9 (d) and FIG. 10 (d). A protective film 4 covering each chip formation region is formed. Also, before and after this, an epoxy resin paste is screen-printed on the back surface of the large-sized substrate 40 and heat-cured to cover each chip formation region including the internal electrodes 7 as shown in FIG. An auxiliary protective film 8 is formed.

  Next, the large-sized substrate 40 is cut with a dicing blade along a dividing line L in a direction orthogonal to the dividing grooves 41, so that the strip-like internal electrode 2 extends along the longitudinal direction as shown in FIG. The strip substrate 40A is obtained by being divided. Note that the cut surfaces by this dicing, that is, both end surfaces in the width direction of the strip-shaped substrate 40 </ b> A correspond to the second surface of the insulating substrate 1.

  After that, by breaking the strip-shaped substrate 40A along the dividing groove 41, individual chip elements having substantially the same outer shape as the chip resistor are obtained. The dividing surface at the time of the break corresponds to the third surface of the insulating substrate 1. However, as described above, the Ag-based paste which is the material of the internal electrodes 2 and 7 flows into the dividing groove 41. The external electrode 9 conducting to the internal electrode 2 and the external electrode 10 conducting to the internal electrode 7 are exposed at the four corners of the divided surface. Finally, by applying electrolytic plating such as Ni or Sn to the external electrodes 9 and 10 of the individual chip elements, a chip resistor as shown in FIGS. 7 and 8 is completed.

  Also in the chip resistor according to the third embodiment configured as described above, the first surface having the largest area on which the internal electrode 2 and the resistor 3 are formed is directed to the side, and the long side of the first surface is formed. By making the adjacent third surface a mounting surface on the circuit board, it is possible to cope with a tower-type narrow adjacent mounting in which the chip interval is narrowed. Moreover, in this chip resistor, the external electrodes 9 and 10 that can be soldered are formed at the four corners of the third surface that is the mounting surface, and the external electrode is not formed on the first surface facing sideways. The insulating substrate 1 is not pulled toward the first surface due to solder contraction during mounting, and narrow adjacent mounting in a stable posture can be performed. Furthermore, the entire two first surfaces of the insulating substrate 1 are covered with the protective film 4 and the auxiliary protective film 8, and the appearance is the same regardless of which of the two third surfaces of the insulating substrate 1 is the mounting surface. Therefore, a chip resistor can be realized suitably for bulk mounting.

  FIG. 11 is a perspective view of a chip resistor according to a fourth embodiment of the present invention, and FIGS. 12 and 13 are explanatory views showing a method for manufacturing the chip resistor, in portions corresponding to FIGS. Are given the same reference numerals.

  The chip resistor shown in FIG. 11 is different from the second embodiment described above (see FIG. 6) in that cap-shaped external electrodes 11 are formed on a pair of second surfaces of the insulating substrate 1, and these external electrodes 11 are formed. Is connected to the external electrode 6 formed on the third surface and the end surface of the internal electrode 2 exposed from the protective film 4 on the second surface, and the other configuration is basically the same.

  That is, in the chip resistor according to the fourth embodiment, the cap-shaped external electrode 11 covering the entire second surface of the insulating substrate 1 extends to a position where it overlaps the end of the external electrode 6 formed on the third surface. The external electrode 11 has the same width as the third surface and extends to the first surface and overlaps the end of the protective film 4. Therefore, the dimension along the longitudinal direction of the external electrode 11 formed on the second surface of the insulating substrate 1 is set smaller than the dimension along the longitudinal direction of the external electrode 6 formed on the third surface serving as the mounting surface. Yes.

  Also in the chip resistor according to the fourth embodiment configured as described above, the first surface having the largest area on which the internal electrode 2 and the resistor 3 are formed is directed to the side, and the long side of the first surface is formed. By making the adjacent third surface a mounting surface on the circuit board, it is possible to cope with a tower-type narrow adjacent mounting in which the chip interval is narrowed. In addition, in this chip resistor, the external electrode 6 formed on the third surface serving as the mounting surface has a dimension along the longitudinal direction of the external electrode 11 formed on the first surface of the insulating substrate 1 facing sideways during mounting. Therefore, the insulating substrate 1 is not pulled to the first surface side due to solder contraction during mounting, and is a tower type corresponding to narrow adjacent mounting. It can be mounted in a stable posture that will not fall over easily. Further, the external electrode 11 is also formed on the second surface of the insulating substrate 1, and a solder fillet can be formed between the land of the circuit board and the second surface of the insulating substrate 1. It can be carried out.

  A manufacturing method of the chip resistor according to the fourth embodiment configured as described above will be described with reference to FIGS. 12 and 13. First, a large-sized substrate 50 made of ceramic from which a large number of insulating substrates 1 are taken is prepared. To do. Although the primary divided grooves and the secondary divided grooves are not formed in the large format substrate 50, the large format substrate 50 is diced along a primary divided line L1 and a secondary divided line L2 extending in a lattice shape in a subsequent process.

  Then, an Ag-based paste is printed on the surface of such a large-sized substrate 50 (corresponding to one first surface of the insulating substrate 1) so as to overlap with the secondary dividing line L2, and this is dried and baked, whereby FIG. As shown in FIG. 12B and FIG. 13B, a plurality of pairs of internal electrodes 2 are formed on the surface of the large substrate 50 so as to face each other with the chip formation region interposed therebetween.

  Next, a resistor paste such as ruthenium oxide is screen-printed on the surface of the large-sized substrate 50, dried and fired, thereby forming a pair of internal electrodes 2 as shown in FIGS. 12 (c) and 13 (c). A plurality of resistors 3 are formed between them.

  Next, a glass paste is screen-printed on the surface of the large substrate 50 to reduce damage to the resistor 3 when the trimming groove is formed and to reduce damage to the resistor 3 when the trimming groove is formed. After forming an undercoat layer (not shown) covering each chip formation region by drying and firing, a trimming groove is formed in the resistor 3 from above the undercoat layer to adjust the resistance value. Thereafter, the epoxy resin paste is screen printed from above the undercoat layer and cured by heating to include the internal electrode 2 and the resistor 3 as shown in FIGS. 12 (d) and 13 (d). A protective film 4 covering each chip formation region is formed.

  Next, the large substrate 50 is cut with a dicing blade along the primary division line L1, thereby obtaining a strip-shaped substrate 50A in which a plurality of resistors 3 are arranged in a horizontal row as shown in FIG. . In addition, the cut surfaces by this dicing, that is, both end surfaces in the width direction of the strip-shaped substrate 50 </ b> A correspond to the second surface of the insulating substrate 1.

  Next, the non-electrode portion of the strip-shaped substrate 50A is covered with a mask (not shown), and in this state, Ni—Cr or the like is sputtered onto the portion of the strip-shaped substrate 50A that is not covered with the mask in the width direction end face. As shown in FIG. 12F, the external electrode 6 connected to the cut surface of the internal electrode 2 is formed on the end surface of the strip-shaped substrate 50A.

  Thereafter, the strip-shaped substrate 50A is cut with a dicing blade along the secondary dividing line L2, thereby obtaining individual chip elements having substantially the same outer shape as the chip resistor. Note that the cut surface by dicing at this time corresponds to the second surface of the insulating substrate 1.

  Next, a cap-shaped end face electrode 11 that covers the end portions of the protective film 4 and the external electrode 6 is formed at both ends in the longitudinal direction of the chip element by dip-coating Ag paste on the end face of the chip element and curing by heating. . Finally, by applying electrolytic plating such as Ni or Sn to the external electrodes 9 and 10 of the individual chip elements, a chip resistor as shown in FIG. 11 is completed.

  FIG. 14 is a perspective view of a chip resistor according to a fifth embodiment of the present invention, and parts corresponding to those in FIG.

  The chip resistor shown in FIG. 14 is different from the first embodiment described above in that a narrow external electrode 12 is formed on a pair of second surfaces of the insulating substrate 1, and the other configuration is the basic configuration. Are the same. In the case of forming such an external electrode 12, a bottomed dividing groove as in the third embodiment described above is provided at a position corresponding to the secondary dividing line of the large substrate, and the surface of the large substrate is formed. After the printed Ag-based paste or the like is poured into the divided grooves, the large-sized substrate may be broken along the divided grooves. Therefore, if the dividing grooves are provided on both the front and back surfaces of the large substrate, the external electrodes 12 can be formed on both sides of the second surface of the insulating substrate 1 in the short direction.

  FIG. 15 is a perspective view of a chip resistor according to a sixth embodiment of the present invention, and FIG. 16 is an explanatory view showing a method of manufacturing the chip resistor, and parts corresponding to those in FIGS. Is attached.

  The chip resistor shown in FIG. 15 is different from the above-described fourth embodiment (see FIG. 11) in that the external electrodes 11 formed on the pair of second surfaces of the insulating substrate 1 are the first surface and the third surface. The other configurations are basically the same.

  That is, in the chip resistor according to the sixth embodiment, the protective film 4 is formed so as to cover the entire first surface of the insulating substrate 1 including the pair of internal electrodes 2 and the resistor 3, and the insulating substrate 1. The external electrodes 6 are formed on both ends of the two third surfaces in the longitudinal direction, and the external electrodes 11 are formed on the entire two second surfaces of the insulating substrate 1. Therefore, there is no external electrode on the first surface of the insulating substrate 1, and the insulating substrate 1 is not pulled to the first surface side due to solder shrinkage during mounting, so that it is a tower type corresponding to narrow adjacent mounting. Nevertheless, it can be mounted in a stable posture that is hard to fall over. In addition, since the external electrode 11 is also formed on the second surface of the insulating substrate 1, it is possible to perform narrow adjacent mounting with high solder joint strength as in the fourth embodiment.

  A manufacturing method of the chip resistor according to the sixth embodiment configured as described above will be explained with reference to FIG. 16. First, as shown in FIG. 16A, a large number of insulating substrates 1 are taken. A large substrate 60 made of ceramic is prepared. Although the large-sized substrate 60 is not formed with a primary division groove or a secondary division groove, a through-hole 61 is provided at the intersection of the primary division line L1 and the secondary division line L2 to be diced in a subsequent process. .

  Then, an Ag-based paste is printed on the surface of the large substrate 60 (corresponding to one first surface of the insulating substrate 1) so as to be wider than the through hole 61 and overlap the primary dividing line L1, and then dried. By baking, as shown in FIG. 16B, a plurality of pairs of internal electrodes 2 are formed on the surface of the large substrate 60 so as to face each other with the chip formation region interposed therebetween. At this time, since the Ag-based paste is printed so as to cross the through-hole 61, the Ag-based paste flows into the inner wall surface of the through-hole 61.

  Next, a resistor paste such as ruthenium oxide is screen-printed on the surface of the large-sized substrate 60, dried, and fired, so that a plurality of resistances straddling the pair of internal electrodes 2 as shown in FIG. Form body 3.

  Next, as a means for reducing damage to the resistor 3 when the trimming groove is formed, a glass paste is screen-printed on the surface of the large-sized substrate 60, dried and fired, and an unillustrated undercoat covering each chip formation region. After forming the coat layer, trimming grooves are formed in the resistor 3 from above the undercoat layer to adjust the resistance value. Thereafter, an epoxy resin paste is screen-printed from above the undercoat layer and heat-cured to cover each chip formation region including the internal electrode 2 and the resistor 3 as shown in FIG. A protective film 4 is formed.

  Next, by cutting the large substrate 60 with a dicing blade along the primary dividing line L1, as shown in FIG. 16 (e), the strip-like internal electrode 2 is divided along the longitudinal direction to form a strip-like substrate. 60A is obtained. Note that the cut surfaces by this dicing, that is, both end surfaces in the width direction of the strip-shaped substrate 60 </ b> A correspond to the second surfaces of the insulating substrate 1.

  Next, by sputtering Ni—Cr or the like on both end surfaces in the width direction of the strip-shaped substrate 60A, as shown in FIG. 16 (f), the external electrode 11 is formed on the end surface of the strip-shaped substrate 60A. By cutting the substrate 60A with a dicing blade along the secondary dividing line L2, individual chip elements having substantially the same outer shape as the chip resistor are obtained. The cutting surface at the time of dicing corresponds to the third surface of the insulating substrate 1, but as described above, the Ag-based paste that is the material of the internal electrode 2 flows into the through hole 61. The external electrodes 6 that are electrically connected to the internal electrode 2 are exposed at both longitudinal ends of the surface. Finally, by applying electrolytic plating such as Ni and Sn to the external electrodes 6 and 11 of the individual chip elements, a chip resistor as shown in FIG. 15 is completed.

  In the sixth embodiment, the external electrode 6 is formed by pouring the material of the internal electrode 2 into the through hole 61. However, the material of the internal electrode 2 is not poured into the through hole 61, The external electrode 6 may be formed by wrapping around by sputtering Ni—Cr or the like on both end faces in the width direction of the substrate 60A.

  Further, the present invention is not limited to the above-described embodiments, and various modifications can be made other than that. For example, in the third embodiment shown in FIG. 6, an external electrode is formed so as to cover the entire second surface of the insulating substrate 1, or an external electrode having the same width as the external electrodes 9 and 10 formed on the third surface. May also be formed on the second surface.

DESCRIPTION OF SYMBOLS 1 Insulation board | substrate 2 Internal electrode 3 Resistor 4 Protective film 5, 6, 9, 10, 11, 12 External electrode 7 Internal electrode 8 Auxiliary protective film 20 Circuit board 21 Land 22 Solder 30, 40, 50, 60 Large format board 30A, 40A, 50A, 60A Strip substrate 41 Dividing groove 61 Through hole

Claims (5)

Among the six surfaces constituting the rectangular parallelepiped insulating substrate made of ceramics, the two opposing surfaces having the largest area are the first surface, the two opposing surfaces adjacent to the short side of the first surface are the second surface, In the chip resistor having the two opposing surfaces adjacent to the long side of the first surface as the third surface,
One of the pair of first surfaces is provided with a pair of internal electrodes facing each other with a predetermined interval, a resistor straddling the internal electrodes, and an insulating protective film covering the resistor. In addition, external electrodes that are electrically connected to the internal electrodes are provided at both longitudinal ends of the pair of first surfaces and the pair of third surfaces, respectively, and the external electrodes provided on the first surface A chip resistor characterized in that a dimension along a longitudinal direction is set smaller than a dimension along a longitudinal direction of the external electrode provided on the third surface. Among the six surfaces constituting the rectangular parallelepiped insulating substrate made of ceramics, the two opposing surfaces having the largest area are the first surface, the two opposing surfaces adjacent to the short side of the first surface are the second surface, In the chip resistor having the two opposing surfaces adjacent to the long side of the first surface as the third surface,
One of the pair of first surfaces is provided with a pair of internal electrodes facing each other with a predetermined interval, a resistor straddling the internal electrodes, and an insulating protective film covering the resistor. In addition, external electrodes that are electrically connected to the internal electrodes are provided at both longitudinal ends of the pair of third surfaces, and the external electrodes are not provided on the pair of first surfaces. Chip resistor.   3. The chip resistor according to claim 1, wherein an external electrode that is electrically connected to the internal electrode is provided on the pair of second surfaces.   3. The chip resistor according to claim 1, wherein the protective film covers the entire surface of the first surface including the internal electrode and the resistor.   3. The chip resistor according to claim 1, wherein an insulating auxiliary protective film is provided on the entire other surface of the pair of first surfaces.