JP2017017204A - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法 Download PDFInfo
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- JP2017017204A JP2017017204A JP2015133195A JP2015133195A JP2017017204A JP 2017017204 A JP2017017204 A JP 2017017204A JP 2015133195 A JP2015133195 A JP 2015133195A JP 2015133195 A JP2015133195 A JP 2015133195A JP 2017017204 A JP2017017204 A JP 2017017204A
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 34
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 20
- 229910000679 solder Inorganic materials 0.000 claims abstract description 222
- 239000000758 substrate Substances 0.000 claims abstract description 51
- 239000007787 solid Substances 0.000 claims abstract description 40
- 238000000034 method Methods 0.000 claims abstract description 22
- 239000000203 mixture Substances 0.000 claims abstract description 7
- 238000002844 melting Methods 0.000 claims description 22
- 230000008018 melting Effects 0.000 claims description 22
- 238000010438 heat treatment Methods 0.000 claims description 15
- 238000005476 soldering Methods 0.000 abstract description 2
- 239000011248 coating agent Substances 0.000 abstract 1
- 238000000576 coating method Methods 0.000 abstract 1
- 230000004927 fusion Effects 0.000 abstract 1
- 238000009413 insulation Methods 0.000 abstract 1
- 239000000843 powder Substances 0.000 description 8
- 239000011810 insulating material Substances 0.000 description 7
- 238000005516 engineering process Methods 0.000 description 5
- 230000004907 flux Effects 0.000 description 5
- 230000000630 rising effect Effects 0.000 description 5
- 230000004048 modification Effects 0.000 description 4
- 238000012986 modification Methods 0.000 description 4
- 229920005989 resin Polymers 0.000 description 4
- 239000011347 resin Substances 0.000 description 4
- 239000000155 melt Substances 0.000 description 3
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 description 2
- 229920001296 polysiloxane Polymers 0.000 description 2
- 230000002265 prevention Effects 0.000 description 2
- 239000003566 sealing material Substances 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 238000011065 in-situ storage Methods 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 229920001187 thermosetting polymer Polymers 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
- H01L2224/48139—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate with an intermediate bond, e.g. continuous wire daisy chain
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
- H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49175—Parallel arrangements
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- H—ELECTRICITY
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- H—ELECTRICITY
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19107—Disposition of discrete passive components off-chip wires
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Abstract
Description
最初に前提技術に係る半導体装置の製造方法について説明する。図7は、前提技術に係る半導体装置の断面図である。図7に示すように、半導体装置は、パワーモジュールであり、例えば2つのIGBT等の半導体チップ1、ワイヤ2、例えば2つの絶縁基板4、絶縁基板4a、絶縁材5、放熱板6、電極端子7、ケース8、封止材9および蓋10を備えている。
本発明の実施の形態について、図面を用いて以下に説明する。図1は、実施の形態に係る半導体装置の製造方法において電極端子の接合部の加熱前の状態を示す平面図であり、図2は、図1のA-A断面図である。
Claims (3)
- ペーストはんだを用いて電極端子と基板とを接合する半導体装置の製造方法であって、
(a)前記基板における前記電極端子が接合される位置の周囲でありかつその位置の全周を囲む位置に、前記ペーストはんだと同じ融点となる組成を有する固体はんだを超音波接合で仮付けする工程と、
(b)前記基板における前記電極端子が接合される位置に、前記ペーストはんだを配置する工程と、
(c)前記ペーストはんだ上に前記電極端子を配置する工程と、
(d)前記ペーストはんだおよび前記固体はんだを加熱することで溶融させ、前記ペーストはんだおよび前記固体はんだを用いて前記電極端子と前記基板とを接合する工程と、
を備える、半導体装置の製造方法。 - 前記工程(b)は、前記固体はんだで囲まれた位置に前記固体はんだの内周に沿って前記ペーストはんだを配置する工程である、請求項1記載の半導体装置の製造方法。
- 前記固体はんだは、糸はんだ、リボンはんだまたはボールはんだである、請求項1または請求項2記載の半導体装置の製造方法。
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JP2015133195A JP6381489B2 (ja) | 2015-07-02 | 2015-07-02 | 半導体装置の製造方法 |
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JP2015133195A JP6381489B2 (ja) | 2015-07-02 | 2015-07-02 | 半導体装置の製造方法 |
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JP2017017204A true JP2017017204A (ja) | 2017-01-19 |
JP6381489B2 JP6381489B2 (ja) | 2018-08-29 |
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109003909A (zh) * | 2017-06-07 | 2018-12-14 | 三菱电机株式会社 | 半导体装置的制造方法 |
JP2019068025A (ja) * | 2017-09-29 | 2019-04-25 | 現代自動車株式会社Hyundai Motor Company | 車両用電力モジュール |
WO2023243256A1 (ja) * | 2022-06-13 | 2023-12-21 | 富士電機株式会社 | 半導体装置 |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2000252614A (ja) * | 1999-02-26 | 2000-09-14 | Matsushita Electric Ind Co Ltd | プリント配線基板およびbgaパッケージ型半導体の実装構造 |
JP2004363216A (ja) * | 2003-06-03 | 2004-12-24 | Fuji Electric Holdings Co Ltd | 半導体装置 |
US20090115039A1 (en) * | 2007-11-06 | 2009-05-07 | Zhengyu Zhu | High Bond Line Thickness For Semiconductor Devices |
JP2011023556A (ja) * | 2009-07-16 | 2011-02-03 | Panasonic Corp | 電池ユニット |
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2015
- 2015-07-02 JP JP2015133195A patent/JP6381489B2/ja active Active
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2000252614A (ja) * | 1999-02-26 | 2000-09-14 | Matsushita Electric Ind Co Ltd | プリント配線基板およびbgaパッケージ型半導体の実装構造 |
JP2004363216A (ja) * | 2003-06-03 | 2004-12-24 | Fuji Electric Holdings Co Ltd | 半導体装置 |
US20090115039A1 (en) * | 2007-11-06 | 2009-05-07 | Zhengyu Zhu | High Bond Line Thickness For Semiconductor Devices |
JP2011023556A (ja) * | 2009-07-16 | 2011-02-03 | Panasonic Corp | 電池ユニット |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109003909A (zh) * | 2017-06-07 | 2018-12-14 | 三菱电机株式会社 | 半导体装置的制造方法 |
JP2018207002A (ja) * | 2017-06-07 | 2018-12-27 | 三菱電機株式会社 | 半導体装置の製造方法 |
JP2019068025A (ja) * | 2017-09-29 | 2019-04-25 | 現代自動車株式会社Hyundai Motor Company | 車両用電力モジュール |
JP7046580B2 (ja) | 2017-09-29 | 2022-04-04 | 現代自動車株式会社 | 車両用電力モジュール |
WO2023243256A1 (ja) * | 2022-06-13 | 2023-12-21 | 富士電機株式会社 | 半導体装置 |
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