JP2016511608A5 - - Google Patents
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- Publication number
- JP2016511608A5 JP2016511608A5 JP2015561730A JP2015561730A JP2016511608A5 JP 2016511608 A5 JP2016511608 A5 JP 2016511608A5 JP 2015561730 A JP2015561730 A JP 2015561730A JP 2015561730 A JP2015561730 A JP 2015561730A JP 2016511608 A5 JP2016511608 A5 JP 2016511608A5
- Authority
- JP
- Japan
- Prior art keywords
- transistor
- signals
- terminals
- turned
- voltage level
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000000034 method Methods 0.000 claims 10
- 238000013507 mapping Methods 0.000 claims 4
- 230000005540 biological transmission Effects 0.000 claims 3
- 230000007704 transition Effects 0.000 claims 2
Applications Claiming Priority (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US201361774425P | 2013-03-07 | 2013-03-07 | |
| US61/774,425 | 2013-03-07 | ||
| US14/199,064 | 2014-03-06 | ||
| US14/199,064 US9172426B2 (en) | 2013-03-07 | 2014-03-06 | Voltage mode driver circuit for N-phase systems |
| PCT/US2014/021994 WO2014138646A1 (en) | 2013-03-07 | 2014-03-07 | Voltage mode driver circuit for n-phase systems |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2016511608A JP2016511608A (ja) | 2016-04-14 |
| JP2016511608A5 true JP2016511608A5 (enExample) | 2017-03-30 |
| JP6430971B2 JP6430971B2 (ja) | 2018-11-28 |
Family
ID=51487798
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2015561730A Expired - Fee Related JP6430971B2 (ja) | 2013-03-07 | 2014-03-07 | N相システムのための電圧モードドライバ回路 |
Country Status (8)
| Country | Link |
|---|---|
| US (1) | US9172426B2 (enExample) |
| EP (1) | EP2965216B1 (enExample) |
| JP (1) | JP6430971B2 (enExample) |
| KR (1) | KR20150126906A (enExample) |
| CN (1) | CN105164659B (enExample) |
| ES (1) | ES2632283T3 (enExample) |
| HU (1) | HUE033607T2 (enExample) |
| WO (1) | WO2014138646A1 (enExample) |
Families Citing this family (24)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9215063B2 (en) * | 2013-10-09 | 2015-12-15 | Qualcomm Incorporated | Specifying a 3-phase or N-phase eye pattern |
| TWI732737B (zh) * | 2014-03-25 | 2021-07-11 | 日商新力股份有限公司 | 發訊裝置及通訊系統 |
| US9166584B1 (en) * | 2014-06-09 | 2015-10-20 | Xilinx, Inc. | Current-encoded signaling |
| US9112550B1 (en) | 2014-06-25 | 2015-08-18 | Kandou Labs, SA | Multilevel driver for high speed chip-to-chip communications |
| US20160179739A1 (en) * | 2014-12-17 | 2016-06-23 | Intel Corporation | Symmetrically coupled differential channel |
| US10419252B2 (en) | 2015-06-22 | 2019-09-17 | Qualcomm Incorporated | Low power physical layer driver topologies |
| US9998154B2 (en) * | 2015-06-22 | 2018-06-12 | Qualcomm Incorporated | Low power physical layer driver topologies |
| US9553635B1 (en) | 2015-07-24 | 2017-01-24 | Qualcomm Incorporated | Time based equalization for a C-PHY 3-phase transmitter |
| US9520988B1 (en) | 2015-08-04 | 2016-12-13 | Qualcomm Incorporated | Adaptation to 3-phase signal swap within a trio |
| JP6665441B2 (ja) * | 2015-08-10 | 2020-03-13 | ソニー株式会社 | 送信装置、受信装置、および通信システム |
| WO2017190102A1 (en) * | 2016-04-28 | 2017-11-02 | Kandou Labs, S.A. | Low power multilevel driver |
| CN109863729B (zh) * | 2016-10-24 | 2021-10-22 | 高通股份有限公司 | 与在多线接口上传送数据相关的方法和装置 |
| TW201830940A (zh) * | 2017-02-08 | 2018-08-16 | 陳淑玲 | 三線式傳輸的穿戴裝置 |
| TW201843945A (zh) * | 2017-03-03 | 2018-12-16 | 日商索尼半導體解決方案公司 | 傳送裝置及通信系統 |
| US10496583B2 (en) | 2017-09-07 | 2019-12-03 | Kandou Labs, S.A. | Low power multilevel driver for generating wire signals according to summations of a plurality of weighted analog signal components having wire-specific sub-channel weights |
| KR101959139B1 (ko) * | 2017-10-13 | 2019-03-15 | 한양대학교 산학협력단 | 동시 스위칭 잡음 및 간섭을 제거하는 고속 데이터 송수신 시스템 및 방법 |
| CN108073539A (zh) * | 2017-12-27 | 2018-05-25 | 上海集成电路研发中心有限公司 | 一种mipi接口的d-phy电路 |
| KR102034368B1 (ko) * | 2018-01-03 | 2019-10-18 | 한양대학교 산학협력단 | 동시 스위칭 잡음이 없고 높은 신호선 효율을 가지는 송신기 및 이에 있어서 데이터 전송 방법 |
| KR102286729B1 (ko) * | 2018-01-03 | 2021-08-05 | 한양대학교 산학협력단 | 동시 스위칭 잡음이 없고 높은 신호선 효율을 가지는 송신기 및 이에 있어서 데이터 전송 방법 |
| KR102034369B1 (ko) * | 2018-01-05 | 2019-10-18 | 한양대학교 산학협력단 | 동시 스위칭 잡음을 제거하면서 클록 및 데이터를 전송할 수 있는 송신기 및 이의 동작 방법 |
| US10873323B2 (en) * | 2019-01-31 | 2020-12-22 | Marvell Asia Pte, Ltd. | Systems and methods for calibrating impedance of a low power voltage-mode transmitter driver |
| US10855254B2 (en) * | 2019-01-31 | 2020-12-01 | Marvell Asia Pte, Ltd. | Systems and methods for calibrating impedance of a low power voltage-mode transmitter driver |
| WO2023287437A1 (en) * | 2021-07-16 | 2023-01-19 | Lattice Semiconductor Corporation | Communication systems and methods |
| US12063034B2 (en) | 2022-08-30 | 2024-08-13 | Kandou Labs SA | Line driver impedance calibration for multi-wire data bus |
Family Cites Families (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CH572687A5 (enExample) * | 1972-04-11 | 1976-02-13 | Europ Teletransmission | |
| JPS59108430A (ja) * | 1982-12-13 | 1984-06-22 | Matsushita Electric Ind Co Ltd | 2値−3値変換回路 |
| JPH0691459B2 (ja) * | 1986-05-21 | 1994-11-14 | 松下電器産業株式会社 | 3値出力回路 |
| JPH02174445A (ja) * | 1988-12-27 | 1990-07-05 | Toshiba Corp | 複線式データ伝送装置 |
| JPH0442616A (ja) * | 1990-06-08 | 1992-02-13 | Rohm Co Ltd | 3値出力回路 |
| US6051990A (en) * | 1997-11-13 | 2000-04-18 | Quantum Corporation | Asymmetric current mode driver for differential transmission lines |
| DE60134641D1 (de) | 2001-08-13 | 2008-08-14 | Motorola Inc | Drahtlose Kommunikation mit Sendediversität |
| US7170949B2 (en) * | 2002-03-14 | 2007-01-30 | Intel Corporation | Methods and apparatus for signaling on a differential link |
| JPWO2005074219A1 (ja) | 2004-01-28 | 2007-11-15 | 松下電器産業株式会社 | データ送信装置、データ受信装置、伝送路符号化方法および復号方法 |
| KR100782305B1 (ko) | 2006-01-09 | 2007-12-06 | 삼성전자주식회사 | 3개의 전송선의 차동신호화에 의한 데이터 신호 송수신장치 및 송수신 방법 |
| US8064535B2 (en) * | 2007-03-02 | 2011-11-22 | Qualcomm Incorporated | Three phase and polarity encoded serial interface |
| US7936180B2 (en) * | 2008-02-01 | 2011-05-03 | Mediatek Inc. | Serial link transmitter |
-
2014
- 2014-03-06 US US14/199,064 patent/US9172426B2/en not_active Expired - Fee Related
- 2014-03-07 EP EP14713350.8A patent/EP2965216B1/en not_active Not-in-force
- 2014-03-07 CN CN201480012185.6A patent/CN105164659B/zh not_active Expired - Fee Related
- 2014-03-07 ES ES14713350.8T patent/ES2632283T3/es active Active
- 2014-03-07 KR KR1020157027492A patent/KR20150126906A/ko not_active Withdrawn
- 2014-03-07 HU HUE14713350A patent/HUE033607T2/en unknown
- 2014-03-07 WO PCT/US2014/021994 patent/WO2014138646A1/en not_active Ceased
- 2014-03-07 JP JP2015561730A patent/JP6430971B2/ja not_active Expired - Fee Related
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