JP2016034047A - Mounting structure - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a mounting structure capable of reducing noise while obtaining high degree of freedom in circuit design.SOLUTION: A mounting structure 1 is structured by mounting an electronic component 10 on a circuit substrate 50. Lands 54a and 54b are mounted on a substrate main body 52 and connected to outer electrodes 12a and 12b by solders 60a and 60b, respectively. The height H1 from the land electrodes 54a and 54b to the top of the solders 60a and 60b is 1.27 times or less the height H2 from the land electrodes 54a and 54b to a portion where a capacitor conductor 32d located nearest to the circuit board 50 is exposed from an end surface S3. A dummy conductor is provided between the mounting surface and the capacitor conductor nearest to the mounting surface.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a mounting structure, and more particularly to a mounting structure in which an electronic component such as a capacitor is mounted on a substrate.

  In an electronic component in which a dielectric layer and a capacitor conductor are laminated, when an AC voltage is applied to the electronic component, an electric field induced strain is generated in the dielectric layer due to the voltage. Such electric field induced distortion vibrates the substrate on which the electronic component is mounted, and generates a vibration sound called “squeal”. As an invention related to a conventional electronic component for reducing such “squeal”, for example, a circuit board mounting method of a multilayer ceramic capacitor described in Patent Document 1 is known.

  In the method of mounting a multilayer ceramic capacitor on a circuit board described in Patent Document 1, capacitors having equivalent specifications are arranged on the front and back surfaces of the circuit board. Thereby, the vibration transmitted from one capacitor to the circuit board and the vibration transmitted from the other capacitor to the circuit board cancel each other. As a result, “squeal” is reduced.

  However, in the circuit board mounting method of the multilayer ceramic capacitor described in Patent Document 1, it is necessary to mount two capacitors on both sides of the circuit board.

JP 2000-23320 A

  Accordingly, an object of the present invention is to provide a mounting structure capable of reducing noise while obtaining a high degree of freedom in circuit design.

The mounting structure which is one form of the present invention is
A mounting structure in which electronic components are mounted on a substrate,
The electronic component is
A stacked body configured by stacking a plurality of dielectric layers, the mounting surface facing the substrate and positioned on one side in the stacking direction, and the first end surface and the second facing each other A rectangular parallelepiped laminate having an end face of
A plurality of capacitor conductors that are laminated together with the dielectric layer to form a capacitor and are drawn to the first end face or the second end face;
A first external electrode provided across the first end surface and the mounting surface and connected to the capacitor conductor;
A second external electrode provided across the second end surface and the mounting surface and connected to the capacitor conductor;
With
A distance between the first end surface and the second end surface is larger than a distance between the mounting surface and a surface facing the mounting surface;
The substrate is
A substrate body;
A first land electrode and a second land electrode provided on the substrate body, wherein the first land electrode and the second land electrode are connected to each of the first external electrode and the second external electrode by a conductive material. A land electrode and a second land electrode;
With
The height from the first land electrode or the second land electrode to the top of the conductive material is such that the capacitor conductor extends from the first land electrode or the second land electrode to the first end face or 1.27 times or less of the shortest distance from the second end surface to the exposed portion,
The distance between the mounting surface and the capacitor conductor closest to the mounting surface is greater than the distance between the surface facing the mounting surface and the capacitor conductor closest to the surface,
The distance from the capacitor conductor closest to the mounting surface to the capacitor conductor closest to the surface facing the mounting surface is the distance from the mounting surface to the capacitor conductor closest to the mounting surface, and the mounting surface. Greater than the sum of the distance between the opposing surface and the capacitor conductor closest to the surface;
A dummy conductor is provided between the mounting surface and the capacitor conductor closest to the mounting surface;
It is characterized by.

  In the mounting structure according to the one aspect, the height from the first land electrode or the second land electrode to the top of the conductive material is such that the capacitor conductor is first from the first land electrode or the second land electrode. Is less than 1.27 times the shortest distance from the end face or the second end face to the exposed portion, so that the conductive material which is a propagation medium of the vibration generated in the laminated body portion where the capacitor conductor is provided is In this case, the vibration part is separated from the most vibrated part, and the vibration is hardly transmitted to the circuit board. In addition, since the dummy conductor is provided between the mounting surface and the capacitor conductor closest to the mounting surface, the outer layer portion is hardened and the multilayer body is prevented from warping.

  According to the present invention, since vibration can be buffered by only one electronic component, it is possible to reduce squeal while obtaining a high degree of freedom in circuit design.

1 is a cross-sectional structure diagram of a mounting structure according to a first embodiment. It is the figure which planarly viewed the mounting structure which is 1st Embodiment. It is an external appearance perspective view of the electronic component which comprises 1st Embodiment. It is a disassembled perspective view of the laminated body of the electronic component of FIG. It is the figure which showed a mode that the electronic component was vibrating in 1st Embodiment. It is a block diagram of the measuring device of a sound pressure level. It is the graph which showed the experimental result in 1st Embodiment. It is a cross-section figure of the mounting structure which is the 1st modification. It is a cross-section figure of the electronic component which constitutes the mounting structure which is the 2nd modification. It is the figure which planarly viewed the mounting structure which is a 3rd modification. It is the graph which showed the experimental result in the 3rd modification. It is a cross-section figure of the mounting structure which is 2nd Embodiment. It is the figure which planarly viewed the mounting structure which is 2nd Embodiment from the positive direction side of the z-axis direction. In 2nd Embodiment, it is the figure which showed a mode that the electronic component was vibrating. It is the graph which showed the experimental result in 2nd Embodiment.

  The mounting structure according to the present invention will be described below with reference to the accompanying drawings. In addition, in each drawing, the same code | symbol is attached | subjected regarding the same member and part, and the overlapping description is abbreviate | omitted.

(Refer to the first embodiment, FIGS. 1 to 7)
(Configuration of mounting structure)
First, the mounting structure 1 which is 1st Embodiment is demonstrated, referring FIGS. 1-4. As shown in FIGS. 1 and 2, the mounting structure 1 includes an electronic component 10 and a circuit board 50. The electronic component 10 is a chip capacitor and is mounted on the circuit board 50. Further, as shown in FIGS. 3 and 4, the electronic component 10 includes a multilayer body 11, external electrodes 12 (12 a and 12 b), and capacitor conductors 30 (30 a to 30 d) and 32 (32 a to 32 d). . Hereinafter, the stacking direction of the stacked body 11 is defined as the z-axis direction. When the stacked body 11 is viewed in plan from the z-axis direction, the direction in which the long side of the stacked body 11 extends is defined as the x-axis direction. The direction in which the short side of the multilayer body 11 extends when the multilayer body 11 is viewed in plan from the z-axis direction is defined as the y-axis direction.

  As shown in FIG. 3, the stacked body 11 includes an upper surface S1 and a bottom surface S2 positioned at both ends in the z-axis direction, end surfaces S3 and S4 facing each other, and side surfaces S5 and S6 facing each other. It has a rectangular parallelepiped shape. The laminated body 11 has a rounded shape at corners and ridgelines by chamfering. Hereinafter, in the stacked body 11, a surface located on the positive side in the z-axis direction is referred to as an upper surface S1, and a surface located on the negative direction side in the z-axis direction is referred to as a bottom surface S2. Further, a surface located on the negative direction side in the x-axis direction is referred to as an end surface S3, and a surface located on the positive direction side in the x-axis direction is referred to as an end surface S4. Also, a surface located on the positive side in the y-axis direction is referred to as a side surface S5, and a surface located on the negative direction side in the y-axis direction is referred to as a side surface S6. The bottom surface S <b> 2 is a mounting surface that faces the circuit board 50 when the electronic component 10 is mounted on the circuit board 50.

  As shown in FIG. 4, the multilayer body 11 is laminated such that a plurality of ceramic layers (dielectric layers) 17 (17 a to 17 n) are arranged in this order from the positive direction side to the negative direction side in the z-axis direction. It is comprised by. The ceramic layer 17 has a rectangular shape and is made of a dielectric ceramic. Hereinafter, the main surface on the positive direction side in the z-axis direction of the ceramic layer 17 is referred to as a front surface, and the main surface on the negative direction side in the z-axis direction of the ceramic layer 17 is referred to as a back surface.

  The upper surface S1 of the multilayer body 11 is configured by the surface of the ceramic layer 17a provided on the most positive side in the z-axis direction. The bottom surface S2 of the multilayer body 11 is constituted by the back surface of the ceramic layer 17n provided on the most negative direction side in the z-axis direction. Further, the end surface S3 is configured by connecting the short sides of the ceramic layers 17a to 17n on the negative direction side in the x-axis direction. The end surface S4 is configured by connecting the short sides of the ceramic layers 17a to 17n on the positive side in the x-axis direction. The side surface S5 is configured by connecting the long sides of the ceramic layers 17a to 17n on the positive side in the y-axis direction. The side surface S6 is configured by connecting long sides on the negative direction side in the y-axis direction of the ceramic layers 17a to 17n.

  The capacitor conductors 30 a to 30 d and 32 a to 32 d are stacked together with the ceramic layer 17 so as to face each other through the ceramic layer 17.

  As shown in FIG. 4, the capacitor conductors 30 a to 30 d are provided on the surfaces of the ceramic layers 17 d, 17 f, 17 h, and 17 j, and are built in the multilayer body 11. The capacitor conductors 30a to 30d have a rectangular shape, and are drawn out to the short side on the positive side in the x-axis direction of the ceramic layers 17d, 17f, 17h, and 17j. As a result, the capacitor conductors 30a to 30d are drawn out to the end surface S4 (first end surface) as shown in FIG.

  As shown in FIG. 4, the capacitor conductors 32 a to 32 d are provided on the surfaces of the ceramic layers 17 e, 17 g, 17 i, and 17 k and are built in the multilayer body 11. The capacitor conductors 32a to 32d have a rectangular shape, and are drawn out to the short side of the ceramic layers 17e, 17g, 17i, and 17k on the negative side in the x-axis direction. Thereby, the capacitor conductors 32a to 32d are drawn out to the end surface S3 (second end surface) as shown in FIG. The capacitor conductors 30a to 30d and the capacitor conductors 32a to 32d overlap when viewed in plan from the z-axis direction. Thereby, a capacitor C is formed between the capacitor conductors 30 and 32.

  The external electrode 12a (second external electrode) covers the end surface S3 and is folded back to the top surface S1, the bottom surface S2, and the side surfaces S5 and S6. That is, the external electrode 12a is provided across the end surface S3, the top surface S1, the bottom surface S2, and the side surfaces S5 and S6. The external electrode 12a is connected to the capacitor conductors 32a to 32d. More specifically, the external electrode 12a covers the entire end surface S3 of the multilayer body 11 so as to cover the portions where the capacitor conductors 32a to 32d are exposed from the end surface S3.

  The external electrode 12b (first external electrode) covers the end surface S4 and is folded back into the top surface S1, the bottom surface S2, and the side surfaces S5 and S6. That is, the external electrode 12b is provided across the end surface S4, the top surface S1, the bottom surface S2, and the side surfaces S5 and S6. The external electrode 12b is connected to the capacitor conductors 30a to 30d. More specifically, the external electrode 12b covers the entire end surface S4 of the multilayer body 11 so as to cover the portion where the capacitor conductors 30a to 30d are exposed from the end surface S4.

  The circuit board 50 is a multilayer board having a circuit (not shown) on its surface and inside, and includes a board body 52 and land electrodes 54 (54a, 54b). The substrate body 52 is configured by laminating a plurality of insulator layers, and has a main surface S11. The main surface S11 is a main surface on the positive side of the z-axis direction of the substrate body 52, as shown in FIG.

  The land electrode 54 is provided on the main surface S11 of the substrate body 52, and is connected to each of the external electrodes 12a and 12b by a conductive material (solder 60a and 60b). More specifically, when viewed in plan from the z-axis direction, the land electrodes 54a and 54b have a rectangular shape as shown in FIG. 2, and this is from the negative direction side to the positive direction side in the x-axis direction. They are in order.

  As shown in FIGS. 1 and 2, the external electrodes 12a and 12b are mounted on the land electrodes 54a and 54b and fixed to the land electrodes 54a and 54b while being electrically connected by solders 60a and 60b, respectively. Has been. Here, as shown in FIG. 1, the solders 60a and 60b fill the gaps between the external electrodes 12a and 12b and the land electrodes 54a and 54b, respectively, and the side surfaces S3 and S4 of the external electrodes 12a and 12b. It extends toward the positive side in the z-axis direction along the covered portion.

By the way, the mounting structure 1 has the structure described below in order to reduce noise and improve the degree of freedom in circuit design. First, the height from the surface (upper surface) on the positive side in the z-axis direction of the land electrodes 54a and 54b to the top of the solder 60a and 60b is defined as H1. The tops of the solders 60a and 60b mean the ends on the positive side in the z-axis direction of the solders 60a and 60b extending on the side surfaces S3 and S4 of the external electrodes 12a and 12b. The height means a distance in the z-axis direction. Hereinafter, the height H1 from the surface (upper surface) on the positive side in the z-axis direction of the land electrodes 54a and 54b to the top of the solder 60a and 60b is also referred to as a solder fillet height. Further, the shortest distance from the land electrodes 54a and 54b to the portions where the capacitor conductors 30a to 30d and 32a to 32d are exposed from the end faces S3 and S4 is H2. In other words, H2 is the height from the land electrodes 54a and 54b to the portion where the capacitor conductor 32d located closest to the circuit board 50 is exposed from the end face S3. At this time, H1 is 1.27 times or less of H2.

(Method for manufacturing electronic parts)
Next, a method for manufacturing the electronic component 10 will be described. For the drawings, refer to FIG. 3 and FIG.

First, a binder and an organic solvent are added to a ceramic powder such as BaTiO ₃ and put into a ball mill, and wet blending is performed to obtain a ceramic slurry. The obtained ceramic slurry is formed into a sheet shape on a carrier sheet by a doctor blade method and dried to produce a ceramic green sheet to be the ceramic layer 17. The thickness of the ceramic green sheet to be the ceramic layer 17 is preferably such that the thickness of the ceramic layer after firing is not less than 0.5 μm and not more than 10 μm. The main component of the ceramic powder may be CaTiO ₃ , SrTiO ₃ , CaZrO ₃ or the like. Further, a Mn compound, Mg compound, Si compound, Co compound, Ni compound, rare earth compound, or the like may be added as a subcomponent of the ceramic powder.

  Next, the capacitor conductors 30 and 32 are formed by applying a paste made of a conductive material on the ceramic green sheet to be the ceramic layer 17 by a screen printing method. The paste made of a conductive material is obtained by adding an organic binder and an organic solvent to metal powder. The metal powder is, for example, Ni, Cu, Ag, Pd, an Ag—Pd alloy, Au, or the like. The thickness of the capacitor conductors 30 and 32 after firing is preferably 0.3 μm or more and 2.0 μm or less.

  Next, ceramic green sheets to be the ceramic layer 17 are laminated to obtain an unfired mother laminate. Thereafter, pressing is performed on the unfired mother laminate.

  Next, the unfired mother laminate is cut into a predetermined size to obtain a plurality of unfired laminates 11. Thereafter, the surface of the laminate 11 is subjected to polishing such as barrel polishing.

  Next, the unfired laminate 11 is fired. The firing temperature is, for example, 1200 to 1300 ° C.

  Next, the external electrode 12 is formed on the multilayer body 11. Specifically, a conductive paste containing Cu, Ni, Ag, Pd, Ag—Pd alloy, Au, or the like is applied to the surface of the laminate 11 by a known dipping method, slitting method, or the like. Then, the base electrode is baked to form the base electrode. Ni plating and Sn plating are performed on the base electrode. Thereby, the external electrode 12 is formed. Through the above steps, the electronic component 10 is completed.

  The electronic component 10 manufactured as described above is mounted on the circuit board 50. The substrate body 52 is configured by laminating a plurality of insulator layers made of, for example, glass epoxy. The land electrode 54 is configured by plating a base electrode made of Cu. At the time of mounting, a solder paste is applied to the land electrode 54. Next, the external electrode 12 is set on the land electrode 54 so that the bottom surface S <b> 2 faces the main surface S <b> 11 of the substrate body 52. At this time, the bottom surface S2 and the main surface S11 are preferably parallel to each other. Then, after performing a reflow process to melt the solder paste, the solder paste is solidified. Thereby, the electronic component 10 is mounted on the circuit board 50.

  As the solder paste, for example, Sn-Pb eutectic solder or lead-free solder such as Sn-Ag-Cu can be used. Further, a conductive adhesive may be used instead of the solder 60.

(effect)
According to the mounting structure 1 described above, as described below, it is possible to reduce noise while obtaining a high degree of freedom in circuit design. FIG. 5 is a diagram illustrating a state in which the electronic component 10 is vibrating in the mounting structure 1.

  In the circuit board mounting method of the multilayer ceramic capacitor described in Patent Document 1, since two capacitors are mounted on both sides of the circuit board in order to reduce noise, there is a problem that the degree of freedom in circuit design is reduced. It was.

  Therefore, in the mounting structure 1, the height (fillet height) H1 from the positive surface in the z-axis direction of the land electrodes 54a and 54b to the top of the solder 60a and 60b is from the land electrodes 54a and 54b to the circuit board 50. The height of the capacitor conductor 32d located closest to the height H2 from the end surface S3 to the exposed portion is 1.27 times or less. Thereby, the mounting structure 1 can implement | achieve reduction of a squeal, without using two electronic components 10 so that it may demonstrate below.

  More specifically, in the mounting structure 1, the vibration generated in the portion where the capacitor conductors 30 and 32 are provided propagates through the solder 60 and the land electrode 54, so that the circuit board 50 vibrates and generates noise. . As shown in FIG. 5, the electronic component 10 vibrates greatly as it approaches the center of the end surfaces S3 and S4 in the z-axis direction. Therefore, in the mounting structure 1, the solder 60 serving as a vibration propagation path is separated from the center in the z-axis direction of the end surfaces S3 and S4 which are vibration sources. Thereby, the vibration generated in the electronic component 10 is hardly transmitted to the circuit board 50. As a result, in the mounting structure 1, squeal is reduced.

(Experiment)
The inventor of the present application conducted an experiment described below in order to clarify the effect of the mounting structure 1. Specifically, the inventor of the present application produced a first sample group and a second sample group described below. In the first sample group and the second sample group, the fillet height H1 was changed to a plurality of types as shown in the following conditions.

Condition circuit board size of first sample group: 100 mm × 40 mm × 1.6 mm
External dimensions of electronic components: 1.75 mm x 0.95 mm x 0.91 mm
Electronic component capacity: 22μF
Ceramic layer thickness: 0.94 μm
Capacitor conductor thickness: 0.58 μm
Number of capacitor conductors: 491
Laminate height H0 (see FIG. 1): 0.87 mm
Fillet height: 0.08 mm, 0.16 mm, 0.32 mm, 0.5 mm, 0.6 mm, and 0.8 mm gap H3 between the external electrode and the land electrode (see FIG. 1): 0.05 mm
External electrode thickness H4 (see FIG. 1): 20 μm
Distance (outer layer thickness) H5 (see FIG. 1) from the external electrode located closest to the circuit board to the bottom surface of the laminate: 56 μm

  In the first sample group, the height H2 from the land electrode to the portion where the capacitor conductor located closest to the circuit board is exposed from the end face is the sum of H3, H4 and H5 (126 μm).

Condition circuit board size of second sample group: 100 mm × 40 mm × 1.6 mm
External dimensions of electronic component: 2.11 mm × 1.35 mm × 1.31 mm
Electronic component capacity: 47 μF
Ceramic layer thickness: 0.94 μm
Capacitor conductor thickness: 0.62 μm
Number of capacitor conductors: 671
Stack height H0 (see FIG. 1): 1.26 mm
Fillet height: 0.08 mm, 0.21 mm, 0.4 mm, 0.75 mm, 1.2 mm gap H3 (see FIG. 1) between external electrode and land electrode: 0.05 mm
External electrode thickness H4 (see FIG. 1): 25 μm
Distance (outer layer thickness) H5 (see FIG. 1) from the external electrode located closest to the circuit board to the bottom surface of the laminate: 90 μm

  In the second sample group, the height H2 from the land electrode to the portion where the capacitor conductor located closest to the circuit board is exposed from the end surface is the sum of H3, H4 and H5 (165 μm).

  The amount of suppression of the sound pressure level was measured using the first sample group and the second sample group configured as described above. FIG. 6 is a configuration diagram of the sound pressure level measuring device 71.

  The inventor of the present application installs the mounting structure 1 (first sample group and second sample group) in the anechoic box 73 and applies an AC voltage having a frequency of 3 kHz and a voltage of 1 Vpp to the electronic component 10. Applied. The sound generated at that time was collected by the sound collecting microphone 74, and the sound pressure level of the sound collected by the sound collecting meter 76 and FET analyzer 78 (CF-5220, manufactured by Ono Sokki Co., Ltd.) was measured. . The sound collecting microphone 74 was placed 3 mm away from the circuit board 50. FIG. 7 is a graph showing experimental results. The vertical axis represents the amount of suppression of the sound pressure level, and the horizontal axis represents the value of H1 / H2. The suppression amount of the sound pressure level is the suppression amount with respect to the sound pressure level when H1 / H2 = 8.

  According to FIG. 7, in both the first sample group and the second sample group, the sound pressure level is higher when H1 / H2 is 1.27 or less than when H1 / H2 is greater than 1.27. It can be seen that the amount of suppression increases dramatically. Therefore, according to this experiment, it can be understood that the noise can be reduced by setting H1 to 1.27 times or less of H2.

(Refer to the first modification, FIG. 8)
Below, the mounting structure 1a which is a 1st modification is demonstrated, referring drawings. FIG. 8 is a cross-sectional structure diagram of a mounting structure 1a which is a first modification.

  The difference between the mounting structure 1 a and the mounting structure 1 is the position of the capacitor conductors 30 and 32. More specifically, the capacitor conductors 30 and 32 of the mounting structure 1 a are located on the positive side in the z-axis direction with respect to the capacitor conductors 30 and 32 of the mounting structure 1. That is, the distance between the bottom surface S2 and the capacitor conductor 32d is larger than the distance between the top surface S1 and the capacitor conductor 30a. Thereby, in the mounting structure 1a, the height H2 from the land electrodes 54a and 54b to the portion where the capacitor conductor 32d located closest to the circuit board 50 is exposed from the end surface S3 is larger than that in the mounting structure 1. As a result, H1 / H2 is smaller in the mounting structure 1a than in the mounting structure 1. Therefore, in the mounting structure 1a, squeal is reduced more effectively.

(Refer to the second modification, FIG. 9)
Next, a mounting structure 1b as a second modification will be described with reference to the drawings. FIGS. 9A and 9B show an electronic component 10b used for the mounting structure 1b.

  In the electronic component 1a used in the first modification, the distance between the bottom surface S2 and the capacitor conductor 32d is larger than the distance between the top surface S1 and the capacitor conductor 30a, that is, the lower outer layer. Since the portion is thicker than the upper outer layer portion and becomes asymmetric, when the mother laminate is formed in the manufacturing process of the electronic component 10a, the mother laminate may be warped as a whole when heat is applied, and may not be processed. is there.

  Therefore, in the mounting structure 1b as the second modification, an appropriate number of dummy conductors 31 are provided in the ceramic layer between the bottom surface S2 and the capacitor conductor 32d. As shown in FIG. 9A, the dummy conductor 31 may be separated at the central portion in the x-axis direction, and both ends may be connected to the external electrodes 12a and 12b, or as shown in FIG. 9B. Thus, the external electrodes 12a and 12b may be electrically insulated from each other in the central portion in the x-axis direction without being connected. Further, the dummy conductor 31 may be connected to only one of the external electrodes 12a and 12b.

  According to the second modified example, in the multilayer body 11, the dummy conductor 31 is provided in the lower outer layer portion made of only a relatively thick ceramic layer, so that the outer layer portion becomes hard and the multilayer body 11 warps. Can solve the problem.

(Refer to the third modification, FIGS. 10 and 11)
Below, the mounting structure 1c which is a 3rd modification is demonstrated, referring drawings. FIG. 10 is a plan view of a mounting structure 1c as a third modification.

  The difference between the mounting structure 1 c and the mounting structure 1 is the structure of the land electrode 54. In the mounting structure 1c, the land electrode 54a is divided into land portions 70a and 72a. The land portions 70a and 72a have a rectangular shape, and are arranged in this order from the negative direction side in the y-axis direction to the positive direction side. The land portions 70a and 72a overlap with adjacent corners of the stacked body 11 when viewed in plan from the z-axis direction (the normal direction of the substrate body 50). More specifically, the land portions 70a and 72a overlap with corners located at both ends of the short side of the laminate 11 on the negative direction side in the x-axis direction when viewed in plan from the z-axis direction. The land portions 70a and 72a are connected to the external electrode 12a via solders 61a and 62a, respectively.

  However, the land portions 70a and 72a do not overlap with the center of the end surface S3 (intersection of diagonal lines) when viewed in plan from the z-axis direction. Therefore, the solders 61a and 62a do not overlap with the center of the end surface S3 when viewed in plan from the z-axis direction.

  The land electrode 54b is divided into land portions 70b and 72b. The land portions 70b and 72b have a rectangular shape, and are arranged in this order from the negative direction side to the positive direction side in the y-axis direction. The land portions 70b and 72b overlap with adjacent corners of the stacked body 11 when viewed in plan from the z-axis direction (the normal direction of the substrate body 50). More specifically, the land portions 70b and 72b overlap with the corners located at both ends of the short side of the laminated body 11 on the positive direction side in the x-axis direction when viewed in plan from the z-axis direction. The land portions 70b and 72b are connected to the external electrode 12b via solders 61b and 62b, respectively.

  However, the land portions 70b and 72b do not overlap with the center (intersection of diagonal lines) of the end surface S4 when viewed in plan from the z-axis direction. Therefore, the solders 61b and 62b do not overlap the center of the end surface S4 when viewed in plan from the z-axis direction.

  The mounting structure 1c can reduce squealing more than the mounting structure 1 as described below. In the mounting structure 1c, the land electrode 54 is divided into land portions 70 and 72, respectively. Thereby, the area in which the external electrode 12 and the land electrode 54 are connected by the solders 61 and 62 in the mounting structure 1 c is larger than the area in which the external electrode 12 and the land electrode 54 are connected by the solder 60 in the mounting structure 1. Becomes smaller. As a result, in the mounting structure 1 c, vibration generated in the electronic component 10 is less likely to be transmitted to the circuit board 50 than in the mounting structure 1. As a result, the squeal is reduced in the mounting structure 1c compared to the mounting structure 1.

  Further, when an AC voltage is applied to the electronic component 10, the centers of the end faces S3 and S4 (intersections of diagonal lines) vibrate greatly. For this reason, when the portion directly below the center of the end faces S3 and S4 is fixed to the land electrode 54, vibration is easily transmitted from the electronic component 10 to the circuit board 50. Therefore, in the electronic component 10, the land electrode 54 is divided into land portions 70 and 72. The land portions 70 and 74 do not overlap with the centers of the end surfaces S3 and S4 when viewed in plan from the z-axis direction. Therefore, the solders 61 and 62 do not overlap with the centers of the end faces S3 and S4 when viewed in plan from the z-axis direction. As a result, vibrations from the electronic component 10 to the circuit board 50 are suppressed.

  The inventor of the present application conducted an experiment described below in order to clarify the effect of the mounting structure 1c. More specifically, the inventor of the present application produces a first sample and a second sample described below, and an AC voltage having a voltage of 1 Vpp with respect to the electronic component 10 of the first sample and the second sample. Was applied, and the sound pressure was measured while changing the frequency.

  The first sample is the mounting structure 1 shown in FIG. The second sample is the mounting structure 1c shown in FIG. FIG. 11 is a graph showing experimental results. The vertical axis indicates the sound pressure level, and the horizontal axis indicates the frequency.

  According to FIG. 11, it can be seen that the sound pressure level of the second sample is smaller than the sound pressure level of the first sample. That is, it can be understood that the noise is reduced by dividing the land electrode 54.

(Refer 2nd Embodiment and FIGS. 12-15)
Below, the mounting structure 2 which is 2nd Embodiment is demonstrated, referring drawings. FIG. 12 is a cross-sectional structure diagram of the mounting structure 2 according to the second embodiment. FIG. 13 is a plan view of the mounting structure 2 of FIG. 12 from the positive side in the z-axis direction.

  The difference between the mounting structure 2 and the mounting structure 1 is the direction of the electronic component 10. In the mounting structure 2, the side surface S5 located on one side in the direction orthogonal to the stacking direction is the mounting surface. In the second embodiment, the stacking direction is defined as the y-axis direction. Moreover, when the laminated body 11 is planarly viewed from the y-axis direction, the direction in which the long side of the laminated body 11 extends is defined as the x-axis direction. When the stacked body 11 is viewed in plan from the y-axis direction, the direction in which the short side of the stacked body 11 extends is defined as the z-axis direction.

As shown in FIG. 13, in the mounting structure 2, the land electrode 54a is divided into land portions 70a and 72a. The land portions 70a and 72a have a rectangular shape, and are arranged in this order from the negative direction side in the y-axis direction to the positive direction side. The land portions 70a and 72a overlap with adjacent corners of the stacked body 11 when viewed in plan from the z-axis direction (the normal direction of the substrate body 50). More specifically, the land portions 70a and 72a overlap with corners located at both ends of the short side of the laminate 11 on the negative direction side in the x-axis direction when viewed in plan from the z-axis direction. The land portions 70a and 72a are connected to the external electrode 12a via solders 61a and 62a, respectively.

  However, the land portions 70a and 72a do not overlap with the center of the end surface S3 (intersection of diagonal lines) when viewed in plan from the z-axis direction. Therefore, the solders 61a and 62a do not overlap with the center of the end surface S3 when viewed in plan from the z-axis direction.

  The land electrode 54b is divided into land portions 70b and 72b. The land portions 70b and 72b have a rectangular shape, and are arranged in this order from the negative direction side to the positive direction side in the y-axis direction. The land portions 70b and 72b overlap with adjacent corners of the stacked body 11 when viewed in plan from the z-axis direction (the normal direction of the substrate body 50). More specifically, the land portions 70b and 72b overlap with the corners located at both ends of the short side of the laminated body 11 on the positive direction side in the x-axis direction when viewed in plan from the z-axis direction. The land portions 70b and 72b are connected to the external electrode 12b via solders 61b and 62b, respectively.

  However, the land portions 70b and 72b do not overlap with the center (intersection of diagonal lines) of the end surface S4 when viewed in plan from the z-axis direction. Therefore, the solders 61b and 62b do not overlap the center of the end surface S4 when viewed in plan from the z-axis direction.

(effect)
According to the mounting structure 2 described above, as described below, it is possible to reduce noise while obtaining a high degree of freedom in circuit design. FIG. 14 is a diagram illustrating a state in which the electronic component 10 is vibrating in the mounting structure 2.

  In the mounting structure 2, when an AC voltage is applied to the electronic component 10, as shown in FIG. 14, the centers of the end surfaces S3 and S4 (intersections of diagonal lines) vibrate greatly. For this reason, if the land electrode 54 is fixed immediately below the center of the end surfaces S3 and S4 (the negative direction side in the z-axis direction), vibration is easily transmitted from the electronic component 10 to the circuit board 50. Therefore, in the mounting structure 2, the land electrode 54 is divided into land portions 70 and 72. The land portions 70 and 72 do not overlap with the centers of the end surfaces S3 and S4, which are vibration sources, when viewed in plan from the z-axis direction. Therefore, the solders 61 and 62 do not overlap with the centers of the end surfaces S3 and S4 that are the vibration sources when viewed in plan from the z-axis direction. That is, in the mounting structure 2, the solders 61 and 62 that are vibration propagation paths are separated from the centers of the end surfaces S3 and S4 that are vibration sources. Thereby, the vibration generated in the electronic component 10 is hardly transmitted to the circuit board 50. As a result, in the mounting structure 2, squeal is reduced.

  The inventor of the present application conducted an experiment described below in order to clarify the effect of the mounting structure 2. More specifically, the inventor of the present application produces a third sample and a fourth sample described below, and an AC voltage having a voltage of 1 Vpp with respect to the electronic component 10 of the third sample and the fourth sample. Was applied, and the sound pressure was measured while changing the frequency.

  The third sample is the mounting structure 2 shown in FIG. A fourth sample is a mounting structure in which the electronic component 10 is mounted as shown in FIG. 12 on a circuit board in which the land electrode 54 is not divided in the mounting structure 2 shown in FIGS. 12 and 14. FIG. 15 is a graph showing experimental results. The vertical axis indicates the sound pressure level, and the horizontal axis indicates the frequency.

According to FIG. 15, it can be seen that the sound pressure level of the third sample is smaller than the sound pressure level of the fourth sample. Thereby, it can be understood that the squeal is reduced by dividing the land electrode 54 in the mounting structure 2.

(Other embodiments)
The mounting structure according to the present invention is not limited to the above-described embodiment, and can be variously modified within the scope of the gist.

  In particular, in the second embodiment (see FIGS. 12 to 15), only one of the land electrodes 54a and 54b divided into two land portions may be divided.

  As described above, the present invention is useful for a mounting structure for electronic components, and is particularly excellent in that it can reduce noise while obtaining a high degree of freedom in circuit design.

C Capacitor S1 Upper surface S2 Bottom surface S3, S4 End surface S5, S6 Side surface 1, 1a-1c, 2 Mounting structure 10 Electronic component 11 Laminated body 12a, 12b External electrode 17a-17n Ceramic layer 30a-30d, 32a-32d Capacitor conductor 50 Circuit Substrate 52 Substrate body 54a, 54b Land electrode 60a, 60b, 61a, 61b, 62a, 62b Solder 70a, 70b, 72a, 72b Land portion

Claims (3)

A mounting structure in which electronic components are mounted on a substrate,
The electronic component is
A stacked body configured by stacking a plurality of dielectric layers, the mounting surface facing the substrate and positioned on one side in the stacking direction, and the first end surface and the second facing each other A rectangular parallelepiped laminate having an end face of
A plurality of capacitor conductors that are laminated together with the dielectric layer to form a capacitor and are drawn to the first end face or the second end face;
A first external electrode provided across the first end surface and the mounting surface and connected to the capacitor conductor;
A second external electrode provided across the second end surface and the mounting surface and connected to the capacitor conductor;
With
A distance between the first end surface and the second end surface is larger than a distance between the mounting surface and a surface facing the mounting surface;
The substrate is
A substrate body;
A first land electrode and a second land electrode provided on the substrate body, wherein the first land electrode and the second land electrode are connected to each of the first external electrode and the second external electrode by a conductive material. A land electrode and a second land electrode;
With
The height from the first land electrode or the second land electrode to the top of the conductive material is such that the capacitor conductor extends from the first land electrode or the second land electrode to the first end face or 1.27 times or less of the shortest distance from the second end surface to the exposed portion,
The distance between the mounting surface and the capacitor conductor closest to the mounting surface is greater than the distance between the surface facing the mounting surface and the capacitor conductor closest to the surface,
The distance from the capacitor conductor closest to the mounting surface to the capacitor conductor closest to the surface facing the mounting surface is the distance from the mounting surface to the capacitor conductor closest to the mounting surface, and the mounting surface. Greater than the sum of the distance between the opposing surface and the capacitor conductor closest to the surface;
A dummy conductor is provided between the mounting surface and the capacitor conductor closest to the mounting surface;
Mounting structure characterized by The shortest distance from the first land electrode or the second land electrode to the portion where the capacitor conductor is exposed from the first end surface or the second end surface is the first land electrode or the second land electrode. A height from the second land electrode to a portion where the capacitor conductor located closest to the substrate is exposed from the first end face or the second end face;
The mounting structure according to claim 1. The conductive material is solder;
The mounting structure according to claim 1, wherein:

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