JP2016018094A - Method for manufacturing substrate for electro-optic device, substrate for electro-optic device, electro-optic device, and electronic equipment - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method for manufacturing a substrate for an electro-optic device in which a conductive film can be separated by a groove in a self-aligning manner, a substrate for an electro-optic device, an electro-optic device including the substrate for an electro-optic device, and electronic equipment.SOLUTION: The method for manufacturing an element substrate 10 as a substrate for an electro-optic device includes: a step of forming a TFT 14 as a switching element above a substrate 11 as a transparent substrate; a step of forming a third interlayer insulating film 17 as a first insulating film above the TFT 14; a step of forming a groove 21 opening on a boundary of pixels on a surface 17s of the third interlayer insulating film 17; and a step of forming a light-transmitting conductive film on the surface 17s of the third interlayer insulating film 17. The groove 21 functions as a prism.SELECTED DRAWING: Figure 6

Description

  The present invention relates to a method for manufacturing an electro-optical device substrate, an electro-optical device substrate, an electro-optical device using the electro-optical device substrate, and an electronic apparatus.

As an electro-optical device, an active drive type liquid crystal device including a switching element capable of controlling a potential applied to a pixel electrode is known. The pixel electrode is formed for each pixel by forming a conductive film on an insulating film covering the switching element formed on the substrate and patterning the conductive film by, for example, a photolithography method.
The photolithography method includes a photosensitive resist film forming process, an exposure / development process, a conductive film etching process, and a photosensitive resist peeling process. Therefore, there are problems from the viewpoint of productivity and manufacturing cost, such as complicated manufacturing processes and the necessity of exposure masks, and methods for forming pixel electrodes by simpler methods have been studied. ing.

  For example, in Patent Document 1 and Patent Document 2, in the step of forming an insulating film covering the switching element, a groove or a recess for separating the pixel electrode for each pixel is formed in the insulating film in advance, and then the insulating film is formed. A method for forming a conductive film on a film is disclosed. Since the conductive film cannot cover the inside of the groove or the recess, it is separated by the groove or the recess. According to such a method, the process for patterning this electrically conductive film becomes unnecessary.

JP-A-10-325949 JP 2010-271531 A

  However, according to Patent Document 1 and Patent Document 2, an overhang portion is provided on the surface side of the insulating film in the groove or the recess in order to reliably separate the conductive film by the groove or the recess. There has been a problem that it is not always easy to form such an overhanging groove or recess.

  SUMMARY An advantage of some aspects of the invention is to solve at least a part of the problems described above, and the invention can be implemented as the following forms or application examples.

  [Application Example] A method for manufacturing a substrate for an electro-optical device according to this application example includes a step of forming a switching element above a transparent substrate, a step of forming a first insulating film above the switching element, And a step of forming a groove opening at the boundary of the pixel on the surface of one insulating film, and a step of forming a light-transmitting conductive film on the surface of the first insulating film.

  According to this application example, when the light-transmitting conductive film is formed on the surface of the first insulating film in which the groove is formed, it is difficult to cover the inside of the groove with the conductive film. The conductive film can be separated in units of pixels by the opened groove. In other words, in order to separate the light-transmitting conductive film into, for example, an electrode, the conductive film need not be patterned by photolithography. Therefore, the method for manufacturing the electro-optical device substrate can be simplified. Therefore, patterning of the light-transmitting conductive film is unnecessary, and a method for manufacturing a substrate for an electro-optical device having high productivity can be provided.

In the method for manufacturing an electro-optical device substrate according to the application example, the groove is formed so that the depth of the groove from the surface of the first insulating film is three times or more the arrangement pitch of the pixels. It is characterized by that.
According to this method, since the groove portion is opened at the boundary of the pixel, and the depth of the groove portion is three times or more of the pixel arrangement pitch, a part of the light incident on the pixel from the transparent substrate side is part of the groove portion. The light can be reflected from the side wall and led to the pixel. That is, by forming a conductive film on the surface of the first insulating film in which the groove functioning as a prism is formed, the conductive film can be separated in a self-aligned manner by the groove. That is, it is possible to provide a method for manufacturing a substrate for an electro-optical device that can efficiently use light incident on a pixel and has high productivity.

In the method for manufacturing a substrate for an electro-optical device according to the application example, the groove may be formed in the step of forming a contact portion in the first insulating film that electrically connects the switching element and the conductive film. Features.
According to this method, since the groove portion is formed in the step of forming the contact portion, a dedicated step for forming the groove portion is unnecessary, and high productivity can be realized.

In the method for manufacturing the substrate for an electro-optical device according to the application example, the contact portion is formed to reach a relay layer disposed between the switching element and the conductive film, and the depth of the groove portion is The distance between the conductive film and the relay layer is larger.
According to this method, even if the groove portion is formed in the step of forming the contact portion, the relay layer functions as a stopper in forming the contact portion, so that the groove portion can be formed at a desired depth. On the other hand, the switching element and the conductive film can be electrically connected through the relay layer and the contact portion.

  [Application Example] Another electro-optical device substrate manufacturing method described in this application example includes a step of forming a switching element above a transparent substrate, a step of forming a microlens above the switching element, Forming a first insulating film above the microlens; flattening a surface of the first insulating film; and forming a light-transmitting conductive film on the flattened surface of the first insulating film. And the step of forming the first insulating film is characterized in that the first insulating film is formed so as to form a groove that opens at a boundary of the pixel in which the microlens is disposed.

  According to this application example, when the surface of the first insulating film in which the groove portion is formed is flattened, the shape of the opening of the groove portion becomes more conspicuous than before the flattening process is performed. When a conductive film is formed on the surface of the planarized first insulating film, it is difficult to cover the inside of the groove with the conductive film. The conductive film can be separated. That is, in order to separate the conductive film into, for example, an electrode, the conductive film does not have to be patterned by photolithography. Therefore, the method for manufacturing the electro-optical device substrate can be simplified. In addition, since the groove portion opens at the boundary of the pixel, a part of light incident on the pixel from the transparent substrate side can be reflected by the side wall of the groove portion and guided to the pixel. Further, the light incident on the pixel can be collected by the microlens. That is, by forming a conductive film on the planarized surface of the first insulating film in which the groove functioning as a prism is generated, the conductive film can be separated by the groove in a self-aligned manner. Therefore, it is possible to provide a method for manufacturing a substrate for an electro-optical device having high productivity because incident light can be efficiently used by the groove portion and the microlens, and patterning of the conductive film is unnecessary.

In the method for manufacturing a substrate for an electro-optical device according to the application example described above, it is preferable that the width of the opening of the groove portion that separates the conductive film is five times or more the film thickness of the conductive film.
According to this method, it becomes more difficult to cover the inside of the groove with the conductive film, and the conductive film can be reliably separated in units of pixels.

In the method for manufacturing a substrate for an electro-optical device according to the application example described above, a step of forming a second insulating film on a surface of the first insulating film on which the conductive film is formed and closing the opening of the groove portion. It is preferable to further provide.
According to this method, since the opening of the groove is closed by the second insulating film, the inside of the groove can be made a space having a smaller refractive index than that of the first insulating film. In addition, since there is no possibility that the inside of the groove is filled with another substance during the manufacturing process, it is possible to realize a groove as a prism that efficiently reflects light on the side wall surface.

In the method for manufacturing a substrate for an electro-optical device according to the application example, the second insulating film may be an alignment film that aligns liquid crystal molecules in a predetermined alignment direction.
According to this method, it is possible to close the opening of the groove using the alignment film forming process without using a new manufacturing process.

  [Application Example] The electro-optical device substrate according to this application example is an electro-optical device substrate in which a switching element and an electrode electrically connected to the switching element are arranged on a transparent substrate, and the switching A first insulating film disposed between an element and the electrode; and a groove opening at a boundary of a pixel on a surface of the first insulating film on the electrode side, the first insulating film in the groove The depth from the surface of the electrode is three times or more the arrangement pitch of the pixels, and the outer shape of the electrode is defined by the groove.

  According to this application example, there is provided an electro-optical device substrate that functions as a prism in which electrodes are separated in units of pixels by a groove portion and the groove portion can guide part of light incident on a transparent substrate to the pixel. be able to.

  [Application Example] Another electro-optical device substrate according to this application example is a substrate for an electro-optical device in which a switching element and an electrode electrically connected to the switching element are arranged on a transparent substrate, On the surface of the first insulating film on the electrode side of the microlens disposed between the switching element and the electrode, the first insulating film disposed between the microlens and the electrode, a pixel And an outer shape of the electrode is defined by the groove.

  According to this application example, it is possible to provide an electro-optical device substrate in which electrodes are separated in units of pixels by the groove portions, and light incident on the transparent substrate is guided to the pixels by the groove portions functioning as prisms and the microlenses. .

In the electro-optical device substrate according to the application example described above, it is preferable that the width of the opening of the groove that defines the outer shape of the electrode is not less than five times the film thickness of the electrode.
According to this configuration, the electrodes can be reliably separated in units of pixels by the groove.

In the electro-optical device substrate according to the application example described above, it is preferable that a second insulating film that blocks an opening of the groove is provided on a surface of the first insulating film provided with the electrode.
According to this configuration, the inside of the groove is a space having a smaller refractive index than the first insulating film. Therefore, it is possible to realize a groove that functions as a prism that efficiently reflects light at the side wall that is a boundary with the first insulating film.

In the electro-optical device substrate according to the application example described above, the second insulating film may be an alignment film that aligns liquid crystal molecules in a predetermined alignment direction.
According to this configuration, the opening of the groove can be blocked using the alignment film.

In the electro-optical device substrate according to the application example described above, the switching element has an external connection terminal to which the switching element is electrically connected, and also between the external connection terminal and an outer edge of the display region including the plurality of pixels. The groove is provided.
According to this configuration, the area where the external connection terminals are provided and the display area can be electrically separated to reduce the influence of noise or the like on the display.

In the electro-optical device substrate according to the application example, the groove portion is also provided at a position surrounding the external connection terminal.
According to this configuration, the conductive film constituting the electrode can be used as a part of the member constituting the external connection terminal, and the external connection terminal can be electrically separated.

  [Application Example] An electro-optical device according to this application example includes the electro-optical device substrate manufactured by using the electro-optical device substrate manufacturing method described in the application example.

[Application Example] Another electro-optical device according to this application example includes the electro-optical device substrate described in the above application example.
According to these application examples, it is possible to provide an electro-optical device that can display brightly by efficiently using light incident on the pixels and has high productivity.

[Application Example] An electronic apparatus according to this application example includes the electro-optical device according to the application example described above.
According to this application example, it is possible to provide an electronic apparatus that can display brightly by efficiently using light incident on a pixel and has high productivity.

1 is a schematic plan view showing a configuration of a liquid crystal device according to a first embodiment. FIG. 3 is an equivalent circuit diagram illustrating an electrical configuration of the liquid crystal device according to the first embodiment. FIG. 2 is a schematic plan view illustrating a configuration of a pixel in the liquid crystal device according to the first embodiment. FIG. 2 is a schematic cross-sectional view showing the structure of the liquid crystal device along the line H-H ′ in FIG. 1. The flowchart which shows the manufacturing method of the element substrate of 1st Embodiment. (A)-(e) is a schematic sectional drawing which shows the manufacturing method of the element substrate of 1st Embodiment. FIG. 6 is a schematic cross-sectional view illustrating a structure of a liquid crystal device as an electro-optical device according to a second embodiment. The flowchart which shows the manufacturing method of the element substrate of 2nd Embodiment. (A)-(e) is a schematic sectional drawing which shows the manufacturing method of the element substrate of 2nd Embodiment. FIG. 6 is a schematic cross-sectional view illustrating a structure of a liquid crystal device as an electro-optical device according to a third embodiment. FIG. 10 is an enlarged cross-sectional view showing a structure of an element substrate in a liquid crystal device as an electro-optical device of a third embodiment. The flowchart which shows the manufacturing method of the element substrate of 3rd Embodiment. (A)-(d) is a schematic sectional drawing which shows the manufacturing method of the element substrate of 3rd Embodiment. (E)-(i) is a schematic sectional drawing which shows the manufacturing method of the element substrate of 3rd Embodiment. Schematic which shows the structure of the projection type display apparatus as an electronic device.

  DESCRIPTION OF EXEMPLARY EMBODIMENTS Hereinafter, embodiments of the invention will be described with reference to the drawings. Note that the drawings to be used are appropriately enlarged or reduced so that the part to be described can be recognized.

  In the following embodiments, for example, when “on the substrate” is described, the substrate is disposed so as to be in contact with the substrate, or is disposed on the substrate via another component, or the substrate. It is assumed that a part is arranged so as to be in contact with each other and a part is arranged via another component.

(First embodiment)
<Electro-optical device>
As an electro-optical device of this embodiment, an active matrix type liquid crystal device including a thin film transistor (TFT) as a pixel switching element will be described as an example. This liquid crystal device can be suitably used, for example, as a light modulation element (liquid crystal light valve) of a projection display device (liquid crystal projector) described later.

  A basic configuration and structure of the liquid crystal device of the present embodiment will be described with reference to FIGS. 1 is a schematic plan view showing a configuration of a liquid crystal device according to the first embodiment, FIG. 2 is an equivalent circuit diagram showing an electrical configuration of the liquid crystal device according to the first embodiment, and FIG. 3 is a liquid crystal according to the first embodiment. FIG. 4 is a schematic cross-sectional view showing the structure of the liquid crystal device along the line HH ′ of FIG. 1.

  As shown in FIGS. 1 and 4, the liquid crystal device 100 of the present embodiment includes an element substrate 10 and an opposite substrate 30 that are arranged to face each other, and a liquid crystal layer 40 that is arranged between the element substrate 10 and the opposite substrate 30. have. The element substrate 10 is slightly larger than the counter substrate 30. The element substrate 10 and the counter substrate 30 are arranged to face each other at a predetermined interval, and are bonded together by a sealing material 42 arranged in a frame shape along the outer edge of the counter substrate 30 to constitute the liquid crystal panel 110. The element substrate 10 is an example of a substrate for an electro-optical device according to the present invention.

  The liquid crystal layer 40 is composed of liquid crystal having positive or negative dielectric anisotropy enclosed in a space surrounded by the element substrate 10, the counter substrate 30, and the sealing material 42. The sealing material 42 is made of an adhesive such as a thermosetting or ultraviolet curable epoxy resin. Spacers (not shown) are mixed in the sealing material 42 to keep the distance between the element substrate 10 and the counter substrate 30 constant.

  A display region E including a plurality of pixels P arranged in a matrix is provided inside the sealing material 42 arranged in a frame shape. Further, a parting part is provided between the sealing material 42 and the display area E so as to surround the display area E. The parting part is defined by a light shielding film 32 made of a light shielding metal or metal compound. Note that the display area E may include dummy pixels arranged so as to surround the plurality of pixels P in addition to the plurality of pixels P contributing to display. Further, as will be described in detail later, the element substrate 10 is formed corresponding to each of the plurality of pixels P in the display region E, and includes a groove portion 21 that electrically isolates the pixel electrode 18 (see FIG. 4).

  The element substrate 10 is provided with a terminal portion in which a plurality of external connection terminals 54 are arranged. A data line driving circuit 51 is provided between the first side portion along the terminal portion of the element substrate 10 and the sealing material 42. In addition, an inspection circuit 53 is provided between the sealing material 42 and the display area E along the second side facing the first side. Further, a scanning line driving circuit 52 is provided between the seal material 42 and the display area E along the third and fourth sides that are orthogonal to the first side and face each other. A plurality of wirings 55 that connect the two scanning line driving circuits 52 are provided between the sealing material 42 on the second side and the inspection circuit 53. The arrangement of the inspection circuit 53 is not limited to this, and the inspection circuit 53 may be provided at a position along the inner side of the seal material 42 between the data line driving circuit 51 and the display area E.

  Wirings connected to the data line driving circuit 51 and the scanning line driving circuit 52 are connected to a plurality of external connection terminals 54 arranged along the first side. In the following description, the direction along the first side is defined as the X direction, and the direction along the third side is defined as the Y direction. The direction along the line H-H ′ in FIG. 1 is the Y direction. A direction perpendicular to the X direction and the Y direction and going from the element substrate 10 to the counter substrate 30 is a Z direction. In this specification, viewing from the counter substrate 30 side along the Z direction is referred to as “plan view”.

  Next, the electrical configuration of the liquid crystal device 100 will be described with reference to FIG. The liquid crystal device 100 includes a plurality of scanning lines 2 and a plurality of data lines 3 as signal wirings that are insulated and orthogonal to each other at least in the display region E, and capacitance lines 4 arranged in parallel along the scanning lines 2. . The direction in which the scanning line 2 extends is the X direction, and the direction in which the data line 3 extends is the Y direction.

  A pixel electrode 18, a TFT 14, and a storage capacitor 5 are provided in a region divided by the scanning line 2, the data line 3, the capacitor line 4, and these signal lines, and these constitute a pixel circuit of the pixel P. doing.

  The scanning line 2 is electrically connected to the gate of the TFT 14, and the data line 3 is electrically connected to the source of the TFT 14. The pixel electrode 18 is electrically connected to the drain of the TFT 14.

  The data line 3 is connected to a data line driving circuit 51 (see FIG. 1), and supplies image signals D1, D2,..., Dn supplied from the data line driving circuit 51 to the pixels P. The scanning lines 2 are connected to a scanning line driving circuit 52 (see FIG. 1), and supply scanning signals G1, G2,..., Gm supplied from the scanning line driving circuit 52 to the pixels P.

  The image signals D1 to Dn supplied from the data line driving circuit 51 to the data lines 3 may be supplied line-sequentially in this order, or may be supplied for each of a plurality of adjacent data lines 3 for each group. Good. The scanning line driving circuit 52 supplies the scanning signals G1 to Gm to the scanning line 2 in a pulse-sequential manner at a predetermined timing.

  In the liquid crystal device 100, the TFT 14 serving as a switching element is turned on for a certain period by the input of the scanning signals G1 to Gm, so that the image signals D1 to Dn supplied from the data line 3 are supplied to the pixel electrode 18 at a predetermined timing. It is the structure written in. A predetermined level of the image signals D1 to Dn written to the liquid crystal layer 40 via the pixel electrode 18 is between the pixel electrode 18 and the common electrode 34 (see FIG. 4) disposed opposite to the liquid crystal layer 40. Is held for a certain period. The frequency of the image signals D1 to Dn is 60 Hz, for example.

  In order to prevent the retained image signals D1 to Dn from leaking, the storage capacitor 5 is connected in parallel with the liquid crystal capacitor formed between the pixel electrode 18 and the common electrode 34. The storage capacitor 5 is provided between the drain of the TFT 14 and the capacitor line 4.

  The data line 3 is connected to the inspection circuit 53 shown in FIG. 1, and the operation defect of the liquid crystal device 100 can be confirmed by detecting the image signal in the manufacturing process of the liquid crystal device 100. Although not shown in the equivalent circuit of FIG.

  The peripheral circuit for driving and controlling the pixel circuit in the present embodiment includes a data line driving circuit 51, a scanning line driving circuit 52, and an inspection circuit 53. The peripheral circuit includes a sampling circuit that samples the image signal and supplies it to the data line 3, and a precharge circuit that supplies a precharge signal of a predetermined voltage level to the data line 3 prior to the image signal. Also good.

Next, a planar configuration of the pixel P will be described with reference to FIG. As shown in FIG. 3, the display region E is provided with a light shielding region having a portion extending in the X direction and a portion extending in the Y direction. As will be described later, since the light shielding region is configured by the first light shielding layer 12 and the second light shielding layer 16 in the element substrate 10 (see FIG. 4), reference numerals 12 and 16 are given to the light shielding region 12. , 16.
A plurality of portions extending in the X direction and a plurality of portions extending in the Y direction intersect with each other to form lattice-shaped light shielding regions 12 and 16. Opening regions 12a and 16a through which light incident on the display region E passes for each pixel P, that is, pixel openings are defined by the lattice-shaped light shielding regions 12 and 16.

  The portions extending in the X direction of the light shielding regions 12 and 16 and the portions extending in the Y direction have the same width. The intersections 12c and 16c where the portion extending in the X direction intersects with the portion extending in the Y direction have a wider width than the other portions. Accordingly, when only the intersecting portions 12c and 16c are taken out, the planar shape is a square (quadrangle).

  Although a detailed structure of the pixel P of the liquid crystal device 100 will be described later, the TFT 14 as a pixel switching element is disposed on the element substrate 10 side at a position overlapping the intersecting portions 12c and 16c of the light shielding regions 12 and 16.

  The pixel electrode 18 has a square shape in a plan view, is electrically separated for each pixel P, and is arranged so that the outer edge of the pixel electrode 18 overlaps the light shielding regions 12 and 16 in a plan view. In other words, the pixel electrode 18 is arranged with a predetermined interval in the X direction and the Y direction, and the portion of the predetermined interval overlaps the light shielding regions 12 and 16 in plan view.

  The relay layer 6 is disposed so as to protrude from the portion extending in the X direction of the light shielding regions 12 and 16 to the pixel opening side. The relay layer 6 is provided with a contact portion CNT1 that electrically connects the relay layer 6 and the pixel electrode 18. The pixel electrode 18 is electrically connected to the TFT 14 via the contact portion CNT1 and the relay layer 6.

  Next, the structure of the liquid crystal device 100 will be described with reference to FIG. 4 is a schematic cross-sectional view showing the structure of the liquid crystal device 100 taken along the line HH ′ of FIG. 1, but does not show the structure of all the pixels P arranged in the Y direction in the display region E. The display is enlarged so as to be visible. Moreover, although the groove part 21 is actually a size in units of μm (micrometer), it is enlarged and displayed so as to be visible in FIG.

<Electro-optical device substrate>
As shown in FIG. 4, the element substrate 10 as the electro-optical device substrate includes a translucent base material 11 as a transparent substrate, a first light shielding layer 12 provided on the base material 11, and a first substrate. An interlayer insulating film 13, a TFT 14, a second interlayer insulating film 15, a second light shielding layer 16, a third interlayer insulating film 17, a pixel electrode 18, and an alignment film 19 are provided. The base material 11 is made of a light-transmitting material such as glass or quartz. Note that “translucency” in the present embodiment means that light in the visible light wavelength region is transmitted approximately 80% or more, preferably 90% or more.

The first light shielding layer 12 and the second light shielding layer 16 are made of, for example, metals such as Al (aluminum), Ti (titanium), Cr (chromium), W (tungsten), Ta (tantalum), and Mo (molybdenum). A metal simple substance including at least one, an alloy, a metal silicide, a polysilicide, a nitride, or a laminate thereof can be used, and has both light shielding properties and conductivity.
In the display area E, the first light shielding layer 12 is arranged so as to overlap with the upper second light shielding layer 16 in plan view so as to form the lattice-shaped light shielding areas 12 and 16, and the thickness direction of the element substrate 10 In the (Z direction), they are arranged so as to sandwich the TFT 14 therebetween. The first light shielding layer 12 and the second light shielding layer 16 suppress the incidence of light on the TFT 14. Regions surrounded by the first light shielding layer 12 and the second light shielding layer 16 become opening regions 12 a and 16 a (see FIG. 3) through which light incident on the element substrate 10 passes through the element substrate 10.

The first interlayer insulating film 13 is provided so as to cover the base material 11 and the first light shielding layer 12. The first interlayer insulating film 13 is made of an inorganic material such as SiO ₂ , for example. The TFT 14 is provided on the first interlayer insulating film 13. Although not shown, the TFT 14 has a semiconductor layer, a gate electrode, a source electrode, and a drain electrode.

The gate electrode is disposed opposite to a region overlapping the channel region of the semiconductor layer in plan view on the element substrate 10 with a part (gate insulating film) of the second interlayer insulating film 15 interposed therebetween.
The first light shielding layer 12 is patterned so that a part thereof functions as the scanning line 2 (see FIG. 2). The gate electrode is electrically connected to the scanning line 2 disposed on the lower layer side through a contact hole penetrating the gate insulating film and the first interlayer insulating film 13.

The second interlayer insulating film 15 is provided so as to cover the first interlayer insulating film 13 and the TFT 14. The second interlayer insulating film 15 is made of an inorganic material such as SiO ₂ , for example. The second interlayer insulating film 15 includes a gate insulating film that insulates between the semiconductor layer of the TFT 14 and the gate electrode. Due to the second interlayer insulating film 15, unevenness on the surface due to the TFT 14 is alleviated.
A second light shielding layer 16 is provided on the second interlayer insulating film 15. The second light shielding layer 16 is patterned so as to function as any of the electrodes of the data line 3, the capacitor line 4, or the storage capacitor 5, which is electrically connected to the TFT 14, for example. A third interlayer insulating film 17 made of an inorganic material is provided so as to cover the second interlayer insulating film 15 and the second light shielding layer 16. The third interlayer insulating film 17 is an example of the first insulating film in the electro-optical device substrate of the present invention.

The third interlayer insulating film 17 is made of an inorganic material such as SiO ₂ , for example, like the first interlayer insulating film 13 and the second interlayer insulating film 15. The third interlayer insulating film 17 is thicker than the first interlayer insulating film 13 and the second interlayer insulating film 15, for example, about 40 μm to 50 μm. The third interlayer insulating film 17 is provided with various groove portions 21 having a V-shaped cross section that opens toward the counter substrate 30 in the Z direction. In the display region E, the groove portion 21 is opened at the boundary of the pixel P, and the pixel electrode 18 is provided on the third interlayer insulating film 17 in which the groove portion 21 is provided. That is, in the display region E, the groove portion 21 substantially separates the pixel electrode 18 for each pixel P. The pixel electrode 18 is made of a transparent conductive film such as ITO (Indium Tin Oxide) or IZO (Indium Zinc Oxide). The transparent conductive film is provided not only on the display area E but also outside the display area E on the third interlayer insulating film 17.

  The groove portion 21 is also provided between the outer edge of the display area E and the external connection terminal 54. At least one of the groove portions 21 is provided between the sealing material 42 and the external connection terminal 54 and in the vicinity of the sealing material 42. Further, the groove portion 21 is also provided around the external connection terminal 54. The external connection terminal 54 is provided in the same layer as the pixel electrode 18 and includes an electrode 18t made of the transparent conductive film. The electrode 18t is substantially separated by the groove portion 21 opened at a position surrounding the external connection terminal 54. The electrode 18t of the external connection terminal 54 is electrically connected to the wiring 16t provided in the lower layer by a contact portion CNT2 provided through the third interlayer insulating film 17.

  The element substrate 10 has a data line driving circuit 51 between the sealing material 42 and the external connection terminal 54. The data line driving circuit 51 includes a wiring 62 provided in the same layer as the first light shielding layer 12, a TFT 64 provided in the same layer as the TFT 14, and a wiring 66 provided in the same layer as the second light shielding layer 16. A TFT 64 is provided between the wiring 62 and the wiring 66 in the Z direction, and light incident on the TFT 64 is shielded by the wiring 62 and the wiring 66. Although not shown in FIG. 4, the scanning line driving circuit 52 is also provided in the same layer as the TFT 14 and the wiring provided in the same layer as the first light shielding layer 12 and the second light shielding layer 16, similarly to the data line driving circuit 51. It has a TFT.

  The alignment film 19 covering the pixel electrode 18 is made of an organic resin material such as polyimide capable of substantially horizontally aligning liquid crystals (liquid crystal molecules) having positive dielectric anisotropy, or liquid crystals having negative dielectric anisotropy. For example, an inorganic material such as silicon oxide that can substantially align (liquid crystal molecules) can be used.

  The liquid crystal composing the liquid crystal layer 40 modulates the light incident on the liquid crystal layer 40 by changing the alignment state of the liquid crystal molecules according to the voltage level applied between the pixel electrode 18 and the common electrode 34, so that the gray level Enable display. For example, in the normally white mode, the transmittance for incident light decreases according to the voltage applied in units of each pixel P. In the normally black mode, the transmittance for incident light increases according to the voltage applied in units of each pixel P, and light having a contrast corresponding to an image signal is emitted from the liquid crystal device 100 as a whole. In the present embodiment, the liquid crystal device 100 is configured on the assumption that light enters from the element substrate 10 side, passes through the liquid crystal layer 40, and is emitted from the counter substrate 30 side.

  The counter substrate 30 includes a translucent base material 31, a light shielding film 32 as a parting portion, a planarization layer 33 covering the light shielding film 32, a common electrode 34, and an alignment film 35. The base material 11 is made of a light-transmitting material such as glass or quartz.

  The light-shielding film 32 is made of, for example, a light-shielding material such as Al (aluminum), Mo (molybdenum), W (tungsten), Ti (titanium), TiN (titanium nitride), or Cr (chromium), or these materials. It can be composed of a laminate of at least two materials selected from the inside. Although detailed illustration is omitted in FIG. 4, in the present embodiment, the light shielding film 32 has a two-layer structure of Al (aluminum) and TiN (titanium nitride) laminated in order from the surface of the base material 31. ing.

  A common electrode 34 is provided so as to cover the planarization layer 33. The common electrode 34 is a counter electrode that is formed across a plurality of pixels P and faces the pixel electrode 18 with the liquid crystal layer 40 interposed therebetween. As the common electrode 34, for example, a transparent conductive film such as ITO (Indium Tin Oxide) or IZO (Indium Zinc Oxide) is used. Since the common electrode 34 is disposed so as to face the plurality of pixel electrodes 18 with the liquid crystal layer 40 interposed therebetween, the surface of the common electrode 34 is flat in order to realize desired optical characteristics for each pixel P. Is preferred. The common electrode 34 is electrically connected to the wiring connected to the external connection terminal 54 of the element substrate 10 through the vertical conduction portion 56 provided at the corner of the counter substrate 30 (see FIG. 1).

  An alignment film 35 is provided to cover the common electrode 34. Similar to the alignment film 19 on the element substrate 10 side, the alignment film 35 is formed using an organic resin material such as polyimide or an inorganic material such as silicon oxide. As described above, the material selection and alignment processing methods of the alignment films 19 and 35 depend on the selection of the liquid crystal based on the optical design of the liquid crystal device 100 and the display mode.

  Next, the light transmitted through the pixel P will be described with reference to FIG. Of the light incident from the base material 11 side of the element substrate 10, for example, incident light L <b> 1 incident on the central portion of the pixel P along the Z direction passes through the opening regions 12 a and 16 a of the element substrate 10 and passes through the liquid crystal layer 40. And is emitted from the counter substrate 30 side. On the other hand, for example, incident light L <b> 3 incident between adjacent pixels P along the Z direction is shielded by the first light shielding layer 12. The light incident on the pixel P is not limited to parallel light along the Z direction, and there is also light that intersects the Z direction and enters the pixel P obliquely. Of such incident light, the incident light L2 incident on the side wall of the groove portion 21 having a V-shaped cross section is reflected on the side wall and guided to the inner side of the opening regions 12a and 16a to the counter substrate 30 side. Is injected from. That is, the groove portion 21 functions as a prism that guides a part of incident light to the opening regions 12a and 16a side.

<Method for Manufacturing Electro-Optical Device Substrate>
Next, a method for manufacturing the element substrate 10 as the electro-optical device substrate will be described with reference to FIGS. FIG. 5 is a flowchart showing a method for manufacturing an element substrate according to the first embodiment, and FIGS. 6A to 6E are schematic sectional views showing a method for manufacturing the element substrate according to the first embodiment. FIG. 6 shows a method for manufacturing a portion corresponding to the display area E of the element substrate 10. As a method for forming a pixel circuit including the TFT 14 on the substrate 11 and peripheral circuits such as the data line driving circuit 51 and the scanning line driving circuit 52, a known method can be used. Here, the process related to the characteristic part of the invention will be described.

  As shown in FIG. 5, the manufacturing method of the element substrate 10 of the present embodiment includes a first insulating film forming process (step S1), a planarization process (step S2), a groove forming process (step S3), A conductive film forming step (step S4) and a second insulating film forming step (step S5) are included.

In step S <b> 1 of FIG. 5, a third interlayer insulating film 17 is formed as a first insulating film that covers the second interlayer insulating film 15 and the second light shielding layer 16 of the substrate 11. Examples of the method for forming the third interlayer insulating film 17 include a method of forming a SiO ₂ film, for example, by vapor deposition, sputtering, CVD, or the like. In the present embodiment, the third interlayer insulating film 17 is formed by a plasma CVD method capable of efficiently forming a thick film from the viewpoint of setting the thickness of the SiO ₂ film to 40 μm to 50 μm. Even if the third interlayer insulating film 17 is formed thick, the surface of the third interlayer insulating film 17 is also uneven due to the influence of the unevenness on the surface of the second light shielding layer 16 and the second interlayer insulating film 15 below. May occur. If such irregularities are reflected in the pixel electrode 18 to be formed later, the liquid crystal layer 40 may have uneven alignment of liquid crystal molecules, which may deteriorate the display quality. A planarization process is performed on the three interlayer insulating film 17. Examples of the planarization method include a CMP (Chemical Mechanical Polishing) process in which the surface of the third interlayer insulating film 17 is polished using an abrasive. As a result, as shown in FIG. 6A, a third interlayer insulating film 17 having a flat surface 17s is completed. If the surface of the third interlayer insulating film 17 after film formation is in a flat state, the flattening process (step S2) may be omitted. Then, the process proceeds to step S3.

  In step S <b> 3 of FIG. 5, the groove 21 is formed in the third interlayer insulating film 17 as shown in FIG. 6B. As a method for forming the groove portion 21, a mask layer having an opening opening at the position where the groove portion 21 is formed is formed on the surface 17 s of the third interlayer insulating film 17. The third interlayer insulating film 17 is dry-etched (anisotropic etching) using, for example, a fluorine-based processing gas through the mask layer, so that the groove portion 21 having a V-shaped cross section is formed by etching. The mask layer is made of a material having a selectivity with respect to the dry etching of the third interlayer insulating film 17. Examples of the material for the mask layer include silicon, tungsten, and tungsten silicide. Further, the thickness of the mask layer is adjusted in advance so that when the third interlayer insulating film 17 is dry-etched to form the groove 21, the mask layer is simultaneously dry-etched and disappears at the end of step S3.

  The liquid crystal device 100 of this embodiment is used as a light modulation element of a projection display device described later, and the arrangement pitch of the pixels P is about 5 μm to 10 μm. In order for the groove 21 to function sufficiently as a prism, the depth d1 of the groove 21 is at least three times the arrangement pitch of the pixels P, that is, the length of the formation interval d2 of the groove 21 in the X and Y directions. Is preferred. In this embodiment, dry etching is performed so that the depth d1 of the groove 21 is about 30 μm. In addition, the cross-sectional shape of the groove part 21 is not limited to V shape, For example, the cross section may be an inverted trapezoid shape where the opposite side to the opening of the groove part 21 is not an acute angle. Then, the process proceeds to step S4.

  In step S4 of FIG. 5, the pixel electrode 18 is formed on the third interlayer insulating film 17 as shown in FIG. 6C. Specifically, a transparent conductive film such as ITO is formed on the third interlayer insulating film 17. Examples of the method for forming the transparent conductive film include vapor deposition and sputtering. In the present embodiment, the transparent conductive film is formed by sputtering so that the film thickness becomes 100 nm to 200 nm. The width d3 in the X direction and the Y direction of the groove 21 opened on the surface of the third interlayer insulating film 17 is preferably 5 times or more the film thickness of the transparent conductive film. In the present embodiment, the groove portion 21 is formed by etching so that the width d3 is about 1 μm. As a result, as shown in FIG. 6D, even if a transparent conductive film is formed, the transparent conductive film adheres to the vicinity of the opening of the groove portion 21, but cannot completely cover the inside of the groove portion 21. Therefore, the transparent conductive film is separated by the groove 21. That is, the pixel electrode 18 whose outer shape is defined in a self-aligned manner by the groove 21 is formed. Then, the process proceeds to step S5.

  In step S5 of FIG. 5, as shown in FIG. 6E, an alignment film 19 as a second insulating film is formed so as to cover the surface of the pixel electrode 18. As described above, an organic alignment film or an inorganic alignment film is selected as the alignment film 19 according to the optical design of the liquid crystal device 100. In the present embodiment, the alignment film 19 having a film thickness of about 100 nm to 500 nm is formed by applying or transferring a solution containing an organic insulating material such as polyimide and drying and baking. As a result, the opening of the groove 21 is closed by the alignment film 19, and a space 21 a surrounded by a V-shaped side wall 21 b is formed in the groove 21. Note that the second insulating film that closes the opening of the groove 21 is not limited to the alignment film 19, and the alignment film 19 may be formed after closing the opening of the groove 21 with an insulating film other than the alignment film 19. Good. In addition, the groove part 21 other than the display area E is formed in the same manner as the groove part 21 in the display area E. The element substrate 10 is completed through the above steps.

According to the first embodiment, the following effects can be obtained.
(1) According to the method for manufacturing the element substrate 10, the groove portion 21 opening at the boundary of the pixel P is formed in the third interlayer insulating film 17. The groove portion 21 is formed so that the depth d1 thereof is about 30 μm which is three times or more the arrangement pitch of the pixels P, and the width d3 of the opening of the groove portion 21 is formed later. It is formed to be approximately 1 μm, which is 5 times or more the thickness. Therefore, if a transparent conductive film is formed on the surface 17 s of the third interlayer insulating film 17, the transparent conductive film cannot completely cover the inside of the groove portion 21, and the transparent conductive film is separated by the groove portion 21 and the pixel electrode. 18 is formed in a self-aligning manner. That is, the pixel electrode 18 whose outer shape in plan view is defined by the groove 21 is formed. Therefore, it is not necessary to pattern the transparent conductive film by a photolithography method in order to form the pixel electrode 18, high productivity can be realized, and incident light can be efficiently used by the groove portion 21 functioning as a prism. A method for manufacturing the element substrate 10 and the element substrate 10 can be provided.
(2) The opening of the groove 21 formed in the third interlayer insulating film 17, that is, the gap between the adjacent pixel electrodes 18 is substantially closed by the alignment film 19. In other words, the alignment film 19 as the second insulating film is formed so as to close the gap between the adjacent pixel electrodes 18. Accordingly, a space 21 a surrounded by the side wall 21 b is formed in the groove portion 21. Since the space 21a has a refractive index smaller than that of the third interlayer insulating film 17, the light incident on the side wall 21b, which is a boundary surface between the third interlayer insulating film 17 and the space 21a having a different refractive index, is reflected by the side wall 21b. . Since the groove portion 21 has a V-shaped cross section, the light reflected by the side wall 21b is guided to the pixel opening portion, and the light incident from the substrate 11 side can be efficiently incident on the pixel opening portion. Further, in the manufacturing process of the liquid crystal device 100, other members do not enter the groove portion 21, and the groove portion 21 can sufficiently function as a prism.
(3) Since the pixel electrode 18 is formed in a self-aligned manner by the groove portion 21, the relative position between the groove portion 21 functioning as a prism and the pixel electrode 18 is not shifted. Efficiency improvement can be realized in a state close to an ideal state in optical design.
(4) The liquid crystal device 100 (the liquid crystal panel 110) includes the element substrate 10 which can realize bright display by efficiently using incident light incident from the element substrate 10 side and has high productivity. Therefore, the liquid crystal device 100 (liquid crystal panel 110) having excellent cost performance can be manufactured or provided.

(Second Embodiment)
<Electro-optical device>
Next, an electro-optical device according to a second embodiment will be described with reference to FIG. FIG. 7 is a schematic cross-sectional view illustrating a structure of a liquid crystal device as an electro-optical device according to the second embodiment. The electro-optical device of the second embodiment differs from the liquid crystal device 100 of the first embodiment in the configuration of the third interlayer insulating film 17 as the first insulating film in the element substrate, and the step of forming the groove 21 Is specified. Therefore, the same components as those of the liquid crystal device 100 of the first embodiment are denoted by the same reference numerals, and detailed description thereof is omitted. FIG. 7 shows a cross-sectional structure taken along the line HH ′ of FIG. 1 used for the description in the first embodiment.

  As shown in FIG. 7, a liquid crystal device 200 as an electro-optical device of the present embodiment includes an element substrate 10B, a counter substrate 30, and a liquid crystal layer 40 sandwiched between both substrates. The element substrate 10 </ b> B and the counter substrate 30 are arranged to face each other at a predetermined interval, and are bonded together by the sealing material 42 to constitute the liquid crystal panel 210.

The element substrate 10B includes a translucent base material 11, a first light shielding layer 12, a first interlayer insulating film 13, a TFT 14, a second interlayer insulating film 15, and a second light shielding layer provided in this order on the base material 11. 16, a third interlayer insulating film 17, a pixel electrode 18, and an alignment film 19.
In the present embodiment, the third interlayer insulating film 17 includes at least two layers including an interlayer insulating film 17a provided on the second interlayer insulating film 15 side and an interlayer insulating film 17b provided on the pixel electrode 18 side. It has a structure. In the display region E, the relay layer 6 is provided for each pixel P on the interlayer insulating film 17a. Between the relay layer 6 and the pixel electrode 18, a contact portion CNT1 that penetrates the interlayer insulating film 17b and electrically connects the relay layer 6 and the pixel electrode 18 is provided.

  In such a third interlayer insulating film 17, the display region E is provided with a groove portion 21 having a V-shaped cross section that opens at the boundary of the pixel P. The groove portion 21 substantially defines the outer shape of the pixel electrode 18 and separates the pixel electrode 18. The trench portion 21 is opened to the pixel electrode 18 side, and is formed so as to reach the lower interlayer insulating film 17 a of the third interlayer insulating film 17. That is, the depth of the groove portion 21 is larger than the depth of the contact portion CNT1 (the distance between the relay layer 6 and the pixel electrode 18).

  The groove 21 is provided not only in the display area E but also between the outer edge of the display area E and the external connection terminal 54 and around the external connection terminal 54 as in the first embodiment. The external connection terminal 54 has an outer shape defined by the groove 21 and includes an electrode 18t separated from the surroundings. The electrode 18t is made of the same transparent conductive film as the pixel electrode 18. In the third interlayer insulating film 17, the relay layer 6 is provided on the interlayer insulating film 17 a at a position corresponding to the external connection terminal 54. The interlayer insulating film 17b is provided with a contact portion CNT2 that electrically connects the relay layer 6 and the electrode 18t. Further, the interlayer insulating film 17a is provided with a contact portion CNT3 that electrically connects the wiring 16t provided on the second interlayer insulating film 15 and the relay layer 6. That is, the electrode 18t of the external connection terminal 54 is electrically connected to the wiring 16t provided in the lower layer by the contact portion CNT2, the relay layer 6, and the contact portion CNT3.

  Although a detailed manufacturing method of the element substrate 10B as the substrate for the electro-optical device will be described later, the groove portion 21 is formed at the same time in the step of forming the contact portions CNT1 and CNT2 in the third interlayer insulating film 17. . Therefore, the point which does not require the process for exclusive use for forming the groove part 21 differs from the said 1st Embodiment.

<Method for Manufacturing Electro-Optical Device Substrate>
Next, a method for manufacturing the element substrate 10B as the electro-optical device substrate will be described with reference to FIGS. FIG. 8 is a flowchart showing a method for manufacturing an element substrate according to the second embodiment, and FIGS. 9A to 9E are schematic cross-sectional views showing a method for manufacturing the element substrate according to the second embodiment. FIG. 9 shows a method of manufacturing the pixel electrode 18, the groove part 21, and the contact part CNT1 in the display area E.

  As shown in FIG. 8, the manufacturing method of the element substrate 10B of the present embodiment includes a relay layer forming step (step S11), a first insulating film forming step (step S12), and a planarization processing step (step S13). The contact portion forming step (step S14), the conductive film forming step (step S15), and the second insulating film forming step (step S16) are configured.

In step S <b> 11 of FIG. 8, first, an interlayer insulating film 17 a that covers the second interlayer insulating film 15 and the second light shielding layer 16 on the substrate 11 is formed. As a method of forming the interlayer insulating film 17a, for example, a method of forming a SiO ₂ film by a vapor deposition method, a sputtering method, or a CVD method can be cited. In this embodiment, the SiO ₂ film is formed by the plasma CVD method. Next, as shown in FIG. 9A, the relay layer 6 is formed for each pixel P on the interlayer insulating film 17a. Examples of the method for forming the relay layer 6 include a method in which a low resistance metal film such as Al (aluminum) or an alloy containing Al is formed by, for example, a sputtering method and then patterned by a photolithography method. Then, the process proceeds to step S12.

  In step S12 of FIG. 8, as shown in FIG. 9B, an interlayer insulating film 17b as a first insulating film covering the relay layer 6 and the interlayer insulating film 17a is formed. The method for forming the interlayer insulating film 17b is the same as the method for forming the interlayer insulating film 17a in step S11. It is preferable that the interlayer insulating film 17a and the interlayer insulating film 17b are made of the same material because the groove 21 is formed by dry etching (anisotropic etching) thereafter. Then, the process proceeds to step S13.

  In step S13 of FIG. 8, unevenness is generated on the surface of the formed interlayer insulating film 17b due to the influence of the relay layer 6. Therefore, a flattening process is performed to eliminate this. In the present embodiment, a CMP process is performed as a planarization process on the interlayer insulating film 17b. The film thickness of the third interlayer insulating film 17 including the interlayer insulating film 17b after the planarization and the interlayer insulating film 17a below it is 40 μm to 50 μm as in the first embodiment. In this case, the film thickness of the interlayer insulating film 17a and the film thickness of the interlayer insulating film 17b are substantially the same, but it is not necessarily the same. For example, the interlayer insulating film 17b may be thinner than the lower interlayer insulating film 17a. Then, the process proceeds to step S14.

In step S14 of FIG. 8, as shown in FIG. 9C, a groove portion 21 and a contact hole 24 reaching the relay layer 6 are formed in the surface 17s of the interlayer insulating film 17b that has been subjected to the planarization process. Specifically, as described in step S3 of the first embodiment, dry etching (anisotropic etching) is performed on the third interlayer insulating film 17 to open the boundary of the pixel P, and the depth is approximately A groove portion 21 of about 30 μm is formed. The trench 21 penetrates the interlayer insulating film 17b and reaches the lower interlayer insulating film 17a. Further, an opening is formed at a position overlapping the relay layer 6 in the mask layer when dry etching is performed. Then, in the portion of the interlayer insulating film 17b covering the relay layer 6, the groove formed by dry etching reaches the relay layer 6 and the etching does not proceed deeper than that, and the cross section opening at the boundary of the pixel P is V-shaped. At the stage where the groove 21 is formed, a contact hole 24 exposing the relay layer 6 is formed on the bottom surface. That is, the groove 21 deeper than the depth of the contact hole 24 is formed.
Subsequently, after patterning and forming, for example, a photosensitive resist so that only the contact hole 24 is exposed except for the groove portion 21, a conductive film is formed by, for example, a CVD method. After removing the photosensitive resist, the portion of the conductive film protruding from the surface 17s of the interlayer insulating film 17 is removed by etching. Then, as shown in FIG. 9D, the contact hole 24 is filled with the conductive member 25, and the contact portion CNT1 in which the exposed portion of the conductive member 25 is flat is completed. Note that the method of forming the contact portion CNT2 related to the electrical connection of the external connection terminal 54 is also formed by the same method as that of the contact portion CNT1. Then, the process proceeds to step S15.

In step S15 of FIG. 8, a transparent conductive film such as ITO is formed on the surface of the interlayer insulating film 17b on which the groove portion 21 and the contact portion CNT1 are formed. The film thickness of the transparent conductive film is 100 nm to 200 nm, as in the first embodiment. The transparent conductive film in the display region E is separated in units of the pixels P by the grooves 21, and pixel electrodes 18 are formed as shown in FIG. Then, the process proceeds to step S <b> 16, and the alignment film 19 is formed, whereby the opening of the groove 21 is closed with the alignment film 19.
The element substrate 10B is completed through the above steps. In step S14, when the groove portion 21 and the contact hole 24 are simultaneously formed by etching, the cross-sectional shape of the contact hole 24 may not be a reverse trapezoidal shape, for example, the cross-section may be a rectangular shape.

According to the second embodiment, in addition to the effects (1) to (3) of the first embodiment, the following effects can be obtained.
(5) The groove portion 21 is formed simultaneously with the formation of the contact hole 24 in the step of forming the contact portion CNT1 that electrically connects the relay layer 6 and the pixel electrode 18. Therefore, it is not necessary to provide a dedicated process for forming the groove portion 21, and thus a method for manufacturing the element substrate 10B having high productivity can be realized.

(Third embodiment)
<Electro-optical device>
Next, an electro-optical device according to a third embodiment will be described with reference to FIGS. FIG. 10 is a schematic cross-sectional view showing the structure of a liquid crystal device as an electro-optical device of the third embodiment, and FIG. 11 is an enlarged cross-sectional view showing the structure of an element substrate in the liquid crystal device as the electro-optical device of the third embodiment. . The electro-optical device according to the third embodiment is different from the liquid crystal device 100 according to the first embodiment (or the liquid crystal device 200 according to the second embodiment) in the step of forming the groove in the element substrate. Therefore, the same components as those of the liquid crystal device 100 of the first embodiment are denoted by the same reference numerals, and detailed description thereof is omitted. FIG. 10 shows a cross-sectional structure along the line HH ′ of FIG. 1, and FIG. 11 shows a cross-sectional structure of the element substrate along the line AA ′ of FIG.

  As shown in FIG. 10, a liquid crystal device 300 as an electro-optical device according to this embodiment includes an element substrate 10C, a counter substrate 30, and a liquid crystal layer 40 sandwiched between the two substrates. The element substrate 10 </ b> C and the counter substrate 30 are arranged to face each other at a predetermined interval, and are bonded together by the sealing material 42 to constitute the liquid crystal panel 310.

The element substrate 10 </ b> C includes a translucent base material 11, and a first light shielding layer 12, a first interlayer insulating film 13, a TFT 14, a second interlayer insulating film 15, and a second light shielding layer provided in this order on the base material 11. 16, a third interlayer insulating film 17, a microlens 28, an optical path length adjusting layer 29, a pixel electrode 18, and an alignment film 19.
In the present embodiment, on the third interlayer insulating film 17 in the display area E, a microlens 28 that collects the incident light for each pixel P is provided. An optical path length adjustment layer 29 is provided between the microlens 28 and the pixel electrode 18, and the optical path length adjustment layer 29 is an example of the first insulating film in the present invention.

  In such an optical path length adjusting layer 29, a groove 29b is opened in the display region E at the boundary of the pixel P. The groove portion 29 b substantially defines the outer shape of the pixel electrode 18 and separates the pixel electrode 18. The groove 29b is formed to open to the pixel electrode 18 side and reach the boundary between the adjacent microlenses 28 in the lower layer.

  The groove 29b is provided not only in the display area E, but also between the outer edge of the display area E and the external connection terminal 54 and around the external connection terminal 54, as in the first embodiment. The external connection terminal 54 has an outer shape defined by the groove 29b and includes an electrode 18t separated from the surroundings. The electrode 18t is made of the same transparent conductive film as the pixel electrode 18. Further, the relay layer 6 is provided on the first lens layer 26 constituting the microlens 28, and the contact portion penetrates the optical path length adjusting layer 29 and electrically connects the relay layer 6 and the electrode 18t. CNT2 is provided. In addition, a contact portion CNT3 that penetrates the first lens layer 26 and the third interlayer insulating film 17 and electrically connects the wiring 16t provided on the second interlayer insulating film 15 and the relay layer 6 is provided. ing. That is, the electrode 18t of the external connection terminal 54 is electrically connected to the wiring 16t provided in the lower layer by the contact portion CNT2, the relay layer 6, and the contact portion CNT3.

Next, referring to FIG. 11, a structure relating to the electrical connection between the TFT 14 as a switching element provided for each pixel P and the pixel electrode 18 will be described.
As shown in FIG. 11, the first light shielding layer 12 is formed on the base material 11 in the element substrate 10 </ b> C. The first light shielding layer 12 is patterned so as to function as the scanning line 2. A first interlayer insulating film 13 is formed so as to cover the first light shielding layer 12. A semiconductor layer 14 a of the TFT 14 is formed on the first interlayer insulating film 13. The semiconductor layer 14a is made of, for example, high-temperature polysilicon, and a channel region 14c, a drain region 14d, and a source region 14s are formed by adjusting the amount of P-type or N-type impurity introduced. Further, a junction region 14f which is a low concentration impurity region is formed between the channel region 14c and the drain region 14d, and a junction region 14e which is also a low concentration impurity region is formed between the channel region 14c and the source region 14s. Is formed. That is, the semiconductor layer 14a has an LDD (Lightly Doped Drain) structure.
A gate insulating film 15a is formed to cover the semiconductor layer 14a. A gate electrode 14g is formed at a position facing the channel region 14c of the semiconductor layer 14a of the gate insulating film 15a. The gate electrode 14g is patterned so as to overlap with a part of the first light shielding layer 12 through the gate insulating film 15a and the first interlayer insulating film 13, and the gate insulating film 15a and the first interlayer insulating film 13 are patterned. The gate electrode 14g and the first light shielding layer 12, that is, the scanning line 2 are electrically connected by a contact portion CNT7 that passes through the first light shielding layer.

  An interlayer insulating film 15b is formed to cover the gate electrode 14g and the gate insulating film 15a. That is, the second interlayer insulating film 15 includes the gate insulating film 15a and the interlayer insulating film 15b. A wiring layer 5a and a wiring layer 5d are formed by forming a conductive film on the second interlayer insulating film 15 and patterning it. The wiring layer 5a is electrically connected to the drain region 14d of the semiconductor layer 14a by a contact portion CNT5 that penetrates the second interlayer insulating film 15. The wiring layer 5 a functions as one electrode of the storage capacitor 5. Therefore, hereinafter, it may be referred to as the lower electrode 5a. The wiring layer 5d is electrically connected to the source region 14s of the semiconductor layer 14a by a contact portion CNT6 that penetrates the second interlayer insulating film 15. The wiring layer 5d is patterned so as to function as the data line 3. A dielectric film 5e is formed so as to cover these wiring layers 5a and 5d. A wiring layer 5b is formed in a portion facing the lower electrode 5a of the dielectric film 5e. The wiring layer 5 b functions as the other electrode of the storage capacitor 5 and is patterned so as to function as the capacitor line 4. Accordingly, the wiring layer 5b may be hereinafter referred to as the upper electrode 5b. The storage capacitor 5 includes a lower electrode 5a and an upper electrode 5b arranged to face each other via a dielectric film 5e.

A third interlayer insulating film 17 is formed covering the upper electrode 5b and the dielectric film 5e. Further, the third interlayer insulating film 17 is subjected to a planarization process (CMP process or the like) because the surface of the third interlayer insulating film 17 is affected by the lower wiring layer, the TFT 14, and the like.
A first lens layer 26 is formed on the third interlayer insulating film 17. The first lens layer 26 includes a lens portion 26a formed corresponding to each pixel P, and a flat portion 26b between adjacent lens portions 26a. A second lens layer 27 is formed so as to cover the first lens layer 26. A micro lens 28 is configured by the lens portion 26a and the portion of the second lens layer 27 that covers the lens portion 26a. The adjacent microlenses 28 overlap each other in the portion of the second lens layer 27 covering the flat portion 26b, and there is a boundary between adjacent microlenses in the overlapping portion.
The optical path length adjustment layer 29 is formed so as to cover such a microlens 28. In the optical path length adjustment layer 29, a groove 29b is formed at a portion corresponding to the boundary between adjacent microlenses 28. Since the optical path length adjustment layer 29 is uneven as a result of covering the microlenses 28, it is also subjected to a flattening process (CMP process or the like). The pixel electrode 18 is formed on the surface of the optical path length adjustment layer 29 that has been flattened. Adjacent pixel electrodes 18 are substantially separated by the groove 29b.

  The relay layer 6 is formed on the flat portion 26 b of the first lens layer 26. A contact portion CNT4 penetrating the flat portion 26b of the first lens layer 26, the third interlayer insulating film 17 and the dielectric film 5e is formed in a portion where the relay layer 6 and the lower electrode 5a overlap in plan view. In addition, a contact portion CNT1 that penetrates the optical path length adjustment layer 29 and the second lens layer 27 is formed at a portion where the pixel electrode 18 and the relay layer 6 overlap in plan view. That is, the pixel electrode 18 is electrically connected to the drain region 14d of the TFT 14 through the contact part CNT1, the relay layer 6, the contact part CNT4, the wiring layer (lower electrode) 5a, and the contact part CNT5. In this embodiment, the relay layer 6 is formed on the flat portion 26b of the first lens layer 26. However, the present invention is not limited to this, and the relay layer 6 may be formed on the third interlayer insulating film 17 or the second layer. As shown in the embodiment, the relay layer 6 may be formed on the lower interlayer insulating film 17a with the third interlayer insulating film 17 having a two-layer structure of the interlayer insulating film 17a and the interlayer insulating film 17b.

  Although a detailed manufacturing method of the element substrate 10 </ b> C as the electro-optical device substrate will be described later, the groove 29 b is formed at the same time in the step of forming the optical path length adjustment layer 29. Therefore, one of the differences from the first embodiment is that a dedicated process for forming the groove 29b is not required.

<Method for Manufacturing Electro-Optical Device Substrate>
Next, a manufacturing method of the element substrate 10C as the electro-optical device substrate will be described with reference to FIGS. FIG. 12 is a flowchart showing a method for manufacturing an element substrate according to the third embodiment. FIGS. 13A to 13D and 14E to 14I are schematic views showing a method for manufacturing the element substrate according to the third embodiment. It is sectional drawing. As described above, the manufacturing method of the element substrate 10 </ b> C according to the present embodiment is mainly characterized in that the groove 29 b is formed in the optical path length adjustment layer 29. Therefore, the process of forming the optical path length adjustment layer 29 is performed. The preceding and following processes will be described with reference to FIGS.

  As shown in FIG. 12, the manufacturing method of the element substrate 10C of the present embodiment includes a microlens forming step (step S21), a first insulating film forming step (step S22), and a planarization processing step (step S23). The conductive film forming step (step S24) and the second insulating film forming step (step S25) are included.

In step S21 of FIG. 12, first, a lens layer precursor 26P is formed on the third interlayer insulating film 17, as shown in FIG. Specifically, an inorganic material having a refractive index higher than that of the third interlayer insulating film 17 is formed by vapor deposition, sputtering, CVD, or the like. When the third interlayer insulating film 17 is made of, for example, SiO ₂ (having a refractive index of about 1.46), the inorganic material includes, for example, SiON (having a refractive index of about 1.50 to 1.70). In the present embodiment, a SiON film having a film thickness of about 2 μm to 5 μm is formed by plasma CVD method to obtain the lens layer precursor 26P.
Next, a photosensitive resist layer is formed by applying a photosensitive resist on the lens layer precursor 26P and drying it, and then patterning it. As shown in FIG. An independent resist pattern 70 is formed. Next, the resist pattern 70 is heated and deformed so as to have a substantially hemispherical shape as shown in FIG. Subsequently, the lens layer precursor 26P is dry-etched using, for example, a fluorine processing gas through the deformed resist pattern 71. When dry etching is performed, the portion covered with the resist pattern 71 is etched later than the portion not covered with the resist pattern 71. Therefore, the lens layer precursor 26P has a shape of the resist pattern 71. Is transferred by etching. As a result, as shown in FIG. 13D, the first lens layer 26 having the lens portion 26 a and the flat portion 26 b similar in shape to the resist pattern 71 is formed on the third interlayer insulating film 17.
Next, as shown in FIG. 14E, a second lens layer 27 covering the first lens layer 26 is formed. As a method of forming the second lens layer 27, SiON is formed by a plasma CVD method, for example, so as to have a film thickness of approximately 2 μm to 4 μm, as in the method of forming the lens layer precursor 26. Thereby, the micro lens 28 is formed by the lens portion 26 a and the second lens layer 27. In the formation process of the second lens layer 27, a SiON film is deposited so that a portion where adjacent microlenses 28 overlap and contact each other forms a boundary line. Then, the process proceeds to step S22.

In step S22 of FIG. 12, as shown in FIG. 14F, an optical path length adjustment layer 29 as a first insulating film covering the microlens 28 is formed. As a method of forming the optical path length adjusting layer 29 having a refractive index smaller than that of the microlens 28, the film thickness is approximately 40 μm to 50 μm by, for example, plasma CVD to cover the surface of the substrate 11 on which the microlens 28 is formed. A SiO ₂ film is formed. More specifically, as shown in FIG. 14G, an SiO ₂ film is laminated with a film thickness of about 1 μm to 3 μm. Since the arrangement pitch of the pixels P on which the microlenses 28 are formed is 5 μm to 10 μm, it is difficult to completely fill the boundary portion between the adjacent microlenses 28 with the SiO ₂ film, and voids (voids) are formed in the boundary portion. Arise. When the SiO ₂ film is laminated, the voids grow continuously, and after the SiO ₂ film having a predetermined thickness is formed, a groove 29b composed of continuous voids is formed. Then, the process proceeds to step S23.

  In step S23 of FIG. 12, as shown in FIG. 14G, a flattening process (CMP process) is performed to eliminate irregularities on the surface of the optical path length adjusting layer 29 caused by the influence of the microlens 28. Thereby, as shown in FIG. 14H, the optical path length adjustment layer 29 having the groove 29b opened at the boundary of the pixel P is formed on the surface 29a subjected to the planarization process. The depth of the groove 29b is approximately 30 μm. By performing the flattening process on the optical path length adjusting layer 29, the edge of the opening of the groove 29b stands out compared to before performing the flattening process. The width of the groove 29b after the planarization is about 1 μm. Then, the process proceeds to step S24.

  In step S24 of FIG. 12, a transparent conductive film such as ITO is formed on the surface 29a of the optical path length adjustment layer 29. The film thickness of the transparent conductive film is 100 nm to 200 nm. Since the transparent conductive film cannot completely cover the inside of the groove 29b, the pixel electrode 18 is formed on the surface 29a by being separated by the groove 29b. And it progresses to step S25 and the alignment film 19 as a 2nd insulating film is formed. Since the film thickness of the alignment film 19 is 200 nm to 500 nm, the opening of the groove 29 b that separates the pixel electrode 18 is blocked by the alignment film 19. As a result, as shown in FIG. 14I, the microlens 28 formed for each pixel P on the substrate 11, the optical path length adjustment layer 29 having the groove 29b opened at the boundary of the pixel P, and the pixel electrode An element substrate 10 </ b> C including the alignment layer 18 and the alignment film 19 is completed.

  13 (a) to 13 (d) and FIGS. 14 (e) to (i), the manufacturing process of the element substrate 10C in the display region E has been described. As described above, the optical path length on the base 11 is as follows. In the adjustment layer 29, a groove 29 b is also formed between the outer edge of the display area E and the external connection terminal 54 and around the external connection terminal 54.

The effects of the third embodiment are as follows.
(1) According to the method for manufacturing the element substrate 10 </ b> C, the groove 29 b that opens at the boundary of the pixel P is formed in the process of forming the optical path length adjustment layer 29 that covers the microlens 28. The groove 29b is formed so that its depth is about 30 μm, which is three times or more the arrangement pitch of the pixels P, and the width of the opening of the groove 29b is the film thickness of the transparent conductive film to be formed later. It is about 1 μm, which is 5 times or more. Therefore, if a transparent conductive film is formed on the flattened surface 29a of the optical path length adjusting layer 29, the transparent conductive film cannot cover all the inside of the groove 29b, and the transparent conductive film is separated by the groove 29b. Thus, the pixel electrode 18 is formed in a self-aligning manner. That is, the pixel electrode 18 whose outer shape in plan view is defined by the groove 29b is formed. Therefore, it is not necessary to pattern the transparent conductive film by photolithography to form the pixel electrode 18, and high productivity can be realized. In addition to the groove 29 b that functions as a prism, incident light is transmitted by the microlens 28. The manufacturing method of the element substrate 10C and the element substrate 10C that can be efficiently used can be provided.
(2) The opening of the groove 29 b formed in the optical path length adjustment layer 29, that is, the gap between the adjacent pixel electrodes 18 is substantially blocked by the alignment film 19. In other words, the alignment film 19 as the second insulating film is formed so as to close the gap between the adjacent pixel electrodes 18. Therefore, the groove 29 b is a continuation of voids (voids) generated when the optical path length adjustment layer 29 is formed, so that the voids (voids) have a refractive index smaller than that of the optical path length adjustment layer 29. Light incident on the boundary surface between the optical path length adjusting layer 29 and the void (void) having different refractive indexes is reflected by the boundary surface. A part of the light reflected by the boundary surface is guided to the pixel opening, and the light incident from the substrate 11 side can be efficiently incident on the pixel opening. Further, in the manufacturing process of the liquid crystal device 300, other members do not enter the groove 29b, and the groove 29b can sufficiently function as a prism.
(3) Since the pixel electrode 18 is formed in a self-aligned manner by the groove 29b, the relative position between the groove 29b functioning as a prism and the pixel electrode 18 does not shift, so that the incident light is used by the groove 29b. Efficiency improvement can be realized in a state close to an ideal state in optical design.
(4) The liquid crystal device 300 (liquid crystal panel 310) includes the element substrate 10C that can realize bright display by efficiently using incident light incident from the element substrate 10C side and has high productivity. Therefore, the liquid crystal device 300 (liquid crystal panel 310) having excellent cost performance can be manufactured or provided.

(Fourth embodiment)
<Electronic equipment>
Next, a projection display apparatus will be described as an example of the electronic apparatus according to the fourth embodiment with reference to FIG. FIG. 15 is a schematic diagram illustrating a configuration of a projection display device as an electronic apparatus.

  As shown in FIG. 15, a projection display apparatus 1000 as an electronic apparatus according to the present embodiment includes a polarization illumination apparatus 1100 arranged along the system optical axis L0 and two dichroic mirrors 1104 and 1105 as light separation elements. Three reflection mirrors 1106, 1107, 1108, five relay lenses 1201, 1202, 1203, 1204, 1205, three transmissive liquid crystal light valves 1210, 1220, 1230 as light modulation elements, and a light combining element As a cross dichroic prism 1206 and a projection lens 1207.

  The polarized light illumination device 1100 is generally configured by a lamp unit 1101 as a light source composed of a white light source such as an ultra-high pressure mercury lamp or a halogen lamp, an integrator lens 1102, and a polarization conversion element 1103.

  The dichroic mirror 1104 reflects red light (R) and transmits green light (G) and blue light (B) among the polarized light beams emitted from the polarization illumination device 1100. Another dichroic mirror 1105 reflects the green light (G) transmitted through the dichroic mirror 1104 and transmits the blue light (B).

The red light (R) reflected by the dichroic mirror 1104 is reflected by the reflection mirror 1106 and then enters the liquid crystal light valve 1210 via the relay lens 1205.
Green light (G) reflected by the dichroic mirror 1105 enters the liquid crystal light valve 1220 via the relay lens 1204.
The blue light (B) transmitted through the dichroic mirror 1105 enters the liquid crystal light valve 1230 via a light guide system including three relay lenses 1201, 1202, 1203 and two reflection mirrors 1107, 1108.

The liquid crystal light valves 1210, 1220, and 1230 are disposed to face the incident surfaces of the cross dichroic prism 1206 for each color light.
The color light incident on the liquid crystal light valves 1210, 1220, and 1230 is modulated based on video information (video signal) and emitted toward the cross dichroic prism 1206. In this prism, four right-angle prisms are bonded together, and a dielectric multilayer film that reflects red light and a dielectric multilayer film that reflects blue light are formed in a cross shape on the inner surface thereof. The three color lights are synthesized by these dielectric multilayer films, and the light representing the color image is synthesized. The synthesized light is projected onto the screen 1300 by the projection lens 1207, which is a projection optical system, and the image is enlarged and displayed.

  The liquid crystal light valve 1210 is the one to which the liquid crystal device 100 of the first embodiment described above is applied. A pair of polarizing elements arranged in crossed Nicols are arranged with a gap between the colored light incident side and the emitting side of the liquid crystal device 100. The same applies to the other liquid crystal light valves 1220 and 1230.

  According to such a projection display apparatus 1000, since the liquid crystal apparatus 100 is used as the liquid crystal light valves 1210, 1220, and 1230, light incident on the pixels P can be efficiently used to project a bright image. In addition, the projection display apparatus 1000 having excellent cost performance can be provided.

  As the liquid crystal light valves 1210, 1220, and 1230, the liquid crystal device 200 of the second embodiment and the liquid crystal device 300 of the third embodiment may be used. Further, the electronic apparatus to which the liquid crystal device 100 of the first embodiment, the liquid crystal device 200 of the second embodiment, or the liquid crystal device 300 of the third embodiment can be applied is not limited to the projection display device 1000. For example, projection-type HUD (head-up display) and HMD (head-mounted display), electronic book, personal computer, digital still camera, liquid crystal television, viewfinder type or monitor direct-view type video recorder, car navigation system, electronic notebook It can be suitably used as a display unit of information terminal equipment such as POS.

  The present invention is not limited to the above-described embodiment, and can be appropriately changed without departing from the spirit or idea of the invention that can be read from the claims and the entire specification, and for an electro-optical device with such a change. A substrate manufacturing method and an electronic apparatus to which the substrate for an electro-optical device is applied are also included in the technical scope of the present invention. Various modifications other than the above embodiment are conceivable. Hereinafter, a modification will be described.

  (Modification 1) In the liquid crystal device 100 of the first embodiment and the liquid crystal device 200 of the second embodiment, the shape of the pixel electrode 18 in a plan view is a square, but the shape is not limited to a square. For example, the pixel electrode 18 may have a rectangular shape. In addition, a direct-view display device capable of color display may be provided by providing a color filter on the counter substrate 30 side at a position facing the rectangular pixel electrode 18.

  (Modification 2) In the liquid crystal device 300 of the third embodiment, the cross-sectional shape of the microlens 28 formed on the element substrate 10C is not limited to a substantially semicircular shape. For example, the microlens 28 in which the portion corresponding to the center portion of the pixel P is flat may be used.

  6 ... Relay layer 10, 10B, 10C ... Element substrate as substrate for electro-optical device, 11 ... Base material as transparent substrate, 14 ... TFT as switching element, 17 ... Third interlayer insulation as first insulating film Reference numeral 19 denotes a pixel electrode, 19 denotes an alignment film as a second insulating film, 21 denotes a groove, 28 denotes a microlens, 29 denotes an optical path length adjusting layer as the first insulating film, 29 b denotes a groove, and 54 denotes an external connection terminal. 100, 200, 300 ... Liquid crystal device as an electro-optical device, 1000 ... Projection type display device as an electronic device, d1 ... Depth of groove, d2 ... Formation interval of groove corresponding to pixel arrangement pitch, d3 ... Depression of groove Width, E ... display area, P ... pixel.

Claims (18)

Forming a switching element above the transparent substrate;
Forming a first insulating film above the switching element;
Forming a groove opening at the boundary of the pixel on the surface of the first insulating film;
Forming a translucent conductive film on the surface of the first insulating film;
A method for manufacturing a substrate for an electro-optical device, comprising:   2. The electro-optical device substrate according to claim 1, wherein the groove is formed so that a depth of the groove from a surface of the first insulating film is three times or more of an arrangement pitch of the pixels. Manufacturing method.   3. The electro-optical device substrate according to claim 1, wherein the groove portion is formed in the step of forming a contact portion in the first insulating film that electrically connects the switching element and the conductive film. Manufacturing method.   The contact portion is formed to reach a relay layer disposed between the switching element and the conductive film, and the depth of the groove is greater than the distance between the conductive film and the relay layer. The method for manufacturing a substrate for an electro-optical device according to claim 3. Forming a switching element above the transparent substrate;
Forming a microlens above the switching element;
Forming a first insulating film above the microlens;
Planarizing the surface of the first insulating film;
Forming a light-transmitting conductive film on the planarized surface of the first insulating film, and in the step of forming the first insulating film, an opening is formed at a boundary of the pixel where the microlens is disposed. A method of manufacturing a substrate for an electro-optical device, wherein the first insulating film is formed so as to form a groove portion.   6. The electro-optical device substrate according to claim 1, wherein a width of the opening of the groove portion separating the conductive film is not less than five times a film thickness of the conductive film. Manufacturing method.   7. The method according to claim 1, further comprising: forming a second insulating film on a surface of the first insulating film on which the conductive film is formed to close the opening of the groove. A method for manufacturing a substrate for an electro-optical device according to one item.   The method of manufacturing a substrate for an electro-optical device according to claim 7, wherein the second insulating film is an alignment film that aligns liquid crystal molecules in a predetermined alignment direction. An electro-optical device substrate in which a switching element and an electrode electrically connected to the switching element are disposed on a transparent substrate,
A first insulating film disposed between the switching element and the electrode;
A groove opening at a boundary of a pixel on the surface of the first insulating film on the electrode side,
The depth of the groove from the surface of the first insulating film is three times or more the arrangement pitch of the pixels,
The substrate for an electro-optical device, wherein an outer shape of the electrode is defined by the groove. An electro-optical device substrate in which a switching element and an electrode electrically connected to the switching element are disposed on a transparent substrate,
A microlens disposed between the switching element and the electrode;
A first insulating film disposed between the microlens and the electrode;
A groove opening at a boundary of a pixel on the surface of the first insulating film on the electrode side,
The substrate for an electro-optical device, wherein an outer shape of the electrode is defined by the groove.   11. The substrate for an electro-optical device according to claim 9, wherein the width of the opening of the groove that defines the outer shape of the electrode is not less than five times the film thickness of the electrode.   12. The electro-optic according to claim 9, wherein a second insulating film is provided on the surface of the first insulating film on which the electrode is provided to close the opening of the groove. Device substrate.   13. The electro-optical device substrate according to claim 12, wherein the second insulating film is an alignment film that aligns liquid crystal molecules in a predetermined alignment direction. An external connection terminal to which the switching element is electrically connected;
14. The electro-optical device substrate according to claim 9, wherein the groove portion is also provided between the external connection terminal and an outer edge of a display region including the plurality of pixels. .   15. The electro-optical device substrate according to claim 14, wherein the groove portion is also provided at a position surrounding the external connection terminal.   An electro-optical device comprising the electro-optical device substrate manufactured using the electro-optical device substrate manufacturing method according to claim 1.   An electro-optical device comprising the electro-optical device substrate according to claim 9.   An electronic apparatus comprising the electro-optical device according to claim 16.

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