JP2014126574A - Method for manufacturing substrate for electrooptical device, electro optical device and electronic equipment - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method for manufacturing a substrate for an electrooptical device, an electrooptical device and electronic equipment capable of improving yield and quality of a substrate for an electrooptical device with high light utilization efficiency.SOLUTION: A method for manufacturing an element substrate including a pixel electrode 28 and a TFT 24 for supplying an electric signal to the pixel electrode 28 includes the steps of: forming a groove 12 on a first surface 11a of a substrate 11 having optical transparency; forming a sealing layer 10 having optical transparency so as to close an opening part 12c of the groove 12 by covering the first surface 11a of the substrate 11; and forming the TFT 24 on the sealing layer 10. It includes a step of forming a transparent layer 17 having optical transparency on a second surface 11b on the opposite side of the first surface 11a of the substrate 11 before the step of forming the TFT 24.

Description

  The present invention relates to a method for manufacturing a substrate for an electro-optical device, an electro-optical device, and an electronic apparatus.

  There is known an electro-optical device including an electro-optical material (for example, liquid crystal) between an element substrate provided with a plurality of pixels and switching elements, and a counter substrate disposed opposite to the element substrate. Examples of the electro-optical device include a liquid crystal device used as a liquid crystal light valve of a projector. Such a liquid crystal device is required to realize high light utilization efficiency.

  In view of this, a configuration has been proposed in which a prism (reflecting portion) is provided on the element substrate and light incident on the liquid crystal device is efficiently guided to the pixel region, thereby improving the substantial aperture ratio of the liquid crystal device (for example, Patent Document 1). The prism described in Patent Document 1 is composed of a groove having a V-shaped cross section formed in a non-opening region between pixels on a substrate, and the side surface of the groove whose inside is hollowed by closing the opening of the groove. Is used as a reflecting surface to reflect incident light toward the pixel region. A switching element corresponding to each of the plurality of pixel electrodes is formed on the substrate in which the trench is formed, with an insulating layer or the like interposed therebetween.

JP 2011-128292 A

  However, in the process of forming the switching element, the substrate is exposed to temperature changes such as high temperature heating and cooling. Therefore, due to the difference in linear expansion coefficient between the substrate and the insulating layer formed on the substrate, the substrate warps due to the difference between the stress generated on one side of the substrate and the stress generated on the other side. There is a case. Then, since the inside of the groove formed in the substrate is hollow, the insulating layer formed on the substrate cracks at a position on the groove where stress is likely to concentrate, and the yield in manufacturing the element substrate There is a problem that there is a risk of quality degradation.

  SUMMARY An advantage of some aspects of the invention is to solve at least a part of the problems described above, and the invention can be implemented as the following forms or application examples.

  Application Example 1 A method for manufacturing an electro-optical device substrate according to this application example includes a pixel electrode, a switching element that supplies an electric signal to the pixel electrode, and a reflecting portion including a groove. And a step of forming the groove on the first surface of the light-transmitting substrate, and covering the first surface of the substrate and closing the opening of the groove. And forming the switching element on the first layer. Before the step of forming the switching element, the first layer of the substrate is formed. It has the process of forming the 2nd layer which has a light transmittance on the 2nd surface on the opposite side to a surface, It is characterized by the above-mentioned.

  According to the method of this application example, before the step of forming the switching element, the second layer is formed on the second surface opposite to the first surface of the substrate on which the first layer is formed. Therefore, the stress generated on the first surface side of the substrate due to the difference in linear expansion coefficient between the substrate and the first layer due to exposure to temperature changes such as high temperature heating and cooling in the process of forming the switching element. The stress is relieved by the stress generated on the second surface side due to the difference in linear expansion coefficient between the substrate and the second layer. Accordingly, the warpage of the substrate in the step of forming the switching element is suppressed as compared with the case where the second layer is not formed, and thus the first layer that covers the first surface of the substrate and closes the opening of the groove. Can prevent cracks from entering. As a result, it is possible to improve the yield and quality in manufacturing the substrate for the electro-optical device.

  Application Example 2 In the method for manufacturing an electro-optical device substrate according to the application example, it is preferable that the linear expansion coefficient of the second layer is substantially the same as the linear expansion coefficient of the first layer. .

  According to the method of this application example, when the linear expansion coefficient of the second layer is substantially the same as the linear expansion coefficient of the first layer, the substrate is exposed to a temperature change such as high temperature heating or cooling. The degree of expansion or contraction of the first layer is close to the degree of expansion or contraction of the second layer. Thereby, since the difference between the stress generated on the first surface side of the substrate and the stress generated on the second surface side of the substrate is reduced, the warpage of the substrate can be effectively suppressed.

  Application Example 3 In the method for manufacturing the substrate for an electro-optical device according to the application example described above, it is preferable that the layer thickness of the second layer is substantially the same as the layer thickness of the first layer.

  According to the method of this application example, the first layer in the case where the substrate is exposed to a temperature change such as high-temperature heating or cooling by making the thickness of the second layer substantially the same as the thickness of the first layer. The degree of expansion or contraction of this layer is closer to the degree of expansion or contraction of the second layer. Thereby, since the difference between the stress generated on the first surface side of the substrate and the stress generated on the second surface side of the substrate becomes smaller, the warpage of the substrate can be more effectively suppressed.

  Application Example 4 In the method for manufacturing an electro-optical device substrate according to the application example, the first layer includes a first sealing layer, a second sealing layer, and a third sealing layer, The step of forming the first layer includes a step of forming a sacrificial layer that fills the inside of the groove and closes the opening, and a step of forming the first sealing layer that covers the first surface and the sacrificial layer. Forming a through hole having an opening smaller than the opening at a position overlapping the sacrificial layer of the first sealing layer, removing the sacrificial layer through the through hole, It is preferable to have a step of forming the second sealing layer covering the first sealing layer and closing the through hole, and a step of forming the third sealing layer covering the second sealing layer.

  According to the method of this application example, after the sacrificial layer filling the inside of the groove formed on the first surface of the substrate is formed, the first surface and the sacrificial layer are covered with the first sealing layer. Intrusion of the first sealing layer is suppressed. And after removing a sacrificial layer through the through-hole of a 1st sealing layer, the through-hole which has an opening part smaller than the opening part of a groove | channel by the 2nd sealing layer formed covering the 1st sealing layer Since it is closed, the through hole can be easily closed with the second sealing layer. Thereby, the inside of the groove can be made hollow while more reliably closing the opening of the groove, so that the portion functioning as the reflecting surface of the prism can be made larger. Furthermore, the surface of the first layer can be planarized by the third sealing layer formed so as to cover the second sealing layer.

  Application Example 5 An electro-optical device according to this application example includes a first substrate that includes a pixel electrode and a switching element that supplies an electric signal to the pixel electrode, and a first substrate that is disposed to face the first substrate. Two substrates, and an electro-optical material layer disposed between the first substrate and the second substrate, and the first substrate is manufactured by the method for manufacturing a substrate for an electro-optical device according to the application example. It is characterized by.

  According to the configuration of this application example, the first substrate included in the electro-optical device includes the electro-optical device substrate manufactured by the method for manufacturing the electro-optical device substrate according to the application example and improved in yield and quality. ing. Therefore, a high quality electro-optical device can be provided.

  Application Example 6 An electronic apparatus according to this application example includes the electro-optical device according to the application example described above.

  According to the configuration of this application example, it is possible to provide an electronic apparatus including a high-quality electro-optical device.

It is the schematic which shows the structure of the liquid crystal device which concerns on 1st Embodiment. 2 is an equivalent circuit diagram illustrating an electrical configuration of the liquid crystal device according to the first embodiment. FIG. It is a schematic plan view which shows arrangement | positioning of a pixel. It is a schematic sectional drawing which shows the structure of a pixel and a prism (reflection part). FIG. 3 is a schematic cross-sectional view showing the method for manufacturing the electro-optical device substrate according to the first embodiment. FIG. 3 is a schematic cross-sectional view showing the method for manufacturing the electro-optical device substrate according to the first embodiment. FIG. 3 is a schematic cross-sectional view showing the method for manufacturing the electro-optical device substrate according to the first embodiment. FIG. 3 is a schematic cross-sectional view showing the method for manufacturing the electro-optical device substrate according to the first embodiment. It is the schematic which shows the structure of the projector as an electronic device which concerns on 2nd Embodiment.

  DESCRIPTION OF EXEMPLARY EMBODIMENTS Hereinafter, embodiments of the invention will be described with reference to the drawings. The drawings to be used are appropriately enlarged, reduced or exaggerated so that the part to be described can be recognized. In addition, illustrations of components other than those necessary for the description may be omitted.

  In the following embodiments, for example, when “on the substrate” is described, the substrate is disposed so as to be in contact with the substrate, or is disposed on the substrate via another component, or the substrate. It is assumed that a part is arranged so as to be in contact with each other and a part is arranged via another component.

(First embodiment)
<Electro-optical device>
Here, an active matrix liquid crystal device including a thin film transistor (TFT) as a pixel switching element will be described as an example of the electro-optical device. This liquid crystal device can be suitably used, for example, as a light modulation element (liquid crystal light valve) of a projection display device (projector) described later.

  First, a liquid crystal device as an electro-optical device according to the first embodiment will be described with reference to FIGS. 1 and 2. FIG. 1 is a schematic diagram illustrating the configuration of the liquid crystal device according to the first embodiment. Specifically, FIG. 1A is a schematic plan view showing the configuration of the liquid crystal device, and FIG. 1B is a schematic cross-sectional view taken along the line H-H ′ of FIG. FIG. 2 is an equivalent circuit diagram showing an electrical configuration of the liquid crystal device according to the first embodiment.

  As shown in FIGS. 1A and 1B, the liquid crystal device 1 according to the first embodiment includes an element substrate 20 as a first substrate and a counter as a second substrate disposed opposite to the element substrate 20. A substrate 30 and a liquid crystal layer 40 as an electro-optical material layer disposed between the element substrate 20 and the counter substrate 30 are provided. In the present embodiment, the element substrate 20 corresponds to the electro-optical device substrate of the present invention.

  The liquid crystal device 1 operates in, for example, a TN (Twisted Nematic) mode or a VA (Vertical Alignment) mode. The liquid crystal device 1 is a transmissive liquid crystal device that modulates light incident from the element substrate 20 side and emits the light to the counter substrate 30 side.

  As shown in FIGS. 1A and 1B, the element substrate 20 is slightly larger than the counter substrate 30, and both substrates are bonded via a sealing material 42 arranged in a frame shape. The liquid crystal layer 40 is composed of a liquid crystal having positive or negative dielectric anisotropy as an electro-optical material enclosed in a space surrounded by the element substrate 20, the counter substrate 30, and the sealing material 42.

  The sealing material 42 is made of an adhesive such as a thermosetting or ultraviolet curable epoxy resin. Spacers (not shown) are mixed in the sealing material 42 to keep the distance between the element substrate 20 and the counter substrate 30 constant. A frame-shaped light shielding layer 32 provided on the counter substrate 30 is disposed inside the sealing material 42 disposed in a frame shape. The light shielding layer 32 is made of, for example, a light shielding metal or metal oxide.

  Inside the light shielding layer 32 is a display area E in which a plurality of pixels P are arranged. The display area E is an area that substantially contributes to display in the liquid crystal device 1. Although not shown in FIGS. 1A and 1B, in the display area E, the light-shielding portion (the non-opening area D2 shown in FIG. It is provided in the shape.

  A data line driving circuit 51 and a plurality of external connection terminals 54 are provided outside the sealing material 42 on one side of the element substrate 20 along the one side. Further, an inspection circuit 53 is provided inside the sealing material 42 along the other one side facing the one side. Further, a scanning line driving circuit 52 is provided inside the sealing material 42 along the other two sides that are orthogonal to these two sides and face each other.

  A plurality of wirings 55 that connect the two scanning line driving circuits 52 are provided inside the sealing material 42 on one side where the inspection circuit 53 is provided. Wirings connected to the data line driving circuit 51 and the scanning line driving circuit 52 are connected to a plurality of external connection terminals 54. In addition, a vertical conduction portion 56 is provided at a corner portion of the counter substrate 30 to establish electrical continuity between the element substrate 20 and the counter substrate 30. The arrangement of the inspection circuit 53 is not limited to this, and the inspection circuit 53 may be provided at a position along the inner side of the seal material 42 between the data line driving circuit 51 and the display area E.

  In the following description, the direction along one side where the data line driving circuit 51 is provided is defined as the X direction, and the direction along the other two sides orthogonal to the one side and facing each other is defined as the Y direction. . The direction of the H-H ′ line in FIG. 1A is a direction along the Y direction. Further, a direction orthogonal to the X direction and the Y direction and going upward in FIG. In the present specification, viewing from the normal direction (Z direction) of the surface of the counter substrate 30 of the liquid crystal device 1 is referred to as “plan view”.

  As shown in FIG. 1B, on the liquid crystal layer 40 side of the element substrate 20, a TFT 24 (see FIG. 2) as a switching element provided for each pixel P, a light-transmissive pixel electrode 28, A signal wiring (not shown) and an alignment film 29 covering the pixel electrode 28 are provided. The pixel electrode 28 is made of a light-transmitting conductive film such as ITO (Indium Tin Oxide) or IZO (Indium Zinc Oxide). In addition, the element substrate 20 is provided with a prism 15 (see FIG. 4) serving as a reflection section described later.

  A light shielding layer 32, a planarization layer 33, a common electrode 34, and an alignment film 35 that covers the common electrode 34 are provided on the counter substrate 30 on the liquid crystal layer 40 side.

  As shown in FIGS. 1A and 1B, the light shielding layer 32 is provided in a frame shape at a position overlapping the scanning line driving circuit 52, the plurality of wirings 55, and the inspection circuit 53 in a plan view. The light shielding layer 32 serves to shield light incident from the counter substrate 30 side and prevent malfunctions due to light in peripheral circuits including these drive circuits. Further, unnecessary stray light is shielded from entering the display area E, and high contrast in the display of the display area E is ensured.

The planarization layer 33 shown in FIG. 1B is formed so as to cover the light shielding layer 32. The planarizing layer 33 is formed of a light-transmitting insulating film such as a silicon oxide film (SiO ₂ ). The flattening layer 33 is provided so that the unevenness caused by the light shielding layer 32 and the like is alleviated and the surface on the liquid crystal layer 40 side on which the common electrode 34 is formed becomes flat. Examples of the method for forming the planarizing layer 33 include a method of forming a film using a plasma CVD (Chemical Vapor Deposition) method or the like.

  The common electrode 34 is made of a light-transmitting conductive film such as ITO (Indium Tin Oxide) or IZO (Indium Zinc Oxide), for example, and covers the planarization layer 33 and, as shown in FIG. The upper and lower conductive portions 56 provided at the four corners 30 are electrically connected to the wiring on the element substrate 20 side.

  The alignment film 29 and the alignment film 35 are selected based on the optical design of the liquid crystal device 1. For example, the alignment film 29 and the alignment film 35 are formed by depositing an organic material such as polyimide and rubbing the surface thereof, so that liquid crystal molecules are subjected to a substantially horizontal alignment process, or SiOx (silicon oxide). ) And the like formed by using a vapor phase growth method and aligned substantially perpendicularly to the liquid crystal molecules.

  The liquid crystal constituting the liquid crystal layer 40 modulates light and enables gradation display by changing the orientation and order of the molecular assembly depending on the applied voltage level. For example, in the normally white mode, the transmittance for incident light decreases according to the voltage applied in units of each pixel P. In the normally black mode, the transmittance for incident light increases in accordance with the voltage applied in units of each pixel P, and light having a contrast corresponding to an image signal is emitted from the liquid crystal device 1 as a whole.

  As shown in FIG. 2, in the display area E, the scanning lines 2 and the data lines 3 are formed so as to be insulated from each other. The direction in which the scanning line 2 extends is the X direction, and the direction in which the data line 3 extends is the Y direction. The pixel P is provided corresponding to the intersection of the scanning line 2 and the data line 3. Each pixel P is provided with a pixel electrode 28 and a TFT 24 (Thin Film Transistor) as a switching element.

  A source electrode (not shown) of the TFT 24 is electrically connected to the data line 3 extending from the data line driving circuit 51. Image signals (data signals) S1, S2,..., Sn are supplied to the data line 3 from the data line driving circuit 51 (see FIG. 1) in a line sequential manner. A gate electrode (not shown) of the TFT 24 is a part of the scanning line 2 extending from the scanning line driving circuit 52. The scanning signals G1, G2,..., Gm are supplied to the scanning line 2 from the scanning line driving circuit 52 in a line sequential manner. A drain electrode (not shown) of the TFT 24 is electrically connected to the pixel electrode 28.

  The image signals S1, S2,..., Sn are written to the pixel electrode 28 via the data line 3 at a predetermined timing by turning on the TFT 24 for a certain period. The image signal of a predetermined level written in the liquid crystal layer 40 through the pixel electrode 28 in this way is liquid crystal formed between the common electrode 34 (see FIG. 1B) provided on the counter substrate 30. It is held for a certain period in capacity.

  In order to prevent leakage of the held image signals S 1, S 2,..., Sn, the storage capacitor 5 is formed between the capacitor line 4 formed in parallel along the data line 3 and the pixel electrode 28. Is formed and arranged in parallel with the liquid crystal capacitor. Thus, when a voltage signal is applied to the liquid crystal of each pixel P, the alignment state of the liquid crystal changes depending on the applied voltage level. As a result, the light incident on the liquid crystal layer 40 (see FIG. 4) is modulated to enable gradation display.

  Next, the planar arrangement of the pixels P and the structure of the prism 15 will be described with reference to FIGS. FIG. 3 is a schematic plan view showing the arrangement of pixels. FIG. 4 is a schematic cross-sectional view showing the structure of the pixel and the prism (reflecting portion). Specifically, FIG. 4 is a schematic cross-sectional view taken along the line A-A ′ of FIG. 3.

  As shown in FIG. 3, the pixels P are arranged in a matrix in the display area E in the X direction and the Y direction. In the display area E, an area where light is shielded by the light shielding portion is referred to as a non-opening area D2. The non-opening region D2 is provided in a lattice shape extending in the X direction and the Y direction. In addition, a region that transmits light surrounded by the non-opening region D2 is referred to as an opening region D1. An opening area D1 divided into a quadrangle (substantially square) in plan view by the non-opening area D2 is an area (pixel area) of the pixel P.

  A scanning line 2 (see FIG. 2) is provided in the non-opening region D2 extending in the X direction. A data line 3 (see FIG. 2) is provided in the non-opening region D2 extending in the Y direction. The scanning lines 2 and the data lines 3 are made of a light-shielding conductive material, and these constitute a light-shielding portion of the liquid crystal device 1. The light shielding layer 32 of the counter substrate 30 may be provided in a lattice shape so as to overlap the non-opening region D2, and may be a part of the light shielding portion.

  The pixel electrode 28 provided on the element substrate 20 is quadrangular (substantially square) in plan view, and is arranged so that the outer edge portion overlaps the non-opening region D2 in a plane. In the present embodiment, the width of the non-opening region D2 is set to the same width in the X direction and the Y direction. Further, the groove 12 (prism 15) provided in the element substrate 20 is arranged in the non-opening region D2.

  Although not shown in FIG. 3, a TFT 24 is disposed for each pixel P in the vicinity of the intersection of the non-opening region D2. By disposing the TFT 24 in the non-opening region D2, the incidence of light on the TFT 24 is suppressed.

  As shown in FIG. 4, the element substrate 20 includes a substrate 11, a prism 15 as a reflection portion constituted by the grooves 12, a sealing layer 10 as a first layer, a scanning line 2, and an insulating layer 23. A TFT 24, an insulating layer 25, a data line 3, an insulating layer 27, a pixel electrode 28, an alignment film 29, and a transparent layer 17 as a second layer. The substrate 11 is made of a light transmissive material such as glass or quartz.

  The prism 15 has a groove 12 formed on the first surface 11 a side of the substrate 11. The groove 12 is formed in a V shape in sectional view so as to open toward the liquid crystal layer 40. The cross section of the groove 12 has a substantially isosceles triangular shape with the opening 12c opening in the first surface 11a as a base and two V-shaped inclined surfaces 12a as two sides. The inside of the groove 12 is a hollow portion 12b in a hollow state.

  The groove 12 is formed so as to overlap the non-opening region D2 in plan view. That is, the grooves 12 are formed in a lattice shape in plan view, and are arranged so as to overlap the scanning lines 2 (see FIG. 2) in the X direction and to overlap the data lines 3 (see FIG. 2) in the Y direction. ing.

  The apex of the substantially isosceles triangle shape of the groove 12 is located at the center in the width direction of the non-opening region D2. The width of the groove 12 (the length of the base of the approximately isosceles triangle shape) is set to be the same as or slightly wider than the width of the non-opening region D2. In the present embodiment, the width of the groove 12 is, for example, about 1 μm to 2 μm. The depth (length in the Z direction) of the groove 12 is, for example, about 20 μm to 30 μm.

  The sealing layer 10 is configured by stacking three layers of a first sealing layer 13, a second sealing layer 14, and a third sealing layer 16.

  The first sealing layer 13 is formed so as to cover the first surface 11 a of the substrate 11 and close the opening 12 c of the groove 12. The first sealing layer 13 is in an overhanging state with respect to the groove 12, and is formed so as not to enter the inside from the opening 12 c of the groove 12, for example. The first sealing layer 13 may be formed so as to enter the inside of the groove 12 slightly (for example, up to about 1 μm) from the opening 12c.

  The first sealing layer 13 is provided with a through hole 13 a that has an opening smaller than the opening 12 c and communicates with the hollow portion 12 b at a position overlapping the opening 12 c of the groove 12. The through holes 13a are arranged at the intersections of the lattice-shaped non-opening regions D2 in plan view (see FIG. 3). The planar shape of the through-hole 13a is, for example, a circle, but may be another shape.

The second sealing layer 14 is formed to cover the first sealing layer 13 and closes the through hole 13a. The third sealing layer 16 is formed so as to cover the second sealing layer 14. The third sealing layer 16 serves as a flattening layer that relieves unevenness on the surface of the second sealing layer 14 caused by the underlying groove 12 and the through hole 13a. The first sealing layer 13, the second sealing layer 14, and the third sealing layer 16 are formed of a light-transmitting insulating film such as a silicon oxide film (SiO ₂ ).

  The groove 12 is sealed by the sealing layer 10, and forms a hollow portion 12 b in the hollow state inside the groove 12. The hollow part 12b is in a state close to a vacuum, for example. The prism 15 reflects light incident from the second surface 11 b opposite to the first surface 11 a of the substrate 11 toward the liquid crystal layer 40 side at the boundary surface (inclined surface 12 a) between the substrate 11 and the groove 12. To do. The hollow portion 12b may be an air layer.

  The scanning line 2 is formed on the sealing layer 10. The scanning line 2 is, for example, a simple metal or alloy containing at least one of metal materials such as Al (aluminum), Mo (molybdenum), W (tungsten), Ti (titanium), Ta (tantalum), and Cr (chromium). , Metal silicide, polysilicide, nitride, or a laminate of these, and has light shielding properties.

The insulating layer 23 is provided so as to cover the sealing layer 10 and the scanning line 2. The insulating layer 23 is formed of a light-transmitting insulating film such as a silicon oxide film (SiO ₂ ). A semiconductor layer 24 a of the TFT 24 is formed on the insulating layer 23. The TFT 24 is a switching element that drives the pixel electrode 28. The TFT 24 includes a semiconductor layer 24a and a gate electrode, a source electrode, and a drain electrode (not shown).

  The semiconductor layer 24a is made of, for example, a polycrystalline silicon film and is formed in an island shape. Impurity ions are implanted into the semiconductor layer 24a to form a source region, a channel region, and a drain region. An LDD (Lightly Doped Drain) region may be formed between the channel region and the source region or between the channel region and the drain region.

  The gate electrode is formed through a part (gate insulating film) of the insulating layer 25 in a region overlapping the channel region of the semiconductor layer 24a in plan view. Although not shown, the gate electrode is electrically connected to the scanning line 2 arranged on the lower layer side through a contact hole, and the TFT 24 is on / off controlled by applying a scanning signal. .

  The structure of the TFT 24 is not limited to such a so-called top gate structure, but a so-called bottom gate structure in which the portion of the scanning line 2 that overlaps the channel region of the semiconductor layer via the insulating layer 23 functions as a gate electrode. It may be adopted.

The insulating layer 25 is provided so as to cover the insulating layer 23 and the TFT 24. The insulating layer 25 is formed of a light-transmitting insulating film such as a silicon oxide film (SiO ₂ ). The insulating layer 25 includes a gate insulating film that insulates between the semiconductor layer 24a of the TFT 24 and the gate electrode. The insulating layer 25 relieves surface irregularities caused by the TFT 24.

  A data line 3 is provided on the insulating layer 25. The data line 3 is formed of the same material as the scanning line 2 and has a light shielding property. The TFT 24 is disposed so as to be sandwiched between the scanning line 2 and the data line 3 having light shielding properties. This suppresses the switching operation from becoming unstable due to light entering the semiconductor layer 24 a of the TFT 24. In addition to the scanning lines 2 and the data lines 3, a light shielding layer formed of a light shielding material may be separately provided as at least one of the lower layer and the upper layer of the TFT 24 as the light shielding portion.

Although not shown, the capacitor line 4 is provided on the insulating layer 25 with the data line 3 and the wiring layer being different. An insulating layer 27 is provided so as to cover the insulating layer 25, the data line 3, and the capacitor line 4. The insulating layer 27 is formed of a light-transmitting insulating film such as a silicon oxide film (SiO ₂ ).

  The pixel electrode 28 is provided on the insulating layer 27 corresponding to the pixel P. The pixel electrode 28 is disposed so as to overlap the opening region D1 in plan view. The pixel electrode 28 is made of a light-transmitting conductive film such as ITO (Indium Tin Oxide) or IZO (Indium Zinc Oxide). The pixel electrode 28 is electrically connected to the drain region in the semiconductor layer 24 a of the TFT 24 through a contact hole (not shown) provided in the insulating layer 25 and the insulating layer 27. The alignment film 29 is provided so as to cover the pixel electrode 28.

The transparent layer 17 is provided so as to cover the second surface 11 b of the substrate 11. The transparent layer 17 is formed of a light transmissive insulating film such as a silicon oxide film (SiO ₂ ).

  The counter substrate 30 includes a substrate 31, a light shielding layer 32 (see FIG. 1B), a planarization layer 33, a common electrode 34, and an alignment film 35. The substrate 31 is made of a light transmissive material such as glass or quartz.

<Operation of prism>
Next, how the light incident on the liquid crystal device 1 is collected and emitted will be described with reference to FIG. In the liquid crystal device 1, the light incident from the element substrate 20 side is light-modulated for each pixel P by the liquid crystal layer 40 and then emitted to the counter substrate 30 side. Here, light having various incident angles is incident on the liquid crystal device 1. For example, incident light L1 incident along the optical axis passing through the planar center of the pixel P region (opening region D1) travels straight in the pixel P region, passes through the liquid crystal layer 40, and passes through the counter substrate. Injected to the 30th side.

  On the other hand, when the incident light L2 incident from the outside of the incident light L1 travels straight as it is, the incident light L2 deviates from the region of the pixel P (opening region D1) and is shielded by the light shielding portion (scanning line 2). In the liquid crystal device 1, such incident light L <b> 2 is reflected by the prism 15 to be directed toward the region of the pixel P. As described above, in the liquid crystal device 1, the incident light is efficiently guided toward the area of the pixel P by the prism 15, so that the utilization efficiency of the incident light can be increased.

  The prism 15 has a function of totally reflecting incident light at the boundary surface (inclined surface 12 a) between the substrate 11 and the groove 12. In order to totally reflect the incident light, the optical condition of the prism 15 is that the refractive index of the substrate 11 is R1, the refractive index of the hollow portion 12b is R2, and the incident angle of the incident light with respect to the normal of the inclined surface 12a is θ. In this case, it is necessary to satisfy R1> R2 and sin θ> R2 / R1.

  For example, when quartz is used as the material of the substrate 11, the refractive index R1 of the substrate 11 is 1.46, so the refractive index R2 of the hollow portion 12b may be 1.4 or less, for example. In this embodiment, since the hollow part 12b is in a state close to a vacuum, the refractive index R2 of the hollow part 12b is extremely small with respect to the refractive index R1 of the substrate 11. Therefore, the incident light can be totally reflected by the inclined surface 12a over a wide angle range of the incident angle θ.

  Regarding the design of the angle formed by the inclined surface 12a of the prism 15 and the normal direction of the second surface 11b of the substrate 11, the angle distribution of incident light and the capture angle of the projection lens 117 (see FIG. 9) of the projector 100 described later. It is determined based on (F value) and the like. In the present embodiment, the angle formed by the inclined surface 12a and the normal direction of the second surface 11b of the substrate 11 is, for example, about 1 ° to 3 °.

  The element substrate 20 and the counter substrate 30 in the liquid crystal device 1 have insulating films and conductive films having different refractive indexes, and incident light passes through these insulating films and conductive films and the liquid crystal layer 40. Therefore, it is desirable to find an optical condition in which the light use efficiency is highest in the configuration of the liquid crystal device 1 as the optical condition of the prism 15. Further, it is desirable that the depth of the groove 12, the width of the opening 12c, and the angle of the inclined surface 12a in the prism 15 are determined based on optical conditions that maximize light utilization efficiency.

<Method for Manufacturing Electro-Optical Device Substrate>
Next, a manufacturing method of the element substrate 20 as the electro-optical device substrate according to the first embodiment will be described with reference to FIGS. 5, 6, 7, and 8. 5, 6, 7, and 8 are schematic cross-sectional views illustrating a method for manufacturing a substrate for an electro-optical device according to the first embodiment. 5, 6, 7, and 8 correspond to schematic cross-sectional views along the line AA ′ in FIG. 3.

  Although not shown, in the manufacturing process of the element substrate 20, processing is performed with a large substrate (mother substrate) from which a plurality of element substrates 20 can be obtained, and the mother substrate is finally cut into individual pieces. Thus, a plurality of element substrates 20 are obtained. Accordingly, in each step described below, processing is performed in the state of the mother substrate before being separated into pieces. Here, processing for individual element substrates 20 in the mother substrate will be described.

  First, as shown in FIG. 5A, a mask layer 71 is formed on a first surface 11a of a substrate 11 made of quartz or the like and having light transmittance. As the mask layer 71, for example, a hard mask made of a metal material such as W (tungsten) or WSi (tungsten silicide) is preferably used in order to deeply form the groove 12 formed in the next step. Then, an opening 71a is formed in the mask layer 71 using a photolithography technique. The opening 71a is formed corresponding to the non-opening region D2. As a result, the non-opening region D2 of the first surface 11a of the substrate 11 is exposed, and the opening region D1 is covered with the mask layer 71.

  Next, the substrate 11 is etched through the opening 71 a of the mask layer 71. As a result, as shown in FIG. 5B, the groove 12 having the opening 12 c and the inclined surface 12 a is formed in the first surface 11 a of the substrate 11. The groove 12 is formed corresponding to the non-opening region D2. As the etching process, for example, dry etching using an ICP (ICP-RIE / Inductive Coupled Plasma-RIE) dry etching apparatus capable of forming high-density plasma is used.

  As an etching gas, for example, a gas in which oxygen, carbon monoxide, or the like is mixed with a fluorine-based gas is used. For example, when the etching selectivity between the substrate 11 and the mask layer 71 is 4 or more, the groove 12 having a V-shaped cross section having a depth of 4 times or more the thickness of the mask layer 71 can be formed. After the groove 12 is formed, the mask layer 71 is removed from the substrate 11.

  Next, as shown in FIG. 5C, a sacrificial layer 72 that covers the first surface 11a of the substrate 11 and fills the inside of the groove 12 to close the opening 12c is formed. As a material of the sacrificial layer 72, for example, silicon can be used. As a method for forming the sacrificial layer 72, for example, a CVD (Chemical Vapor Deposition) method can be used. The sacrificial layer 72 may be formed by using a resin material as the material of the sacrificial layer 72 and applying it by a spin coating method or the like.

  Next, as shown in FIG. 6A, a portion of the sacrificial layer 72 outside the inside of the groove 12, that is, a portion above the first surface 11a in FIG. 6A is removed. As a method for removing the portion above the sacrificial layer 72, for example, a chemical mechanical polishing (CMP) process may be used. However, dry etching may be used, or dry etching may be performed after the CMP process is performed. It may be applied. As a result, a portion of the sacrificial layer 72 above the first surface 11a is removed, and a portion that fills the inside of the groove 12 is left.

  In this step, when the portion above the sacrificial layer 72 is removed, CMP treatment or dry etching may be performed until the first surface 11a of the substrate 11 is slightly polished or etched. In this way, when the opening 12c of the groove 12 is formed so as to spread outward in the Y direction with respect to the inclined surface 12a, the widened portion of the opening 12c is removed and the cross section of the groove 12 is changed to V. It can be a letter shape.

  Further, when dry etching is performed until the first surface 11a of the substrate 11 is slightly etched, the upper surface of the sacrificial layer 72 filling the inside of the groove 12 is the first as shown by a two-dot chain line in FIG. A step may be formed between the first surface 11a and the sacrificial layer 72 by being slightly lower than the surface 11a. In this way, the groove 12 can be easily seen in a plan view due to a slight step between the first surface 11a and the sacrificial layer 72. For example, in the step of bonding the element substrate 20 and the counter substrate 30, etc. The groove 12 can be used as a reference for alignment.

Next, as shown in FIG. 6B, the first sealing layer 13 is formed so as to cover the first surface 11a of the substrate 11 and the sacrificial layer 72 (groove 12). The first sealing layer 13 is formed by, for example, a low pressure CVD method using TEOS (tetraethoxysilane: Si (OC ₂ H ₅ ) ₄ ) or a plasma CVD method using tetraethoxysilane and oxygen gas. It is composed of a silicon oxide film such as SiO ₂ . At this time, as shown by a two-dot chain line in FIG. 6A, if there is a step between the first surface 11 a and the sacrificial layer 72, the substrate 11 and the first sealing layer 13 in the opening 12 c of the groove 12. The contact area with can be increased.

  Next, as illustrated in FIG. 6C, a through hole 13 a reaching the sacrificial layer 72 is formed at a position overlapping the sacrificial layer 72 (groove 12) of the first sealing layer 13. The through hole 13a is formed by a photolithography method or the like so that the diameter of the opening is smaller than the width of the opening 12c of the groove 12 in the Y direction. Thereby, the sacrificial layer 72 is exposed in the through-hole 13a.

Next, as shown in FIG. 7A, the sacrificial layer 72 embedded in the trench 12 is removed. In this step, a dry etching process using, as an etching gas, a fluorine-based gas such as chlorine trifluoride (ClF ₃ ) or xenon difluoride (XeF ₂ ) through the through hole 13 a of the first sealing layer 13. Apply. Thereby, the sacrificial layer 72 is selectively etched and removed from the inside of the groove 12.

Next, as shown in FIG. 7B, a second sealing layer 14 that covers the first sealing layer 13 and closes the through hole 13a is formed. The second sealing layer 14 is formed of a silicon oxide film such as SiO ₂ by using, for example, a low pressure CVD method as in the first sealing layer forming step. Thereby, the through-hole 13a of the 1st sealing layer 13 is block | closed, the inside of the groove | channel 12 is sealed in a hollow state, and the hollow part 12b is formed. Thereby, the prism 15 is formed on the substrate 11.

  In the present embodiment, since the second sealing layer 14 is formed in an atmosphere reduced in pressure close to a vacuum, when the second sealing layer 14 is formed so as to cover the through hole 13a, the prism 15 ( The hollow portion 12b of the groove 12) is sealed in a state close to a vacuum. Thus, since the hollow portion 12b of the prism 15 is in the same state as the atmosphere for forming the second sealing layer 14, if the second sealing layer 14 is formed in the air, the hollow portion 12b becomes an air layer. .

Next, as shown in FIG. 7C, a third sealing layer 16 that covers the second sealing layer 14 is formed. The third sealing layer 16 is formed of a silicon oxide film such as SiO ₂ by using, for example, a low pressure CVD method as in the first sealing layer forming step. Then, for example, the surface of the third sealing layer 16 is planarized by performing a CMP process or the like. Thereby, the first sealing layer 13, the second sealing layer 14, and the third sealing layer 16 constitute the sealing layer 10. The layer thickness of the sealing layer 10 is, for example, about 3 μm to 4 μm.

  Next, as illustrated in FIG. 8A, the transparent layer 17 is formed so as to cover the second surface 11 b of the substrate 11 by inverting the substrate 11 up and down (Z direction). The transparent layer 17 is formed by the same method using the same material as the sealing layer 10, for example.

  The transparent layer 17 relieves stress generated on the first surface 11a side of the substrate 11 due to the difference in linear expansion coefficient between the substrate 11 and the sealing layer 10 in the step of forming the TFT 24 described later. This is to suppress warpage. Further, before the step of forming the transparent layer 17, if the second surface 11b is damaged due to the substrate 11 coming into contact with equipment or a jig, the scratch is generated by the transparent layer 17 covering the second surface 11b. Can be filled.

  The linear expansion coefficient of the transparent layer 17 is preferably substantially the same as the linear expansion coefficient of the sealing layer 10. In the present embodiment, since the transparent layer 17 is formed of the same material as the sealing layer 10 by the same method, the linear expansion coefficient of the transparent layer 17 is substantially the same as the linear expansion coefficient of the sealing layer 10. In addition, the transparent layer 17 is preferably formed with substantially the same layer thickness as the sealing layer 10.

  Next, as shown in FIG. 8B, the substrate 11 is turned upside down (Z direction) again, and the TFT 24 is formed on the sealing layer 10 by a known semiconductor process. More specifically, first, the scanning line 2 is formed on the sealing layer 10 (third sealing layer 16) along the X direction (see FIG. 3) in the non-opening region D2. Subsequently, an insulating layer 23 is formed so as to cover the sealing layer 10 and the scanning line 2.

  Subsequently, the semiconductor layer 24a of the TFT 24 is formed on the insulating layer 23 so as to overlap a part of the scanning line 2 in a plan view in the non-opening region D2. Then, a gate electrode of the TFT 24 is formed in a region overlapping the channel region of the semiconductor layer 24a in plan view through a gate insulating film (a part of the insulating layer 25), and is insulated so as to cover the TFT 24 and the insulating layer 23. Layer 25 is formed. Subsequently, the data line 3 is formed on the insulating layer 25 along the Y direction (see FIG. 3) in the non-opening region D2.

  As a result, the TFT 24 is formed on the substrate 11 so as to overlap the prism 15 (groove 12) in plan view. Thereby, since the light which goes to the TFT24 from the 2nd surface 11b side of the board | substrate 11 can be interrupted | blocked by the prism 15, the light-shielding property with respect to TFT24 can be improved.

  In a semiconductor process for forming the TFT 24 having the semiconductor layer 24a made of a polycrystalline silicon film, the substrate 11 on which the prism 15 is formed is exposed to temperature changes such as high temperature heating and cooling exceeding 900 ° C., for example. Therefore, due to the difference in linear expansion coefficient between the substrate 11 and the sealing layer 10, tensile stress or contraction stress is generated on the first surface 11 a side of the substrate 11.

  Here, when the transparent layer 17 is not formed on the second surface 11b of the substrate 11, the substrate 11 is warped due to the difference between the stress generated on the first surface 11a side and the stress generated on the second surface 11b side. Will be. When the substrate 11 on which the prism 15 is formed is warped, the inside of the groove 12 is hollow, so that the groove 12 is blocked on the first surface 11a at a position on the groove 12 where stress is likely to concentrate. There is a possibility that the formed sealing layer 10 may crack.

  In the present embodiment, since the transparent layer 17 is formed on the second surface 11b of the substrate 11, if tensile stress or shrinkage stress is generated on the first surface 11a side of the substrate 11, the first surface is also formed on the second surface 11b side. Stress similar to that on the surface 11a side is generated. Therefore, compared with the case where the transparent layer 17 is not formed, the difference between the stress generated on the first surface 11a side and the stress generated on the second surface 11b side is reduced, so that the warpage of the substrate 11 is suppressed. Thereby, a crack can be prevented from entering the sealing layer 10.

  Further, since the transparent layer 17 is formed of the same material as that of the sealing layer 10, the linear expansion coefficient of the transparent layer 17 and the linear expansion coefficient of the sealing layer 10 are substantially the same. Therefore, the difference between the stress generated on the first surface 11a side of the substrate 11 and the stress generated on the second surface 11b side of the substrate 11 becomes smaller, so that the warpage of the substrate 11 can be effectively suppressed. Furthermore, if the transparent layer 17 is formed with substantially the same layer thickness as the sealing layer 10, the difference between the stress generated on the first surface 11a side of the substrate 11 and the stress generated on the second surface 11b side of the substrate 11 is further reduced. Therefore, the warpage of the substrate 11 can be further effectively suppressed.

The transparent layer 17 is not removed even after the step of forming the TFT 24, and remains on the second surface 11b of the substrate 11 even after the element substrate 20 is completed. For example, if the material of the substrate 11 is quartz and the transparent layer 17 is formed of SiO ₂ , the composition of the transparent layer 17 changes substantially by being exposed to a high temperature in the semiconductor process, and becomes substantially the same as the substrate 11.

  Next, as shown in FIG. 8B, the pixel electrode 28 is formed on the insulating layer 27. Then, the element substrate 20 can be manufactured by forming the alignment film 29 (see FIG. 4) so as to cover the insulating layer 27 and the pixel electrode 28.

  As shown in FIG. 4, the counter substrate 30 includes a light shielding layer 32 (see FIG. 1) formed on the substrate 31, a planarization layer 33 that covers the substrate 31 and the light shielding layer 32, and the planarization layer 33. In addition, the common electrode 34 and the alignment film 35 are sequentially formed.

  Thereafter, the element substrate 20 and the counter substrate 30 are disposed so that the pixel electrode 28 and the common electrode 34 face each other with the liquid crystal layer 40 interposed therebetween, and are bonded together by, for example, a seal material 42 (see FIG. 1). Thus, the liquid crystal device 1 is completed.

  As described above, according to the first embodiment, the following effects can be obtained.

  (1) Before the step of forming the TFT 24, the transparent layer 17 is formed on the second surface 11b opposite to the first surface 11a of the substrate 11 on which the sealing layer 10 is formed. Therefore, exposure to temperature changes such as high temperature heating and cooling in the process of forming the TFT 24 results in the difference between the linear expansion coefficients of the substrate 11 and the sealing layer 10 on the first surface 11a side of the substrate 11. The stress is relieved by the stress generated on the second surface 11b side due to the difference in linear expansion coefficient between the substrate 11 and the transparent layer 17. Accordingly, the warpage of the substrate 11 in the process of forming the TFT 24 is suppressed as compared with the case where the transparent layer 17 is not formed. Therefore, the sealing that covers the first surface 11a of the substrate 11 and closes the opening 12c of the groove 12 is performed. It can suppress that a crack enters into stop layer 10. As a result, the yield and quality in manufacturing the element substrate 20 can be improved.

  (2) By making the linear expansion coefficient of the transparent layer 17 substantially the same as the linear expansion coefficient of the sealing layer 10, the sealing layer 10 expands when the substrate 11 is exposed to a temperature change such as high temperature heating or cooling. Alternatively, the degree of contraction is close to the degree of expansion or contraction of the transparent layer 17. Thereby, since the difference between the stress generated on the first surface 11a side of the substrate 11 and the stress generated on the second surface 11b side of the substrate 11 is reduced, the warpage of the substrate 11 can be effectively suppressed.

  (3) By making the layer thickness of the transparent layer 17 substantially the same as the layer thickness of the sealing layer 10, the sealing layer 10 expands or contracts when the substrate 11 is exposed to a temperature change such as high temperature heating or cooling. The degree to which the transparent layer 17 expands or contracts is closer. Thereby, since the difference between the stress generated on the first surface 11a side of the substrate 11 and the stress generated on the second surface 11b side of the substrate 11 becomes smaller, warping of the substrate 11 can be more effectively suppressed.

  (4) Since the sacrificial layer 72 that fills the inside of the groove 12 formed on the first surface 11a of the substrate 11 is formed, and then the first surface 11a and the sacrificial layer 72 are covered with the first sealing layer 13, the inside of the groove 12 Intrusion of the first sealing layer 13 into the is suppressed. Then, after the sacrificial layer 72 is removed through the through hole 13a of the first sealing layer 13, the second sealing layer 14 formed to cover the first sealing layer 13 is smaller than the opening 12c of the groove 12. Since the through hole 13 a having the opening is closed, the through hole 13 a can be easily closed with the second sealing layer 14. As a result, the inside of the groove 12 can be made hollow while more reliably closing the opening 12c of the groove 12, so that the inclined surface 12a that functions as the reflecting surface of the prism 15 can be made larger. Furthermore, the surface of the sealing layer 10 can be planarized by the third sealing layer 16 formed so as to cover the second sealing layer 14.

(Second Embodiment)
<Electronic equipment>
Next, an electronic apparatus according to a second embodiment will be described with reference to FIG. FIG. 9 is a schematic diagram illustrating a configuration of a projector as an electronic apparatus according to the second embodiment.

  As shown in FIG. 9, a projector (projection display device) 100 as an electronic apparatus according to the second embodiment includes a polarized illumination device 110, two dichroic mirrors 104 and 105 as light separation elements, and three Reflection mirrors 106, 107, 108, five relay lenses 111, 112, 113, 114, 115, three liquid crystal light valves 121, 122, 123, a cross dichroic prism 116 as a light combining element, and a projection lens 117 It has.

  The polarization illumination device 110 includes a lamp unit 101 as a light source composed of a white light source such as an ultra-high pressure mercury lamp or a halogen lamp, an integrator lens 102, and a polarization conversion element 103. The lamp unit 101, the integrator lens 102, and the polarization conversion element 103 are arranged along the system optical axis L.

  The dichroic mirror 104 reflects red light (R) and transmits green light (G) and blue light (B) among the polarized light beams emitted from the polarization illumination device 110. Another dichroic mirror 105 reflects the green light (G) transmitted through the dichroic mirror 104 and transmits the blue light (B).

  The red light (R) reflected by the dichroic mirror 104 is reflected by the reflection mirror 106 and then enters the liquid crystal light valve 121 via the relay lens 115. The green light (G) reflected by the dichroic mirror 105 enters the liquid crystal light valve 122 via the relay lens 114. The blue light (B) transmitted through the dichroic mirror 105 is incident on the liquid crystal light valve 123 via a light guide system composed of three relay lenses 111, 112, 113 and two reflection mirrors 107, 108.

  The transmissive liquid crystal light valves 121, 122, and 123 as light modulation elements are disposed to face the incident surfaces of the cross dichroic prism 116 for each color light. The color light incident on the liquid crystal light valves 121, 122, 123 is modulated based on video information (video signal) and emitted toward the cross dichroic prism 116.

  The cross dichroic prism 116 is formed by bonding four right-angle prisms, and a dielectric multilayer film that reflects red light and a dielectric multilayer film that reflects blue light are formed in a cross shape on the inner surface thereof. Yes. The three color lights are synthesized by these dielectric multilayer films, and the light representing the color image is synthesized. The synthesized light is projected onto the screen 130 by the projection lens 117 which is a projection optical system, and the image is enlarged and displayed.

  The liquid crystal light valve 121 is applied with the liquid crystal device 1 having the element substrate 20 manufactured by the method for manufacturing the substrate for an electro-optical device according to the first embodiment. The liquid crystal light valve 121 is arranged with a gap between a pair of polarizing elements arranged in crossed Nicols on the incident side and emission side of colored light. The same applies to the other liquid crystal light valves 122 and 123.

  According to the configuration of the projector 100 according to the second embodiment, the liquid crystal device including the element substrate 20 provided with the prism 15 that improves the utilization efficiency of incident light even when the plurality of pixels P are arranged with high definition. 1 is provided, it is possible to provide a projector 100 having high quality and brightness.

  The above-described embodiments merely show one aspect of the present invention, and can be arbitrarily modified and applied within the scope of the present invention. As modifications, for example, the following can be considered.

(Modification 1)
The method for manufacturing the substrate for an electro-optical device according to the above embodiment has a configuration in which the transparent layer 17 is formed of the same material as that of the sealing layer 10, but the present invention is not limited to such a form. If the transparent layer 17 is light transmissive and can reduce the difference between the stress generated on the first surface 11 a side of the substrate 11 and the stress generated on the second surface 11 b side of the substrate 11, the transparent layer 17 is sealed. It may be formed of a material different from that of the layer 10. For example, even if the linear expansion coefficient of the formed transparent layer 17 is different from the linear expansion coefficient of the sealing layer 10, the stress generated on the first surface 11 a side and the stress generated on the second surface 11 b side of the substrate 11. What is necessary is just to set the layer thickness of the transparent layer 17 suitably so that a difference with these may become small. Further, when the refractive index of the formed transparent layer 17 is lower than the refractive index of the substrate 11, reflection of light incident on the second surface 11b side on which the transparent layer 17 is formed can be reduced. .

(Modification 2)
Although the method for manufacturing the substrate for an electro-optical device according to the above embodiment has the step of forming the transparent layer 17 individually, the present invention is not limited to such a form. The electro-optical device substrate manufacturing method includes at least one of a step of forming the first sealing layer 13, a step of forming the second sealing layer 14, and a step of forming the third sealing layer 16. The structure which forms the transparent layer 17 together may be sufficient. For example, in the step of forming the first sealing layer 13, the step of forming the second sealing layer 14, and the step of forming the third sealing layer 16, substantially the same also on the second surface 11 b side of the substrate 11. The transparent layer 17 may be formed of these three layers. With this configuration, it is easy to make the linear expansion coefficient of the transparent layer 17 substantially the same as the linear expansion coefficient of the sealing layer 10 and make the layer thickness of the transparent layer 17 substantially the same as the layer thickness of the sealing layer 10. can do.

(Modification 3)
The method for manufacturing the substrate for an electro-optical device according to the above-described embodiment includes the step of forming the transparent layer 17 between the step of forming the third sealing layer 16 and the step of forming the TFT 24. The invention is not limited to such a form. Since the step of forming the transparent layer 17 may be performed before the step of forming the TFT 24, the step of forming the transparent layer 17 may be performed before the step of forming the third sealing layer 16.

(Modification 4)
The element substrate 20 of the liquid crystal device 1 according to the embodiment has a configuration in which the sealing layer 10 includes three layers of the first sealing layer 13, the second sealing layer 14, and the third sealing layer 16. However, the present invention is not limited to such a form. The element substrate 20 may have a configuration in which the sealing layer 10 includes two layers of the first sealing layer 13 and the second sealing layer 14. Moreover, the sealing layer 10 may have a configuration including four or more layers including the first sealing layer 13, the second sealing layer 14, and the third sealing layer 16.

(Modification 5)
The liquid crystal device 1 according to the above embodiment is a transmissive liquid crystal device in which the pixel electrode 28 and the common electrode 34 are formed of a light-transmitting conductive film, but the present invention is not limited to such a form. The common electrode 34 of the liquid crystal device 1 may be formed of a light-reflective conductive film such as aluminum to form a reflective liquid crystal device. If the common electrode 34 is formed of a light-reflective conductive film, light incident from the element substrate 20 side is light-modulated while being reflected on the counter substrate 30 side (common electrode 34) and emitted from the element substrate 20 side. The

(Modification 6)
The electronic apparatus (projector 100) of the above embodiment includes the three liquid crystal light valves 121, 122, 123 to which the liquid crystal device 1 is applied, but the present invention is not limited to such a form. The electronic device may have a configuration including two or less liquid crystal light valves (liquid crystal device 1), or may have a configuration including four or more liquid crystal light valves (liquid crystal device 1).

(Modification 7)
An electronic apparatus to which the liquid crystal device 1 according to the above embodiment can be applied is not limited to the projector 100. The liquid crystal device 1 is, for example, a projection type HUD (head-up display), a direct-view type HMD (head-mounted display), an electronic book, a personal computer, a digital still camera, a liquid crystal television, a viewfinder type, or a monitor direct-view type video. It can be suitably used as a display unit for information terminal devices such as recorders, car navigation systems, electronic notebooks, and POS.

(Modification 8)
In the above embodiment, the liquid crystal device has been described as an example of the electro-optical device including the substrate for the electro-optical device provided with the prism 15, but the present invention is not limited to such a form. For example, the electrophoretic display device may include an electro-optical device substrate provided with a prism 15 for the purpose of increasing the amount of display light. Further, an electro-optical device having a self-luminous element such as an organic electroluminescence device may include a substrate for an electro-optical device provided with a prism 15 for the purpose of preventing color mixture and the like.

  DESCRIPTION OF SYMBOLS 1 ... Liquid crystal device (electro-optical device), 10 ... Sealing layer (first layer), 11 ... Substrate, 11a ... First surface, 11b ... Second surface, 12 ... Groove, 12c ... Opening, 13 ... First DESCRIPTION OF SYMBOLS 1 Sealing layer, 13a ... Through-hole, 14 ... 2nd sealing layer, 15 ... Prism, 16 ... 3rd sealing layer, 17 ... Transparent layer (2nd layer), 20 ... Element substrate (for electro-optical devices) Substrate, first substrate) 24... TFT (switching element), 28... Pixel electrode, 30 .. counter substrate (second substrate), 40... Liquid crystal layer (electro-optical material layer), 100.

Claims (6)

A method for manufacturing a substrate for an electro-optical device, comprising: a pixel electrode; a switching element that supplies an electrical signal to the pixel electrode; and a reflective portion including a groove.
Forming the groove on the first surface of the substrate having optical transparency;
Forming a light transmissive first layer so as to cover the first surface of the substrate and close the opening of the groove;
Forming the switching element on the first layer,
Before the step of forming the switching element, the method further includes a step of forming a second layer having optical transparency on the second surface opposite to the first surface of the substrate. A method of manufacturing a device substrate. A method for manufacturing a substrate for an electro-optical device according to claim 1,
The method of manufacturing a substrate for an electro-optical device, wherein the linear expansion coefficient of the second layer is substantially the same as the linear expansion coefficient of the first layer. A method for manufacturing a substrate for an electro-optical device according to claim 1 or 2,
The method of manufacturing a substrate for an electro-optical device, wherein the thickness of the second layer is substantially the same as the thickness of the first layer. A method for manufacturing a substrate for an electro-optical device according to any one of claims 1 to 3,
The first layer includes a first sealing layer, a second sealing layer, and a third sealing layer,
The step of forming the first layer includes:
Forming a sacrificial layer that fills the inside of the groove and closes the opening;
Forming the first sealing layer covering the first surface and the sacrificial layer;
Forming a through hole having an opening smaller than the opening at a position overlapping the sacrificial layer of the first sealing layer;
Removing the sacrificial layer through the through hole;
Forming the second sealing layer covering the first sealing layer and closing the through hole;
Forming the third sealing layer covering the second sealing layer. A method for manufacturing a substrate for an electro-optical device, comprising: A first substrate comprising: a pixel electrode; and a switching element that supplies an electric signal to the pixel electrode;
A second substrate disposed opposite the first substrate;
An electro-optic material layer disposed between the first substrate and the second substrate,
An electro-optical device, wherein the first substrate is manufactured by the method for manufacturing a substrate for an electro-optical device according to any one of claims 1 to 4.   An electronic apparatus comprising the electro-optical device according to claim 5.

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