JP2015507806A - Hidi2cデータバスのホスト側実装 - Google Patents
Hidi2cデータバスのホスト側実装 Download PDFInfo
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- JP2015507806A JP2015507806A JP2014551389A JP2014551389A JP2015507806A JP 2015507806 A JP2015507806 A JP 2015507806A JP 2014551389 A JP2014551389 A JP 2014551389A JP 2014551389 A JP2014551389 A JP 2014551389A JP 2015507806 A JP2015507806 A JP 2015507806A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
- G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/4401—Bootstrapping
- G06F9/4411—Configuring for operating with peripheral devices; Loading of device drivers
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
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- General Physics & Mathematics (AREA)
- Computer Security & Cryptography (AREA)
- Stored Programmes (AREA)
- Power Sources (AREA)
- Information Transfer Systems (AREA)
Abstract
Description
Claims (10)
- 装置ソフトウェア実装に関して構成されたヒューマンインタフェース装置(HID)ソフトウェアスタックと、
前記HIDソフトウェアスタックと1つ以上の周辺装置とのインタフェースをとるように構成されたHID I2Cドライバであり、前記1つ以上の周辺装置は各々、I2Cデータバスを介して当該コンピューティングシステム内でデータ通信するように構成された装置へのHID I2Cインタフェースを含む、HID I2Cドライバと、
を有するコンピューティングシステム。 - 前記HID I2Cドライバは、前記装置の1つ以上のI2Cコントローラドライバと互換性を有するように構成され、前記1つ以上のI2Cコントローラドライバは各々、異なるI2Cコントローラハードウェアをサポートする異なる実装構成を有する、請求項1に記載のコンピューティングシステム。
- 前記HID I2Cドライバは、カーネルモード電力最適化のためカーネルモード・ツー・ユーザモードトランザクションを削減するように構成される、請求項1に記載のコンピューティングシステム。
- 前記HID I2Cドライバは、当該HID I2CドライバがI2C装置上のアドレスの暗黙データ読み出しを前記I2C装置への先行I2C書き込みトランザクションなしで実行するように、高速読み出しトランザクションに関して構成される、請求項1に記載のコンピューティングシステム。
- 前記HID I2Cドライバは、当該HID I2Cドライバがトランザクションごとの先行データ書き込みのない各データ読み出しに関して前記I2Cデータバス上の同じアドレスから暗黙的にデータ読み出しを行うように、単一トランザクションデータ読み出しに関して構成される、請求項1に記載のコンピューティングシステム。
- 前記HID I2Cドライバは、当該HID I2Cドライバが割り込みによって開始されるときに装置データを読み出し、ソフトウェアに該割り込みの処理をアンロードして素早く該割り込みの優先順位を下げるように、パッシブ割り込み処理に関して構成される、請求項1に記載のコンピューティングシステム。
- 前記HID I2Cドライバは、当該HID I2Cドライバが割り込みによって開始されるときに装置データを読み出し、このデータ読み出しが黙示的にこの装置割り込みに肯定応答するように、パッシブ割り込みアクナリッジメントに関して構成される、請求項1に記載のコンピューティングシステム。
- 前記HID I2Cドライバは、当該コンピューティングシステムがより低い電力状態に入る、又は装置ファームウェアが装置レベルのアクティビティを検出しない、のうちの一方のときに、低電力状態へと装置をアイドリングさせることを開始するように構成される、請求項1に記載のコンピューティングシステム。
- 前記HID I2Cドライバは、割り込みと装置ウェイクイベントとに共有あるいは唯一の入力接続を使用するように構成される、請求項1に記載のコンピューティングシステム。
- 前記HID I2Cドライバは、前記I2Cデータバス上で検出されたエラー状態のエラー訂正及びエラー処理に関して構成される、請求項1に記載のコンピューティングシステム。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US13/345,690 | 2012-01-07 | ||
US13/345,690 US8725916B2 (en) | 2012-01-07 | 2012-01-07 | Host side implementation for HID I2C data bus |
PCT/US2013/020501 WO2013103951A1 (en) | 2012-01-07 | 2013-01-07 | Host side implementation for hid i2c data bus |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2015507806A true JP2015507806A (ja) | 2015-03-12 |
JP6210516B2 JP6210516B2 (ja) | 2017-10-11 |
Family
ID=48744753
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2014551389A Active JP6210516B2 (ja) | 2012-01-07 | 2013-01-07 | Hidi2cデータバスのホスト側実装 |
Country Status (6)
Country | Link |
---|---|
US (1) | US8725916B2 (ja) |
EP (1) | EP2801034B1 (ja) |
JP (1) | JP6210516B2 (ja) |
KR (1) | KR102024959B1 (ja) |
CN (1) | CN104040519B (ja) |
WO (1) | WO2013103951A1 (ja) |
Families Citing this family (10)
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US8521942B2 (en) | 2011-03-21 | 2013-08-27 | Microsoft Corporation | HID over simple peripheral buses |
US9921981B2 (en) * | 2013-08-24 | 2018-03-20 | Qualcomm Incorporated | Method to minimize the number of IRQ lines from peripherals to one wire |
US9892087B2 (en) | 2013-09-12 | 2018-02-13 | The Boeing Company | Mobile computing device and method of transmitting data therefrom |
KR102169033B1 (ko) * | 2013-12-31 | 2020-10-22 | 엘지디스플레이 주식회사 | 전력 최적화 시스템과 이의 구동 방법 |
US9417801B2 (en) * | 2014-03-27 | 2016-08-16 | Intel Corporation | Virtual general-purpose I/O controller |
US11016796B2 (en) * | 2019-04-10 | 2021-05-25 | Red Hat, Inc. | Hypervisor protection of a controllable device |
US10909048B1 (en) | 2019-07-30 | 2021-02-02 | Microsoft Technology Licensing, Llc | Declarative transactional communications with a peripheral device via a low-power bus |
CN110502928B (zh) * | 2019-08-28 | 2022-03-29 | 上海金卓科技有限公司 | 双操作系统、工作状态控制方法、装置及存储介质 |
WO2022051607A1 (en) * | 2020-09-04 | 2022-03-10 | Nemedio Inc. | Systems and methods for dynamic configuration of external devices |
CN117421257B (zh) * | 2023-10-24 | 2024-06-25 | 上海合芯数字科技有限公司 | 一种内存条的初始化方法、装置、设备及存储介质 |
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2012
- 2012-01-07 US US13/345,690 patent/US8725916B2/en active Active
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2013
- 2013-01-07 CN CN201380004887.5A patent/CN104040519B/zh active Active
- 2013-01-07 KR KR1020147018341A patent/KR102024959B1/ko active IP Right Grant
- 2013-01-07 EP EP13733781.2A patent/EP2801034B1/en active Active
- 2013-01-07 WO PCT/US2013/020501 patent/WO2013103951A1/en active Application Filing
- 2013-01-07 JP JP2014551389A patent/JP6210516B2/ja active Active
Patent Citations (3)
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JP2002534734A (ja) * | 1999-01-07 | 2002-10-15 | テレフオンアクチーボラゲツト エル エム エリクソン(パブル) | I2cスレーブのプラグ及び運転 |
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Also Published As
Publication number | Publication date |
---|---|
CN104040519B (zh) | 2017-06-20 |
KR20140113662A (ko) | 2014-09-24 |
WO2013103951A1 (en) | 2013-07-11 |
JP6210516B2 (ja) | 2017-10-11 |
EP2801034B1 (en) | 2020-09-23 |
EP2801034A4 (en) | 2015-06-10 |
US8725916B2 (en) | 2014-05-13 |
KR102024959B1 (ko) | 2019-09-24 |
CN104040519A (zh) | 2014-09-10 |
US20130179609A1 (en) | 2013-07-11 |
EP2801034A1 (en) | 2014-11-12 |
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