JP2015216228A - Resin sealed electric power semiconductor device and manufacturing method thereof - Google Patents

Resin sealed electric power semiconductor device and manufacturing method thereof Download PDF

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JP2015216228A
JP2015216228A JP2014098061A JP2014098061A JP2015216228A JP 2015216228 A JP2015216228 A JP 2015216228A JP 2014098061 A JP2014098061 A JP 2014098061A JP 2014098061 A JP2014098061 A JP 2014098061A JP 2015216228 A JP2015216228 A JP 2015216228A
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wire
resin
wires
semiconductor device
mold
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JP6316086B2 (en
JP2015216228A5 (en
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中島 泰
Yasushi Nakajima
泰 中島
智行 谷口
Tomoyuki Taniguchi
智行 谷口
弘行 芳原
Hiroyuki Yoshihara
弘行 芳原
隼人 寺田
hayato Terada
隼人 寺田
清文 北井
Kiyofumi Kitai
清文 北井
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Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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    • HELECTRICITY
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    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
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    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/0601Structure
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124Aluminium (Al) as principal constituent
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
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    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
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    • H01L2224/484Connecting portions
    • H01L2224/4847Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
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    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
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    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
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    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4911Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49111Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Abstract

PROBLEM TO BE SOLVED: To provide a resin sealed electric power semiconductor device and a manufacturing method thereof capable of reducing the size while ensuring a proper insulation distance and preventing short-circuiting due to crossing wires.SOLUTION: A resin sealed electric power semiconductor device 20 includes: plural semiconductor elements 3; plural lead frames 2 for supplying the power to the semiconductor elements 3; and plural wires 7 connecting the semiconductor elements 3 and the lead frames 2 therebetween. The semiconductor element 3, the lead frame 2 and the plural wires 7 are sealed with a mold resin. The plural wires 7 are disposed in parallel extending in a direction crossing a flow direction of the mold resin 15. The wiring length of the wire 7 at the downstream side of the flow direction is equal to or larger than the wiring length of the wire 7 at the upstream side in the flow direction.

Description

本発明は、樹脂封止型の電力用半導体装置及びその製造方法に関し、内在するループワイヤの信頼性確保方法に関する。   The present invention relates to a resin-encapsulated power semiconductor device and a method for manufacturing the same, and to a reliability securing method for an inherent loop wire.

従来の半導体装置としては、内蔵基板とリードフレームとの間を太線アルミワイヤで接続するものが知られている(例えば特許文献1参照)。   As a conventional semiconductor device, a device in which a built-in substrate and a lead frame are connected by a thick aluminum wire is known (see, for example, Patent Document 1).

特開2013−175609号公報JP 2013-175609 A

インバータやサーボアンプ、プログラマブルロジックコントローラなどのFA(Factory automation)機器用の電力用半導体装置においては、以下のような課題があった。FA機器は、制御盤の中に水平方向に複数台並べられるが、横幅が例えば10mm広いと、10台の機器を並べると制御盤の幅が100mm延びるという悪影響がある。FA機器の形態として、いわゆるブックシェルフ型と呼ばれる、厚さを薄くしたタイプがあり、このタイプのものは顧客の小型化のニーズに適合するが、そのようなブックシェルフ型のFA機器にとって厚さが大きいことは特に大きな課題となる。   The power semiconductor devices for factory automation (FA) devices such as inverters, servo amplifiers, and programmable logic controllers have the following problems. A plurality of FA devices are arranged in the control panel in the horizontal direction. However, if the width is 10 mm wide, for example, if 10 devices are arranged, the width of the control panel is increased by 100 mm. As a form of FA equipment, there is a so-called bookshelf type in which the thickness is reduced, and this type meets the customer's needs for miniaturization. Large is a particularly big issue.

このため、FA機器に用いる電力用半導体装置自体も幅をできるだけ小さくしたいという要望がある。   For this reason, there is a demand for reducing the width of the power semiconductor device itself used for the FA equipment as much as possible.

樹脂封止型電力用半導体装置の製造時に、リードフレームの各所に設けられた電極と基板とをワイヤで接続し、金型内に配置されたリードフレーム及び基板に対して水平方向からモールド樹脂を注入すると、金型内を水平方向にモールド樹脂が流動する。この時モールド樹脂は液化しているが、ワイヤに液化した樹脂がワイヤの延在方向と垂直方向から衝突すると、ワイヤが変形するワイヤ流れという現象が発生する。   When manufacturing a resin-encapsulated power semiconductor device, the electrodes provided at various locations of the lead frame are connected to the substrate with wires, and the mold resin is applied from the horizontal direction to the lead frame and substrate disposed in the mold. When injected, the mold resin flows horizontally in the mold. At this time, the mold resin is liquefied, but when the liquefied resin collides with the wire from the direction perpendicular to the extending direction of the wire, a phenomenon of wire flow in which the wire deforms occurs.

ワイヤ流れにより、異電圧のワイヤ同士が接触したり、耐電圧上必要な絶縁距離が確保できていなかった場合、短絡故障やリーク故障となるため、煩雑な検査工程が必要であったり、信頼性を確保できる期間に制約が生じるなどの問題が発生する。   If wires with different voltages come into contact with each other due to the wire flow, or if the insulation distance required for withstand voltage is not secured, a short circuit failure or leak failure may occur, requiring a complicated inspection process or reliability. There arises a problem such as a restriction on the period in which the data can be secured.

このため、樹脂封止型電力用半導体装置においては、ワイヤが短絡することを防止し、適切な絶縁距離を確保するためには、ワイヤ同士の間隔を一定距離以上確保せねばならず、このことが樹脂封止型電力用半導体装置の小型化の妨げとなっていた。   For this reason, in the resin-encapsulated power semiconductor device, in order to prevent the wires from being short-circuited and to ensure an appropriate insulation distance, it is necessary to ensure a certain distance between the wires. However, this has hindered miniaturization of the resin-encapsulated power semiconductor device.

本発明は、上記に鑑みてなされたものであって、ワイヤ同士の短絡を防止して適切な絶縁距離を確保しつつ小型化を図った樹脂封止型電力用半導体装置及びその製造方法を得ることを目的とする。   The present invention has been made in view of the above, and obtains a resin-encapsulated power semiconductor device and a method for manufacturing the same, which are miniaturized while preventing a short circuit between wires and ensuring an appropriate insulation distance. For the purpose.

上述した課題を解決し、目的を達成するために、本発明は、並列に配置された複数のワイヤを有し、複数のワイヤがモールド樹脂によって半導体素子とともに封止された樹脂封止型電力用半導体装置であって、複数のワイヤは、モールド樹脂の流動方向に沿って配列されており、流動方向の下流側のワイヤの配線長は、流動方向の上流側のワイヤの配線長以上であることを特徴とする。   In order to solve the above-described problems and achieve the object, the present invention has a plurality of wires arranged in parallel, and the plurality of wires are sealed together with a semiconductor element by a mold resin. In the semiconductor device, the plurality of wires are arranged along the flow direction of the mold resin, and the wire length of the downstream wire in the flow direction is equal to or longer than the wire length of the upstream wire in the flow direction. It is characterized by.

本発明によれば、ワイヤが変形しても、下流側のワイヤに接することがなく、短絡を防止するとともに適切な絶縁距離を確保できるという効果を奏する。   According to the present invention, even if the wire is deformed, there is an effect that it is possible to prevent a short circuit and ensure an appropriate insulation distance without contacting the downstream wire.

図1は、本発明に係る樹脂封止型電力用半導体装置の実施の形態1の断面図である。FIG. 1 is a cross-sectional view of a resin-encapsulated power semiconductor device according to the first embodiment of the present invention. 図2は、実施の形態1に係る樹脂封止型電力用半導体装置の上面図である。FIG. 2 is a top view of the resin-encapsulated power semiconductor device according to the first embodiment. 図3は、実施の形態1に係る樹脂封止型電力用半導体装置の上面図である。FIG. 3 is a top view of the resin-encapsulated power semiconductor device according to the first embodiment. 図4は、ワイヤの拡大図である。FIG. 4 is an enlarged view of the wire. 図5は、ワイヤが倒れる過程をワイヤのループを直線的に見る方向から示した図である。FIG. 5 is a diagram showing the process of the wire falling from the direction of viewing the wire loop linearly. 図6は、本発明に係る電力用半導体装置の実施の形態2のワイヤを示す図である。FIG. 6 is a diagram showing the wires of the power semiconductor device according to the second embodiment of the present invention. 図7は、一次接続と二次接続を交互に入れ替えて配線した状態を示す図である。FIG. 7 is a diagram illustrating a state in which the primary connection and the secondary connection are alternately switched and wired. 図8は、実施の形態4に係る電力半導体装置を製造するためのモールド金型の断面図である。FIG. 8 is a cross-sectional view of a mold for manufacturing the power semiconductor device according to the fourth embodiment. 図9は、モールド樹脂の注入を完了した状態を示す図である。FIG. 9 is a diagram showing a state in which the injection of the mold resin is completed. 図10は、可動ピンがあった空間に樹脂が充填された状態を示す図である。FIG. 10 is a diagram illustrating a state in which the space in which the movable pin is located is filled with resin. 図11は、モールド樹脂充填前後のワイヤの形状を示す図である。FIG. 11 is a diagram showing the shape of the wire before and after filling with the mold resin. 図12は、ワイヤの断面図である。FIG. 12 is a cross-sectional view of a wire.

以下に、本発明に係る電力用半導体装置の実施の形態を図面に基づいて詳細に説明する。なお、この実施の形態によりこの発明が限定されるものではない。   Embodiments of a power semiconductor device according to the present invention will be described below in detail with reference to the drawings. Note that the present invention is not limited to the embodiments.

実施の形態1.
図1は、本発明に係る樹脂封止型電力用半導体装置の実施の形態1の断面図である。図2は、実施の形態1に係る樹脂封止型電力用半導体装置の上面図である。樹脂封止型電力用半導体装置20において、半導体素子3を支持固定し、外部配線と接続するためのリードフレーム2は、基板1とは立体的に干渉しないように配置されている。リードフレーム2には半導体素子3が配置されている。リードフレーム2の半導体素子3が配置される部位の反対面は、絶縁シート16及び金属ベース17が配置され、半導体素子3の発熱は、金属ベース17を介して放熱される。半導体素子3に設けられた電極4や基板1の電極5、リードフレーム2に設けられた電極6との間は、複数のワイヤ7で接続されている。ワイヤ7の材質としては、標準的には常温で接合できるアルミニウムが作業性に優れているが、銅や銅とアルミとの複合材などもワイヤ7の材料として用いることができるほか、他の金属や金属の組み合わせたものをワイヤ7の材料としても構わない。
Embodiment 1 FIG.
FIG. 1 is a cross-sectional view of a resin-encapsulated power semiconductor device according to the first embodiment of the present invention. FIG. 2 is a top view of the resin-encapsulated power semiconductor device according to the first embodiment. In the resin-encapsulated power semiconductor device 20, the lead frame 2 for supporting and fixing the semiconductor element 3 and connecting to the external wiring is arranged so as not to three-dimensionally interfere with the substrate 1. A semiconductor element 3 is disposed on the lead frame 2. An insulating sheet 16 and a metal base 17 are disposed on the opposite surface of the lead frame 2 where the semiconductor element 3 is disposed, and heat generated by the semiconductor element 3 is radiated through the metal base 17. A plurality of wires 7 are connected between the electrode 4 provided on the semiconductor element 3, the electrode 5 on the substrate 1, and the electrode 6 provided on the lead frame 2. As a material for the wire 7, aluminum that can be bonded at normal temperature is excellent in workability. However, copper, a composite material of copper and aluminum can be used as the material for the wire 7, and other metals. Or a combination of metals may be used as the material of the wire 7.

基板1、リードフレーム2、半導体素子3及びワイヤ7は、モールド樹脂15によって封止されている。図2中に、モールド樹脂15で樹脂封止を行う際の流動方向を矢印Aで示す。   The substrate 1, the lead frame 2, the semiconductor element 3, and the wire 7 are sealed with a mold resin 15. In FIG. 2, an arrow A indicates the flow direction when resin sealing is performed with the mold resin 15.

図3は、実施の形態1に係る樹脂封止型電力用半導体装置の上面図であり、15を注入する前の状態を示している。モールド前のワイヤ7は、おおよそ平行に配置されており、モールド樹脂15の流動方向における上流側に短いワイヤ7が配置され、下流側に長いワイヤ7が配置されている。したがって、隣接する二つのワイヤ7に着目した場合、下流側のワイヤ7の配線長は、上流側のワイヤ7の配線長以上となっている。   FIG. 3 is a top view of the resin-encapsulated power semiconductor device according to the first embodiment and shows a state before 15 is injected. The wires 7 before molding are arranged approximately in parallel. The short wires 7 are arranged on the upstream side in the flow direction of the mold resin 15 and the long wires 7 are arranged on the downstream side. Therefore, when attention is paid to two adjacent wires 7, the wiring length of the downstream wire 7 is equal to or longer than the wiring length of the upstream wire 7.

モールド樹脂15でモールドする際に、ワイヤ7はモールド樹脂15の流れの影響を受けて、図2に示したように、下流側に凸の弧を描くように変形する。それぞれのワイヤ7がモールド樹脂15によって変形した場合の移動量は、短いワイヤ7ほどが小さくなり、長いワイヤ7ほど大きくなるため、モールド樹脂15の注入後にはワイヤ7間の距離が広がることになる。   When molding with the mold resin 15, the wire 7 is affected by the flow of the mold resin 15 and is deformed so as to draw a convex arc on the downstream side as shown in FIG. 2. When each wire 7 is deformed by the mold resin 15, the movement amount becomes shorter as the short wire 7 becomes larger and as the long wire 7 becomes larger, the distance between the wires 7 increases after the molding resin 15 is injected. .

実施の形態1では、このようにワイヤ7を配置することによって、短絡やワイヤ7間の距離の不必要な減少を防止している。これにより、樹脂封止型電力用半導体装置20の歩留まりを向上させることが可能となる。   In the first embodiment, by arranging the wires 7 in this way, a short circuit and an unnecessary decrease in the distance between the wires 7 are prevented. As a result, the yield of the resin-encapsulated power semiconductor device 20 can be improved.

図4は、ワイヤの拡大図である。ワイヤ7が半導体素子3の電極4a,4bと基板1の電極5との間を接続している。図の右側がモールド樹脂15の注入における上流であり、左が下流である。上流から下流にかけてワイヤ7が順番に短くなるように半導体素子3を配置している。ワイヤ7は、モールド樹脂15の流れに応じて変形するが、モールド樹脂15の流れの上流側は短く、下流側は長くなっているため、ワイヤ7間の距離が短くなりすぎることは防止されている。この例とは逆に、長いワイヤ7を上流に配置し、短いワイヤ7を下流に配置した場合、長いワイヤ7の移動距離は短いワイヤ7の移動距離よりも大きくなるため、ワイヤ7間の距離が不必要に小さくなるリスクが生じ、樹脂封止型電力用半導体装置20を小型化できなくなる。   FIG. 4 is an enlarged view of the wire. A wire 7 connects between the electrodes 4 a and 4 b of the semiconductor element 3 and the electrode 5 of the substrate 1. The right side of the figure is the upstream in the injection of the mold resin 15, and the left is the downstream. The semiconductor elements 3 are arranged so that the wires 7 become shorter in order from the upstream to the downstream. The wire 7 is deformed according to the flow of the mold resin 15, but the upstream side of the flow of the mold resin 15 is short and the downstream side is long, so that the distance between the wires 7 is prevented from becoming too short. Yes. Contrary to this example, when the long wire 7 is arranged upstream and the short wire 7 is arranged downstream, the moving distance of the long wire 7 is larger than the moving distance of the short wire 7, so the distance between the wires 7. Is unnecessarily reduced, and the resin-encapsulated power semiconductor device 20 cannot be downsized.

ワイヤ7の移動距離の大きさについて実験検証を実施した。まずワイヤ7の変形に必要な力についてであるが、水平方向への流れによりワイヤ7が弓なり形状になるまでに必要な力は、φ300μmのアルミワイヤの場合、0.4mN〜1mNと非常に小さかった。ワイヤ7は、力を加え始めると最初は弾性変形するが、さらに力を加え続けると塑性変形が始まる。一旦ワイヤ7の組成変形が始まると、ワイヤ7が一様な弓なり形状になるまで変形が止まらなかった。このときに形成された弧の形状は、ワイヤ7の全長をほほ同じ半径となる弧を倒した形状になった。   Experiment verification was performed about the magnitude | size of the movement distance of the wire 7. FIG. First, regarding the force required for the deformation of the wire 7, the force necessary for the wire 7 to become a bow shape due to the flow in the horizontal direction is very small, 0.4 mN to 1 mN in the case of an aluminum wire of 300 μm. It was. The wire 7 is initially elastically deformed when a force starts to be applied, but plastic deformation starts when a force is further applied. Once compositional deformation of the wire 7 began, the deformation did not stop until the wire 7 became a uniform bow shape. The shape of the arc formed at this time was such that the arc having the same radius as the entire length of the wire 7 was tilted.

図5は、ワイヤが倒れる過程をワイヤのループを直線的に見る方向から示した図である。図の右側がモールド樹脂15の注入における上流であり、左が下流である。モールド樹脂15の流れに応じて粘性抵抗が生じ、流れに平行な方向の力Fがワイヤ7にかかる。ワイヤ7の根元が塑性変形を起こし、だんだんワイヤ7が寝ていく。このときモールド樹脂15による粘性抵抗の方向に対して、ワイヤ7を引き延ばす方向の分力Faと倒す方向の分力Fbが生じる。   FIG. 5 is a diagram showing the process of the wire falling from the direction of viewing the wire loop linearly. The right side of the figure is the upstream in the injection of the mold resin 15, and the left is the downstream. Viscous resistance is generated according to the flow of the mold resin 15, and a force F in a direction parallel to the flow is applied to the wire 7. The base of the wire 7 undergoes plastic deformation, and the wire 7 gradually goes to sleep. At this time, a component force Fa in the direction in which the wire 7 is stretched and a component force Fb in the direction in which the wire 7 is tilted are generated with respect to the direction of the viscous resistance by the mold resin 15.

ワイヤ7が倒れていくと、ワイヤ7を倒そうとする方向の分力Fbが小さくなり、接続部の根元が弾性範囲になるまで分力Fbが小さくなったところで飽和する。この時、全長が大きいワイヤ7ほど、同じワイヤループ高さであっても、鉛直方向から見て、ワイヤ7が倒れた距離が大きい傾向にあった。これは、ワイヤ7の接続部の根元が塑性変形してワイヤ7が弧を倒した形状になっているが、ワイヤ長さが短いほど、より弾性変形範囲となり、倒れる幅が狭くなり、ワイヤ長さが大きいほど倒れる幅が大きくなるためと考えられる。   As the wire 7 falls, the component force Fb in the direction in which the wire 7 is intended to fall becomes smaller, and saturates when the component force Fb becomes smaller until the base of the connecting portion reaches the elastic range. At this time, as the wire 7 has a larger overall length, even when the wire loop height is the same, the distance at which the wire 7 collapses tends to be larger when viewed from the vertical direction. This is because the base of the connecting portion of the wire 7 is plastically deformed so that the wire 7 is tilted. However, the shorter the wire length, the more the elastic deformation range becomes. This is probably because the greater the height, the greater the width of the fall.

すなわち、ワイヤ7の配列を図4のようにモールド樹脂15の上流側から下流側に向けてワイヤ長が大きくなるように配置することで、ワイヤ7間のクリアランスがより広がる方向となり、最小限のスペースを用意すれば良いため、樹脂封止型電力用半導体装置をより小型化することが可能である。   That is, the arrangement of the wires 7 is arranged so that the wire length increases from the upstream side to the downstream side of the mold resin 15 as shown in FIG. Since it is sufficient to prepare a space, the resin-encapsulated power semiconductor device can be further downsized.

ワイヤ7の全長は、ワイヤ7の水平方向の長さとワイヤループ高さにより決定される。ワイヤ長さ20mm以上では特にワイヤ7の移動が大きいが、ワイヤループ高さはモールド金型の厚さの制約を受けるため、基本的には同じ高さ、具体的には2mm〜4mm程度にすることになる。すなわち、ワイヤ7が金型上面に接触すると、ワイヤ7が摩擦によって流されなくなるという現象が発生し、金型上面に接するか否かでワイヤ7の移動量が大きく変化するため制御が困難となる上に、金型に接した場合、電力用半導体装置の上面に配線部材であるアルミワイヤが露出してしまうため、製品としては不良となる。このため、ワイヤ7は金型上面に対してある程度のクリアランスが必要である。   The total length of the wire 7 is determined by the horizontal length of the wire 7 and the wire loop height. When the wire length is 20 mm or more, the movement of the wire 7 is particularly large, but the wire loop height is basically limited to the same height, specifically about 2 mm to 4 mm, because it is restricted by the thickness of the mold. It will be. That is, when the wire 7 comes into contact with the upper surface of the mold, a phenomenon occurs in which the wire 7 does not flow due to friction, and the amount of movement of the wire 7 greatly changes depending on whether or not it comes into contact with the upper surface of the mold. On the other hand, when it comes into contact with the mold, the aluminum wire as the wiring member is exposed on the upper surface of the power semiconductor device, so that the product becomes defective. For this reason, the wire 7 needs a certain amount of clearance with respect to the upper surface of the mold.

ワイヤ7のループ高さは、機械的な再現性に富み、通常は±0.2mm程度に収まるほどの精度が実験検証を行った時点で実現可能であった。ところがワイヤのフィード系統に用いられる樹脂パーツ、具体的にはワイヤガイドと呼ばれるツール先端にワイヤを誘導する穴の開いた部材やワイヤを通す樹脂のチューブなどの部材があるが、これらはワイヤを送り出す際の摩耗により擦動抵抗が変化する。すなわちワイヤループ高さは通常は±0.2mmの範囲で変動するが、長期的には±0.5mm程度の変動が生じるものである。   The loop height of the wire 7 is rich in mechanical reproducibility, and can be realized at the time when the experiment verification is performed so that the accuracy is usually within about ± 0.2 mm. However, there are resin parts used in the wire feed system, specifically members called holes that guide the wire at the tip of the tool, called wire guides, and resin tubes that pass through the wire. The frictional resistance changes due to wear. That is, the wire loop height usually varies in the range of ± 0.2 mm, but in the long term, it varies by about ± 0.5 mm.

よって、ワイヤループ高さは、金型上面に対して最低限0.5mm+絶縁上必要な樹脂厚さ分の距離を確保する必要がある。エポキシ樹脂の場合、例えば、0.2mm程度の樹脂厚を確保することで上面に導電性の接触物がない場合絶縁性を確保できたため、好ましくは合計0.7mm以上のクリアランスを確保しておくことが必要である。すなわち、ワイヤループ高さには制約があり、自在の高さを実現できないため、上記の制約を意識して高さを設定する必要がある。   Therefore, the wire loop height needs to ensure a distance of at least 0.5 mm + the resin thickness necessary for insulation with respect to the upper surface of the mold. In the case of an epoxy resin, for example, by ensuring a resin thickness of about 0.2 mm, if there is no conductive contact on the upper surface, insulation can be ensured, and preferably a total clearance of 0.7 mm or more is preferably secured. It is necessary. That is, there is a restriction on the height of the wire loop, and a free height cannot be realized. Therefore, it is necessary to set the height in consideration of the above restriction.

隣接する長さの異なるワイヤ7の組に関して、モールド樹脂15の流動に伴うワイヤ7の変形があっても隣のワイヤ7との距離をワイヤループ高さ以上に確保すれば、隣接するワイヤ7同士の接触を回避できる。すなわち、お互いに干渉しない最低限のワイヤ7の流れる距離のクリアランスを開ければ、複数の組を配置しても同様の効果を発揮できる。   Regarding the set of adjacent wires 7 having different lengths, even if the wire 7 is deformed due to the flow of the mold resin 15, if the distance between the adjacent wires 7 is ensured to be equal to or higher than the wire loop height, the adjacent wires 7 Can be avoided. That is, the same effect can be exhibited even if a plurality of sets are arranged by opening a minimum clearance of the distance through which the wires 7 do not interfere with each other.

実施の形態2.
図6は、本発明に係る電力用半導体装置の実施の形態2のワイヤを示す図である。本実施の形態では、隣接するワイヤ7に関して、一次接続側7aと二次接続側7bの並び方、すなわちワイヤループを引く方向を揃えている。すなわち、一次接続側7aから二次接続側7bへの向きは、複数のワイヤ7で揃えられている。
Embodiment 2. FIG.
FIG. 6 is a diagram showing the wires of the power semiconductor device according to the second embodiment of the present invention. In the present embodiment, with respect to the adjacent wires 7, the arrangement of the primary connection side 7a and the secondary connection side 7b, that is, the direction of drawing the wire loop is aligned. That is, the direction from the primary connection side 7 a to the secondary connection side 7 b is aligned by the plurality of wires 7.

弧の形状はワイヤループ高さとワイヤ長さとの影響を受けて決まる。ところで、ワイヤループの高さは実際にはワイヤボンド装置のヘッドの軌跡をNC(Number Control)制御することで加工している。通常の軌跡としては、一次接続側7aをボンディングした後、垂直にツールを移動させ、所定の高さになった後にワイヤを繰り出しながら水平に移動し、その後二次接続の高さまでツールを下降させる。ツールを水平に移動する過程でワイヤ7は一次接続している箇所が固定され、そこからワイヤボンドツールに付随しているワイヤガイドとの間を結ぶ線を若干曲線上に延びて引き出される。   The shape of the arc is determined by the influence of the wire loop height and the wire length. By the way, the height of the wire loop is actually processed by NC (Number Control) control of the trajectory of the head of the wire bonding apparatus. As a normal trajectory, after bonding the primary connection side 7a, the tool is moved vertically, moved to the horizontal while feeding the wire after reaching a predetermined height, and then lowered to the height of the secondary connection. . In the process of moving the tool horizontally, the primary connection portion of the wire 7 is fixed, and a line connecting with the wire guide attached to the wire bond tool extends slightly on the curve and is drawn out.

まず一次接続が行われた後、ツール及びワイヤガイドは垂直に上昇する。この時ワイヤも垂直に引き出される。その後ツール及びワイヤガイドが水平に移動するにしたがって角度が寝てくる。この時の変形は一次接続している領域からワイヤループが繋がっている領域の間のいわゆるネック部と呼ばれる一次接続によりワイヤ7が変形したツールの形状が転写された領域の端部となる。ツール及びワイヤガイドが移動するにしたがって、この部分が塑性変形する。そして二次接続に向けてツール及びワイヤガイドが降下する際にはワイヤガイドから一次接続の根元までの距離が短くなっていくが、ワイヤガイドから繰り出されたワイヤは後戻りすることがない程度の張力しかかけられていないためワイヤが弛んでくる。そのため二次接続の高さまでツール及びワイヤガイドが下降したときに弧が形成されることとなる。ワイヤが最も繰り出される長さはおよそ一次接続からの上昇高さと水平方向の距離の二乗の和の平方根によって決まる(三平方の定理)。   After the primary connection is made first, the tool and wire guide are raised vertically. At this time, the wire is also pulled out vertically. The angle then falls as the tool and wire guide move horizontally. The deformation at this time becomes an end portion of the region where the shape of the tool in which the wire 7 is deformed by the primary connection called a neck portion between the region where the wire loop is connected to the region where the wire loop is connected is transferred. As the tool and wire guide move, this part plastically deforms. When the tool and wire guide are lowered toward the secondary connection, the distance from the wire guide to the root of the primary connection is shortened, but the wire drawn from the wire guide has a tension that does not return. The wire is loosened because it is only applied. Therefore, an arc is formed when the tool and wire guide are lowered to the height of the secondary connection. The length by which the wire is drawn most is determined by the square root of the sum of the raised height from the primary connection and the square of the horizontal distance (three square theorem).

二次接続後の一次接続と二次接続との間の距離に対して、ワイヤ7が繰り出された長さが大きくなるため、この差により弧の形状が決定される。一次接続側7aの根元が塑性変形によって変形してきた結果として、いわゆるスプリングバックと呼ばれる弾性変形分の戻り不足が生じるのに対して、二次接続側7bではそのような根元形状の形成は二次接続によって初めて生じ、かつその後ワイヤ7の変形はないため、スプリングバックは発生せず、結果として一次接続側7aの根元と二次接続側7bの根元とを比較すると、一次接続側が立った不均等な弧が形成される。すなわち、弧のうち最も高い頂部7cは弧の中央よりも一次接続側7aに若干ずれた位置に形成される。   Since the length by which the wire 7 is drawn out becomes large with respect to the distance between the primary connection and the secondary connection after the secondary connection, the arc shape is determined by this difference. As a result of the deformation of the base of the primary connection side 7a due to plastic deformation, an insufficient return of elastic deformation called so-called spring back occurs, whereas the formation of such a root shape is secondary on the secondary connection side 7b. Springback does not occur because it occurs for the first time after connection and the wire 7 is not deformed thereafter. As a result, when the root of the primary connection side 7a is compared with the root of the secondary connection side 7b, the primary connection side is unequal. Arcs are formed. That is, the highest top portion 7c of the arc is formed at a position slightly shifted to the primary connection side 7a from the center of the arc.

このように、ワイヤ7のループ形状は、一次接続側7aと二次接続側7bとでは一次接続側7aの方が角度が立つため、ワイヤループを引く方向を揃えることにより、同じ長さのワイヤ7を並列に配線する場合でも、ループの頂部7cの位置を揃えることができ、ワイヤ7間のクリアランスを確保できる。すなわち、図6に示したように、ワイヤループを引く方向を揃えてワイヤ7をボンディングした場合は、並行間隔を維持できるため、隣接するワイヤ7間の距離をより近づけることが可能となる。これにより、樹脂封止型電力用半導体装置を小型化できる。   Thus, since the primary connection side 7a is more inclined at the primary connection side 7a and the secondary connection side 7b, the wire 7 has the same length by aligning the direction of drawing the wire loop. Even when the wires 7 are wired in parallel, the position of the top portion 7c of the loop can be made uniform, and the clearance between the wires 7 can be secured. That is, as shown in FIG. 6, when the wires 7 are bonded in the same direction in which the wire loops are drawn, the parallel spacing can be maintained, so that the distance between the adjacent wires 7 can be made closer. Thereby, the resin-encapsulated power semiconductor device can be reduced in size.

図7は、一次接続と二次接続を交互に入れ替えて配線した状態を示す図である。一次接続側7aと二次接続側7bとを交互に入れ替えて配線した場合、ループの頂部7cの位置が交互に変わってしまい、間隔を詰めて隣接するワイヤ7を配置した場合にワイヤ7同士の距離が近くなる。したがって、ワイヤ7同士の短絡を防ぎ、絶縁距離を確保するためには、ワイヤ7の間隔を広くしておかなければならず、電力用半導体装置の小型化の妨げとなる。   FIG. 7 is a diagram illustrating a state in which the primary connection and the secondary connection are alternately switched and wired. When the primary connection side 7a and the secondary connection side 7b are alternately switched and wired, the position of the top portion 7c of the loop is alternately changed, and when the adjacent wires 7 are arranged with a close interval, the wires 7 The distance gets closer. Therefore, in order to prevent a short circuit between the wires 7 and to secure an insulation distance, the interval between the wires 7 must be widened, which hinders the miniaturization of the power semiconductor device.

実施の形態3.
実施の形態3においては、隣接するワイヤに関して、ワイヤループ高さをモールド樹脂の流れの下流側となるワイヤほど高く設定した。ワイヤループ高さをワイヤごとに変更することは、NC制御による一次接続後の上昇高さ設定により容易に実現可能である。下流側のワイヤほど大きく倒れるため、ワイヤが倒れても下流側のワイヤが上流側のワイヤから遠ざかることになる。したがって、隣接するワイヤ間の配置を詰めてもワイヤ間の接触が起こりにくくなるため、樹脂封止型電力用半導体装置を小型化できる。
Embodiment 3 FIG.
In Embodiment 3, with respect to adjacent wires, the wire loop height is set higher for the wire on the downstream side of the mold resin flow. Changing the wire loop height for each wire can be easily realized by setting the rising height after the primary connection by NC control. Since the downstream wire falls more greatly, even if the wire falls, the downstream wire moves away from the upstream wire. Therefore, even if the arrangement between adjacent wires is narrowed, the contact between the wires is less likely to occur, so that the resin-encapsulated power semiconductor device can be reduced in size.

実施の形態4.
図8は、実施の形態4に係る電力半導体装置を製造するためのモールド金型の断面図である。金型10は、上型11と下型12との間にキャビティ13が形成される構造であり、上型11からキャビティ13内に可動ピン8を出没させる可動ピン駆動機構14を備えている。
Embodiment 4 FIG.
FIG. 8 is a cross-sectional view of a mold for manufacturing the power semiconductor device according to the fourth embodiment. The mold 10 has a structure in which a cavity 13 is formed between an upper mold 11 and a lower mold 12, and includes a movable pin driving mechanism 14 that causes the movable pin 8 to protrude from the upper mold 11 into the cavity 13.

可動ピン8は、モールド樹脂15の注入前にはキャビティ13内に突出するように可動ピン駆動機構14によって下げられている。   The movable pin 8 is lowered by the movable pin driving mechanism 14 so as to protrude into the cavity 13 before the molding resin 15 is injected.

可動ピン8は、隣接するワイヤ7の間に配置する。可動ピン8がキャビティ13内に下ろされた状態でモールド樹脂15が注入されるが、可動ピン8の上流側にあるワイヤ7は可動ピン8に接触するため、可動ピン8に当接した箇所ではそれ以上下流側に流れることはない。すなわちワイヤ7は一次接続部と可動ピン8によって規定される弧と、可動ピン8と二次接続部とによって規定される弧とを組み合わせた形状をとる。下流側のワイヤ7は可動ピン8に当接しないため、より下流側に流される。これによってワイヤ7間の距離が狭くなることはないため、より高密度にワイヤ7を配置することができる。図9は、モールド樹脂15の注入を完了した状態を示す図である。   The movable pin 8 is disposed between the adjacent wires 7. The mold resin 15 is injected with the movable pin 8 lowered into the cavity 13, but the wire 7 on the upstream side of the movable pin 8 comes into contact with the movable pin 8. It will not flow further downstream. That is, the wire 7 has a shape in which an arc defined by the primary connection portion and the movable pin 8 and an arc defined by the movable pin 8 and the secondary connection portion are combined. Since the downstream wire 7 does not come into contact with the movable pin 8, it flows more downstream. As a result, the distance between the wires 7 does not become narrow, so that the wires 7 can be arranged with higher density. FIG. 9 is a view showing a state where the injection of the mold resin 15 is completed.

樹脂が注入完了する前後に可動ピン駆動機構14によって上昇させられてキャビティ13から抜き取られる。   The resin is raised by the movable pin drive mechanism 14 before and after the injection is completed and is extracted from the cavity 13.

樹脂注入が完全に終了し、樹脂が硬化した後にキャビティ13から抜き取った場合、可動ピン8が存在していた空間にモールド樹脂15は存在しないが、モールド樹脂15の硬化が完了する前に可動ピン8をキャビティ13から抜くことで、極わずかであっても樹脂が流動性を有するため、可動ピン8が存在していた空間に樹脂が充填されることになる。   When the resin injection is completed and the resin is cured and then extracted from the cavity 13, the mold resin 15 does not exist in the space where the movable pin 8 was present, but before the mold resin 15 is cured, the movable pin By removing 8 from the cavity 13, the resin has fluidity even in a very small amount, so that the space in which the movable pin 8 was present is filled with the resin.

例えば、モールド樹脂15の注入が完了した時点で可動ピン8をキャビティから引き抜くと、成形圧力が継続して与えられているため、可動ピン8があった空間には樹脂が充填される。図10は、可動ピンがあった空間に樹脂が充填された状態を示す図である。   For example, when the movable pin 8 is pulled out from the cavity when the injection of the mold resin 15 is completed, the molding pressure is continuously applied, so that the space where the movable pin 8 was filled is filled with resin. FIG. 10 is a diagram illustrating a state in which the space in which the movable pin is located is filled with resin.

図11は、モールド樹脂充填前後のワイヤの形状を示す図である。結果として、図11に示すように、ワイヤ7は可動ピン8と当接していた位置で弧がふたこぶになる形状になり、ワイヤ7間のクリアランスをより接近させることができるようになる。   FIG. 11 is a diagram showing the shape of the wire before and after filling with the mold resin. As a result, as shown in FIG. 11, the wire 7 has a shape in which the arc becomes a lid at the position where the wire 7 is in contact with the movable pin 8, and the clearance between the wires 7 can be made closer.

本実施の形態による電力用半導体は可動ピンの痕がモールド金型上面に接していた面に残る。可動ピンが曲がると、可動ピンを引き抜くときに折れるため、ある程度強度が必要である。具体的には例えば直径2mmの鋼鉄製などで必要な強度を発揮できる。可動ピンの直下に部品がない場合、電力用半導体装置のパワー素子を配置しているリードフレームや絶縁基板の表面にあたらない領域までピンを下降させることができる。しかしながら、例えばリードフレームの下に樹脂絶縁シートを配置し、リードフレームと絶縁シートをモールド樹脂15で成形する際に同時に接着硬化させるプロセスを用いる形態の電力用半導体装置の場合において、モールド樹脂15の金型への注入がほぼ完了した時点でピンを引き抜くと、モールド樹脂15の圧力が急激に下がってしまい、絶縁シートへの加圧力が低下し、絶縁シートの絶縁性が十分発揮できないという課題が生じる。すなわち絶縁シートの絶縁性と接着性を十分発揮させるには、絶縁シートが金型内で加熱され軟化している間にモールド樹脂15の成形圧力が与えられ、絶縁シートが圧縮される必要がある。   In the power semiconductor according to the present embodiment, the trace of the movable pin remains on the surface in contact with the upper surface of the mold. If the movable pin is bent, it will be broken when the movable pin is pulled out, so that some strength is required. Specifically, the required strength can be exhibited, for example, made of steel having a diameter of 2 mm. When there is no part directly under the movable pin, the pin can be lowered to a region that does not contact the surface of the lead frame or the insulating substrate on which the power element of the power semiconductor device is arranged. However, for example, in the case of a power semiconductor device using a process in which a resin insulating sheet is disposed under a lead frame and the lead frame and the insulating sheet are simultaneously bonded and cured when the lead frame and the insulating sheet are molded with the mold resin 15, If the pin is pulled out when the injection into the mold is almost completed, the pressure of the mold resin 15 drops rapidly, the pressure applied to the insulating sheet is lowered, and the insulation of the insulating sheet cannot be sufficiently exhibited. Arise. That is, in order to sufficiently exhibit the insulating properties and adhesiveness of the insulating sheet, it is necessary to apply the molding pressure of the mold resin 15 while the insulating sheet is heated and softened in the mold and to compress the insulating sheet. .

このプロセスによれば絶縁シートが厚み方向に圧縮されるので、そのような工程を経たことの痕跡が残る。可動ピンの可動体積が大きいほど、圧力が失われる関係にあることから、可動ピンの移動高さは大きくしたくないという事情がある。また可動ピンの直径も大きくしたくないという事情がある。すなわち可動ピンの強度を大きくすることは絶縁シートを用いるタイプの樹脂封止型電力用半導体装置においては得策でないといえる。可動ピンの直径としては上記の二つの理由、すなわちピンの強度と容積変化の観点から直径1.5mm〜3mmの間が適正であった。   According to this process, the insulating sheet is compressed in the thickness direction, so that a trace of such a process remains. Since there is a relationship in which the pressure is lost as the movable volume of the movable pin is larger, there is a situation where it is not desired to increase the moving height of the movable pin. There is also a circumstance that the diameter of the movable pin does not want to be increased. That is, it can be said that increasing the strength of the movable pin is not a good measure in a resin-encapsulated power semiconductor device using an insulating sheet. As the diameter of the movable pin, a diameter of 1.5 mm to 3 mm was appropriate from the above two reasons, that is, from the viewpoint of pin strength and volume change.

可動ピン8をキャビティ13から引き抜きかなかった場合、可動ピン8に接触していた箇所でワイヤ7が露出してしまうため、結果として電力用半導体装置の表面のピンの痕内に接してワイヤ7が露出することになり、絶縁性の観点で沿面放電距離を大きくする必要が生じるため得策ではない。可動ピン8をワイヤ7に接触しない位置まで引き抜くことで、可動ピン8の痕の領域にワイヤ7が露出しない状態を達成でき、ワイヤ7の露出を防止できる。このように、可動ピンを下ろす工程、モールド樹脂15を注入する工程、モールド樹脂15の硬化前に可動ピンを引き抜く工程を備えたことで、モールド樹脂15注入時に可動ピン8に接してワイヤ7を支持することができ、ワイヤ間の距離を確保できるため電力用半導体装置を小型化できた。   If the movable pin 8 is not pulled out from the cavity 13, the wire 7 is exposed at the place where it is in contact with the movable pin 8. As a result, the wire 7 comes into contact with the pin marks on the surface of the power semiconductor device. Is exposed, and it is necessary to increase the creeping discharge distance from the viewpoint of insulation. By pulling out the movable pin 8 to a position where it does not come into contact with the wire 7, it is possible to achieve a state in which the wire 7 is not exposed in the area of the trace of the movable pin 8, thereby preventing the wire 7 from being exposed. As described above, the step of lowering the movable pin, the step of injecting the mold resin 15, and the step of extracting the movable pin before the mold resin 15 is cured are provided, so that the wire 7 is brought into contact with the movable pin 8 when the mold resin 15 is injected. The power semiconductor device can be miniaturized because it can be supported and the distance between the wires can be secured.

実施の形態5.
本発明の実施の形態5に係る電力用半導体装置に適用されるワイヤ7は、絶縁被覆9を備える。図12は、ワイヤの断面図である。またワイヤボンド装置には絶縁被覆9を剥がす機構を備える。絶縁被覆9を剥がせるようにするために、モールド樹脂15の成形温度よりも融点及び沸点が高く、かつレーザ光の吸収率が高い絶縁性の材料で絶縁被覆9を構成する。ワイヤボンダのツールのワイヤ接続部に対してレーザ光を照射しアブレーション加工により被覆樹脂を除去する。このような絶縁被覆9を有するワイヤ7と絶縁被覆除去機構つきのワイヤボンダにより、絶縁被覆9を有するワイヤ7を用いての配線が可能となる。これによってワイヤ7同士が接触しても、ワイヤループの途中には絶縁被覆9が残っているのでワイヤ7同士の短絡は起こりえない。したがって、隣接するワイヤ間の配置を詰めてもワイヤ7間の接触が起こりにくくなるため、樹脂封止型電力用半導体装置を小型化できる。
Embodiment 5 FIG.
The wire 7 applied to the power semiconductor device according to the fifth embodiment of the present invention includes an insulating coating 9. FIG. 12 is a cross-sectional view of a wire. Further, the wire bonding apparatus is provided with a mechanism for removing the insulating coating 9. In order to peel off the insulating coating 9, the insulating coating 9 is made of an insulating material having a melting point and a boiling point higher than the molding temperature of the mold resin 15 and a high laser light absorption rate. A laser beam is irradiated to the wire connection part of the tool of the wire bonder, and the coating resin is removed by ablation processing. By using the wire 7 having the insulating coating 9 and the wire bonder with the insulating coating removing mechanism, wiring using the wire 7 having the insulating coating 9 becomes possible. As a result, even if the wires 7 come into contact with each other, since the insulating coating 9 remains in the middle of the wire loop, a short circuit between the wires 7 cannot occur. Therefore, even if the arrangement between adjacent wires is reduced, the contact between the wires 7 hardly occurs, and the resin-encapsulated power semiconductor device can be downsized.

以上のように、本発明に係る樹脂封止型電力用半導体装置は、隣接するワイヤ同士の間隔を確保しつつ、小型化できる点で有用である。   As described above, the resin-encapsulated power semiconductor device according to the present invention is useful in that it can be miniaturized while ensuring the interval between adjacent wires.

1 基板、2 リードフレーム、3 半導体素子、4,5,6 電極、7 ワイヤ、7a 一次接続側、7b 二次接続側、7c 頂部、8 可動ピン、9 絶縁被覆、10 金型、11 上型、12 下型、13 キャビティ、14 可動ピン駆動機構、15 モールド樹脂、16 絶縁シート、17 金属ベース、20 樹脂封止型電力用半導体装置。   DESCRIPTION OF SYMBOLS 1 Board | substrate, 2 Lead frame, 3 Semiconductor element, 4, 5, 6 Electrode, 7 Wire, 7a Primary connection side, 7b Secondary connection side, 7c Top part, 8 Movable pin, 9 Insulation coating, 10 Mold, 11 Upper mold , 12 Lower mold, 13 cavity, 14 movable pin driving mechanism, 15 mold resin, 16 insulating sheet, 17 metal base, 20 resin-encapsulated power semiconductor device.

Claims (5)

半導体素子と、該半導体素子への通電用のリードフレームと、前記半導体素子と前記リードフレームとを接続する複数のワイヤとを有し、前記半導体素子、前記リードフレーム及び前記複数のワイヤがモールド樹脂によって封止され、前記複数のワイヤは、前記モールド樹脂の流動方向と交差する方向に延在するように並列に配列されている樹脂封止型電力用半導体装置であって、
前記流動方向の下流側のワイヤの配線長は、前記流動方向の上流側のワイヤの配線長以上であることを特徴とする樹脂封止型電力用半導体装置。
A semiconductor element, a lead frame for energizing the semiconductor element, and a plurality of wires connecting the semiconductor element and the lead frame, wherein the semiconductor element, the lead frame, and the plurality of wires are molded resin The plurality of wires are resin-encapsulated power semiconductor devices arranged in parallel so as to extend in a direction intersecting the flow direction of the mold resin,
The resin-encapsulated power semiconductor device according to claim 1, wherein a wire length of the downstream wire in the flow direction is equal to or longer than a wire length of the upstream wire in the flow direction.
前記複数のワイヤは、一次接続位置から二次接続位置への向きが揃えられていることを特徴とする請求項1に記載の樹脂封止型電力用半導体装置。   The resin-encapsulated power semiconductor device according to claim 1, wherein the plurality of wires are aligned in a direction from a primary connection position to a secondary connection position. 前記複数のワイヤは、絶縁被覆を備えることを特徴とする請求項1又は2に記載の樹脂封止型電力用半導体装置。   The resin-encapsulated power semiconductor device according to claim 1, wherein the plurality of wires include an insulating coating. 前記流動方向の下流側のワイヤほどワイヤループ高さが高いことを特徴とする請求項1から3のいずれか1項に記載の樹脂封止型電力用半導体装置。   4. The resin-encapsulated power semiconductor device according to claim 1, wherein a wire loop height is higher in a downstream wire in the flow direction. 5. 可動ピンを備えた上型と、該上型と係合した際に該上型との間にキャビティが形成される下型とを用いて、並列に配置された複数のワイヤで基板と接続された半導体素子をモールド樹脂で封止した樹脂封止型電力用半導体装置を製造する方法であって、
前記可動ピンの先端が前記複数のワイヤの間に位置するように、前記半導体素子を配置済みの前記キャビティ内に、前記上型から前記可動ピンを突出させる工程と、
前記モールド樹脂が、前記複数のワイヤの並列方向に沿って流動するように前記キャビティ内に前記モールド樹脂を注入し、前記可動ピンに、前記モールド樹脂の流動方向の下流側のワイヤを支持させる工程と、
前記モールド樹脂の硬化が完了する前に、前記可動ピンを前記上型に収容して前記キャビティから抜き取る工程とを有することを特徴とする樹脂封止型電力用半導体装置の製造方法。
Connected to the substrate with a plurality of wires arranged in parallel using an upper mold with a movable pin and a lower mold in which a cavity is formed between the upper mold and the upper mold when engaged with the upper mold A method of manufacturing a resin-encapsulated power semiconductor device in which a semiconductor element is sealed with a mold resin,
Projecting the movable pin from the upper mold into the cavity in which the semiconductor element has been disposed so that the tip of the movable pin is positioned between the plurality of wires;
Injecting the mold resin into the cavity so that the mold resin flows along the parallel direction of the plurality of wires, and allowing the movable pin to support the downstream wire in the flow direction of the mold resin. When,
A method of manufacturing a resin-encapsulated power semiconductor device, comprising: a step of accommodating the movable pin in the upper mold and extracting the mold from the cavity before the curing of the mold resin is completed.
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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108257939A (en) * 2016-12-28 2018-07-06 富士电机株式会社 Semiconductor device and manufacturing method for semiconductor device
CN112397605A (en) * 2019-08-13 2021-02-23 光宝光电(常州)有限公司 Sensing device
US11710802B2 (en) 2019-08-13 2023-07-25 Lite-On Opto Technology (Changzhou) Co., Ltd. Sensing device

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7334655B2 (en) * 2020-03-06 2023-08-29 三菱電機株式会社 semiconductor equipment

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0691118B2 (en) * 1986-11-28 1994-11-14 富士通株式会社 Semiconductor device and manufacturing method thereof
JPH1167808A (en) * 1997-08-21 1999-03-09 Hitachi Ltd Semiconductor device and its manufacture
WO2008081630A1 (en) * 2006-12-29 2008-07-10 Sanyo Electric Co., Ltd. Semiconductor device and method for manufacturing the same
JP2013175609A (en) * 2012-02-27 2013-09-05 Mitsubishi Electric Corp Semiconductor device and method for manufacturing semiconductor device
JP2014033093A (en) * 2012-08-03 2014-02-20 Mitsubishi Electric Corp Power semiconductor device
WO2014046058A1 (en) * 2012-09-20 2014-03-27 ローム株式会社 Power module semiconductor device and inverter device, power module semiconductor device producing method, and mold
JP2014175336A (en) * 2013-03-06 2014-09-22 Mitsubishi Electric Corp Semiconductor device manufacturing method, semiconductor device and semiconductor device manufacturing apparatus

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100265461B1 (en) * 1997-11-21 2000-09-15 윤종용 Semiconductor integrated circuit device having dummy bonding wire
JP4744320B2 (en) * 2005-04-04 2011-08-10 パナソニック株式会社 Lead frame

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0691118B2 (en) * 1986-11-28 1994-11-14 富士通株式会社 Semiconductor device and manufacturing method thereof
JPH1167808A (en) * 1997-08-21 1999-03-09 Hitachi Ltd Semiconductor device and its manufacture
WO2008081630A1 (en) * 2006-12-29 2008-07-10 Sanyo Electric Co., Ltd. Semiconductor device and method for manufacturing the same
JP2013175609A (en) * 2012-02-27 2013-09-05 Mitsubishi Electric Corp Semiconductor device and method for manufacturing semiconductor device
JP2014033093A (en) * 2012-08-03 2014-02-20 Mitsubishi Electric Corp Power semiconductor device
WO2014046058A1 (en) * 2012-09-20 2014-03-27 ローム株式会社 Power module semiconductor device and inverter device, power module semiconductor device producing method, and mold
JP2014175336A (en) * 2013-03-06 2014-09-22 Mitsubishi Electric Corp Semiconductor device manufacturing method, semiconductor device and semiconductor device manufacturing apparatus

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108257939A (en) * 2016-12-28 2018-07-06 富士电机株式会社 Semiconductor device and manufacturing method for semiconductor device
JP2018110169A (en) * 2016-12-28 2018-07-12 富士電機株式会社 Semiconductor device and manufacturing method for semiconductor device
CN112397605A (en) * 2019-08-13 2021-02-23 光宝光电(常州)有限公司 Sensing device
US11710802B2 (en) 2019-08-13 2023-07-25 Lite-On Opto Technology (Changzhou) Co., Ltd. Sensing device

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