JP2015191893A - Thin film transistor and manufacturing method of the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a thin film transistor which can ensure favorable contact characteristics; and provide a manufacturing method of the thin film transistor.SOLUTION: A thin film transistor according to the present embodiment comprises: a first channel layer 40 composed of an n-type metal oxide semiconductor; and a second source/drain electrode 70 which is formed by being laminated on the first channel layer 40, in which sulfide of predetermined metal exists at a boundary between the first channel layer 40 and the second source/drain electrode 70.

Description

  The present invention relates to a thin film transistor and a method for manufacturing the same.

  In recent years, semiconductors using metal oxides (hereinafter referred to as metal oxide semiconductors) have attracted attention. Many metal oxides exhibit semiconductor properties by the addition of oxygen vacancies and appropriate dopants. In particular, a metal oxide semiconductor mainly composed of zinc oxide, indium oxide, gallium oxide, etc. has a feature that the band gap between the valence band and the conduction band is 3 eV or more and is transparent to visible light. Yes. Here, the main component refers to a component in which the ratio existing with respect to the whole is more prominent than the non-main component, for example, a component present in a ratio several tens of times higher than that of the non-main component.

  In addition, such a metal oxide semiconductor has a feature of relatively high mobility even in an amorphous state in which bonds between atoms are disordered, and can be formed by a sputtering method at a low temperature. It has characteristics.

  Taking advantage of the above features, metal oxide semiconductors, particularly indium oxide / gallium oxide / zinc oxide metal oxide semiconductors, have been tried to be applied to channels of thin film transistors used in large-area display displays.

  In addition, in the source / drain electrodes and source / drain wirings used in recent thin film transistors, a reduction in resistance is desired in order to increase the area of the display panel and increase the aperture ratio. Is adopted. Recently, in order to further reduce the resistance, an alloy mainly composed of copper is being adopted.

  Conventionally, in the step of connecting the metal oxide semiconductor and the source / drain electrodes, the oxygen ratio in the metal oxide semiconductor is appropriately adjusted by heating the metal oxide semiconductor in an atmosphere in which the oxygen concentration is controlled, and thereafter An aluminum alloy or a copper alloy to be a source / drain electrode was formed by sputtering.

  When a thin film transistor is formed using a metal oxide semiconductor, the metal oxide semiconductor and the electrode made of the metal thin film are in contact with each other, so that oxygen in the metal oxide semiconductor is combined with the metal in the electrode, Oxygen will be extracted to the electrode. As a result, there is a problem that oxygen in the metal oxide semiconductor is insufficient, the physical properties are changed, and mobility is lowered.

  In particular, in the step of forming the protective film in the upper layer portion of the channel layer, the metal oxide semiconductor and the electrode are heated to a high temperature, so that the degree of oxygen extraction by the electrode is increased. Further, as a result of oxygen being extracted from the metal oxide semiconductor by the electrode, an oxide of the metal in the source / drain electrode is formed at the interface between the source / drain electrode and the metal oxide semiconductor. For example, when an aluminum alloy is used for the source / drain electrodes, there is a problem in that non-conductive aluminum oxide is formed at the interface between the source / drain electrodes and the metal oxide semiconductor, resulting in an increase in contact resistance. .

  When a copper alloy is used for the source / drain electrodes, p-type copper oxide is formed at the interface between the source / drain electrodes and the metal oxide semiconductor. In general, a metal oxide semiconductor mainly composed of zinc oxide, indium oxide, gallium oxide or the like is an n-type, and therefore, a pn junction is formed at the interface between the source / drain electrodes and the metal oxide semiconductor. There has been a problem of inferior characteristics.

On the other hand, a metal oxide semiconductor is used as a transparent conductive film for a pixel electrode of a liquid crystal display, and an upper layer wiring such as a pixel connection wiring is required for connection between the pixel electrode and a source / drain electrode. Here, the upper layer wiring means a wiring for connecting the pixel electrode and the source / drain electrode in the upper layer of the pixel electrode and the source / drain electrode. In such a configuration, when an aluminum alloy is used for the source / drain electrode and the upper layer wiring, an aluminum oxide film is formed at the connection portion between the pixel electrode and the upper layer wiring, and the connection portion between the source / drain electrode and the upper layer wiring. In addition, an aluminum oxide film derived from a natural oxide film was formed, and these aluminum oxide films were a factor for increasing the contact resistance.

  Conventionally, as a countermeasure against the above-described problem, a metal oxide semiconductor layer containing indium, gallium, and zinc having a carrier concentration higher than that of the metal oxide semiconductor layer between the source / drain electrodes and the metal oxide semiconductor layer is used. A technique for forming a metal oxide layer as a buffer layer is disclosed (see, for example, Patent Document 1).

JP 2010-56539 A

  In Patent Document 1, when the oxide in the metal oxide layer is an insulator or a metal that becomes a p-type semiconductor, good contact characteristics cannot be ensured.

  The present invention has been made to solve such a problem, and an object of the present invention is to provide a thin film transistor capable of ensuring good contact characteristics and a method for manufacturing the same.

  In order to solve the above problems, a thin film transistor according to the present invention is formed in advance by forming an n-type metal oxide semiconductor layer made of an n-type metal oxide semiconductor and a stack formed on the n-type metal oxide semiconductor layer. A predetermined metal sulfide is present at the interface between the n-type metal oxide semiconductor layer and the predetermined metal-based layer. It is characterized by.

  The thin film transistor manufacturing method according to the present invention includes (a) a step of forming an n-type metal oxide semiconductor layer made of an n-type metal oxide semiconductor, and (b) a process for forming an n-type metal oxide semiconductor layer. A step of performing plasma irradiation using sulfur fluoride gas; and (c) after step (b), a main component is a predetermined metal on the surface of the n-type metal oxide semiconductor layer that has been subjected to plasma irradiation. Forming a layer.

  The thin film transistor according to the present invention includes a first wiring layer mainly composed of aluminum, and a second wiring layer made of metal formed by being stacked on the first wiring layer, and includes a first wiring layer. Aluminum sulfide is present at the interface between the layer and the second wiring layer.

  The thin film transistor manufacturing method according to the present invention uses (a) a step of forming a first wiring layer containing aluminum as a main component, and (b) using sulfur hexafluoride gas for the first wiring layer. A step of performing plasma irradiation; and (c) a step of forming a second wiring layer made of metal on the surface of the first wiring layer that has been subjected to plasma irradiation after step (b).

  According to the present invention, the thin film transistor includes an n-type metal oxide semiconductor layer made of an n-type metal oxide semiconductor, and a predetermined metal formed on the n-type metal oxide semiconductor layer as a main component. A predetermined metal sulfide is present at the interface between the n-type metal oxide semiconductor layer and a layer containing a predetermined metal as a main component, ensuring good contact characteristics. It becomes possible to do.

  The thin film transistor manufacturing method includes (a) a step of forming an n-type metal oxide semiconductor layer made of an n-type metal oxide semiconductor, and (b) sulfur hexafluoride with respect to the n-type metal oxide semiconductor layer. A step of performing plasma irradiation using a gas; and (c) after step (b), a layer containing a predetermined metal as a main component is formed on the surface of the n-type metal oxide semiconductor layer that has been subjected to plasma irradiation. Therefore, it is possible to ensure good contact characteristics.

  The thin film transistor includes a first wiring layer mainly composed of aluminum, and a second wiring layer made of a metal formed by being stacked on the first wiring layer. Since aluminum sulfide is present at the interface with the two wiring layers, it is possible to ensure good contact characteristics.

  In addition, the thin film transistor manufacturing method includes (a) a step of forming a first wiring layer mainly composed of aluminum, and (b) plasma irradiation using sulfur hexafluoride gas on the first wiring layer. And (c) a step of forming a second wiring layer made of a metal on the surface of the first wiring layer that has been subjected to plasma irradiation after the step (b). It can be secured.

It is a figure which shows an example of a structure of the thin-film transistor by Embodiment 1 of this invention. It is a figure which shows an example of the manufacturing process of the thin-film transistor by Embodiment 1 of this invention. It is a figure which shows an example of the manufacturing process of the thin-film transistor by Embodiment 1 of this invention. It is a figure which shows an example of the manufacturing process of the thin-film transistor by Embodiment 1 of this invention. It is a figure which shows an example of the manufacturing process of the thin-film transistor by Embodiment 1 of this invention. It is a figure which shows an example of the manufacturing process of the thin-film transistor by Embodiment 1 of this invention. It is a figure which shows an example of the manufacturing process of the thin-film transistor by Embodiment 1 of this invention. It is a figure which shows an example of the manufacturing process of the thin-film transistor by Embodiment 1 of this invention. It is a figure which shows an example of the manufacturing process of the thin-film transistor by Embodiment 1 of this invention. It is a figure which shows an example of the manufacturing process of the thin-film transistor by Embodiment 1 of this invention. It is a figure which shows an example of a structure of the thin-film transistor by Embodiment 2 of this invention. It is a figure which shows an example of the manufacturing process of the thin-film transistor by Embodiment 2 of this invention. It is a figure which shows an example of the manufacturing process of the thin-film transistor by Embodiment 2 of this invention. It is a figure which shows an example of the manufacturing process of the thin-film transistor by Embodiment 2 of this invention. It is a figure which shows an example of the manufacturing process of the thin-film transistor by Embodiment 2 of this invention. It is a figure which shows an example of the manufacturing process of the thin-film transistor by Embodiment 2 of this invention. It is a figure which shows an example of the manufacturing process of the thin-film transistor by Embodiment 2 of this invention. It is a figure which shows an example of the manufacturing process of the thin-film transistor by Embodiment 2 of this invention. It is a figure which shows an example of the manufacturing process of the thin-film transistor by Embodiment 2 of this invention. It is a figure which shows an example of the manufacturing process of the thin-film transistor by Embodiment 2 of this invention. It is a figure which shows an example of a structure of the thin-film transistor by Embodiment 3 of this invention. It is a figure which shows an example of the manufacturing process of the thin-film transistor by Embodiment 3 of this invention. It is a figure which shows an example of the manufacturing process of the thin-film transistor by Embodiment 3 of this invention. It is a figure which shows an example of the manufacturing process of the thin-film transistor by Embodiment 3 of this invention. It is a figure which shows an example of the manufacturing process of the thin-film transistor by Embodiment 3 of this invention. It is a figure which shows an example of the manufacturing process of the thin-film transistor by Embodiment 3 of this invention. It is a figure which shows an example of the manufacturing process of the thin-film transistor by Embodiment 3 of this invention. It is a figure which shows an example of the manufacturing process of the thin-film transistor by Embodiment 3 of this invention. It is a figure which shows an example of the manufacturing process of the thin-film transistor by Embodiment 3 of this invention. It is a figure which shows an example of the manufacturing process of the thin-film transistor by Embodiment 3 of this invention. It is a figure which shows an example of the manufacturing process of the thin-film transistor by Embodiment 3 of this invention.

  Embodiments of the present invention will be described below with reference to the drawings.

<Basic principle>
First, the technology that is the basic principle of the present invention will be described.

  In the case of a solid substance in the standard state, the magnitude relationship of the chemical bond energy is the same as the magnitude relationship of the standard generation enthalpy.

Here, the standard generation enthalpy of copper oxide (CuO ₂ ) is −39.84 kcal / mol, the standard generation enthalpy of copper sulfide (CuS as a typical example) is −11.06 kcal / mol, and aluminum oxide (corundum type Al ₂ O _3). ) Has a standard production enthalpy of −399.09 kcal / mol, and aluminum sulfide (Al ₂ S ₃ ) has a standard production enthalpy of −121.6 kcal / mol.

  In the case of the above substances, it can be considered that the lower the standard enthalpy value, the stronger the chemical bond energy and the easier the chemical reaction occurs.

  For example, when the single copper is combined with oxygen to become copper oxide, the likelihood of copper oxide being −39.84, copper sulfide decomposes into sulfur and copper, and the decomposed copper combines with oxygen. What is necessary is just to consider that the ease of becoming copper oxide in the case of becoming copper oxide is -39.84-(-11.06) =-28.78. In this way, when comparing single copper and copper sulfide, it can be seen that copper sulfide is clearly less likely to bind to oxygen and oxidation reaction is less likely to occur (not easily oxidized).

  Similarly, when aluminum alone is combined with oxygen to form aluminum oxide, the ease of forming aluminum oxide is -399.09, aluminum sulfide decomposes into sulfur and aluminum, and the decomposed aluminum combines with oxygen. Thus, it can be considered that the ease of aluminum oxide formation in the case of aluminum oxide is −399.09 − (− 121.6) = − 277.49. In this way, when comparing single aluminum and aluminum sulfide, it can be seen that aluminum sulfide is less likely to be oxidized.

  Based on the above principle, the source and drain electrodes in the thin film transistor are made of copper sulfide or aluminum sulfide to prevent the metal elements contained in the source and drain electrodes from extracting oxygen atoms contained in the metal oxide semiconductor. Prevents metal oxide semiconductor characteristics from deteriorating due to oxygen abstraction and the formation of copper oxide as a p-type semiconductor or aluminum oxide as a nonconductor at the interface between the source / drain electrodes and the metal oxide semiconductor. The contact resistance can be reduced.

  Further, by applying copper sulfide or aluminum sulfide to the connection portion that connects the aluminum alloys, it is possible to prevent the formation of a non-conductive aluminum oxide film on the wiring connection portion, for example, with a band gap of 4.1 eV. Since aluminum alloys are connected to each other through aluminum sulfide that is an n-type semiconductor, good contact characteristics can be ensured.

  In the following first to third embodiments, a thin film transistor in which copper sulfide or aluminum sulfide is applied to a connection portion for connecting source / drain electrodes and aluminum alloys will be described.

<Embodiment 1>
First, the configuration of the thin film transistor according to the first embodiment of the present invention will be described.

  FIG. 1 is a diagram showing an example of the configuration of the thin film transistor according to the first embodiment.

As shown in FIG. 1, the thin film transistor includes a transparent insulating substrate 10 such as glass, a gate electrode 20, a gate insulating film 30 made of SiO _2, and a first channel layer 40 (n-type metal oxide semiconductor layer). A second channel layer 50, a first source / drain electrode 60, and a second source / drain electrode 70.

The first channel layer 40 is composed of InGaZnO ₄ which is an n-type metal oxide semiconductor.

In the second channel layer 50, InGaZnO ₄ that is a metal oxide semiconductor is made of a material in which at least one metal element is dissolved or substituted by a sulfide semiconductor such as indium sulfide, gallium sulfide, or zinc sulfide. It is a semiconductor film.

  The first source / drain electrode 60 is made of a metal sulfide exhibiting the characteristics of an n-type semiconductor or a good conductor, for example, copper sulfide. That is, the first source / drain electrode 60 is mainly composed of copper sulfide (predetermined metal sulfide).

  Here, the composition ratio of sulfur and copper in copper sulfide will be described.

In general, two types of copper sulfide are widely known: Cu ₂ S (copper sulfide (I)) and CuS (copper sulfide (II)). Actually, only copper sulfide minerals that are naturally produced are Cu ₂ S (Pincite), Cu _1.97 S (Duleyite), Cu ₃₉ S ₂₈ (Spiocorpite), CuS (Covelin), Cu ₇ S ₈ (Anhi) It is known that there are various combinations of composition ratios between Cu ₂ S and CuS. Further, as will be understood later, the actual sulfur concentration gradually decreases as the distance from the interface between the source / drain electrodes and the channel layer increases. Therefore, in the first embodiment, it is assumed that copper sulfide exists in a region where the molar ratio of copper to sulfur satisfies the range of 2: 1 to 7: 8 at the interface between the source / drain electrodes and the channel layer. .

  The second source / drain electrode 70 is made of an alloy mainly composed of copper (a predetermined metal).

  Next, a method for manufacturing a thin film transistor will be described with reference to FIGS.

  In FIG. 2, the transparent insulating substrate 10 is cleaned using a cleaning liquid or pure water to form a metal film (not shown). As the metal film, for example, Cr, Mo, Ti, W, Al, an alloy obtained by adding a small amount of other substances to these, or the like is used. Among these, since the Al-based alloy has a lower specific resistance value than other metals, the wiring resistance can be lowered. Accordingly, an Al-based alloy is preferable for application to a TFT (Thin Film Transistor) substrate for a liquid crystal display device.

  In the first embodiment, an Al-3 at% Ni alloy to which 3 at% Ni is added as a metal film is formed to a thickness of 200 nm by a sputtering method using a known argon (Ar) gas. Thereafter, a photoresist pattern is formed in the first photolithography process, and the photoresist pattern is removed by wet etching with a known phosphoric acid + nitric acid + acetic acid solution using this as a mask, as shown in FIG. A gate electrode 20 is formed.

In FIG. 4, a 300 nm SiO ₂ film is formed as the gate insulating film 30 under a substrate heating condition of about 450 ° C. (Celsius, the same applies hereinafter) using a chemical vapor deposition (CVD) method. .

In FIG. 5, fine powders of indium oxide (In ₂ O ₃ ), gallium oxide (β-Ga ₂ O ₃ ), and zinc oxide (ZnO) are prepared so as to have a molar ratio of 1: 2: 2, and then organic A thin film 41 made of InGaZnO ₄ is formed to 200 nm by DC sputtering using a sputtering target obtained through pre-firing and main firing after mixing and shaping with a binder, and using a gas in which Ar is mixed with a small amount of oxygen. Film.

  In the step shown in FIG. 5, for example, an InGaZn alloy target is used for film formation, and a desired gas film is formed by reactive sputtering using a mixed gas of argon gas and oxygen gas as a sputtering gas. It may be.

  In FIG. 6, after forming a photoresist pattern in the second photoengraving process, etching is performed with phosphoric acid, nitric acid and acetic acid heated to 80 ° C., and then the photoresist is peeled off, whereby the inverted staggered thin film transistor is formed. A first channel layer 40 to be a channel is formed.

In FIG. 7, sulfur hexafluoride (SF ₆ ) gas plasma is irradiated from the upper side of the transparent insulating substrate 10 on the first channel layer 40 side. Plasma irradiation is performed using a parallel plate type dry etching apparatus for 90 seconds at an anode coupling with a gas pressure of 30 Pa and a power density of 1.64 watts / square centimeter.

  The photoresist slightly remaining on the surface of the first channel layer 40 is removed by decomposition and vaporization by fluorine radicals by the sulfur hexafluoride plasma treatment, and the first channel is removed as shown in FIG. On the surface of the layer 40, a sulfur atom layer 61 derived from sulfur radicals generated from sulfur hexafluoride plasma is deposited extremely thinly in the range of about 0.5 nm to 10 nm.

  In FIG. 8, using a copper alloy target, a wiring film made of a copper alloy film 71 is formed to a thickness of 200 nm by a DC sputtering method at a substrate temperature of 100 ° C.

  In FIG. 9, a photoresist pattern is formed by the third photolithography process, and the copper alloy film 71 is etched by a wet etching method using hydrogen peroxide solution or the like as an etching solution using this as a mask. By performing the process, the second source / drain electrode 70 is formed.

In FIG. 10, oxygen plasma irradiation (O ₂ plasma irradiation) is performed from above the second source / drain electrode 70 side of the transparent insulating substrate 10, and on the gate insulating film 30 and the first channel layer 40, The sulfur atom layer 61 remaining in the place where the second source / drain electrode 70 is not formed is removed.

  Here, an indium oxide-based metal oxide semiconductor has a structure in which an oxygen atmosphere is slightly lost at the time of film formation or after film formation by controlling the oxygen atmosphere, and indium oxide has a high valence due to indium. By introducing a metal that can be an ion as a dopant, surplus electrons are generated inside the metal oxide semiconductor, which serves as a carrier and exhibits the properties of the n-type semiconductor.

  Therefore, oxygen plasma is irradiated to the surface of the first channel layer 40 that exists at a position away from the gate insulating film 30 in the first channel layer 40 and to which the electric field from the gate electrode 20 hardly reaches. This not only removes sulfur atoms, but also has the effect of reducing the off-state current of the thin film transistor by repairing oxygen defects on the surface of the first channel layer 40 made of a metal oxide semiconductor and reducing the number of carriers. can get.

  After the oxygen plasma irradiation treatment, the thin film transistor substrate shown in FIG. 10 is heated at 300 ° C. for 120 minutes in the air atmosphere, and sulfur atoms existing between the first channel layer 40 and the second source / drain electrode 70 are present. Layer 61 is diffused.

As a result, a solid solution layer of InGaZnO ₄ , indium sulfide, gallium sulfide, and zinc sulfide is formed on the first channel layer 40 side at the interface between the first channel layer 40 and the second source / drain electrode 70. This is formed and becomes the second channel layer 50.

  Further, copper sulfide is formed on the second source / drain electrode 70 side at the interface between the first channel layer 40 and the second source / drain electrode 70, and this becomes the first source / drain electrode 60. .

  Thereafter, processes such as protective film formation, contact hole drilling, and pixel electrode formation continue, but these are the same as the normal TFT formation process, and are therefore omitted.

From the above, according to the first embodiment, the interface between InGaZnO ₄ and indium sulfide, gallium sulfide, and zinc sulfide at the interface between the first channel layer 40 and the second source / drain electrode 70 of the thin film transistor. Since the second channel layer 50 that is a solid solution and the first source / drain electrode 60 mainly composed of a good conductor or n-type semiconductor copper sulfide are formed, the first channel layer 40 and the second source are formed. -Conductivity with the drain electrode 70 can be ensured.

Here, the standard production enthalpy of indium oxide (In ₂ O ₃ ) is −221.5 kcal / mol, the standard production enthalpy of gallium oxide (Ga ₂ O ₃ ) is −257.5 kcal / mol, and the standard of zinc oxide (ZnO) The production enthalpy is −83.17 kcal / mol, the standard production enthalpy of indium sulfide (InS) is −40.3 kcal / mol, the standard production enthalpy of gallium sulfide (GaS) is −56.4 kcal / mol, and zinc sulfide (ZnS). ) Standard production enthalpy is -48.5 kcal / mol.

  Therefore, the second channel layer 50 also serves as a barrier film that prevents oxygen from moving from the first channel layer 40 to the second source / drain electrode 70.

  In FIG. 7, when sulfur hexafluoride is used as the plasma irradiation gas, most of the dissociated plasma is sulfur radicals and fluorine radicals and does not dissociate as ions. Therefore, there is an advantage that the first channel layer 40 is not subjected to ion bombardment and does not cause plasma damage.

  Thus, oxygen vacancies during the operation of the thin film transistor can be prevented, and a decrease in reliability such as a threshold shift of the thin film transistor can be avoided. That is, it is possible to realize a thin film transistor that ensures good contact characteristics.

<Embodiment 2>
First, the configuration of the thin film transistor according to the second embodiment of the present invention will be described.

  FIG. 11 is a diagram showing an example of the configuration of the thin film transistor according to the second embodiment.

As shown in FIG. 11, the thin film transistor, a transparent insulating substrate 10 such as glass, a gate electrode 20, a gate insulating film 30 made of SiO _2, the first channel layer 40 (n-type metal oxide semiconductor layer) A second channel layer 50, a first source / drain electrode 62, and a second source / drain electrode 72.

The first channel layer 40 is made of InGaZnO ₄ that is a metal oxide semiconductor.

In the second channel layer 50, InGaZnO ₄ that is a metal oxide semiconductor is made of a material in which at least one metal element is dissolved or substituted by a sulfide semiconductor such as indium sulfide, gallium sulfide, or zinc sulfide. It is a semiconductor film.

  The first source / drain electrodes 62 are mainly composed of aluminum sulfide (predetermined metal sulfide).

In general, the chemical formula of aluminum sulfide is represented by Al ₂ S ₃ . However, aluminum sulfide is not a Bertonide compound having a strictly proportional composition, but rather a Dortonide compound in which the ratio of metal to sulfur has an indefinite composition. Further, as will be understood later, the actual sulfur concentration gradually decreases as the distance from the interface between the source / drain electrodes and the channel layer increases. Therefore, in the second embodiment, in the region from the source / drain electrode to the channel layer via the interface between the source / drain electrode and the channel layer, the molar ratio of aluminum to sulfur is at least 2: 3. It is assumed that aluminum sulfide exists in a region that satisfies the above.

  The second source / drain electrode 72 is composed mainly of aluminum (a predetermined metal).

  Next, a method for manufacturing a thin film transistor will be described with reference to FIGS.

  In FIG. 12, the transparent insulating substrate 10 is cleaned using a cleaning liquid or pure water to form a metal film (not shown). As the metal film, for example, Cr, Mo, Ti, W, Al, an alloy obtained by adding a small amount of other substances to these, or the like is used. Among these, since the Al-based alloy has a lower specific resistance value than other metals, the wiring resistance can be lowered. Therefore, an Al-based alloy is preferable for use as a TFT (thin film transistor) substrate for a liquid crystal display device.

  Thereafter, a photoresist pattern is formed in the first photolithography process, and the photoresist pattern is removed by wet etching with a known phosphoric acid + nitric acid + acetic acid solution using this as a mask, as shown in FIG. A gate electrode 20 is formed.

In FIG. 14, a chemical vapor deposition (CVD) method is used to form a 300 nm SiO ₂ film as the gate insulating film 30 under a substrate heating condition of about 450 ° C.

In FIG. 15, fine powders of indium oxide (In ₂ O ₃ ), gallium oxide (β-Ga ₂ O ₃ ), and zinc oxide (ZnO) are prepared so as to have a molar ratio of 1: 2: 2, and then organic A thin film 41 made of InGaZnO ₄ is formed to 200 nm by DC sputtering using a sputtering target obtained through pre-firing and main firing after mixing and shaping with a binder, and using a gas in which Ar is mixed with a small amount of oxygen. Film.

  In the step shown in FIG. 15, for example, an InGaZn alloy target is used for film formation, and a desired gas film is formed by reactive sputtering using a mixed gas of argon gas and oxygen gas as a sputtering gas. It may be.

  In FIG. 16, after forming a photoresist pattern in the second photolithography process, etching is performed with phosphoric acid, nitric acid, and acetic acid heated to 80 ° C., and then the photoresist is peeled off, whereby the inverted staggered thin film transistor is formed. A first channel layer 40 to be a channel is formed.

In FIG. 17, an aluminum sulfide film 63 is formed to a thickness of 50 nm by a sputtering method using a target made of an aluminum alloy at a substrate temperature of 100 ° C. and using a mixed gas of argon and sulfur hexafluoride (SF ₆ ).

  In FIG. 18, using a target made of an aluminum alloy, a metal film 73 made of an aluminum alloy is formed to a thickness of 400 nm by a DC sputtering method using argon gas in a chamber in which an aluminum sulfide film 63 is formed.

  In FIG. 19, a wet etching method using a commercially available etchant having a known composition using a mixed solution of phosphoric acid and acetic acid as an etching solution by forming a photoresist pattern by the third photolithography process and using this as a mask. The first source / drain electrode 62 and the second source / drain electrode 72 are formed by etching the aluminum sulfide film 63 and the metal film 73 and then performing a resist stripping process.

In FIG. 20, oxygen plasma irradiation (O ₂ plasma irradiation) is performed on the exposed portion of the first channel layer 40, and a very small amount of aluminum sulfide (not shown) remaining on the channel layer 40. Change to non-conductor aluminum oxide.

  After the oxygen plasma irradiation treatment, the thin film transistor substrate shown in FIG. 20 is heated at 300 ° C. for 120 minutes in the air atmosphere, and sulfur atoms contained in the first source / drain electrode 62 are transferred to the first channel layer 40. Spread.

As a result, in the first channel layer 40, a solid solution layer of InGaZnO ₄ and indium sulfide, gallium sulfide, and zinc sulfide is formed, which becomes the second channel layer 50.

  Thereafter, processes such as protective film formation, contact hole drilling, and pixel electrode formation continue, but these are the same as the normal TFT formation process, and are therefore omitted.

From the above, according to the second embodiment, the interface between InGaZnO ₄ and indium sulfide, gallium sulfide, and zinc sulfide at the interface between the first channel layer 40 and the second source / drain electrode 72 of the thin film transistor. Since the second channel layer 50, which is a solid solution, and the first source / drain electrode 62 mainly composed of aluminum sulfide are formed, the first channel layer 40 and the second source / drain electrode 72 are Conductivity can be ensured. Further, oxygen vacancies during the operation of the thin film transistor can be prevented, and a decrease in reliability such as a threshold shift of the thin film transistor can be avoided. That is, it is possible to realize a thin film transistor that ensures good contact characteristics.

  In the second embodiment, the case where the aluminum sulfide film 63 is formed by sputtering as shown in FIG. 17 is described, but the present invention is not limited to this. For example, as in the first embodiment, after the first channel layer 40 is formed, sulfur hexafluoride plasma treatment is performed to deposit sulfur atoms, and after aluminum film formation, aluminum sulfide is deposited by thermal diffusion. You may make it form.

<Embodiment 3>
First, the configuration of the thin film transistor according to the third embodiment of the present invention will be described.

  FIG. 21 is a diagram showing an example of the configuration of the thin film transistor according to the third embodiment.

As shown in FIG. 21, the thin film transistor includes a transparent insulating substrate 10 such as glass, a gate electrode 20, a gate insulating film 30 made of SiN _x , a channel layer 42, a source / drain connection portion 43, a first Source / drain electrode 64, second source / drain electrode 74, channel protective film 80, first pixel electrode 90 (n-type metal oxide semiconductor layer), second pixel electrode 91, 1 pixel connection wiring 100, second pixel connection wiring 101, and third pixel connection wiring 102 are provided.

  The channel layer 42 is made of i-type amorphous silicon.

  The source / drain connection 43 is made of n-type amorphous silicon doped with phosphorus.

  The first source / drain electrode 64 (first wiring layer) is composed mainly of an aluminum alloy.

The channel protective film 80 is composed mainly of SiN _x .

  The first pixel electrode 90 is made of a metal oxide semiconductor mainly composed of tin and indium oxides, and is formed on the channel protective film 80.

  The first pixel connection wiring 100 (second wiring layer) is composed of an aluminum alloy (predetermined metal) as a main component, and straddles the channel protective film 80 to form the first pixel electrode 90 and the second source. The drain electrode 74 is connected.

  The second source / drain electrode 74, the second pixel connection wiring 101, and the third pixel connection wiring 102 are made of an n-type semiconductor whose main component is aluminum sulfide.

In general, the chemical formula of aluminum sulfide is represented by Al ₂ S ₃ . However, aluminum sulfide is not a Bertonide compound having a strictly proportional composition, but rather a Dortonide compound in which the ratio of metal to sulfur has an indefinite composition. Further, as will be understood later, the actual sulfur concentration gradually decreases as the distance from the interface between the source / drain electrodes and the channel layer increases. Therefore, in the second embodiment, in the region from the source / drain electrode to the channel layer via the interface between the source / drain electrode and the channel layer, the molar ratio of aluminum to sulfur is at least 2: 3. It is assumed that aluminum sulfide exists in a region that satisfies the above.

  The second pixel electrode 91 is composed of a solid solution of tin oxide and indium oxide and tin sulfide and indium sulfide.

  Next, a method for manufacturing a thin film transistor will be described with reference to FIGS.

  In FIG. 22, the transparent insulating substrate 10 is cleaned using a cleaning liquid or pure water to form a metal film (not shown).

  In the third embodiment, an Al-3 at% Ni alloy added with 3 at% Ni as a metal film is formed with a thickness of 200 nm by a sputtering method using a known argon (Ar) gas. Thereafter, a photoresist pattern is formed in the first photolithography process, and the photoresist pattern is removed by wet etching with a known phosphoric acid + nitric acid + acetic acid solution using this as a mask, as shown in FIG. A gate electrode 20 is formed.

  In FIG. 24, a gate insulating film 31, an i-type amorphous silicon film 44, and an n-type amorphous silicon film 45 are sequentially stacked so as to cover the transparent insulating substrate 10 and the gate electrode 20.

  Here, the i-type amorphous silicon film 44 is an intrinsic semiconductor film made of Si (i) to which no impurity is added, and functions as a semiconductor active film serving as a channel. The n-type amorphous silicon film 45 is an n-type semiconductor film made of Si (n) to which an impurity is added. The n-type amorphous silicon film 45 is in ohmic contact with the i-type amorphous silicon film 44 and a first source / drain electrode 64 described later. It functions as a low resistance film (hereinafter also referred to as an ohmic contact film).

  Specifically, for example, a chemical vapor deposition method is used, and a SiN film as the gate insulating film 31 and an amorphous Si (i) film as the i-type amorphous silicon film 44 under a substrate heating condition of about 300 ° C. And an amorphous Si (n) film to which phosphorus (P) as an n-type amorphous silicon film 45 is added as an impurity is sequentially laminated. For example, the gate insulating film 31 is 400 nm, the i-type amorphous silicon film 44 is 150 nm, and the n-type amorphous silicon film 45 is 50 nm.

  After that, in the second photolithography process, a photoresist pattern is formed on the surface of the n-type amorphous silicon film 45, and dry etching using a known etching gas, for example, a fluorine-based gas, using the photoresist pattern as a mask. Thus, the i-type amorphous silicon film 44 and the n-type amorphous silicon film 45 are etched and patterned into island shapes.

  In FIG. 25, the photoresist pattern is removed to form a thin film transistor pattern, that is, an island-shaped pattern of an i-type amorphous silicon film 44 and an n-type amorphous silicon film 45 which are semiconductor films of the thin film transistor.

  In FIG. 26, an aluminum alloy film 65 made of an aluminum alloy is formed to 400 nm by a DC sputtering method using an argon gas using a target made of an aluminum alloy.

  In FIG. 27, a photoresist 110 pattern is formed by the third photolithography process, and a wet etch using a commercially available etchant having a known composition using a mixed solution of phosphoric acid and acetic acid as an etching solution is used as a mask. The aluminum alloy film 65 is etched by an etching method to form first source / drain electrodes 64. Thereafter, the n-type amorphous silicon film 45 is removed from the opening of the channel layer 42 by appropriately performing dry etching using a fluorine-based gas, and a source / drain connection portion 43 (ohmic contact film) is formed.

  In FIG. 28, a resist stripping process is performed to strip the photoresist 110 to expose the first source / drain electrodes 64.

In FIG. 29, a SiN _x film 81 is formed to 700 nm by plasma CDV method.

Thereafter, a solid solution of indium oxide and tin oxide as a pixel electrode is formed to a thickness of 20 nm on the SiN _x film 81, and then the first pixel electrode 900 is formed by patterning.

  Thereafter, in order to form the first pixel connection wiring 100 that electrically connects the first pixel electrode 900 and the first source / drain electrode 64, the photoresist 111 is patterned so that contact hole etching is possible. Apply.

Thereafter, the SiN _x film 81 is dry-etched with oxygen gas and fluorine gas along the opening of the photoresist 111 to connect the first pixel connection wiring 100 and the first source / drain electrode 64. After forming the channel protective film 80, the photoresist 111 is removed with a commercially available resist stripping solution based on a known material.

  At the stage where the photoresist 111 is removed with the resist stripping solution, a small amount of the photoresist 111 remains in the portion covered with the photoresist 111. Further, the surface (exposed portion) of the first source / drain electrode 64 in the opening of the contact hole is oxidized to become non-conductive aluminum oxide.

  Therefore, by irradiating the plasma of sulfur hexafluoride gas as a whole, the remaining photoresist 111 and the aluminum oxide formed on the exposed surface of the first source / drain electrode 64 are removed, As shown in FIG. 30, a sulfur atom layer 61 derived from sulfur hexafluoride plasma is deposited as thin as about 0.5 nm to 10 nm. The sulfur hexafluoride plasma irradiation is performed for 90 seconds at a gas pressure of 30 Pa and a power density of 1.64 watts / square centimeter by anode coupling using a parallel plate type dry etching apparatus.

  In FIG. 31, a first pixel connection wiring 100 is formed by forming a metal film mainly composed of an aluminum alloy to a thickness of 30 nm and performing patterning.

Thereafter, oxygen plasma irradiation (O ₂ plasma irradiation) is performed from above the sulfur atom layer 61 side of the transparent insulating substrate 10, and the interface between the first pixel connection wiring 100 and the first source / drain electrode 64, and the first The sulfur atom layer 61 existing outside the interface between the one pixel connection wiring 100 and the first pixel electrode 900 is removed. The oxygen plasma irradiation is performed for 60 seconds using a parallel plate type dry etching apparatus at an oxygen pressure of 20 Pa and a power density of 1.64 watts / square centimeter by cathode coupling.

  Thereafter, the thin film transistor substrate shown in FIG. 31 is annealed at 350 ° C. for 3 hours to remove sulfur atoms of the sulfur atom layer 61 present at the interface between the first pixel connection wiring 100 and the first source / drain electrode 64. A second source / drain electrode 74, which is an n-type semiconductor mainly composed of aluminum sulfide, and a second pixel connection wiring 101 are formed by diffusion. In addition, sulfur atoms in the sulfur atom layer 61 existing at the interface between the first pixel connection wiring 100 and the first pixel electrode 900 are diffused to form the third pixel connection wiring 102, and tin oxide and indium oxide are also formed. Then, the second pixel electrode 91 which is a solid solution of tin sulfide and indium sulfide is formed.

Here, the standard production enthalpy of tin oxide (SnO ₂ ) is −138.8 kcal / mol, and the standard production enthalpy of tin sulfide (SnS ₂ ) is −40.0 kcal / mol. Accordingly, as in the case of indium, gallium, or zinc described above, the formation of sulfide has the effect of suppressing the oxidation reaction even in the case of tin.

  From the above, according to the third embodiment, the interface between the first pixel connection wiring 100 and the first source / drain electrode 64, and the first pixel connection wiring 100 and the first pixel electrode 900 Therefore, it is possible to realize a thin film transistor that ensures good contact characteristics.

  In the third embodiment, an aluminum alloy is used for the first pixel connection wiring 100, but the same effect can be obtained even if a copper alloy is used. In this case, copper sulfide exists at the interface between the first pixel connection wiring 100 and the first source / drain electrode 64 and at the interface between the first pixel connection wiring 100 and the first pixel electrode 900. become.

  It should be noted that the present invention can be freely combined with each other within the scope of the invention, and each embodiment can be appropriately modified or omitted.

  DESCRIPTION OF SYMBOLS 10 Transparent insulating substrate, 20 Gate electrode, 30 Gate insulating film, 31 Gate insulating film, 40 1st channel layer, 41 Thin film, 42 Channel layer, 43 Source-drain connection part, 44 i-type amorphous silicon, 45 n-type Amorphous silicon, 50 Second channel layer, 60 First source / drain electrode, 61 Sulfur atom layer, 62 First source / drain electrode, 63 Aluminum sulfide film, 64 First source / drain electrode, 65 Aluminum alloy Film, 70 second source / drain electrode, 71 copper alloy film, 72 second source / drain electrode, 73 metal film, 74 second source / drain electrode, 80 channel protective film, 90 first pixel electrode, 91 second pixel electrode, 100 first pixel connection wiring, 101 second pixel connection wiring, 102 Third pixel connection wiring, 110 photoresist, 111 photoresist.

Claims (14)

an n-type metal oxide semiconductor layer made of an n-type metal oxide semiconductor;
A layer mainly composed of a predetermined metal formed on the n-type metal oxide semiconductor layer;
With
The thin film transistor according to claim 1, wherein the predetermined metal sulfide is present at an interface between the n-type metal oxide semiconductor layer and the predetermined metal-based layer. The n-type metal oxide semiconductor layer is a channel layer;
2. The thin film transistor according to claim 1, wherein the layer mainly composed of the predetermined metal is a source / drain electrode. The n-type metal oxide semiconductor layer is a pixel electrode;
2. The thin film transistor according to claim 1, wherein the predetermined layer containing a metal as a main component is a connection wiring for connecting the pixel electrode and a source / drain electrode. 3.   The thin film transistor according to any one of claims 1 to 3, wherein the predetermined metal is copper.   The thin film transistor according to claim 1, wherein the predetermined metal is aluminum. (A) forming an n-type metal oxide semiconductor layer made of an n-type metal oxide semiconductor;
(B) performing a plasma irradiation using sulfur hexafluoride gas on the n-type metal oxide semiconductor layer;
(C) after the step (b), forming a layer mainly composed of a predetermined metal on the surface of the n-type metal oxide semiconductor layer that has been subjected to the plasma irradiation;
A method for manufacturing a thin film transistor. The n-type metal oxide semiconductor layer is a channel layer;
7. The method of manufacturing a thin film transistor according to claim 6, wherein the layer mainly containing a predetermined metal is a source / drain electrode. The n-type metal oxide semiconductor layer is a pixel electrode;
7. The method of manufacturing a thin film transistor according to claim 6, wherein the predetermined layer containing metal as a main component is a connection wiring for connecting the pixel electrode and the source / drain electrode.   9. The method of manufacturing a thin film transistor according to claim 6, wherein the predetermined metal is copper.   9. The method of manufacturing a thin film transistor according to claim 6, wherein the predetermined metal is aluminum. A first wiring layer mainly composed of aluminum;
A second wiring layer made of metal formed by being laminated on the first wiring layer;
With
A thin film transistor, wherein aluminum sulfide is present at an interface between the first wiring layer and the second wiring layer.   The thin film transistor according to claim 11, wherein the second wiring layer contains aluminum as a main component. (A) forming a first wiring layer mainly composed of aluminum;
(B) performing plasma irradiation using sulfur hexafluoride gas on the first wiring layer;
(C) after the step (b), forming a second wiring layer made of metal on the surface of the first wiring layer that has been subjected to the plasma irradiation;
A method for manufacturing a thin film transistor.   14. The method of manufacturing a thin film transistor according to claim 13, wherein the second wiring layer contains aluminum as a main component.

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