JP2013115099A - Transistor, display device and electronic apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a transistor which can be manufactured at high yield, and provide a display device and an electronic device.SOLUTION: A transistor comprises: a gate electrode; a semiconductor layer opposed to the gate electrode across an insulation layer; a pair pf source/drain electrodes electrically connected to the semiconductor layer; and contact layers provided in a carrier transfer pathway between each of the pair of source/drain electrodes and the semiconductor layer, with end faces being covered with the source/drain layers.

Description

  The present technology relates to a transistor, a display device, and an electronic device that are suitable when an organic semiconductor material is used for a semiconductor layer.

  Thin film transistors (TFTs) are used as drive elements for many electronic devices such as display devices. Such a TFT is provided with a gate electrode, a gate insulating layer, a semiconductor layer, and source / drain electrodes on a substrate. An inorganic material or an organic material is used for the semiconductor layer of the TFT. A semiconductor layer (organic semiconductor layer) made of an organic material is expected in terms of cost and flexibility, and is being developed (for example, Non-Patent Documents 1 and 2).

APPLIED PHYSICS LETTERS 2005,87,193508 APPLIED PHYSICS LETTERS 2009,94,055304

  A TFT using such an organic semiconductor layer is desired to be manufactured more efficiently with fewer manufacturing defects.

  The present technology has been made in view of such problems, and an object thereof is to provide a transistor, a display device, and an electronic device that can be manufactured with a high yield.

  A transistor according to an embodiment of the present technology includes a gate electrode, a semiconductor layer facing the gate electrode, a pair of source / drain electrodes electrically connected to the semiconductor layer, and a pair of the source / drain electrodes and the semiconductor layer. It is provided with a contact layer provided in the carrier moving path and having an end surface covered with a source / drain electrode. A display device of the present technology includes the transistor as a driving element, and an electronic device of the present technology includes the display device of the present technology.

  In the transistor, the display device, or the electronic device of the present technology, since the end surface of the contact layer is covered with the source / drain electrode, the contact layer is protected in the manufacturing process after the source / drain electrode forming process.

  According to the transistor, the display device, and the electronic device of the present technology, since the end surface of the contact layer is covered with the source / drain electrodes, damage to the contact layer in the manufacturing process can be prevented. Therefore, manufacturing defects due to contact layer damage can be suppressed and yield can be improved.

2 is a cross-sectional view illustrating a structure of a transistor according to a first embodiment of the present disclosure. FIG. FIG. 3 is a cross-sectional view illustrating a method of manufacturing the transistor illustrated in FIG. 1 in order of steps. FIG. 3 is a cross-sectional view illustrating a process following FIG. 2. It is sectional drawing showing the structure of the transistor which concerns on a comparative example. 10 is a cross-sectional view illustrating a structure of a transistor according to Modification 1. FIG. FIG. 6 is a cross-sectional view illustrating a method for manufacturing the transistor illustrated in FIG. 5 in order of steps. 6 is a cross-sectional view illustrating a structure of a transistor according to a second embodiment of the present disclosure. FIG. 10 is a cross-sectional view illustrating a structure of a transistor according to Modification 2. FIG. 10 is a diagram illustrating a circuit configuration of a display device according to application example 1. FIG. FIG. 3 is an equivalent circuit diagram illustrating an example of the pixel drive circuit illustrated in FIG. 2. 12 is a perspective view illustrating an appearance of application example 2. FIG. 12 is a perspective view illustrating an appearance of application example 3. FIG. (A) is a perspective view showing the external appearance seen from the front side of the application example 4, (B) is a perspective view showing the external appearance seen from the back side. 14 is a perspective view illustrating an appearance of application example 5. FIG. 16 is a perspective view illustrating an appearance of application example 6. FIG. (A) is a front view of the application example 7 in an open state, (B) is a side view thereof, (C) is a front view in a closed state, (D) is a left side view, and (E) is a right side view, (F) is a top view and (G) is a bottom view. It is sectional drawing showing the transistor structure which concerns on another modification.

Hereinafter, embodiments of the present technology will be described in detail with reference to the drawings. The description will be given in the following order.
1. First embodiment (example in which the contact layer is in a continuous state)
2. Modification 1 (example where the contact layer is discontinuous)
3. Second embodiment (example in which the contact layer extends in a continuous state)
4. Modification 2 (example in which the contact layer extends in a discontinuous state)

<First Embodiment>
FIG. 1 illustrates a cross-sectional configuration of a transistor (transistor 1) according to the first embodiment of the present disclosure. The transistor 1 is a field effect transistor using an organic semiconductor material for a semiconductor layer, that is, an organic TFT, and is used as a drive element of a display using a liquid crystal, an organic EL, and an electrophoretic display. The transistor 1 is a TFT having a so-called top contact / bottom gate structure, and includes a gate electrode 12, a gate insulating layer 13 (insulating layer), an organic semiconductor layer 14 (semiconductor layer), contact layers 15A and 15B on a substrate 11. Source / drain electrodes 16A and 16B are provided in this order.

  The substrate 11 supports the gate electrode 12 and the like, and the surface (the surface on the gate electrode 12 side) has an insulating property. The substrate 11 is made of, for example, a plastic substrate such as PES (polyether sulfone), PEN (polyethylene naphthalate), PET (polyethylene terephthalate), PC (polycarbonate), or PI (polyimide). As the substrate 11, a surface of a metal foil such as stainless steel (SUS) laminated with a resin may be used, or a glass substrate may be used. In order to obtain high flexibility (flexibility), it is preferable to use a plastic substrate or a metal foil.

  The gate electrode 12 has a role of applying a gate voltage to the transistor 1 and controlling the carrier density in the organic semiconductor layer 14 by the gate voltage. The gate electrode 12 is provided in a selective region on the substrate 11 and is a single metal such as gold (Au), aluminum (Al), silver (Ag), copper (Cu), platinum (Pt), or nickel (Ni). Alternatively, these alloys are used. The gate electrode 12 may be a laminate including titanium (Ti) or chromium (Cr). Such a laminated structure can improve the adhesion to the substrate 11 or the resist for processing. For the gate electrode 12, other inorganic conductive materials, organic conductive materials, or carbon materials may be used.

The gate insulating layer 13 is provided between the gate electrode 11 and the organic semiconductor layer 14 in order to insulate the gate electrode 12 from the organic semiconductor layer 14 electrically connected to the source / drain electrodes 16A and 16B. . The gate insulating layer 13 is made of an organic insulating film such as PVP (polyvinylphenol), PMMA (polymethyl methacrylate), PVA (polyvinyl alcohol), or PI. For the gate insulating layer 13, an inorganic insulating film such as silicon oxide (SiO ₂ ), aluminum oxide (Al ₂ O ₃ ), tantalum oxide (Ta ₂ O ₅ ), or silicon nitride (SiNx) may be used.

  The organic semiconductor layer 14 is provided in an island shape on the gate insulating layer 13 so as to face the gate electrode 12, and forms a channel by applying a gate voltage. The organic semiconductor layer 14 may be composed of either a p-type organic semiconductor material or an n-type organic semiconductor material. As the p-type organic semiconductor material, for example, pentacene, anthracene, phthalocyanine, porphyrin, thiophene polymer, or a derivative thereof can be used. As the n-type organic semiconductor material, for example, fullerene, perfluoropentacene, poly (benzobisimidazobenzophenanthroline), or a derivative thereof can be used.

  The contact layers 15A and 15B (first contact layer and second contact layer) are provided on the organic semiconductor layer 14 so as to face each other and be separated from each other. The contact layers 15A and 15B are provided between the organic semiconductor layer 14 and the source / drain electrodes 16A and 16B, that is, in the carrier movement path, and contact resistance between the source / drain electrodes 16A and 16B and the organic semiconductor layer 14 is provided. It is what suppresses.

In the present embodiment, the end surfaces 15A ₁ and 15B _{1 of the} contact layers 15A and 15B (surfaces opposite to the opposing end surfaces of the contact layers 15A and 15B) are covered with the source / drain electrodes 16A and 16B. As a result, the contact layers 15A and 15B are protected in steps subsequent to the formation of the source / drain electrodes 16A and 16B. Further, since the opposing end surfaces (opposing surfaces 15A ₂ and 15B ₂ ) of the contact layers 15A and 15B are also covered with the source / drain electrodes 16A and 16B, the contact layers 15A and 15B can be more reliably protected. .

The contact layers 15A and 15B are films in which the opposing surfaces 15A ₂ and 15B ₂ to the end surfaces 15A ₁ and 15B ₁ are continuous. End surfaces 15A ₁ and 15B ₁ of the contact layers 15A and 15B substantially coincide with the end surface of the organic semiconductor layer 14, and the contact layers 15A and 15B are provided only on the organic semiconductor layer 14.

The contact layers 15A and 15B are composed of various materials such as oxides, halides, sulfides, carbonates, organic molecules, complexes, or conductive polymers, for example, in accordance with the conductivity type and HOMO level of the organic semiconductor layer 14. Selected. When the organic semiconductor layer 14 is made of, for example, a p-type organic semiconductor material, the contact layers 15A and 15B have MoO ₃ , ReO ₃ , V ₂ O ₅ , WO ₃ , TiO ₂ , AuO, Al ₂ O ₃ or CuO. Metal oxides such as SO ₃ , oxides such as SO ₃ , metal halides such as CuI, SbCl ₅ , SbF ₅ , FeCl ₃ , LiF, BaF ₂ , CaF ₂ or MgF ₂ , metal sulfides such as Cu ₂ S, AsF ₅ , halides such as BF ₃ , BCl ₃ , BBr ₃ or PF ₅ , metal carbonates such as CaCO ₃ , BaCO ₃ or LiCO ₃ , 2,3,5,6-tetracyano- (p-cyanyl), 2, 3-dibromo-5,6-dicyano-p-benzoquinone, 2,3-dichloro-5,6-dicyano-p-benzoquinone, 2,3-diiodo-5,6-dicyano-p-benzoquinone, 2,3- Dicyano-p-benzoquinone, p-bromo P-chloranil, p-iodenyl, p-floranyl, 2,5-dichloro-p-benzoquinone, 2,6-dichloro-p-benzoquinone, chloranilic acid, bromanylic acid, 2,5-dihydroxy-p-benzoquinone, 2,5-dichloro-3,6-dimethyl-p-benzoquinone, 2,5-dibromo-3,6-dimethyl-p-benzoquinone, BTDAQ, p-benzoquinone, 2,5-dimethyl-p-benzoquinone, 2, 6-dimethyl-p-benzoquinone, juro- (tetramethyl), o-benzoquinones, o-bromanyl, o-chloranil, 1,4-naphthoquinones, 2,3-dicyano-5-nitro-1,4-naphthoquinone P-- such as 2,3-dicyano-1,4-naphthoquinone, 2,3-dichloro-5-nitro-1,4-naphthoquinone, 2,3-dichloro-1,4-naphthoquinone or 1,4-naphthoquinone Benzoquinones, 3,3'5,5'-tetrabromo- Diphenoquinones such as phenoquinone, 3,3'5,5'-tetrachloro-diphenoquinone or diphenoquinone, tetracyano-quinodimethane (TCNQ), Tetrafluoro-tetracyano-quinodimethane (F4-TCNQ), trifluoromethyl-TCNQ, 2,5- Difluoro-TCNQ, monofluoro-TCNQ, TNAP, decyl-TCNQ, methyl-TCNQ, dihydrovalereno-TCNQ, tetrahydrovalereno-TCNQ, dimethyl-TCNQ, diethyl-TCNQ, benzo-TCNQ, dimethoxy-TCNQ, BTDA-TCNQ , Diethoxy-TCNQ, tetramethyl-TCNQ, tetracyanoanthraquinodimethane, polynitro compounds, tetranitrobiphenol, dinitrobiphenyl, picric acid, trinitrobenzene, 2,6-dinitrophenol or 2,4-dinini TCNQs and analogs such as trophenol, 9-dicyanomethylene-2,4,5,7-tetranitro-fluorene, 9-dicyanomethylene-2,4,7-trinitro-fluorene, 2,4,5,7- Fluorenes such as tetranitro-fluorenone or 2,4,7-trinitro-fluorenone, (TBA) 2HCTMM, (TBA) 2HCDAHD, K · CF, TBA · PCA, TBA · MeOTCA, TBA · EtOTCA, TBA · PrOTCA, (TBA ) Benzocyano compounds such as 2HCP, hexacyanobutadiene tetracyanoethylene or 1,2,4,5-tetracyanobenzene and analogs, (TPP) ₂ Pd (dto) ₂ , (TPP) ₂ Pt (dto) ₂ , (TPP ) ₂ Ni (dto) ₂ , (TPP) ₂ Cu (dto) _2, or transition metal complexes such as (TBA) ₂ Cu (ox) ₂ , A conductive polymer such as PEDOT / PSS or polyaniline can be used.

When the organic semiconductor layer 14 is made of, for example, an n-type organic semiconductor material, the contact layers 15A and 15B include a metal such as Li or Cs, a metal carbonate such as Cs ₂ CO ₃ or Rb ₂ CO ₃ , tetracene, and perylene. , Aromatic hydrocarbons and analogs such as anthracene, coronene, pentacene, chrysene, phenanthrene, naphthalene, p-dimethoxybenzene, rubrene or hexamethoxytriphenylene, HMTTF, OMTTF, TMTTF, BEDO-TTF, TTeCn-TTF, TMTSF, EDO -TTFs such as TTF, HMTSF, TTF, EOET-TTF, EDT-TTF, (EDO) 2DBTTF, TSCn-TTF, HMTTeF, BEDT-TTF, CnTET-TTF, TTCn-TTF, TSF or DBTTF Analogs, TTTs such as tetrathiotetracene, tetraselenotetracene or tetratellurotetracene, dibenso [c, d] -fetinoazine, benzo [c] -phenothiazine, phenothiazine, N-methyl-phenothiazine, dibenso [c, d]- Phenoselenazine, N, N-dimethylphenazine or azines such as phenazine, N, N-diethyl-m-toluidine, N, N-diethylaniline, N-ethyl-o-toluidine, diphenylamine, skatole, indole, N, Monoamines such as N-dimethyl-o-toluidine, o-toluidine, m-toluidine, aniline, o-chloroaniline, o-bromoaniline or p-nitroaniline, N, N, N ', N'-tetramethyl- p-phenylenediamine, 2,3,5,6-tetramethyl- (dylenediamine), p-phenyldiamine, N, N, N ′, N′— Tramethylbenzidine, 3,3 ', 5,5'-tetramethylbenzidine, 3,3'-dimethylbenzidine, 3,3'-dimethoxybenzidine, benzidine, 3,3'-dibromo-5,5'-dimethylbenzidine Diamines such as 3,3'-dichloro-5,5'-dimethylbenzidine or 1,6-diaminopyrene, and other 4,4 ', 4''-tris (N-3-methylphenyl-N-phenylamino) -triphenylamine: (m-MTDATA), 4,4 ′, 4 ″ -tris (N- (2-Naphtyl) -N-phenylamino) -triphenylamine: (2TNATA), α-NDP, copper phthalocyanine, 1,4, 6,8-tetrakisdimethylaminopyrene, 1,6-dithiopyrene, decamethylferrocene, ferrocene, or the like can be used.

  The contact layers 15A and 15B made of the above constituent materials have a thickness of, for example, about several nm to 30 nm. Thus, by providing the contact layers 15A and 15B thinly, resistance in the vertical direction (thickness direction) can be suppressed.

The source / drain electrode 16A is electrically connected to the organic semiconductor layer 14 via the contact layer 15A, and the source / drain electrode 16B is electrically connected to the organic semiconductor layer 14 via the contact layer 15B. The end portions of the source / drain electrodes 16A and 16B (opposite the opposing portions of the source / drain electrodes 16A and 16B) are the end surfaces 15A ₁ and 15A ₂ of the contact layers 15A and 15B and the end surfaces of the organic semiconductor layer 14, respectively. The contact portions of the source / drain electrodes 16A and 16B are in contact with the organic semiconductor layer 14 through the contact surfaces 15A ₂ and 15B ₂ of the contact layers 15A and 15B. . That is, the source / drain electrodes 16A and 16B have regions that are in direct contact with the gate insulating layer 13 and the organic semiconductor layer 14, thereby suppressing electrode peeling of the source / drain electrodes 16A and 16B. Further, since the contact layers 15A and 15B are provided only on the organic semiconductor layer 14, the area where the source / drain electrodes 16A and 16B are in direct contact with the gate insulating layer 13 is widened, and the area around the organic semiconductor layer 14 is increased. Can prevent the wiring of the source / drain electrodes 16A and 16B from peeling off.

  The source / drain electrodes 16A and 16B are made of a single metal such as gold, aluminum, silver, copper, platinum, nickel, ITO (indium tin oxide), or an alloy thereof. Similarly to the gate electrode 12, the source / drain electrodes 16A and 16B may be laminated with titanium or chromium as an upper layer or a lower layer. With such a laminated structure, it is possible to improve the adhesion between the substrate 11, the processing resist, or the contact layers 15A and 15B. The source / drain electrodes 16A and 16B may be formed of a patterned conductive ink containing conductive fine particles.

  The transistor 1 can be manufactured, for example, as follows.

  First, as shown in FIG. 2A, after forming the gate electrode 12 over the substrate 11, the gate insulating layer 13 covering the gate electrode 12 is formed. Specifically, first, the conductive film of the gate electrode 12 described above is formed on the entire surface of the substrate 11 by, for example, vapor deposition or sputtering, and then a photoresist is formed on the conductive film by using, for example, photolithography. The pattern is formed. Next, the conductive film is etched and patterned using the patterned photoresist as a mask. Thereby, the gate electrode 12 is formed. In addition, the gate electrode 12 may be formed by a printing method such as screen printing, gravure printing, or inkjet printing. Next, the gate insulating layer 13 made of an organic insulating material is formed over the entire surface of the substrate 11 by using a coating method including a printing method such as spin coating, screen printing, gravure printing, or ink jet printing. When the gate insulating layer 13 is formed of an inorganic insulating material, for example, a vapor deposition method, a sputtering method, a CVD (Chemical Vapor Deposition) method, or the like can be used.

  After forming the gate insulating layer 13, as shown in FIG. 2B, the organic semiconductor layer 14 is formed on the gate insulating layer 13 at a position facing the gate electrode 12. The organic semiconductor layer 14 can be directly formed in a patterned state by, for example, a pattern vapor deposition method using a mask or a printing method. Alternatively, a film made of the constituent material of the organic semiconductor layer 14 may be formed on the entire surface of the substrate 11 (on the gate insulating film 13) and then patterned by, for example, a laser ablation method. In addition, the organic semiconductor layer 14 can be formed by a lift-off method. When element isolation is not necessary, the organic semiconductor layer 14 may be provided on the entire surface of the substrate 11.

  After forming the organic semiconductor layer 14, contact layers 15A and 15B are formed on the organic semiconductor layer 14, as shown in FIG. The contact layers 15A and 15B are directly formed in a patterned state using, for example, a pattern vapor deposition method using a mask or a printing method.

  Subsequently, source / drain electrodes 16A and 16B are formed so as to cover the end surfaces from the upper surfaces of the contact layers 15A and 15B and the organic semiconductor layer. As shown in FIG. 3B, the source / drain electrodes 16A and 16B are formed by forming a metal film 16M on the entire surface of the substrate 11 (on the gate insulating layer 13, the organic semiconductor layer 14, and the contact layers 15A and 15B). After film formation, patterning is performed by, for example, a lithography process. Alternatively, the source / drain electrodes 16A and 16B may be directly formed in a state patterned by, for example, a printing method. Through the above steps, the transistor 1 is completed.

  When the transistor 1 is integrated, for example, a passivation layer, a planarization layer, a wiring, and the like are formed on the source / drain electrodes 16A and 16B. A connection hole may be provided in the gate insulating layer 13 to connect the source / drain electrodes 16A and 16B and an electrode lower than the gate insulating layer 13 (for example, an electrode in the same layer as the gate electrode 12).

In the present embodiment, since the end faces 15A ₁ and 15A ₂ of the contact layers 15A and 15B are covered with the source / drain electrodes 16A and 16B as described above, the steps after the source / drain electrodes 16A and 16B are formed. Thus, the contact layers 15A and 15B are protected, and the yield can be improved. This will be described below using a comparative example.

FIG. 4A illustrates a cross-sectional structure of the transistor 100 according to the comparative example. The transistor 100 has a bottom gate / top contact structure like the transistor 1. However, in the transistor 100, the end faces 115A ₁ and 115B _{1 of} the contact layers 115A and 115B and the end faces of the source / drain electrodes 16A and 16B are coincident with each other, and the end faces 115A ₁ and 115B _{1 of the} contact layers 115A and 115B are aligned. Is exposed. Further, the opposing surfaces 115A ₂ and 115B _{2 of} the contact layers 115A and 115B coincide with the opposing surfaces of the source / drain electrodes 16A and 16B, and the opposing surfaces 115A ₂ and 115B of the contact layers 115A and 115B. _{2 is} also exposed.

In such a transistor 100, as shown in FIG. 4B, the contact layers 115A and 115B are formed on the side of the end faces 115A ₁ and 115B ₁ and the opposing surface when forming the source / drain electrodes 16A and 16B or in the subsequent process. Side etching may occur unintentionally from the 115A ₂ and 115B ₂ sides, and the source / drain electrodes 16A and 16B may be peeled off or contact failure may occur. Due to this electrode peeling or manufacturing failure, the manufacturing yield of the transistor 100 is lowered.

When manufacturing a top contact type transistor, an aqueous solution or water is often used in order to prevent the organic semiconductor layer from being deteriorated by an organic solvent. However, many constituent materials of the contact layer are soluble in water (for example, MoO ₃ , WO ₃ , V ₂ O ₅ , FeCl ₃ or PEDOT / PSS), and the contact layer suppresses electric resistance. It is provided with a reduced thickness. For this reason, a contact layer is easy to be etched with the alkaline aqueous solution and water which are used at a resist peeling process at the time of manufacture, for example. For example, MoO _{3 which} is a constituent material of the contact layer dissolves in pure water in about 3 seconds even if the thickness is 50 nm.

In the transistor 100, after the island-shaped organic semiconductor layer 14 is formed, the material film of the contact layers 115A and 115B and the metal film to be the source / drain electrodes 16A and 16B are successively formed and patterned simultaneously. That is, the end surfaces 115A ₁ and 115B _{1 of} the contact layers 115A and 115B and the opposing surfaces 115A ₂ and 115B ₂ respectively coincide with the end surfaces of the source / drain electrodes 16A and 16B and the opposing surfaces. end surfaces 115A ₁ of 115B, 115B ₁ and the opposing surface 115A _2, 115B ₂ is exposed. For this reason, the contact layers 115A and 115B may be unintentionally side-etched by the alkaline aqueous solution or water used in the formation of the source / drain electrodes 16A and 16B or in subsequent processes. In particular, when the transistor 100 is integrated and miniaturized, the contact layers 115A and 115B are easily side-etched.

  Further, in the transistor 100, contact layers 115A and 115B are provided on the entire lower surface of the source / drain electrodes 16A and 16B, and the source / drain electrodes 16A and 16B have regions directly in contact with the organic semiconductor layer 14 and the gate insulating layer 13, respectively. Not. Therefore, if the organic semiconductor layer 14 and the contact layers 115A and 115B, the contact layers 115A and 115B and the source / drain electrodes 16A and 16B or the contact layers 115A and 115B and the gate insulating layer 13 have low adhesion, There is a risk of electrode peeling of the drain electrodes 16A and 16B.

On the other hand, in the present embodiment, the end surfaces 15A ₁ and 15B ₁ of the contact layers 15A and 15B are covered with the source / drain electrodes 16A and 16B, respectively. The contact layers 15A and 15B are protected from an aqueous solution or water used when forming an upper layer such as a passivation layer. Therefore, it is possible to suppress electrode peeling and contact failure of the source / drain electrodes 16A and 16B due to side etching of the contact layers 15A and 15B, and to improve manufacturing yield. Further, since the opposing surfaces 15A ₂ and 15B _{2 of} the contact layers 15A and 15B as well as the end surfaces 15A ₁ and 15B _{1 of} the contact layers 15A and 15B are covered with the source / drain electrodes 16A and 16B, the contact is more reliably performed. Side etching of the layers 15A and 15B can be prevented.

  Further, in the transistor 1, since the end portions of the source / drain electrodes 16A and 16B are in contact with the gate insulating layer 13 and the opposing portions are in contact with the organic semiconductor layer 14, the contact layers 15A and 15B and the organic semiconductor layer 14 Even when the adhesion between the contact layers 15A and 15B and the source / drain electrodes 15A and 15B or the contact layers 15A and 15B and the gate insulating layer 13 is low, electrode peeling of the source / drain electrodes 16A and 16B can be suppressed. it can.

  In addition, since the contact layers 15A and 15B are provided only on the organic semiconductor layer 14, the region where the gate insulating layer 13 and the source / drain electrodes 16A and 16 are in direct contact with each other is widened, and the adhesion between the contact layers 15A and 15B is increased. Even when the voltage is low, peeling of the wirings of the source / drain electrodes 16A, 16 can be prevented. Further, when connecting holes are provided in the gate insulating layer 13 to connect the source / drain electrodes 16A, 16B and the electrodes below the gate insulating layer 13, the contact layers 15A, 15B may obstruct the connection between them. Absent.

In the transistor 1 of the present embodiment, when a predetermined potential is supplied to the gate electrode 12, an electric field is generated in the channel of the organic semiconductor layer 14, and a current flows between the source / drain electrodes 16A and 16B. Functions as a transistor. Here, since the end faces 15A ₁ and 15B ₁ of the contact layers 15A and 15B are covered with the source / drain electrodes 16A and 16B, side etching of the contact layers 15A and 15B can be prevented.

As described above, in the present embodiment, since the end surfaces 15A ₁ and 15B ₁ of the contact layers 15A and 15B are covered with the source / drain electrodes 16A and 16B, the contact layers 15A and 15B are protected from side etching, It is possible to suppress electrode peeling and contact failure of the source / drain electrodes 16A and 16B. Therefore, it is possible to prevent manufacturing defects due to the side etching of the contact layers 15A and 15B and improve the yield. In addition, since the opposing surfaces 15A ₂ and 15B _{2 of} the contact layers 15A and 15B as well as the end surfaces 15A ₁ and 15B _{1 of the} contact layers 15A and 15B are covered with the source / drain electrodes 16A and 16B, the contact layer is more reliably provided. Side etching of 15A and 15B can be prevented.

  Furthermore, since the end portions of the source / drain electrodes 16A and 16B have regions that are in direct contact with the gate insulating layer 13 and the opposing portions directly contact the organic semiconductor layer 14, even when the contact layers 15A and 15B have low adhesion. Electrode peeling of the source / drain electrodes 16A and 16B can be prevented.

  Hereinafter, modifications of the above embodiment and other embodiments will be described. However, the same components as those in the above embodiment will be denoted by the same reference numerals, and description thereof will be omitted as appropriate.

<Modification 1>
FIG. 5 illustrates a cross-sectional configuration of a transistor (transistor 1A) according to Modification 1 of the above embodiment. The transistor 1A is different from the transistor 1 of the above embodiment in that the contact layers 25A and 25B are discontinuous. Except for this point, the transistor 1A has the same configuration as that of the transistor 1, and the operation and effect thereof are also the same.

The contact layers 25A and 25B have a plurality of minute gaps 25S between the opposing surfaces 25A ₂ and 25B ₂ of the contact layers 25A and 25B and the end surfaces 25A ₁ and 25B ₁ of the contact layers 25A and 25B, respectively. It is provided in a discontinuous state. In other words, the contact layers 25A and 25B are scattered in a granular manner with the gap 25S therebetween. For this reason, even when the opposing surfaces 25A ₂ and 25B _{2 of} the contact layers 25A and 25B are not covered with the source / drain electrodes 16A and 16B, the intrusion of aqueous solution or water from the opposing surfaces 25A ₂ and 25B ₂ side Stops at the gap 25S. That is, it is possible to protect the portions of the contact layers 25A and 25B that become carrier movement paths. The size of the gap 25S is, for example, 10 to 100 nm.

  The transistor 1A can be manufactured, for example, as follows.

  First, as shown in FIG. 6A, up to the gate insulating layer 13 is formed in the same manner as the transistor 1 described above. Next, as illustrated in FIG. 6B, the organic semiconductor layer 14 and the contact layers 25 </ b> A and 25 </ b> B are formed over the gate insulating layer 13. The organic semiconductor layer 14 and the contact layers 25 </ b> A and 25 </ b> B may be directly patterned in this order by a pattern vapor deposition method or a printing method using a mask in this order, or the configuration of the organic semiconductor layer 14 on the entire surface of the substrate 11. After forming the film made of the material and the contact layers 25A and 25B in the discontinuous state on the entire surface of the substrate 11 in this order, the pattern may be simultaneously formed by a laser ablation method or the like. The organic semiconductor layer 14 and the contact layers 25A and 25B can also be formed by a lift-off method. The contact layers 25A and 25B having a discontinuous state, that is, a plurality of gaps 25S, are formed by reducing the vacuum film formation rate and shortening the film formation time and ending the vacuum film formation before growing into a continuous film. It is formed. You may make it form a discontinuous pattern directly by the pattern vapor deposition method or the printing method.

  After the contact layers 25A and 25B are formed, source / drain electrodes 16A and 16B are formed as shown in FIG. The source / drain electrodes 16A and 16B may be formed by forming a metal film (for example, the metal film 16M) on the entire surface of the substrate 11 and then patterning it by a lithography process, or by direct patterning by a printing method. May be formed.

  The contact layers 25A and 25B between the source / drain electrode 16A and the source / drain electrode 16B may remain if the off-state current is sufficient (FIG. 6C). If the off-state current is insufficient, it is removed by etching (FIG. 5). At this time, since the contact layers 25A and 25B have a gap 25S, the intrusion of water or an aqueous solution used at the time of etching stops at the gap 25S, and portions of the contact layers 25A and 25B serving as carrier transfer paths (source / drain electrodes) There is no possibility that the contact layers 25A and 25B between 16A and 16B and the organic semiconductor layer 14 will be eroded.

<Second Embodiment>
FIG. 7A illustrates a cross-sectional configuration of a transistor (transistor 2) according to the second embodiment of the present technology. The transistor 2 is different from the transistor 1 of the first embodiment in that the contact layers 35A and 35B extend on the gate insulating layer 13 through the end face of the organic semiconductor layer 14. Except for this point, the transistor 2 has the same configuration as that of the transistor 1, and the operation and effect thereof are also the same.

The contact layers 35A and 35B are continuous films and extend from the upper surface of the organic semiconductor layer 14 onto the gate insulating layer 13 through the end surfaces thereof. The contact layers 35A and 35B face each other at a distance from each other, and the facing surfaces 35A ₂ and 35B ₂ and the end surfaces 35A ₁ and 35B ₁ are covered with the source / drain electrodes 16A and 16B, respectively. The contact layers 35A and 35B may be continuous from the organic semiconductor layer 14 to the gate insulating layer 13 (FIG. 7 (A)). As shown in FIG. 7B, the organic semiconductor layer 14 And may be divided between the organic semiconductor layer 14 and the gate insulating layer 13.

<Modification 2>
FIG. 8 illustrates a cross-sectional configuration of a transistor (transistor 2A) according to the second modification. The transistor 2A is different from the transistor 2 of the second embodiment in that the contact layers 45A and 45B are discontinuous. Except for this point, the transistor 2A has the same configuration as that of the transistor 2, and its operation and effect are also the same.

The contact layers 45A and 45B have a plurality of minute gaps 45S between the opposing surfaces 45A ₂ and 45B ₂ and the end surfaces 45A ₁ and 45B ₁ , and are on the upper surface of the organic semiconductor layer 14 and the gate insulating layer 13. Are provided in a discontinuous state. The contact layers 45A and 45B are spaced apart from each other and face each other, and the facing surfaces 45A ₂ and 45B ₂ and the end surfaces 45A ₁ and 45B ₁ are covered with the source / drain electrodes 16A and 16B, respectively. Since the contact layers 45A and 45B are in a discontinuous state, even when the opposing surfaces 45A ₂ and 45B _{2 of} the contact layers 45A and 45B are not covered by the source / drain electrodes 16A and 16B, the opposing surface 45A ₂ , 45B ₂ side, the penetration of aqueous solution and water stops at the gap 45S. The discontinuous contact layers 45A and 45B are formed in the same manner as the contact layers 25A and 25B. In the case where a sufficient off current can be obtained, contact layers 45A and 45B may exist between the source / drain electrode 16A and the source / drain electrode 16B.

<Application example 1>
FIG. 9 shows a circuit configuration of a display device (display device 90) including any one of the transistors 1, 1A, 2 and 2A as a drive element. The display device 90 is, for example, a liquid crystal display, an organic EL display, an electronic paper display, or the like, and a plurality of pixels 10 arranged in a matrix in the display area 110 on the drive panel 91 and the pixels 10 are driven. Various drive circuits are formed. On the drive panel 91, as a drive circuit, for example, a signal line drive circuit 120 and a scan line drive circuit 130, which are drivers for displaying images, and a pixel drive circuit 150 are arranged. A sealing panel (not shown) is bonded to the driving panel 91, and the pixel 10 and the driving circuit are sealed by the sealing panel.

  FIG. 10 is an equivalent circuit diagram of the pixel driving circuit 150. The pixel driving circuit 150 is an active driving circuit in which transistors Tr1 and Tr2 are disposed as any of the transistors 1, 1A, 2 and 2A. A capacitor Cs is provided between the transistors Tr1 and Tr2, and the pixel 10 is connected in series with the transistor Tr1 between the first power supply line (Vcc) and the second power supply line (GND). In such a pixel driving circuit 150, a plurality of signal lines 120A are arranged in the column direction, and a plurality of scanning lines 130A are arranged in the row direction. Each signal line 120A is connected to the signal line drive circuit 120, and an image signal is supplied from the signal line drive circuit 120 to the source electrode of the transistor Tr2 via the signal line 120A. Each scanning line 130A is connected to the scanning line driving circuit 130, and a scanning signal is sequentially supplied from the scanning line driving circuit 130 to the gate electrode of the transistor Tr2 via the scanning line 130A. In this display device, the transistors Tr1 and Tr2 are composed of the transistors 1, 1A, 2 and 2A of the above-described embodiment, so that high quality display is possible due to the good TFT characteristics of the transistors Tr1 and Tr2. Become. Such a display device 90 can be mounted on, for example, the electronic devices shown in the following application examples 2 to 7.

<Application example 2>
FIGS. 11A and 11B illustrate the appearance of an electronic book. This electronic book has, for example, a display unit 210, a non-display unit 220, and an operation unit 230. Although the operation unit 230 is formed on the same surface (front surface) as the display unit 210 as shown in FIG. 11A, the operation unit 230 has a different surface (upper surface) from the display unit 210 as shown in FIG. ) May be formed.

<Application example 3>
FIG. 12 illustrates the appearance of a television device. The television apparatus includes a video display screen unit 300 including a front panel 310 and a filter glass 320, for example.

<Application example 4>
FIG. 13 shows the appearance of a digital still camera. The digital still camera has, for example, a flash light emitting unit 410, a display unit 420, a menu switch 430, and a shutter button 440.

<Application example 5>
FIG. 14 shows the appearance of a notebook personal computer. This notebook personal computer has, for example, a main body 510, a keyboard 520 for inputting characters and the like, and a display unit 530 for displaying an image.

<Application example 6>
FIG. 15 shows the appearance of a video camera. This video camera includes, for example, a main body 610, a subject photographing lens 620 provided on the front side surface of the main body 610, a start / stop switch 630 at the time of photographing, and a display 640.

<Application example 7>
FIG. 16 shows the appearance of a mobile phone. For example, the mobile phone is obtained by connecting an upper housing 710 and a lower housing 720 with a connecting portion (hinge portion) 730, and includes a display 740, a sub-display 750, a picture light 760, and a camera 770. Yes.

  Although the present technology has been described with the embodiment and the modification, the present technology is not limited to the above-described embodiment and the like, and various modifications can be made. For example, in the above-described embodiment, the top contact / bottom gate type transistors 1, 1A, 2, and 2A have been described. However, as illustrated in FIG. 17, it may be applied to a bottom contact / bottom gate type transistor. It may be possible and may have a top gate type structure.

  Moreover, in the said embodiment etc., although the case where the semiconductor layer was comprised using organic-semiconductor material was illustrated, the semiconductor layer may be comprised by inorganic materials, such as a silicon | silicone and an oxide semiconductor.

  Furthermore, for example, the material and thickness of each layer described in the above embodiment, the film formation method and the film formation conditions are not limited, and other materials and thicknesses may be used, or other film formation methods and Film forming conditions may be used.

In addition, this technique can also take the following structures.
(1) a gate electrode, a semiconductor layer facing the gate electrode with an insulating layer in between, a pair of source / drain electrodes electrically connected to the semiconductor layer, and each of the pair of source / drain electrodes A transistor comprising a contact layer provided in a carrier moving path between the semiconductor layer and an end face of which is covered with the source / drain electrodes.
(2) The transistor according to (1), wherein the contact layer is provided between the semiconductor layer and the pair of source / drain electrodes.
(3) The contact layer is composed of a pair of first contact layer and second contact layer facing each other between the semiconductor layer and the pair of source / drain electrodes, and the first contact layer. The transistor according to (1) or (2), wherein the opposing surfaces of the second contact layer are also covered with the source / drain electrodes.
(4) The transistor according to any one of (1) to (3), wherein the contact layer is provided on the semiconductor layer, and the pair of source / drain electrodes are in contact with the insulating layer.
(5) The transistor according to any one of (1) to (4), wherein the contact layer has a plurality of gaps and is in a discontinuous state.
(6) The transistor according to (5), wherein the discontinuous state of the contact layer is formed by completing vacuum film formation before becoming a continuous film.
(7) The transistor according to any one of (1) to (4), wherein the contact layer is a continuous film.
(8) The transistor according to any one of (1) to (7), wherein the contact layer extends to both sides of the semiconductor layer via an end face of the semiconductor layer.
(9) The transistor according to any one of (1) to (8), wherein the semiconductor layer includes an organic semiconductor material.
(10) A plurality of pixels and a transistor for driving the plurality of pixels are provided. The transistor includes a gate electrode, a semiconductor layer facing the gate electrode with an insulating layer interposed therebetween, and an electric current connected to the semiconductor layer. Pair of source / drain electrodes connected to each other, and a contact layer provided in a carrier movement path between each of the pair of source / drain electrodes and the semiconductor layer, and having an end surface covered with the source / drain electrode And a display device.
(11) A display device including a plurality of pixels and a transistor for driving the plurality of pixels, the transistor including a gate electrode, a semiconductor layer facing the gate electrode with an insulating layer interposed therebetween, and the semiconductor A pair of source / drain electrodes electrically connected to the layer, and a carrier moving path between each of the pair of source / drain electrodes and the semiconductor layer, and an end face of the pair is covered with the source / drain electrodes. Electronic device with a contact layer.

1, 1A, 2, 2A ... transistor, 11 ... substrate, 12 ... gate electrode, 13 ... gate insulating layer, 14 ... organic semiconductor layer, 15A, 15B, 25A, 25B, 35A, 35B, 45A, 45B ... contact layer, 16A, 16B ... Source / drain electrodes, 90 ... Display device, 91 ... Drive panel, 10 ... Pixel, 110 ... Display area, 120 ... Signal line drive circuit, 130 ... Scanning Line drive circuit, 150... Pixel drive circuit, Tr1, Tr2.

Claims (11)

A gate electrode;
A semiconductor layer facing the gate electrode with an insulating layer in between;
A pair of source / drain electrodes electrically connected to the semiconductor layer;
A transistor comprising a contact layer provided in a carrier movement path between each of the pair of source / drain electrodes and the semiconductor layer, and having an end surface covered with the source / drain electrode. The transistor according to claim 1, wherein the contact layer is provided between the semiconductor layer and the pair of source / drain electrodes. The contact layer is constituted by a pair of first contact layer and second contact layer facing each other disposed between the semiconductor layer and the pair of source / drain electrodes,
The transistor according to claim 1, wherein the opposing surfaces of the first contact layer and the second contact layer are also covered with the source / drain electrodes. The contact layer is provided on the semiconductor layer;
The transistor according to claim 1, wherein the pair of source / drain electrodes are in contact with the insulating layer. The transistor according to claim 1, wherein the contact layer is in a discontinuous state having a plurality of gaps. The transistor according to claim 5, wherein the discontinuous state of the contact layer is formed by terminating vacuum film formation before becoming a continuous film. The transistor according to claim 1, wherein the contact layer is a continuous film. The transistor according to claim 1, wherein the contact layer extends to both sides of the semiconductor layer via an end face of the semiconductor layer. The transistor according to claim 1, wherein the semiconductor layer includes an organic semiconductor material. A plurality of pixels and a transistor for driving the plurality of pixels;
The transistor is
A gate electrode;
A semiconductor layer facing the gate electrode with an insulating layer in between;
A pair of source / drain electrodes electrically connected to the semiconductor layer;
A display device comprising: a contact layer provided in a carrier movement path between each of the pair of source / drain electrodes and the semiconductor layer, the end surface of which is covered by the source / drain electrode. A display device having a plurality of pixels and a transistor for driving the plurality of pixels;
The transistor is
A gate electrode;
A semiconductor layer facing the gate electrode with an insulating layer in between;
A pair of source / drain electrodes electrically connected to the semiconductor layer;
An electronic apparatus comprising: a contact layer provided on a carrier moving path between each of the pair of source / drain electrodes and the semiconductor layer, and having an end surface covered with the source / drain electrode.

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