JP2015153902A - Thin film transistor device and manufacturing method of the same - Google Patents

Thin film transistor device and manufacturing method of the same Download PDF

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JP2015153902A
JP2015153902A JP2014026391A JP2014026391A JP2015153902A JP 2015153902 A JP2015153902 A JP 2015153902A JP 2014026391 A JP2014026391 A JP 2014026391A JP 2014026391 A JP2014026391 A JP 2014026391A JP 2015153902 A JP2015153902 A JP 2015153902A
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JP6260326B2 (en
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中村 修
Osamu Nakamura
修 中村
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凸版印刷株式会社
Toppan Printing Co Ltd
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Abstract

PROBLEM TO BE SOLVED: To form a channel light-shielding layer having low optical reflectance without deteriorating characteristics of a semiconductor channel layer of a thin film transistor.SOLUTION: Manufactured is a thin film transistor which comprises on a substrate: a gate electrode; a gate insulation layer which covers a surface of the substrate and a surface of the gate electrode; a semiconductor channel layer on the gate insulation layer, of a semiconductor composed of In-Ga-Zn-O; a channel protection layer on the semiconductor channel layer; a source electrode and a drain electrode; a channel light-shield layer which covers the channel protection layer and represented by a chemical formula RSrMnOwhere R denotes La or Nd or a solid solution of La or Nd, that is, R=LaNd, and composed of perovskite oxide in which a ratio x of Sr is not less than 0.2 and not more than 0.5; and a passivation protection layer provided on an upper layer of the channel light-shield layer.

Description

  The present invention relates to a thin film transistor device using an In—Ga—Zn—O-based amorphous semiconductor as a semiconductor channel layer and a method for manufacturing the same.

Currently, field effect transistors are widely used as semiconductor memory integrated circuits, high-frequency signal amplifiers, and the like. Among them, the thin film transistor is used as a switching element of a flat and thin image display device (FPD) such as a liquid crystal display device (LCD) and an organic EL electroluminescence display device (OLED). In the TFT used for FPD, an amorphous silicon thin film is often used for a semiconductor channel layer formed on a glass substrate. However, the field effect mobility of the semiconductor channel layer has a small defect of less than 1 cm 2 / V · sec.

On the other hand, in recent years, development of a thin film transistor (TFT) using an In—Ga—Zn—O-based (hereinafter referred to as IGZO) amorphous oxide semiconductor as a semiconductor channel layer has been actively performed (Non-Patent Document 1). ). Although this semiconductor is amorphous, its mobility may reach 10 cm 2 / V · sec, and it is a highly promising semiconductor device in the future for higher definition.

  However, this amorphous IGZO TFT has a problem that the threshold voltage value Vth of the TFT greatly moves to the negative side in the negative bias light stress (NBLS) test, which is a serious problem for practical use.

JP 2013-232598 A

K. Nomura et al. , Nature, 432, 488 (2004). K. Nomura et al. , Appl. phys. Lett. 99, 053505 (2011)

When the structure of the thin film transistor is a bottom gate type as in the case of amorphous silicon, the structure is formed by forming a gate electrode 2 on a non-alkaline glass substrate 1 as shown in FIG. The semiconductor channel layer 4 of the amorphous oxide semiconductor InGaZnO 4 , the channel protective layer 10, the source electrode 5 and the drain electrode 6, and the insulating layer 20 having a passivation function thereon.

As described above, the key to practical use in a thin film transistor in which an In—Ga—Zn—O-based amorphous oxide semiconductor, for example, InGaZnO 4 is used as the semiconductor channel layer 4 is the shift amount of the threshold voltage value Vth in the NBLS test. (ΔVth) is reduced.

When a metal such as chrome (Cr) is used as the channel light shielding layer 11 for reducing ΔVth, the channel light shielding layer 11 is made of a metal and has high reflectivity. , Resulting in poor display quality. According to Non-Patent Document 2, the light causing ΔVth is light having a quantum energy of 2.5 eV or more. Therefore, the channel light shielding layer 11 is preferably made of a material other than metal, a semimetal having a plasma edge in the infrared region and having a low reflectance in the visible light region, or a semiconductor having a band gap of 2.5 eV or less.

  When the structure of the thin film transistor is a bottom gate type, in an actual device, the channel protective layer 10 having a thickness of about 100 nm is often provided on the upper surface of the amorphous semiconductor channel layer 4. Further, a passivation protective layer 20 having a thickness of about 300 to 400 nm is often provided on the upper surfaces of the source electrode 5 and the drain electrode 5.

When the SiO 2 film made by plasma CVD is used as the channel protective layer 10, hydrogen is taken into the semiconductor channel layer 4 of IGZO during the film formation and the threshold voltage is shifted to the negative side. In order to avoid such a shift of the threshold voltage to the negative side, it is desirable to form the film under the condition that the hydrogen in the SiO 2 film is reduced in the plasma CVD film formation.

However, in order to provide the channel light shielding layer 11 on the channel protective layer 10 manufactured under such conditions, as described above, a semimetal having a low reflectance in the visible light region or a semiconductor having a band gap of 2.5 eV or less, For example, when an ITO film or the like is formed by a sputtering apparatus, the semiconductor channel layer 4 made of, for example, an InGaZnO 4 oxide semiconductor under the channel protective layer 10 is affected, and this affects the negative side of the threshold voltage value Vth of the TFT. Bring about changes.

Such a change similarly occurs when the channel light shielding layer 11 is formed by sputtering on the insulating layer 20 having a passivation function. Therefore, it is not desirable to form the channel light shielding layer 11 by sputtering after the SiO 2 film formed by plasma CVD.

  On the other hand, Patent Document 1 and the like propose a coating process or a printing process, that is, a process that does not require a vacuum, for example, a method of forming an oxide semiconductor by a coating method, and development of inexpensive manufacturing means is being promoted. .

  The present invention has been made in view of the above situation, and an object of the present invention is to reduce the reflectance of the channel light shielding layer 11 and further to improve the characteristics of the semiconductor channel layer due to the formation of the channel light shielding layer 11. In order to prevent deterioration, a technique for forming a channel light shielding layer 11 of a thin film transistor by a coating method is proposed.

In order to solve the above problems, the present invention provides a gate electrode provided on a substrate,
A gate insulating layer covering the surface of the substrate and the surface of the gate electrode;
A semiconductor channel layer of semiconductor composed of In-Ga-Zn-O provided on the gate insulating layer;
A channel protective layer provided on the semiconductor channel layer;
A source electrode and a drain electrode formed in electrical connection on the semiconductor channel layer;
The channel protective layer is covered, and R is La or Nd or a solid solution thereof, that is, R 1−x Sr x MnO 3 in which R = La 1-y Nd y , and the ratio x of Sr is 0.2. A perovskite-type oxide channel shading layer of 0.5 or less and
A thin film transistor device comprising a passivation protective layer provided on an upper layer of the source electrode and the drain electrode.

With this configuration, the present invention has the effect of forming a channel light-shielding layer formed by a coating method without deteriorating the characteristics of the semiconductor channel layer, and has good optical properties with low light reflectance of the channel light-shielding layer. The thin film transistor device having the above can be obtained.

The present invention also includes a gate electrode provided on a substrate,
A gate insulating layer covering the surface of the substrate and the surface of the gate electrode;
A semiconductor channel layer of semiconductor composed of In-Ga-Zn-O provided on the gate insulating layer;
A channel protective layer provided on the semiconductor channel layer;
A source electrode and a drain electrode formed in electrical connection on the semiconductor channel layer;
A passivation protective layer covering the channel protective layer and the source and drain electrodes;
A chemical formula of R 1-x Sr x MnO 3 on the surface of the passivation protective layer and covering the channel protective layer, wherein R is La or Nd or a solid solution thereof, that is, R = La 1-y Nd y And a channel light-shielding layer of a perovskite oxide in which the Sr ratio x is 0.2 or more and 0.5 or less.

The present invention is the above-described thin film transistor device, wherein the channel protective layer is SiO 2 .

The present invention also includes a step of forming a gate electrode on a substrate;
Forming a gate insulating layer covering the surface of the substrate and the surface of the gate electrode;
Forming a semiconductor channel layer of a semiconductor composed of In-Ga-Zn-O on the gate insulating layer;
Forming a channel protective layer on the semiconductor channel layer;
Forming a source electrode and a drain electrode electrically connected to the semiconductor channel layer;
The channel protective layer is covered, and R is La or Nd or a solid solution thereof, that is, R 1−x Sr x MnO 3 in which R = La 1-y Nd y , and the ratio x of Sr is 0.2. A step of forming a channel light-shielding layer of a perovskite type oxide of 0.5 or less by a coating method;
Forming a passivation protective layer on the source electrode and the drain electrode. A method for manufacturing a thin film transistor device, comprising:

The present invention also includes a step of forming a gate electrode on a substrate;
Forming a gate insulating layer covering the surface of the substrate and the surface of the gate electrode;
Forming a semiconductor channel layer of a semiconductor composed of In-Ga-Zn-O on the gate insulating layer;
Forming a channel protective layer on the semiconductor channel layer;
Forming a source electrode and a drain electrode electrically connected to the semiconductor channel layer;
Forming a passivation protective layer covering the channel protective layer and the source and drain electrodes;
A chemical formula of R 1-x Sr x MnO 3 on the surface of the passivation protective layer and covering the channel protective layer, wherein R is La or Nd or a solid solution thereof, that is, R = La 1-y Nd y And a step of forming a perovskite oxide channel light-shielding layer having a Sr ratio x of 0.2 or more and 0.5 or less by a coating method.

Further, the present invention is a method of manufacturing the above thin film transistor device, wherein the step of forming the channel light-shielding layer by applying a coating method includes applying a nitrate of La or Nd or a mixture thereof, a nitrate of Sr, and a nitrate of Mn. Perovskite-type oxidation represented by the chemical formula of R 1-x Sr x MnO 3 where R is La or Nd or a solid solution thereof, that is, R = La 1-y Nd y , by heating the nitric acid later to thermally decompose A thin-film transistor device manufacturing method is characterized in that a channel light-shielding layer is formed.

In the present invention, R is La or Nd or a solid solution thereof, that is, R = La 1-y Nd y , above a semiconductor channel layer of an amorphous oxide semiconductor of In—Ga—Zn—O (hereinafter referred to as IGZO). A perovskite-type oxide channel light-shielding layer represented by a chemical formula of R 1-x Sr x MnO 3 and having an Sr ratio x of 0.2 to 0.5 is formed. Since this channel light shielding layer can be formed by a coating method, there is an effect that a channel light shielding layer that does not adversely affect the characteristics of the semiconductor channel layer can be formed.

  Further, since the channel light shielding layer has a low light reflectance, there is an effect that a thin film transistor device having good optical characteristics can be obtained.

It is a schematic sectional drawing which shows the structure of the conventional thin-film transistor. It is a schematic sectional drawing which shows the structure of the thin-film transistor of embodiment of this invention. It is a schematic sectional drawing which shows the structure of the thin-film transistor of embodiment of this invention. It is an absorption coefficient spectrum of InGaZnO 4 used for the semiconductor channel layer of the embodiment of the present invention. Is the absorption coefficient spectra of La 0.7 Sr 0.3 MnO 3 channels shielding layer embodiment of the present invention.

<First Embodiment>
The structure of the thin film transistor according to the first embodiment of the present invention will be described below with reference to FIG. The thin film transistor of this embodiment includes a gate electrode 2, a gate insulating layer 3 formed on the gate electrode 2 so as to cover the gate electrode 2, a semiconductor channel layer 4 on the gate insulating layer 3, A bottom-gate / top-contact thin film transistor including a source electrode 5 and a drain electrode 6 connected to the semiconductor channel layer 4. A channel protection layer 10 and a channel light shielding layer 11 are formed on the semiconductor channel layer 4, and an insulating layer 20 having a passivation function is further formed thereon.

(Principle of the present invention)
In the following, the principle of the present invention will be described. In the thin film transistor of the present invention, a perovskite oxide is used for the channel light shielding layer 11. Among the perovskite oxides, some compounds, such as La 1-x Sr x MnO 3 and related compounds, have long been known as electrically conductive oxides. In this composition, La can be replaced with other rare earth elements, and Sr can also be replaced with Pb or the like.

It is bivalent manganese and trivalent manganese that control electrical conductivity. The presence of both valences causes conduction due to d electrons. That is, in the composition of LaMnO 3 , lanthanum is trivalent, manganese is trivalent, and has no electrical conductivity. That is, electrical conduction does not occur with trivalent manganese alone, but if a portion of lanthanum is replaced with divalent strontium, d electrons can move between the divalent manganese and the trivalent manganese. Therefore, this material has electrical conductivity.

This d-electron transfer can cause superexchange interactions, which can make the material ferromagnetic. Therefore, the channel light shielding layer 11 can also use ferromagnetic properties.

  Thus, the valence change of a part of Mn due to the substitution of a part of trivalent La with a divalent ion causes electrical conduction.

  Since the electric conductivity is generated by the valence mixing of Mn, the channel light shielding layer 11 of the present invention has an effect of not having metallic luster. And since the plasma edge is in the infrared, there is an effect that the reflectance in the visible light region is small.

  FIG. 4 shows an absorption coefficient spectrum of the IGZO film. In this example, the band gap (Tauc gap is 3.1 eV), and it has a large absorption coefficient.

FIG. 5 shows an absorption coefficient spectrum of La 0.7 Sr 0.3 MnO 3 used for the channel light shielding layer 11 of the thin film transistor of the present invention. As shown in FIG. 5, La 0.7 Sr 0.3 MnO 3 used for the channel light shielding layer 11 of the present invention has a large absorption coefficient of 100000 / cm over a wide range, and therefore, the semiconductor channel layer 4 of the present invention. It is suitable as the channel light shielding layer 11 of the In—Ga—Zn—O based amorphous semiconductor.

In addition, the light shielding film 11 of the La 1-x Sr x MnO 3 film can be easily formed by a coating method as will be described later, and an In—Ga—Zn—O-based (IGZO) film such as sputtering film formation. It can be formed without adversely affecting the semiconductor channel layer 4 of the amorphous oxide semiconductor. Furthermore, when the whole or most of the manufacturing process of the thin film transistor is applied by a coating method or a printing method, there is an effect that the light shielding film 11 can be formed with good consistency with those manufacturing processes.

(Production method)
Hereafter, each component of the thin-film transistor of this invention is demonstrated in detail along a manufacturing process.

(substrate)
As thin film transistor substrate 1, in addition to non-alkali glass substrate and quartz glass substrate, polymethyl methacrylate, polyacrylate, polycarbonate, polystyrene, polyethylene sulfide, polyethersulfone, polyolefin, polyethylene terephthalate, polyethylene naphthalate, cycloolefin polymer, poly Ether sulfone, polyvinyl fluoride film, ethylene-tetrafluoroethylene copolymer resin, weather resistant polypropylene, glass fiber reinforced acrylic resin film, glass fiber reinforced polycarbonate, transparent polyimide, fluororesin, cyclic polyolefin resin can be used However, the present invention is not limited to these.

(Gas barrier layer)
When the thin film transistor substrate 1 is an organic film, a gas barrier layer (not shown) for improving the durability of the element on the active matrix substrate can be formed on the surface or the inner layer of the substrate 1. Examples of the gas barrier layer include aluminum oxide (Al 2 O 3 ), silicon oxide (SiO 2 ), silicon nitride (SiN), silicon oxynitride (SiON), silicon carbide (SiC), and diamond-like carbon (DLC). The present invention is not limited to these.

These gas barrier layers can also be used by laminating two or more layers. The gas barrier layer may be formed only on one side of the substrate 1 using an organic film, or may be formed on both sides. The gas barrier layer can be formed using a vacuum deposition method, an ion plating method, a sputtering method, a laser ablation method, a plasma CVD (Chemical Vapor Deposition) method, a hot wire CVD method, a sol-gel method, and the like. It is not limited.

(Gate electrode)
First, the electrode portion of the gate electrode 2 and each wiring are formed on the substrate 1. The electrode portion and the wiring portion do not need to be clearly separated, and in the present invention, the electrode portion and the wiring portion of the constituent elements of each thin film transistor are collectively referred to as an electrode. In addition, when it is not necessary to distinguish between the electrode portion and the wiring portion, the components including the electrode portion and the wiring portion are described as a gate electrode, a source electrode, and a drain electrode, for example.

  Gold (Au), silver (Ag), copper (Cu), cobalt (Co), tantalum (Ta), molybdenum are used for the thin film transistor electrodes (gate electrode 2, source electrode 5, drain electrode 6 and the like) and wirings. Metals such as (Mo), chromium (Cr), aluminum (Al), nickel (Ni), tungsten (W), platinum (Pt), and titanium (Ti) can be used.

Further, each electrode includes indium oxide (In 2 O 3 ), tin oxide (SiO 2 ), zinc oxide (ZnO), cadmium oxide (CdO), indium cadmium oxide (CdIn 2 O 4 ), and cadmium tin oxide (Cd 2). It can also be formed of an oxide material such as SnO 4 ), zinc tin oxide (Zn 3 SnO 4 ), or indium zinc oxide (In—Zn—O).

  In addition, an electrode obtained by doping impurities into this oxide material is also preferably used. For example, indium oxide doped with tin (Sn), molybdenum (Mo), titanium (Ti), tin oxide doped with antimony (Sb) or fluorine (F), zinc oxide indium, aluminum, gallium ( For example, doped with Ga). In addition, the conductive oxide material and gold (Au), silver (Ag), copper (Cu), cobalt (Co), tantalum (Ta), molybdenum (Mo), chromium (Cr), aluminum (Al), nickel ( An electrode in which a plurality of thin films of metals such as Ni), tungsten (W), platinum (Pt), and titanium (Ti) are stacked can also be used.

  The gate electrode 2, the source electrode 5, and the drain electrode 6 may be made of the same material, or may be made of different materials. However, in order to reduce the number of processes, it is more desirable that the gate electrode 2, the source electrode 5, and the drain electrode 6 are made of the same material.

  These wiring and electrodes of the gate electrode 2, the source electrode 5, and the drain electrode 6 are vacuum deposition, ion plating, sputtering, laser ablation, plasma CVD, photo CVD, or screen printing, letterpress printing, Although it can form by the inkjet method etc., it is not limited to these, A well-known general method can be used. Patterning can be performed, for example, by forming a resist film on a pattern forming portion using a photolithography method and removing an unnecessary portion by etching. However, this is not limited to this method, and a known general patterning method is used. Can be used.

(Gate insulation layer)
Next, a gate insulating layer 3 is formed so as to cover the gate electrode 2. Although materials used in the gate insulating layer 3 of the thin film transistor is not particularly limited, SiO 2, SiN x, SiON , Al 2 O 3, Ta 2 O 5, Y 2 O 3, HfO 2, HfAlO, ZrO 2, TiO 2 , etc. Inorganic materials, or polyacrylates such as PMMA (polymethylmethacrylate), PVA (polyvinyl alcohol), PS (polystyrene), transparent polyimide, polyester, epoxy, polyvinylphenol, polyvinyl alcohol, and the like. It is not something.

The resistivity of the insulating material of the gate insulating layer 3 is desirably 10 11 Ωcm or more, more preferably 10 14 Ωcm or more in order to suppress gate leakage current.

  The gate insulating layer 3 is formed by a dry deposition method such as a vacuum deposition method, an ion plating method, a sputtering method, a laser ablation method, a plasma CVD method, a photo CVD method, a hot wire CVD method, a spin coating method, a dip coating method, a screen. A wet film forming method such as a printing method is appropriately used depending on the material. These gate insulating layers 3 may be used as a single layer, or two or more layers may be laminated. Further, the composition may be inclined in the growth direction.

(Semiconductor channel layer)
The semiconductor channel layer 4 is formed on the insulator layer 2 at a position directly above the gate electrode 2. The semiconductor channel layer 4 is preferably an InGaZnO-based amorphous semiconductor.

(Modification 1)
Here, the semiconductor channel layer 4 can also be formed of an oxide semiconductor material whose main component is a metal oxide. For example, the oxide semiconductor material is zinc oxide (Zn), indium (In), tin (Sn), tungsten (W), magnesium (Mg), and an oxide containing one or more elements of gallium. (ZnO), indium oxide (In 2 O 3 ), indium zinc oxide (InZnO-based), tin oxide (SnO), and tungsten oxide (WO x ) can be given. The structure of these materials may be any of single crystal, polycrystal, microcrystal, mixed crystal of crystal and amorphous, nanocrystal scattered amorphous, and amorphous.

  The semiconductor channel layer 4 can be formed using a method such as a CVD method, a sputtering method, a pulse laser deposition method, a vacuum evaporation method, or a sol-gel method. Examples of sputtering include RF magnetron sputtering and DC sputtering, and examples of vacuum deposition include heat deposition, electron beam deposition, and ion plating, but are not limited thereto.

  The film thickness of the semiconductor channel layer 4 is preferably 20 nm or more. Patterning can be performed, for example, by forming a resist film on a pattern forming portion using a photolithography method and removing an unnecessary portion by etching. However, this is not limited to this method, and a known general patterning method is used. Can be used.

(Channel protection layer)
Next, a layer that becomes the channel protection layer 10 is formed on the entire surface of the gate insulating layer 3 and the semiconductor channel layer 4. An inorganic material such as silicon oxide (SiO 2 ) silicon nitride SiN x , SiON, Al 2 O 3 can be selected for the channel protection layer 10 according to the embodiment of the present invention. In the case of using silicon oxide, it is desirable to select silicon oxide.

The channel protective layer 10 preferably has a resistivity of 1 × 10 11 Ωcm or more, particularly 1 × 10 14 Ωcm or more, so as not to electrically affect the semiconductor channel layer 4 of the thin film transistor according to the present invention. If the channel protective layer 10 is an inorganic material, a thickness of about 100 nm is suitably used by using a dry film forming method such as a vacuum deposition method, an ion plating method, a sputtering method, a laser ablation method, a plasma CVD method, and a photo CVD method as appropriate. To form. Two or more channel protective layers 10 may be laminated and used.

Here, when the SiO 2 film made by plasma CVD is used as the channel protective layer 10,
In the film formation by plasma CVD, the film is formed under the condition that hydrogen in the SiO 2 film is reduced.

(Source / drain electrodes)
Next, a conductive layer for the source / drain electrode 6 is formed on the entire surface of the substrate 1 on the gate insulating layer 3, the semiconductor channel layer 4, and the channel protective layer 10. The conductive layer can be patterned by, for example, forming a resist film on a pattern formation portion using a photolithography method and removing unnecessary portions by etching. The patterning method can be used.

(Channel shading layer)
Next, the channel light shielding layer 11 is formed on the channel protective film 11. As shown in FIG. 2, the channel light shielding layer 11 covers exposed portions of the semiconductor channel layer 4 other than the source electrode 5 and the drain electrode 6, and there is no particular limitation other than that. R 1−x Sr x MnO 3 (0.2 ≦ x ≦ 0.5) in which R is La or Nd or a solid solution of La and Nd, that is, R = La 1-y Nd y is used for the channel light shielding layer 11. Since this is the most important point of the present invention, the film forming method will be described below in the case of La 0.7 Sr 0.3 MnO 3 .

Nitrate La (NO 3 ) 3 .6H 2 O, Sr (NO 3 ) 2 and Mn (NO 3 ) 3
A solution obtained by dissolving 6H 2 O in a mixed solution of 1-methyl-2-pyrrolidone or water at a molar ratio of 0.7: 0.3: 1 is applied to the substrate 1 on which the device is formed halfway. Application may be any of dipping, spraying, brush coating, or spin coating in which the solution is dropped and spread while rotating the substrate 1.

(Nitrate pyrolysis method)
Next, the substrate 1 is gently dried at 50 to 160 ° C. to remove 1-methyl-2-pyrrolidone and water. Thereafter, the temperature is raised to a higher temperature. The higher the temperature, the less oxygen deficiency and the lower the resistance. In the present invention, however, the channel light shielding layer 11 does not need to have a low resistance, and the influence on the substrate 1, the electrode, the semiconductor channel layer 4, and other layers. The temperature may be increased within the allowable range. For the patterning, a known general patterning method can be used. The nitrate group NO 3 of the nitrate is thermally decomposed and removed by this drying and heating process, thereby forming a channel light shielding layer 11 of La (1-x) Sr x MnO 3 (0.2 ≦ x ≦ 0.5). .

Here, La (NO 3 ) 3 .6H 2 O, Sr (NO 3 ) 2 and Mn (NO 3 ) 3
A pattern of a solution in which 6H 2 O is dissolved in a mixed solution of 1-methyl-2-pyrrolidone or water at a molar ratio of 0.7: 0.3: 1 is directly printed, dried, heated and heated to La The channel light shielding layer 11 of (1-x) Sr x MnO 3 can also be formed.

  In the above example, the case where the ratio x of Sr is 0.3 has been described. However, the ratio x of Sr is not limited to 0.3, and the ratio x of Sr is 0.2 ≦ x ≦ 0.5. By forming the film within the range, the channel light shielding layer 11 can be formed.

(Modification 2)
In the second modification, La is replaced with Nd. That is, a solution obtained by dissolving Nd (NO 3 ) 3 · 6H 2 O, Sr (NO 3 ) 2 and Mn (NO 3 ) 3 · 6H 2 O in a mixed solution of 1 methyl 2 pyrrolidone or water. The film formed by coating or printing is heated to decompose and remove nitric acid to form a channel light shielding layer 11 of Nd (1-x) Sr x MnO 3 (0.2 ≦ x ≦ 0.5). be able to.

(Modification 3)
In the third modification, a mixture of La and Nd is used. That is, a mixture of La (NO 3 ) 3 · 6H 2 O and Nd (NO 3 ) 3 · 6H 2 O, Sr (NO 3 ) 2 , Mn (NO 3 ) 3 · 6H 2 O and 1 methyl 2 A film formed by coating or printing using a solution dissolved in a mixed solution of pyrrolidone or water is heated to decompose and remove nitric acid, so that R is a solid solution of La and Nd, that is, R = La 1− The channel light shielding layer 11 of R 1-x Sr x MnO 3 (0.2 ≦ x ≦ 0.5) that is y Nd y can be formed.

(Protective layer for passivation)
Next, a passivation protective layer 20 having a thickness of about 300 to 400 nm is formed on the entire surface of the gate insulating layer 3 and the semiconductor channel layer 4. The protective layer 20 can be made of an inorganic material such as silicon oxide (SiO 2 ) silicon nitride SiN x , SiON, Al 2 O 3 or the like.

It should be noted that the layer forming process other than the channel light-shielding layer 11 in each of the above processes can appropriately form a corresponding layer by a coating method or a printing method. In particular, when the whole or most of the manufacturing process of the thin film transistor is to be a coating method or a printing method, those manufacturing processes, and R is La or Nd or a solid solution thereof, that is, R = La 1-y Nd y The manufacturing process of the channel light-shielding layer 11 of a certain R 1-x Sr x MnO 3 (0.2 ≦ x ≦ 0.5) has an effect that the matching is improved and the thin film transistor can be manufactured satisfactorily.

<Second Embodiment>
A second embodiment will be described with reference to FIG. In the second embodiment as well, a thin film transistor can be manufactured by the same method as in the first embodiment as follows.

That is, the thin film transistor of the second embodiment can be manufactured by the following steps.
(Process 1)
A gate electrode 2 is formed on the substrate 1.
(Process 2)
A gate insulating layer 3 covering the surface of the substrate 1 and the surface of the gate electrode 2 is formed.
(Process 3)
A semiconductor channel layer 4 made of In—Ga—Zn—O is formed on the gate insulating layer 3.
(Process 4)
A channel protective layer 10 is formed on the semiconductor channel layer 4.
(Step 5),
A source electrode 5 and a drain electrode 6 that are electrically connected to the semiconductor channel layer 4 are formed.
(Step 6)
A passivation protective layer 20 is formed to cover the channel protective layer 10 and the source and drain electrodes 5 and 6.
(Step 7)
On the surface of the passivation protective layer 20, covering the channel protective layer, R is La or Nd or a solid solution thereof, that is, R 1−x Sr x MnO 3 where R = La 1-y Nd y A thin film transistor is manufactured by forming a channel light shielding layer 11 of a perovskite oxide having x of 0.2 or more and 0.5 or less by a coating method.

(Active matrix substrate)
When an active matrix substrate used for driving a display or the like is manufactured using the thin film transistor of the present invention, a passivation protective layer 20 that insulates the source electrode 5 from the pixel electrode is formed as an interlayer insulating layer of the active matrix substrate.

The interlayer insulating layer of the active matrix substrate preferably has a resistivity of 1 × 10 11 Ωcm or more, particularly 1 × 10 14 Ωcm or more in order to insulate the wiring of the source electrode 5 and the pixel electrodes. Depending on the material, the interlayer insulating layer is appropriately formed by a vacuum deposition method, an ion plating method, a sputtering method, a laser ablation method, a dry film formation method such as a plasma CVD, a photo CVD method, a hot wire CVD method, or a spin coating method. It can be formed using a wet film formation method such as a method, a dip coating method, or a screen printing method.

  Two or more of these interlayer insulating layers may be stacked. Moreover, these interlayer insulation layers can also be formed in the structure which inclined toward the longitudinal direction and the distribution of the composition inclined.

  Subsequently, through holes are provided in the interlayer insulating layer of the active matrix substrate, a conductive material is formed on the interlayer insulating layer so as to be connected to the drain electrode 6, and patterned into a predetermined pixel shape to manufacture the active matrix substrate. .

  An image display device is manufactured by laminating an image display element and a counter electrode on the active matrix substrate manufactured as described above.

  Examples of the image display device include an electrophoretic display medium (electronic paper), a liquid crystal display medium, an organic EL, an inorganic EL, and the like.

  As a method for laminating the image display elements, the active matrix substrate of the present invention, the counter substrate, the counter electrode, and a laminate of the image display elements are bonded together, or the image display element, the counter electrode, and the counter substrate are sequentially placed on the pixel electrode. The method can be appropriately selected depending on the type of image display element such as a method of stacking.

  Note that the transistor of the present invention can be used as a transistor of a switching element or a driving element of an image display device using a liquid crystal or an OLED element.

  The image display device using the transistor of the present invention can be applied to a wide range of fields including a mobile phone display, a personal digital assistant (PDA), a computer display, an automobile information display, a TV monitor, or general lighting.

  In addition, the base substrate 1 on which the transistor of the present invention is formed can be a flexible substrate such as a plastic film, and can be applied to an IC card or an ID tag.

1 ... substrate 2 ... gate electrode (gate wiring)
3 ... Gate insulating layer 4 ... Semiconductor channel layer 5 ... Source electrode (source wiring)
6... Drain electrode 10 .. Channel protective layer 11.. Channel light shielding layer 20.. Passivation protective layer

Claims (6)

  1. A gate electrode provided on the substrate;
    A gate insulating layer covering the surface of the substrate and the surface of the gate electrode;
    A semiconductor channel layer of semiconductor composed of In-Ga-Zn-O provided on the gate insulating layer;
    A channel protective layer provided on the semiconductor channel layer;
    A source electrode and a drain electrode formed in electrical connection on the semiconductor channel layer;
    The channel protective layer is covered, and R is La or Nd or a solid solution thereof, that is, R 1−x Sr x MnO 3 in which R = La 1-y Nd y , and the ratio x of Sr is 0.2. A perovskite-type oxide channel shading layer of 0.5 or less and
    A thin film transistor device comprising: a passivation protective layer provided on an upper layer of the source electrode and the drain electrode.
  2. A gate electrode provided on the substrate;
    A gate insulating layer covering the surface of the substrate and the surface of the gate electrode;
    A semiconductor channel layer of semiconductor composed of In-Ga-Zn-O provided on the gate insulating layer;
    A channel protective layer provided on the semiconductor channel layer;
    A source electrode and a drain electrode formed in electrical connection on the semiconductor channel layer;
    A passivation protective layer covering the channel protective layer and the source and drain electrodes;
    A chemical formula of R 1-x Sr x MnO 3 on the surface of the passivation protective layer and covering the channel protective layer, wherein R is La or Nd or a solid solution thereof, that is, R = La 1-y Nd y And a channel light shielding layer of a perovskite oxide in which the Sr ratio x is 0.2 or more and 0.5 or less.
  3. A thin film transistor device according to claim 1 or 2, a thin film transistor device wherein the channel protective layer is SiO 2.
  4. Forming a gate electrode on the substrate;
    Forming a gate insulating layer covering the surface of the substrate and the surface of the gate electrode;
    Forming a semiconductor channel layer of a semiconductor composed of In-Ga-Zn-O on the gate insulating layer;
    Forming a channel protective layer on the semiconductor channel layer;
    Forming a source electrode and a drain electrode electrically connected to the semiconductor channel layer;
    The channel protective layer is covered, and R is La or Nd or a solid solution thereof, that is, R 1−x Sr x MnO 3 in which R = La 1-y Nd y , and the ratio x of Sr is 0.2. A step of forming a channel light-shielding layer of a perovskite type oxide of 0.5 or less by a coating method;
    Forming a passivation protective layer on the source and drain electrodes. A method of manufacturing a thin film transistor device, comprising:
  5. Forming a gate electrode on the substrate;
    Forming a gate insulating layer covering the surface of the substrate and the surface of the gate electrode;
    Forming a semiconductor channel layer of a semiconductor composed of In-Ga-Zn-O on the gate insulating layer;
    Forming a channel protective layer on the semiconductor channel layer;
    Forming a source electrode and a drain electrode electrically connected to the semiconductor channel layer;
    Forming a passivation protective layer covering the channel protective layer and the source and drain electrodes;
    A chemical formula of R 1-x Sr x MnO 3 on the surface of the passivation protective layer and covering the channel protective layer, wherein R is La or Nd or a solid solution thereof, that is, R = La 1-y Nd y And a step of forming a channel light shielding layer of a perovskite oxide having a Sr ratio x of 0.2 or more and 0.5 or less by a coating method.
  6. 6. The method of manufacturing a thin film transistor device according to claim 4, wherein the step of forming the channel light-shielding layer by coating is performed by applying a nitrate of La or Nd or a mixture thereof, a nitrate of Sr, and a nitrate of Mn. Perovskite-type oxidation represented by the chemical formula of R 1-x Sr x MnO 3 where R is La or Nd or a solid solution thereof, that is, R = La 1-y Nd y , by heating the nitric acid later to thermally decompose A method of manufacturing a thin film transistor device, comprising: forming a channel light shielding layer of an object.
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