KR102586429B1 - Thin film trnasistor having protecting layer for blocking hydrogen, method for manufacturing the same and display device comprising the same - Google Patents

Abstract

One embodiment of the present invention includes an oxide semiconductor layer on a substrate, a gate insulating film on the oxide semiconductor layer, a gate electrode on the gate insulating film, and the oxide in a source electrode connection area on the surface of the oxide semiconductor layer. A source electrode connected to the semiconductor layer, a drain electrode spaced apart from the source electrode and connected to the oxide semiconductor layer in a drain electrode connection area on the surface of the oxide semiconductor layer, and a drain electrode between the gate insulating film and the source electrode connection area and the gate insulating film and drain electrode. A thin film transistor comprising a protective film between connection regions is provided.

Description

Thin film transistor having a hydrogen blocking protective film, manufacturing method thereof, and display device including the same

The present invention relates to a thin film transistor having a protective film for blocking hydrogen, a method of manufacturing such a thin film transistor, and a display device including such a thin film transistor.

Transistors are widely used as switching devices or driving devices in the electronic device field. In particular, since thin film transistors can be manufactured on glass or plastic substrates, they are used as switching elements in display devices such as liquid crystal display devices or organic light emitting devices. It is widely used.

Based on the material that makes up the active layer, the thin film transistor is an amorphous silicon thin film transistor in which amorphous silicon is used as the active layer, a polycrystalline silicon thin film transistor in which polycrystalline silicon is used as the active layer, and an oxide semiconductor in which an oxide semiconductor is used as the active layer. It can be classified into an oxide semiconductor thin film transistor.

Amorphous silicon thin film transistors (a-Si TFTs) have the advantage of short manufacturing process time and low production costs because amorphous silicon can be deposited within a short time to form an active layer, while mobility is low. Due to low current driving ability and changes in threshold voltage, it has the disadvantage of limiting its use in active matrix organic light emitting devices (AMOLED).

A polycrystalline silicon thin film transistor (poly-Si TFT) is made by depositing amorphous silicon and then crystallizing the amorphous silicon. Since the manufacturing process of polycrystalline silicon thin film transistors requires a process in which amorphous silicon is crystallized, the number of processes increases, increasing manufacturing costs, and because the crystallization process is performed at a high processing temperature, polycrystalline silicon thin film transistors are suitable for use in large-area devices. There is difficulty in Additionally, due to its polycrystalline nature, it is difficult to ensure uniformity of the polycrystalline silicon thin film transistor.

Oxide semiconductor TFTs have the desired physical properties because the oxide constituting the active layer can be formed at a relatively low temperature, has high mobility, and has a large change in resistance depending on the oxygen content. It has the advantage of being easy to obtain. Additionally, due to the nature of the oxide, the oxide semiconductor is transparent, so it is advantageous for implementing a transparent display. However, oxygen deficiency, etc. may occur in the oxide semiconductor due to hydrogen penetration due to contact with the insulating film or protective film, which may reduce the reliability of the oxide semiconductor.

1. [Display device] Korean Patent Publication No. 10-2014-0064477 2. [Array substrate and manufacturing method thereof] Korean Patent Publication No. 10-2015-0061076

One embodiment of the present invention is intended to provide a thin film transistor including a protective film disposed on a predetermined area of the surface of the oxide semiconductor layer to block hydrogen flowing into the oxide semiconductor layer, particularly the channel region.

Another embodiment of the present invention seeks to provide a method of manufacturing a thin film transistor, including forming a protective film in a predetermined area of the surface of the oxide semiconductor layer.

Another embodiment of the present invention seeks to provide a display device including such a thin film transistor.

One embodiment of the present invention for achieving the above-mentioned technical problem is an oxide semiconductor layer on a substrate, a gate insulating film on the oxide semiconductor layer, a gate electrode on the gate insulating film, and the oxide in the source electrode connection area on the surface of the oxide semiconductor layer. A source electrode connected to the semiconductor layer, a drain electrode spaced apart from the source electrode and connected to the oxide semiconductor layer in a drain electrode connection area on the surface of the oxide semiconductor layer, and a drain electrode between the gate insulating film and the source electrode connection area and the gate insulating film and drain electrode. A thin film transistor comprising a protective film between connection regions is provided.

The protective film is in contact with the oxide semiconductor layer.

At least a portion of the surface of the oxide semiconductor layer toward the gate electrode is exposed from the gate insulating film and the protective film.

The protective film includes metal oxide.

The metal oxide includes aluminum (Al).

The protective film includes aluminum oxide (AlOx), aluminum-neodymium (AlNd) oxide, aluminum-nickel-lanthanum (AlNiLa) oxide, aluminum-nickel-germanium-lanthanum (AlNiGeLa) oxide, and aluminum-cobalt-germanium. -Contains at least one of lanthanum (AlCoGeLa) oxides.

The thin film transistor further includes a light blocking layer disposed on the substrate and a buffer layer disposed on the light blocking layer, and the light blocking layer overlaps the oxide semiconductor layer.

Another embodiment of the present invention includes forming an oxide semiconductor layer on a substrate, forming a gate insulating film on the oxide semiconductor layer, forming a gate electrode on the gate insulating film, and overlapping with the gate insulating film. forming a protective film on the oxide semiconductor layer that is not exposed, and forming a source electrode and a drain electrode respectively connected to the oxide semiconductor layer and spaced apart from each other, wherein the source electrode is a source electrode on the surface of the oxide semiconductor layer. It is connected to the oxide semiconductor layer in an electrode connection area, the drain electrode is connected to the oxide semiconductor layer in a drain electrode connection area on the surface of the oxide semiconductor layer, and the protective film is between the gate insulating film and the source electrode connection area and the A method of manufacturing a thin film transistor formed between a gate insulating film and a drain electrode connection region is provided.

Forming the protective film includes forming an insulating layer for forming a protective film on the substrate including the oxide semiconductor layer and the gate electrode, and patterning the insulating layer for forming a protective film.

The manufacturing method further includes forming a light blocking layer on the substrate and forming a buffer layer on the light blocking layer, and the oxide semiconductor layer is formed to overlap the light blocking layer in a plane.

Another embodiment of the present invention includes a substrate, a thin film transistor disposed on the substrate, and a first electrode connected to the thin film transistor, wherein the thin film transistor includes an oxide semiconductor layer on the substrate, and a gate on the oxide semiconductor layer. An insulating film, a gate electrode on the gate insulating film, a source electrode connected to the oxide semiconductor layer in a source electrode connection area on the surface of the oxide semiconductor layer, and the oxide semiconductor layer in a drain electrode connection area on the surface of the oxide semiconductor layer spaced apart from the source electrode. A display device is provided, including a drain electrode connected to a protective film between the gate insulating film and the source electrode connection area, and between the gate insulating film and the drain electrode connection area.

A thin film transistor according to an embodiment of the present invention includes a protective film disposed in a predetermined area on the surface of the oxide semiconductor layer. The protective film protects the oxide semiconductor layer by acting as a hydrogen blocking film that blocks hydrogen from flowing into the channel region of the oxide semiconductor layer. In addition, since the protective film does not completely surround the oxide semiconductor layer but is disposed only in a partial area of the surface of the oxide semiconductor layer, it allows hydrogen in the oxide semiconductor layer or its lower part to be discharged to the outside, preventing hydrogen from accumulating in the oxide semiconductor layer. is prevented.

More specifically, according to one embodiment of the present invention, the protective film is disposed close to the channel region of the oxide semiconductor layer, thereby blocking hydrogen from penetrating directly into the channel region of the oxide semiconductor layer, but at least a portion of the surface of the oxide semiconductor layer By being exposed from the protective film, a hydrogen emission path is secured, and hydrogen in the oxide semiconductor layer or its lower part can be released to the outside.

The thin film transistor according to an embodiment of the present invention including such a protective film has excellent reliability and stability against hydrogen penetration. As a result, a display device including a thin film transistor according to an embodiment of the present invention can have excellent reliability.

In addition to the effects mentioned above, other features and advantages of the present invention are described below, or can be clearly understood by those skilled in the art from such description and description.

1 is a plan view of a thin film transistor according to an embodiment of the present invention.
FIG. 2 is a cross-sectional view taken along line II' of FIG. 1.
Figure 3 is a graph of hydrogen formation energy.
Figure 4 is a cross-sectional view of a thin film transistor according to another embodiment of the present invention.
Figure 5 is a cross-sectional view of a thin film transistor according to another embodiment of the present invention.
6A to 6I are manufacturing process diagrams of a thin film transistor according to another embodiment of the present invention.
Figure 7 is a schematic cross-sectional view of a display device according to another embodiment of the present invention.
Figure 8 is a schematic cross-sectional view of a display device according to another embodiment of the present invention.
9A and 9B are threshold voltage (Vth) measurement graphs for the thin film transistors of Comparative Example 1 and Example 1, respectively.
Figure 10 is a detailed diagram explaining the conductive length (ΔL) of the channel region.
Figure 11 is a graph of threshold voltage (Vth) measurement according to temperature.

The advantages and features of the present invention and methods for achieving them will become clear by referring to the embodiments described in detail below along with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below and will be implemented in various different forms. The present embodiments only serve to ensure that the disclosure of the present invention is complete and that common knowledge in the technical field to which the present invention pertains is not limited. It is provided to inform those who have the scope of the invention, and the present invention is only defined by the scope of the claims.

The shape, size, ratio, angle, number, etc. shown in the drawings for explaining embodiments of the present invention are illustrative, and the present invention is not limited to the matters shown in the drawings. Like components may be referred to by the same reference numerals throughout the specification. Additionally, in describing the present invention, if it is determined that a detailed description of related known technology may unnecessarily obscure the gist of the present invention, the detailed description is omitted.

When 'includes', 'has', 'consists of', etc. mentioned in this specification are used, other parts may be added unless the expression 'only' is used. If a component is expressed in the singular, the plural is included unless specifically stated.

When interpreting a component, it is interpreted to include the margin of error even if there is no separate explicit description.

In the case of a description of a positional relationship, for example, if the positional relationship of two parts is described as 'on top', 'on the top', 'on the bottom', 'next to', etc., 'immediately' Alternatively, one or more other parts may be placed between the two parts, unless the expression 'directly' is used.

Spatially relative terms such as “below, beneath,” “lower,” “above,” and “upper” refer to one element or component as shown in the drawing. It can be used to easily describe the correlation with other elements or components. Spatially relative terms should be understood as terms that include different directions of the element during use or operation in addition to the direction shown in the drawings. For example, if an element shown in the drawings is turned over, an element described as “below” or “beneath” another element may be placed “above” the other element. Accordingly, the illustrative term “down” may include both downward and upward directions. Likewise, the illustrative terms “up” or “on” can include both up and down directions.

In the case of a description of a temporal relationship, for example, if a temporal relationship is described as 'after', 'successfully after', 'after', 'before', etc., 'immediately' or 'directly' Unless the expression is used, non-continuous cases may also be included.

Although first, second, etc. are used to describe various components, these components are not limited by these terms. These terms are merely used to distinguish one component from another. Accordingly, the first component mentioned below may also be the second component within the technical spirit of the present invention.

The “first horizontal axis direction”, “second horizontal axis direction”, and “vertical axis direction” should not be interpreted as only geometrical relationships in which the relationship between each other is vertical, and the scope in which the configuration of the present invention can function functionally It can mean having a broader direction within.

The term “at least one” should be understood to include all possible combinations from one or more related items. For example, “at least one of the first, second, and third items” means each of the first, second, or third items, as well as two of the first, second, and third items. It can mean a combination of all items that can be presented from more than one.

Each feature of the various embodiments of the present invention can be combined or combined with each other, partially or entirely, and various technical interconnections and operations are possible, and each embodiment may be implemented independently of each other or may be implemented together in a related relationship. It may be possible.

Hereinafter, a thin film transistor, its manufacturing method, and a display device according to an embodiment of the present invention will be described in detail with reference to the attached drawings. In adding reference numerals to components in each drawing, identical components may have the same reference numerals as much as possible even if they are shown in different drawings.

FIG. 1 is a plan view of a thin film transistor 100 according to an embodiment of the present invention, and FIG. 2 is a cross-sectional view taken along line II′ of FIG. 1 .

Referring to Figures 1 and 2, the thin film transistor 100 according to an embodiment of the present invention includes an oxide semiconductor layer 130 on a substrate 110, a gate insulating film 120 on the oxide semiconductor layer 130, and a gate insulating film ( 120), a gate electrode 140 on the surface, a source electrode 150 connected to the oxide semiconductor layer 130 in the source electrode connection area 155 on the surface of the oxide semiconductor layer 130, and an oxide semiconductor layer spaced apart from the source electrode 150. (130) A drain electrode 160 connected to the oxide semiconductor layer 130 in the drain electrode connection area 165 of the surface, and between the gate insulating film 120 and the source electrode connection area 155 and between the gate insulating film 120 and the drain. It includes protective films 171 and 172 between the electrode connection areas 165.

Glass or plastic may be used as the substrate 110. A transparent plastic with flexible properties, for example, polyimide, may be used as the plastic. When polyimide is used as the substrate 110, considering that a high temperature deposition process is performed on the substrate 110, heat-resistant polyimide that can withstand high temperatures may be used.

Although not shown, a buffer layer may be disposed on the substrate 110. The buffer layer may include at least one of silicon oxide and silicon nitride. The buffer layer may be made of a single layer, or may have a stacked structure in which two or more layers are stacked. The buffer layer has excellent water vapor and gas blocking properties and protects the oxide semiconductor layer 130. Additionally, the buffer layer has planarization characteristics and can flatten the upper part of the substrate 110.

The oxide semiconductor layer 130 is disposed on the substrate 110 . The oxide semiconductor layer 130 includes an oxide semiconductor material. For example, the oxide semiconductor layer 130 is IZO (InZnO)-based, IGO (InGaO)-based, ITO (InSnO)-based, IGZO (InGaZnO)-based, IGZTO (InGaZnSnO)-based, GZTO (GaZnSnO)-based, and ITZO (InSnZnO)-based. ) may include at least one of the oxide semiconductor materials. However, the embodiment of the present invention is not limited to this, and the oxide semiconductor layer 130 may be made of other oxide semiconductor materials known in the art.

A gate insulating film 120 is disposed on the oxide semiconductor layer 130. The gate insulating layer 120 may include at least one of silicon oxide and silicon nitride. The gate insulating layer 120 may have a single-layer structure or a multi-layer structure.

Referring to Figures 1 and 2, the gate insulating film 120 is disposed on a portion of the oxide semiconductor layer 130. According to an embodiment of the present invention, one surface of the oxide semiconductor layer 130 facing the gate electrode 140, source electrode 150, and drain electrode 160 is referred to as “the first surface of the oxide semiconductor layer” or “oxide semiconductor layer.” It is called “the surface of the semiconductor layer.” Hereinafter, one surface of the oxide semiconductor layer 130 facing the gate electrode 140, source electrode 150, and drain electrode 160 is simply referred to as “oxide semiconductor layer surface 130a.”

The gate insulating film 120 contacts the oxide semiconductor layer 130 at the gate insulating film contact area 125 on the oxide semiconductor layer surface 130a. The gate insulating film contact area 125 overlaps the gate electrode 140.

The gate electrode 140 is disposed on the gate insulating film 120. Specifically, the gate electrode 140 is insulated from the oxide semiconductor layer 130 and overlaps at least a portion of the oxide semiconductor layer 130. As shown in FIG. 2, the structure of the thin film transistor 100 in which the gate electrode 140 is disposed on the oxide semiconductor layer 130 is also called a top gate structure.

The gate electrode 140 is made of an aluminum-based metal such as aluminum (Al) or an aluminum alloy, a silver-based metal such as silver (Ag) or a silver alloy, a copper-based metal such as copper (Cu) or a copper alloy, or molybdenum ( It may include at least one of molybdenum-based metals such as Mo) or molybdenum alloy, chromium (Cr), tantalum (Ta), neodymium (Nd), and titanium (Ti). The gate electrode 140 may have a multilayer structure including at least two conductive films with different physical properties.

An interlayer insulating film 170 is disposed on the gate electrode 140. The interlayer insulating film 170 is made of an insulating material. Specifically, the interlayer insulating film 170 may be made of an organic material, an inorganic material, or a laminate of an organic material layer and an inorganic material layer.

A source electrode 150 and a drain electrode 160 are disposed on the interlayer insulating film 170. The source electrode 150 and the drain electrode 160 are spaced apart from each other and are respectively connected to the oxide semiconductor layer 130.

Referring to FIG. 2 , the source electrode 150 is connected to the oxide semiconductor layer 130 through the first contact hole (CH1) formed in the interlayer insulating film 170. A plurality of first contact holes CH1 may be formed. The source electrode connection area 155 is defined by the first contact hole CH1. The source electrode connection area 155 is a surface area of the oxide semiconductor layer 130 exposed from the interlayer insulating film 170 through the first contact hole CH1. According to one embodiment of the present invention, the source electrode 150 contacts and is connected to the oxide semiconductor layer 130 at the source electrode connection area 155 of the oxide semiconductor layer surface 130a.

The drain electrode 160 is connected to the oxide semiconductor layer 130 through the second contact hole (CH2) formed in the interlayer insulating film 170. A plurality of second contact holes CH2 may be formed. The drain electrode connection area 165 is defined by the second contact hole (CH2). The drain electrode connection area 165 is a surface area of the oxide semiconductor layer 130 exposed from the interlayer insulating film 170 through the second contact hole (CH2). According to one embodiment of the present invention, the drain electrode 160 contacts and is connected to the oxide semiconductor layer 130 at the drain electrode connection area 165 of the oxide semiconductor layer surface 130a.

The source electrode 150 and the drain electrode 160 are made of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), copper ( Cu), and may include at least one of their alloys. The source electrode 150 and the drain electrode 160 may each be made of a single layer made of metal or a metal alloy, or may be made of two or more multiple layers.

The protective films 171 and 172 are disposed between the gate insulating film 120 and the source electrode connection area 155 and between the gate insulating film 120 and the drain electrode connection area 165. Here, the protective film between the gate insulating film 120 and the source electrode connection area 155 is referred to as the first protective film 172, and the protective film between the gate insulating film 120 and the drain electrode connection area 165 is referred to as the second protective film 172. ) is also called.

Referring to FIG. 1, the protective films 171 and 172 are an oxide semiconductor layer between the gate insulating film contact area 125 and the source electrode connection area 155 and between the gate insulating film contact area 125 and the drain electrode connection area 165. It is placed on (130). Referring to FIG. 2, the protective films 171 and 172 are in contact with the oxide semiconductor layer 130.

The protective films 171 and 172 block hydrogen introduced from the interlayer insulating film 170 or the external environment from penetrating into the oxide semiconductor layer 130, particularly the channel region. The protective films 171 and 172 according to an embodiment of the present invention serve as hydrogen blocking films.

The channel region of the oxide semiconductor layer 130 is formed in the overlapping region of the gate layer 140 between the source electrode 150 and the drain electrode 160. According to one embodiment of the present invention, the protective films 171 and 172 are disposed close to the channel region of the oxide semiconductor layer 130, thereby blocking hydrogen penetrating into the channel region of the oxide semiconductor layer 130. As a result, conduction of the channel region of the oxide semiconductor layer 130 by hydrogen can be directly and effectively prevented.

Additionally, the protective films 171 and 172 are disposed only on a partial area of the oxide semiconductor layer surface 130a to open at least a portion of the oxide semiconductor layer surface 130a. More specifically, at least a portion of the surface 130a of the oxide semiconductor layer 130 in the direction of the gate electrode 140 is exposed from the gate insulating film 120 and the protective films 171 and 172. Alternatively, at least a portion of the surface 130a of the oxide semiconductor layer 130 toward the gate electrode 140, excluding the source electrode connection region 155 and the drain electrode connection region 165, is covered with the gate insulating film 120 and the protective film 171. 172). For example, among the surface 130a of the oxide semiconductor layer 130 toward the gate electrode 140, between the source electrode connection region 155 and the gate insulating film 120 and between the drain electrode connection region 165 and the gate insulating film 120. ) may be exposed from the protective films 171 and 172.

When the oxide semiconductor layer surface 130a is sealed at the top and bottom of the oxide semiconductor layer 130 by a blocking film such as the protective film 171 or 172, hydrogen existing in the sealed space is in the channel region of the oxide semiconductor layer 130. The driving characteristics or switching characteristics of the oxide semiconductor layer 130 may be damaged due to accumulation. In addition, the hydrogen under the oxide semiconductor layer 130 moves upward and is released to the outside. When the oxide semiconductor layer surface 130a is completely covered by the blocking films, the hydrogen under the oxide semiconductor layer 130 Because the movement path is blocked, hydrogen may accumulate in the oxide semiconductor layer 130. According to one embodiment of the present invention, at least a portion of the oxide semiconductor layer surface 130a is exposed from the protective film 171, thereby securing a hydrogen emission path.

As such, according to one embodiment of the present invention, the protective films 171 and 172 are disposed close to the channel region of the oxide semiconductor layer 130, so that hydrogen directly penetrating into the channel region of the oxide semiconductor layer 130 is blocked. , In addition, a hydrogen emission path is secured by exposing at least a portion of the surface 130a of the oxide semiconductor layer 130a from the protective film 171, so that hydrogen from the oxide semiconductor layer 130 or its lower portion can be released to the outside.

The protective films 171 and 172 may be made of a material different from the gate insulating film 120. The protective films 171 and 172 may include metal oxide. Metal oxide is advantageous for forming a protective film because it can be patterned to form a stable film in a specific, narrow area. These metal oxides may have insulating properties.

The metal oxide may include, for example, aluminum (Al).

Figure 3 is a graph of hydrogen formation energy. Hydrogen formation energy refers to the energy required when a substance forms a bond with hydrogen. Referring to FIG. 3, aluminum oxide (AlOx) has a high hydrogen formation energy of about 4.2 eV, and in particular, has a hydrogen formation energy about 1 eV greater than that of silicon oxide (SiO ₂ ), which is an insulating film. Therefore, for example, if hydrogen exists at the interface between a film of aluminum oxide (AlOx) and a film of silicon oxide (SiO ₂ ), this hydrogen will combine with silicon oxide (SiO ₂ ), which has a lower hydrogen formation energy. It will move towards a film made of silicon oxide (SiO ₂ ).

As such, aluminum oxide (AlOx) has high hydrogen formation energy and has excellent hydrogen blocking ability. Therefore, aluminum oxide can be used to form the protective films 171 and 172 according to an embodiment of the present invention. Aluminum oxide (AlOx), for example, is _Al2O3 .

However, there is no particular limitation on the type of aluminum oxide. Any aluminum oxide having insulating properties can be applied to the protective films 171 and 172 according to an embodiment of the present invention without limitation. According to one embodiment of the present invention, the protective films 171 and 172 are, for example, aluminum oxide (AlOx), aluminum-neodymium (AlNd) oxide, aluminum-nickel-lanthanum (AlNiLa) oxide, aluminum-nickel- It may include at least one of germanium-lanthanum (AlNiGeLa) oxide and aluminum-cobalt-germanium-lanthanum (AlCoGeLa) oxide.

The oxide semiconductor layer 130, gate electrode 140, source electrode 150, drain electrode 160, and protective films 171 and 172 of FIGS. 1 and 2 form the thin film transistor 100.

Figure 4 is a cross-sectional view of a thin film transistor 200 according to another embodiment of the present invention. Hereinafter, to avoid duplication, descriptions of already described components are omitted.

Compared to the thin film transistor 100 of FIG. 2, the thin film transistor 200 of FIG. 4 further includes a light blocking layer 180 on the substrate 110 and a buffer layer 121 on the light blocking layer 180.

The light blocking layer 180 overlaps the oxide semiconductor layer 130. The light blocking layer 180 blocks light incident on the oxide semiconductor layer 130 of the thin film transistor 200 from the outside and prevents damage to the oxide semiconductor layer 130 due to external incident light.

The light blocking layer 180 may be made of an electrically conductive material such as metal.

A buffer layer 121 is disposed on the light blocking layer 180. The buffer layer 121 may include at least one of silicon oxide and silicon nitride. The buffer layer 121 may be made of a single layer, or may have a stacked structure in which two or more layers are stacked. The buffer layer 121 has excellent insulating and planarization characteristics and can protect the oxide semiconductor layer 130.

Figure 5 is a cross-sectional view of a thin film transistor 300 according to another embodiment of the present invention.

Compared to the thin film transistor 200 of FIG. 4, the thin film transistor 300 of FIG. 5 has a drain electrode 160 connected not only to the oxide semiconductor layer 130 but also to the light blocking layer 180. The light blocking layer 180 has conductivity. Therefore, in order to drive the thin film transistor 300 more stably, the drain electrode 160 is connected to the oxide semiconductor layer 130.

Referring to FIG. 5 , the drain electrode 160 is connected to the light blocking layer 180 through the third contact hole (CH3) formed in the buffer layer 121 and the interlayer insulating film 170.

Hereinafter, a method of manufacturing the thin film transistor 200 will be described with reference to FIGS. 6A to 6I. 6A to 6I are manufacturing process diagrams of the thin film transistor 200 according to another embodiment of the present invention.

Referring to FIG. 6A, a light blocking layer 180 is formed on the substrate 110.

Glass may be used as the substrate 110, or plastic that can be bent or bent may be used. An example of a plastic used as the substrate 110 is polyimide. When polyimide is used as the substrate 110, considering that a high temperature process is performed on the substrate 110, heat-resistant polyimide that can withstand high temperatures may be used.

When plastic is used as the substrate 110, processes such as deposition and etching may be performed while the plastic substrate is placed on a carrier substrate made of a highly durable material such as glass.

The light blocking layer 180 prevents the oxide semiconductor layer 130 from being damaged by light incident from the outside. The light blocking layer 180 may be made of a material that reflects or absorbs light, for example, an electrically conductive material such as metal.

Referring to FIG. 6B, a buffer layer 121 is formed on the substrate 110 including the light blocking layer 180. The buffer layer 121 may be formed of silicon oxide. For example, the buffer layer 121 may have a single-layer or multi-layer structure.

Referring to FIG. 6C, an oxide semiconductor layer 130 is formed on the buffer layer 121. The oxide semiconductor layer 130 is formed to overlap the light blocking layer 180 in a plane view.

The oxide semiconductor layer 130 is an IZO (InZnO)-based oxide semiconductor material, an IGO (InGaO)-based oxide semiconductor material, an ITO (InSnO)-based oxide semiconductor material, an IGZO (InGaZnO)-based oxide semiconductor material, and an IGZTO (InGaZnSnO)-based oxide semiconductor. It may be made of at least one of a material, a GZTO (GaZnSnO)-based oxide semiconductor material, and an ITZO (InSnZnO)-based oxide semiconductor material. The oxide semiconductor layer 130 may be formed by deposition or sputtering.

Referring to FIG. 6D, a gate insulating film 120 and a gate electrode 140 are formed on the oxide semiconductor layer 130. The gate electrode 140 is insulated from the oxide semiconductor layer 130 and is formed to at least partially overlap the oxide semiconductor layer 130. The gate insulating film 120 is formed between the gate electrode 140 and the oxide semiconductor layer 130 to insulate the gate electrode 140 and the oxide semiconductor layer 130.

Referring to FIG. 6E, an insulating layer 175 for forming a protective film is disposed on the substrate 110 including the oxide semiconductor layer 130 and the gate electrode 140. The insulating layer 175 for forming a protective film may include metal oxide. More specifically, the insulating layer 175 for forming a protective film may include aluminum (Al).

For example, the insulating layer 175 for forming a protective film is made of aluminum oxide (AlOx), aluminum-neodymium (AlNd) oxide, aluminum-nickel-lanthanum (AlNiLa) oxide, and aluminum-nickel-germanium-lanthanum (AlNiGeLa). ) oxide, and aluminum-cobalt-germanium-lanthanum (AlCoGeLa) oxide.

Referring to FIG. 6F, the insulating layer 175 for forming a protective film is patterned. More specifically, etching (dry etching D/E) is performed with the photo resist 179 selectively disposed on the insulating layer 175 for forming a protective film, and the insulating layer 175 for forming a protective film is patterned.

As a result, protective films 171 and 172 are formed, as shown in FIG. 6G. The protective films 171 and 172 have the same composition as the insulating layer 175 for forming the protective film.

The protective films 171 and 172 do not overlap the gate insulating film. Additionally, the protective films 171 and 172 are not formed in the source electrode connection area and the drain electrode connection area.

Referring to FIG. 6H, an interlayer insulating film 170 is formed on the gate electrode 140. The interlayer insulating film 170 may be made of an organic material, an inorganic material, or a laminate of an organic material layer and an inorganic material layer.

Referring to FIG. 6I, a source electrode 150 and a drain electrode 160 are formed on the interlayer insulating film 170. The source electrode 150 and the drain electrode 160 are spaced apart from each other and are respectively connected to the oxide semiconductor layer 130.

Specifically, after etching the interlayer insulating film 170 to form a first contact hole (CH1) and a second contact hole (CH2) exposing at least a portion of the oxide semiconductor layer 130, the source electrode 150 and the drain By forming the electrodes 160, the source electrode 150 and the drain electrode 160 can be connected to the oxide semiconductor layer 130, respectively. The surface of the oxide semiconductor layer 130 exposed from the interlayer insulating film 170 by the first contact hole (CH1) and the second contact hole (CH2) has a source electrode connection region 155 and a drain electrode connection region 165, respectively. This happens.

The source electrode 150 is connected to the oxide semiconductor layer 130 in the source electrode connection area 155 on the surface of the oxide semiconductor layer 130, and the drain electrode 160 is connected to the drain electrode connection area in the surface of the oxide semiconductor layer 130. It is connected to the oxide semiconductor layer 130 at (165).

As a result, a thin film transistor 200 as shown in FIG. 6I is produced.

Figure 7 is a schematic cross-sectional view of a display device 400 according to another embodiment of the present invention.

The display device 400 according to another embodiment of the present invention includes a substrate 110, a thin film transistor 200, and an organic light emitting device 270 connected to the thin film transistor 200.

FIG. 7 shows a display device 400 including the thin film transistor 200 of FIG. 4 . However, another embodiment of the present invention is not limited to this, and the thin film transistors 100 and 300 shown in FIGS. 1 and 5 may be applied to the display device 400 of FIG. 7.

Referring to FIG. 7 , the display device 400 includes a substrate 110, a thin film transistor 200 disposed on the substrate 110, and a first electrode 271 connected to the thin film transistor 200. Additionally, the display device 400 includes an organic layer 272 disposed on the first electrode 271 and a second electrode 273 disposed on the organic layer 272.

Specifically, the substrate 110 may be made of glass or plastic. A buffer layer 121 is disposed on the substrate 110. Additionally, a light blocking layer 180 is disposed between the substrate 110 and the buffer layer 121.

The thin film transistor 200 is disposed on the buffer layer 121 on the substrate 110. The thin film transistor 200 includes an oxide semiconductor layer 130 on the buffer layer 121, a gate insulating film 120 on the oxide semiconductor layer 130, a gate electrode 140 on the gate insulating film 120, an oxide semiconductor layer 130, and It includes a connected source electrode 150, and a drain electrode 160 spaced apart from the source electrode 150 and connected to the oxide semiconductor layer 130. Additionally, the thin film transistor 200 includes protective films 171 and 172 between the gate insulating film 120 and the source electrode connection area and between the gate insulating film 120 and the drain electrode connection area.

The planarization film 190 is disposed on the thin film transistor 200 to planarize the upper part of the substrate 110. The planarization film 190 may be made of an organic insulating material such as photosensitive acrylic resin, but is not necessarily limited thereto.

The first electrode 271 is disposed on the planarization film 190. The first electrode 271 is connected to the drain electrode 160 of the thin film transistor 200 through a contact hole (CH4) provided in the planarization film 190.

The bank layer 250 is disposed on the first electrode 271 and the planarization film 190 to define a pixel area or a light-emitting area. For example, the bank layer 250 may be arranged in a matrix structure in a boundary area between a plurality of pixels, so that the pixel area may be defined by the bank layer 250.

The organic layer 272 is disposed on the first electrode 271. The organic layer 272 may also be disposed on the bank layer 250. That is, the organic layer 272 may not be separated for each pixel but may be connected to adjacent pixels.

The organic layer 272 includes an organic light emitting layer. The organic layer 272 may include one organic light-emitting layer, two organic light-emitting layers, or more organic light-emitting layers stacked vertically. This organic layer 272 may emit light having any one of red, green, and blue colors, and may also emit white light.

The second electrode 273 is disposed on the organic layer 272.

The organic light emitting device 270 may be formed by stacking the first electrode 271, the organic layer 272, and the second electrode 273. The organic light emitting device 270 may serve as a light quantity control layer in the display device 400.

Although not shown, when the organic layer 272 emits white light, individual pixels may use a color filter to filter the white light emitted from the organic layer 272 by wavelength. The color filter is placed on the path of light. In the case of the so-called bottom emission method in which the light emitted from the organic layer 272 travels toward the lower substrate 110, a color filter is placed below the organic layer 272, and the light emitted from the organic layer 272 In the case of the so-called top emission method in which the generated light travels toward the second electrode 273 at the top, a color filter is disposed on the organic layer 272.

Figure 8 is a schematic cross-sectional view of a display device 500 according to another embodiment of the present invention.

Referring to FIG. 8, a display device 500 according to another embodiment of the present invention includes a substrate 110, a thin film transistor 200 disposed on the substrate 110, and a first device connected to the thin film transistor 200. Includes electrode 381. Additionally, the display device 500 includes a liquid crystal layer 382 on the first electrode 381 and a second electrode 383 on the liquid crystal layer 382.

The liquid crystal layer 382 acts as a light quantity control layer. As such, the display device 500 shown in FIG. 8 is a liquid crystal display device including a liquid crystal layer 382.

Specifically, the display device 500 of FIG. 8 includes a substrate 110, a thin film transistor 200, a planarization film 190, a first electrode 381, a liquid crystal layer 382, a second electrode 383, It includes a barrier layer 320, color filters 341 and 342, a light blocking part 350, and an opposing substrate 310.

Substrate 110 may be made of glass or plastic. A buffer layer 121 is disposed on the substrate 110. Additionally, a light blocking layer 180 is disposed between the substrate 110 and the buffer layer 121.

Referring to FIG. 8, the thin film transistor 200 is disposed on the buffer layer 121 on the substrate 110. The thin film transistor 200 includes an oxide semiconductor layer 130 on the buffer layer 121, a gate insulating film 120 on the oxide semiconductor layer 130, a gate electrode 140 on the gate insulating film 120, an oxide semiconductor layer 130, and It includes a connected source electrode 150 and a drain electrode 160 spaced apart from the source electrode 150 and connected to the oxide semiconductor layer 130.

The planarization film 190 is disposed on the thin film transistor 200 to planarize the upper part of the substrate 110.

The first electrode 381 is disposed on the planarization film 190. The first electrode 381 is connected to the drain electrode 160 of the thin film transistor 200 through the contact hole CH5 provided in the planarization film 190.

The opposing substrate 310 is disposed to face the substrate 110 .

A light blocking portion 350 is disposed on the opposing substrate 310. The light blocking portion 350 has a plurality of openings. A plurality of openings are arranged to correspond to the first electrode 381, which is a pixel electrode. The light blocking portion 350 blocks light in areas other than the openings. The light blocking portion 350 is not absolutely necessary and may be omitted.

The color filters 341 and 342 are disposed on the opposing substrate 310 and selectively block wavelengths of light incident from the backlight unit (not shown). Specifically, the color filters 341 and 342 may be disposed in a plurality of openings defined by the light blocking portion 350. Each color filter 341 and 342 can express one color among red, green, and blue. Each color filter 341 and 342 may express colors other than red, green, and blue.

A barrier layer 320 may be disposed on the color filters 341 and 342 and the light blocking portion 350. The barrier layer 320 may be omitted.

The second electrode 383 is disposed on the barrier layer 320. For example, the second electrode 383 may be located on the front surface of the opposing substrate 310. The second electrode 383 may be made of a transparent conductive material such as ITO or IZO.

The first electrode 381 and the second electrode 383 are disposed to face each other, and the liquid crystal layer 382 is disposed between them. The second electrode 383 applies an electric field to the liquid crystal layer 382 together with the first electrode 381.

When the opposing surfaces between the substrate 110 and the opposing substrate 310 are defined as the upper surface of the substrate, and the surfaces located opposite the upper surfaces are defined as the lower surface of the substrate, the substrate 110 A polarizing plate may be disposed on the lower surface of and the lower surface of the opposing substrate 310, respectively.

Hereinafter, the present invention will be described in more detail with reference to examples, comparative examples, and test examples.

[Example 1]

A plurality of thin film transistors (10x10) were formed on a single glass mother glass (substrate) through a common process.

Specifically, a buffer layer 121 made of silicon oxide was formed on a glass substrate 110, and an oxide semiconductor layer 130 with a thickness of 30 nm was formed on the buffer layer 121 by sputtering. The oxide semiconductor layer 130 is made of an IGZO-based oxide semiconductor material with a ratio of indium (In), gallium (Ga), and zinc (Zn) of 1:1:1 based on the number of atoms. A gate insulating film 120 made of silicon nitride and a gate electrode 140 made of Mo/Ti alloy with a thickness of 100 nm were formed on the oxide semiconductor layer 130. Next, on the oxide semiconductor layer 130 between the position where the source electrode will contact (source electrode connection area) and the gate insulating film 120 and between the position where the drain electrode will contact (drain electrode connection area) and the gate insulating film 120. Protective films 171 and 172 were formed. The protective films 171 and 172 were formed of aluminum oxide ( _Al2O3 ) to a thickness of 20 nm. An interlayer insulating film 170 was formed on the substrate 110 including the gate electrode 140, the protective films 171 and 172, and the oxide semiconductor layer 130, and a source electrode (100 nm thick) was formed using a Mo/Ti alloy. 150) and a drain electrode 160 were formed to manufacture a thin film transistor.

[Comparative Example 1]

A plurality of thin film transistors (10x10) were formed on a single mother glass (substrate) as in Example 1, except that the protective films 171 and 172 were not formed.

[Test Example 1] Threshold voltage (Vth) measurement

Threshold voltages (Vth) were measured for thin film transistors at nine random locations among the thin film transistors manufactured in Comparative Example 1 and Example 1. To measure the threshold voltage (Vth), the drain current was measured while applying a gate voltage in the range of -20V to +20V. Voltages of 0.1V and 10V were applied between the source electrode 150 and the drain electrode 160. The results are shown in Figures 9A and 9B.

9A and 9B are threshold voltage (Vth) measurement results for the thin film transistors of Comparative Example 1 and Example 2, respectively. 9A and 9B, V10 is the measurement result when a voltage of 10V is applied between the source electrode 150 and the drain electrode 160, and V0.1 is the measurement result between the source electrode 150 and the drain electrode 160. This is the measurement result when a voltage of 0.1V is applied.

Referring to FIG. 9A, it can be seen that the variation in threshold voltage (Vth) for the thin film transistor of Comparative Example 1 is very large. In the thin film transistor of Comparative Example 1, the average threshold voltage (Vth) was -4.67V, and it was confirmed that the threshold voltage (Vth) was shifted to a negative value.

Additionally, the thin film transistor of Comparative Example 1 was confirmed to have a relatively large s-factor of 0.59. The s-factor (sub-threshold swing: s-factor) represents the reciprocal value of the slope in a section operating as a switching element in a graph of drain current characteristics versus gate voltage. As the S-factor increases, the slope of the graph of drain current characteristics versus gate voltage decreases, thereby deteriorating the switching characteristics of the thin film transistor 100.

On the other hand, it can be confirmed that the thin film transistor of Example 1 has a very small threshold voltage (Vth) variation. In the thin film transistor of Example 1, the average threshold voltage (Vth) was -0.4V, and it was confirmed that the threshold voltage (Vth) was very slightly shifted to a negative value.

Additionally, the thin film transistor of Example 1 was confirmed to have a very small s-factor of about 0.17.

[Test Example 2] Mobility measurement

Mobility was measured according to Hall measurement. As a result, the thin film transistor according to Example 1 was measured to have a mobility of 49.12 cm ² /Vs, and the thin film transistor according to Comparative Example 1 was measured to have a mobility of 64.61 cm ² /Vs. It is determined that the oxide semiconductor layer of the thin film transistor according to Comparative Example 1 becomes a conductor due to hydrogen inflow, and the thin film transistor according to Comparative Example 1 has higher mobility than the thin film transistor according to Example 1.

[Test Example 3] Measurement of hydrogen (H) content ratio

The content of hydrogen contained in the oxide semiconductor layer of the thin film transistor according to Comparative Example 1 and the thin film transistor according to Example 1 using TOF-SIMS (Time of Flight Secondary Ion Mass Spectrometry) The ratio was measured. TOF-SIMS is a device that analyzes the atoms constituting the surface of a material by injecting primary ions with a certain energy onto the surface of a solid and then analyzing the secondary ions released. As a result of the measurement, the content ratio of hydrogen contained in the oxide semiconductor layer of the thin film transistor according to Comparative Example 1 was 5 atomic% (at %), and the content ratio of hydrogen contained in the oxide semiconductor layer of the thin film transistor according to Example 1 was It was 1 atomic% (at %). In this way, it was confirmed that a large amount of hydrogen was introduced into the oxide semiconductor layer of the thin film transistor according to Comparative Example 1.

[Test Example 4] ΔL measurement

For the oxide semiconductor layer of the thin film transistor according to Comparative Example 1 and the thin film transistor according to Example 1, the conduction length (ΔL) of the channel region was measured.

Figure 10 is a detailed diagram explaining the conductive length (ΔL) of the channel region. Referring to FIG. 10, the area of the oxide semiconductor layer 130 that overlaps the gate electrode 140 is called a channel area (L _ideal ). The region L _D of the oxide semiconductor layer 130 other than the region overlapping the gate electrode 140 is made into a conductor by doping or the like, and serves as a connection portion connected to the source electrode 150 or the drain electrode 160. Hereinafter, an area of the oxide semiconductor layer 130 other than the area overlapping with the gate electrode 140 is referred to as a doped region (L _D ).

When hydrogen flows into the oxide semiconductor layer 130, a portion of the channel region (L _ideal ) becomes conductive, and the conductive region does not function as a channel. The length of the conductive portion of the channel area (L _ideal ) is called the conduction length (ΔL). In addition, among the channel areas (L _ideal ), the length of the area that is not conductive and can effectively serve as a channel is called the effective channel length (L _eff ). If the conduction length (ΔL) in the channel area increases, the effective channel length (L _eff ) decreases, and the thin film transistor may not function as a switching function. The thin film transistor can perform a switching function only when the effective channel length (L _eff ) is secured to a predetermined length or more, for example, 4 μm or more. To secure the effective channel length (L _eff ), it is necessary to reduce the conductive length (ΔL). When the conductive length (ΔL) is reduced, the effective channel length (L _eff ) can be secured even in the oxide semiconductor layer 130 with a small area, making it possible to miniaturize and increase the density of the device.

In Test Example 4, the conduction length (ΔL) was measured by measuring the carrier (electron) concentration in each part of the oxide semiconductor layer 130. Specifically, the length of the region with a carrier (electron) concentration less than 1/100 of the carrier (electron) concentration of the doped region (L _D ) among the channel regions (L _ideal ) was referred to as the effective channel length (L _eff ). The area with the above carrier (electron) concentration was determined to be a conductor.

More specifically, it was confirmed that the doped region (L _D ) had a carrier (electron) concentration of 10 ²⁰ or more. Therefore, the length of the region with a carrier (electron) concentration of 10 ¹⁸ or less among the channel regions (L _ideal ) is measured and called the effective channel length (L _eff ), and the carrier (electron) concentration exceeding 10 ¹⁸ is measured. The length of the region was called the conductive length (ΔL).

For evaluation, the conducting length (2ΔL) on both sides of the channel area (L _ideal ) was calculated. As a result, the conductive length (2ΔL) on both sides of the channel region (L _ideal ) in the oxide semiconductor layer 130 according to Example 1 was 2㎛, and in the oxide semiconductor layer 130 according to Comparative Example 1, the channel region (L _ideal ) The conductor length (2ΔL) on both sides was 3.4㎛. In this way, it can be confirmed that in the channel region (L _ideal ) of the oxide semiconductor layer 130 of Comparative Example 1, the conductive length due to hydrogen increases, and the effective channel length (L _eff ) is seriously reduced.

On the other hand, since conduction does not occur severely in the channel region (L _ideal ) of the oxide semiconductor layer 130 according to an embodiment of the present invention, it is easy to secure the effective channel length (L _eff ), and the oxide semiconductor layer 130 Even if the area is small, the effective channel length (L _eff ) can be secured. Therefore, miniaturization and high integration of thin film transistors are possible.

[Test Example 5] Measurement of threshold voltage (Vth) according to temperature

While heat was applied to the thin film transistors of Example 1 and Comparative Example 1, the change in threshold voltage (Vth) according to temperature was measured. Specifically, among the thin film transistors of Example 1 and Comparative Example 1 used for the threshold voltage, the thin film transistors that showed a positive threshold voltage were selected as Sample 1 and Sample 2, respectively.

In addition, the change in threshold voltage (Vth) according to temperature was measured for Sample 3, in which a protective film was disposed on the top and bottom of the oxide semiconductor layer 130. Specifically, a thin film transistor was manufactured in the same manner as in Example 1, except that a protective film was formed with a thickness of 20 nm using aluminum oxide ( _Al2O3 ) on the buffer layer 121 and the oxide semiconductor layer 130. It was called Sample 3. At this time, no protective film was formed in the contact area between the source electrode and the drain electrode in the upper part of the oxide semiconductor layer 130.

For Sample 1, Sample 2, and Sample 3, changes were measured while increasing the temperature from 0°C to 200°C.

Figure 11 is a graph of threshold voltage (Vth) measurement according to temperature. Referring to FIG. 11, in the case of Sample 1 and Sample 2, the change in threshold voltage (Vth) according to the temperature increase is not significant, whereas in the case of Sample 3, the drop in threshold voltage (Vth) occurs significantly at a temperature of 60°C or higher. You can check it. From the results of FIG. 11, it can be seen that when a protective film is disposed on both the top and bottom of the oxide semiconductor layer 130, the threshold voltage (Vth) characteristics according to temperature are rather reduced.

From the above results, the thin film transistor according to an embodiment of the present invention has excellent threshold voltage (Vth) characteristics, the content of hydrogen flowing into the oxide semiconductor layer 130 is small, and the conduction length of the channel region ( It can be confirmed that ΔL) is short and that the threshold voltage (Vth) characteristics do not deteriorate due to temperature.

As such, the thin film transistor according to an embodiment of the present invention has excellent reliability and driving characteristics. also. A display device according to an embodiment of the present invention including such a thin film transistor may have excellent reliability.

The present invention described above is not limited to the above-described embodiments and the accompanying drawings, and various substitutions, modifications and changes can be made without departing from the technical details of the present invention in the technical field to which the present invention pertains. It will be obvious to anyone with ordinary knowledge. Therefore, the scope of the present invention is indicated by the claims described below, and all changes or modified forms derived from the meaning and scope of the claims and their equivalent concepts should be construed as being included in the scope of the present invention.

100, 200, 300: thin film transistor
110: substrate 120: gate insulating film
121: Buffer layer 125: Gate insulating film contact area
130: oxide semiconductor layer 140: gate electrode
150: source electrode 155: source electrode contact area
160: drain electrode 165: drain electrode contact area
170: interlayer insulating film 171, 172: protective film
180: light blocking layer 190: planarization film
250: bank layer 270: organic light emitting device
271, 381: first electrode 272: organic layer
273, 383: second electrode 310: opposing substrate
341, 342: color filter 350: light blocking part
382: liquid crystal layer 400, 500: display device

Claims (14)

An oxide semiconductor layer on a substrate;
a gate insulating film on the oxide semiconductor layer;
a gate electrode on the gate insulating film;
a source electrode connected to the oxide semiconductor layer at a source electrode connection area on the surface of the oxide semiconductor layer;
a drain electrode spaced apart from the source electrode and connected to the oxide semiconductor layer in a drain electrode connection area on the surface of the oxide semiconductor layer; and
It includes a protective film between the gate insulating film and the source electrode connection area and between the gate insulating film and the drain electrode connection area,
The protective film does not overlap the gate insulating film, contacts the oxide semiconductor layer, and does not contact the gate electrode.
Thin film transistor. delete According to paragraph 1,
A thin film transistor, wherein at least a portion of the surface of the oxide semiconductor layer toward the gate electrode is exposed from the gate insulating film and the protective film. According to paragraph 1,
A thin film transistor wherein the protective film includes metal oxide. According to paragraph 4,
A thin film transistor wherein the metal oxide includes aluminum (Al). According to paragraph 1,
The protective film includes aluminum oxide (AlOx), aluminum-neodymium (AlNd) oxide, aluminum-nickel-lanthanum (AlNiLa) oxide, aluminum-nickel-germanium-lanthanum (AlNiGeLa) oxide, and aluminum-cobalt-germanium. -A thin film transistor containing at least one of lanthanum (AlCoGeLa) oxides. According to paragraph 1,
A light blocking layer disposed on the substrate; and
It further includes a buffer layer disposed on the light blocking layer,
A thin film transistor wherein the light blocking layer overlaps the oxide semiconductor layer. According to paragraph 1,
A thin film transistor, wherein the protective film does not overlap the gate electrode. forming an oxide semiconductor layer on a substrate;
forming a gate insulating film on the oxide semiconductor layer;
forming a gate electrode on the gate insulating film;
forming a protective film on the oxide semiconductor layer that does not overlap the gate insulating film; and
It includes forming a source electrode and a drain electrode respectively connected to the oxide semiconductor layer and spaced apart from each other,
The source electrode is connected to the oxide semiconductor layer at a source electrode connection area on the surface of the oxide semiconductor layer,
The drain electrode is connected to the oxide semiconductor layer at a drain electrode connection area on the surface of the oxide semiconductor layer,
The protective film is formed between the gate insulating film and the source electrode connection area and between the gate insulating film and the drain electrode connection area,
The protective film does not overlap the gate insulating film, contacts the oxide semiconductor layer, and does not contact the gate electrode.
Manufacturing method of thin film transistor. According to clause 9,
The step of forming the protective film is,
forming an insulating layer for forming a protective film on the substrate including the oxide semiconductor layer and the gate electrode; and
Including; patterning the insulating layer for forming the protective film.
Manufacturing method of thin film transistor. According to clause 9,
forming a light blocking layer on the substrate; and
It further includes forming a buffer layer on the light blocking layer,
The oxide semiconductor layer is formed to overlap the light blocking layer in a planar view,
Manufacturing method of thin film transistor. According to clause 9,
A method of manufacturing a thin film transistor, wherein the protective film does not overlap the gate electrode. Board;
a thin film transistor disposed on the substrate; and
It includes a first electrode connected to the thin film transistor,
The thin film transistor is,
an oxide semiconductor layer on the substrate;
a gate insulating film on the oxide semiconductor layer;
a gate electrode on the gate insulating film;
a source electrode connected to the oxide semiconductor layer at a source electrode connection area on the surface of the oxide semiconductor layer;
a drain electrode spaced apart from the source electrode and connected to the oxide semiconductor layer in a drain electrode connection area on the surface of the oxide semiconductor layer; and
It includes a protective film between the gate insulating film and the source electrode connection area and between the gate insulating film and the drain electrode connection area,
The protective film does not overlap the gate insulating film, contacts the oxide semiconductor layer, and does not contact the gate electrode.
Display device. According to clause 13,
The display device wherein the protective film does not overlap the gate electrode.