JP2014517531A - 熱圧着ボンディングの間ｔｓｖティップを保護するための保護層 - Google Patents

熱圧着ボンディングの間ｔｓｖティップを保護するための保護層 Download PDF

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JP2014517531A
JP2014517531A JP2014513727A JP2014513727A JP2014517531A JP 2014517531 A JP2014517531 A JP 2014517531A JP 2014513727 A JP2014513727 A JP 2014513727A JP 2014513727 A JP2014513727 A JP 2014513727A JP 2014517531 A JP2014517531 A JP 2014517531A
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tsv
die
bottom side
protective layer
bonding
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JP6038902B2 (ja
JP2014517531A5 (ja
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アラン ウエスト ジェフェリー
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日本テキサス・インスツルメンツ株式会社
テキサス インスツルメンツ インコーポレイテッド
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    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
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Abstract

基板貫通ビア（ＴＳＶ）をダイボンディング損傷から保護する方法（１００）が、アクティブ回路要素を含む頂部側と、底部側と、複数のＴＳＶとを有する複数のＴＳＶダイを含む基板を提供すること（１０１）を含み、複数のＴＳＶが、頂部側から、底部側から外に延びる突出するＴＳＶティップまで達する内部金属コアを含む。保護層が、突出するＴＳＶティップの間及びその上を含んで、ＴＳＶダイの底部側に形成されるか又はつけられる（１０２）。ＴＳＶダイは、その頂部側を下にワークピース表面を有するワークピース上に、その底部側を下にし、ボンドヘッドに接してボンディングされる（１０４）。保護層は、突出するＴＳＶティップにボンドヘッドが直接接触しないようにすることにより、ＴＳＶダイの歪みを含むボンディングプロセスから損傷を低減する。

Description

開示される実施例は、電子デバイスに関し、更に特定して言えば、突出する基板貫通ビアティップを有する複数のダイを含む集積回路（ＩＣ）ダイ又はウエハの、少なくとも１つのワークピースへの、及びそこからの電子デバイスへのアッセンブリに関連する。
従来技術において知られているように、シリコン基板の場合に一般にシリコン貫通ビアと呼ばれる、基板貫通ビア（本明細書においてＴＳＶと称する）は、ＩＣダイの頂部側半導体表面上に形成される電気的導電性レベルの一つ（例えば、コンタクトレベル、又はバックエンドオブライン（ＢＥＯＬ）金属相互接続レベルの一つ）からその底部側表面までの、ＩＣダイの全厚みを延びる垂直の電気的接続である。このようなＩＣダイは、本明細書において「ＴＳＶダイ」と称する。垂直の電気的経路は従来のワイヤボンディング技術に対して著しく短縮され、このことは概して著しく速いデバイスオペレーションにつながる。１つの配置において、ＴＳＶは、底部側基板（例えば、シリコン）表面から５〜１５μｍの距離突出するなどの、突出するＴＳＶティップとしてＴＳＶダイの底部側で終端する。突出するティップを形成するため、ＴＳＶダイは通常、概してバックグラインドを含むプロセスを用いて、２５〜１００μｍのダイ厚みまでなど、ＴＳＶを露出させるように及びティップを形成するようにウエハ形状が薄化される。ＴＳＶダイは、上向き又は下向きにボンディングされ得、また、スタックされたダイデバイスの形成を可能にするためその両方の側からボンディングされ得る。
ＴＳＶを有するダイエリアにおいて、ＴＳＶがＴＳＶダイの全厚み延びるため、アクティブデバイスがない可能性がある。ＴＳＶダイ上のＴＳＶは概して、ＴＳＶダイエリアの比較的小さなパーセンテージを覆う複数の個別のＴＳＶアレイに配され、そのため、ＴＳＶはＴＳＶダイのエリアを覆って集合的に均一に接近しない。ＴＳＶアレイ内のＴＳＶは典型的に、固定ピッチを有して規則的に間隔が空けられる。ＴＳＶアレイを超える領域、又はＴＳＶのない領域は、高くされる突出するＴＳＶティップにより生じる不規則な底部側トポグラフィーとなり、ＴＳＶのない領域は均一な最低高さを有する。
ＴＳＶティップは、ニッケル含有層を含むキャップなどの金属キャップをその上に含み得、金属キャップは、ＴＳＶの内部金属コア（例えば、銅）の消費が、ＴＳＶの外側誘電体スリーブのクラックにつながり得る金属間化合物（ＩＭＣ）を形成すること、及びその結果ＴＳＶダイ上の欠陥（例えば、リーク又は短絡）が生じることを、避けるため又はそれらを少なくとも遅延させるため、ワークピース（例えば、パッケージ基板又は別のダイ又はダイスタック）に対するはんだ仲介接合の場合に上にあるＳｎベースのはんだへのＩＭＣ障壁として機能し得る。金属キャップは、ＴＳＶのない領域に対してＴＳＶティップの高さを著しく増大させ得る。
熱圧着（ＴＣ）ボンディングは、材料の境界にわたる相互拡散により２つの材料を接合するため、ボンドヘッドにより印加される圧力（例えば、４０〜８０Ｎ／ｃｍ２）、及びかなりの温度（例えば、２３０〜３００℃など、はんだを溶融させるために充分高い温度）を用いることを含む、一般的なＩＣアッセンブリ方法である。ＴＣボンディングプロセスは、ＴＳＶダイ又はＴＳＶウエハの頂部側表面上のピラー又は他のボンディング特徴を、基板上の対向するパッド、ウエハ、又はボンディングされるべき別のダイに対して押すため、及びはんだを加熱し溶融させるための圧力に依存する。ＴＳＶダイの頂部側が基板上のパッドにボンディングされる、底部側ＴＳＶティップを有する薄い（例えば、<１００μｍの厚み）ＴＳＶダイの基板（例えば、パッケージ基板、ダイ、又はダイスタック）へのＴＣボンディングの間、ＴＣボンドヘッドは、周りのＴＳＶのない領域よりずっと上に突出するＴＳＶティップに直接接して、効率的に、ダイの頂部側に形成されたボンドに印加される不均一に分配される圧力となる。
開示される実施例は、薄いＴＳＶダイ又は薄いＴＳＶウエハ（例えば、＜１００μｍの厚み）の頂部側（アクティブ側）のワークピースへのＴＣボンディングの間の事象の幾つかの認識に基づき、ここで、ＴＳＶダイ又はＴＳＶウエハは、それらの底部側にそれらのエリアにわたってＴＳＶのない領域を有する。ＴＳＶのない領域は、突出するＴＳＶティップに対して一貫した最低高さを有し、そのため、ピックアップ問題を生じ得る不規則な底部側トポグラフィーとなり、また、ダイ歪みや、ＴＳＶとボンディングされた頂部側表面との間のもろい低ｋ誘電体への損傷や、ＴＳＶがダイ底部側に存在するＴＳＶの誘電体スリーブのクラックを含む問題を生じさせ得る後続のボンディングオペレーションの間印加される実質的に不均一に分配される圧力となる。
ピックアップ問題に関し、ＴＳＶダイ又はＴＳＶウエハの底部側で露出されたＴＳＶは、バキュームピックアップの間損傷される恐れがあり、これは、ＴＳＶティップの別のワークピースへの後続のボンディングの間の低品位のボンドインテグリティにつながり得る。また、薄いＴＳＶダイ及び薄いＴＳＶウエハは、ボンディングの間不均一に分配された圧力を受けるとき容易に湾曲され得る。これは、頂部側ボンドに対する不均一な引っ張り応力を誘発するボンディング後のダイ間歪みにつながり得、これは、有機基板などのワークピースへの低いボンドイールドを生じさせることが発明者により認識されており、更に、突出するＴＳＶの「平坦性（ｃｏ−ｐｌａｎａｒｉｔｙ）」の劣化ともなり得、これは、集合的なＴＳＶティップの、名目上同一平面のボンディング表面を備えたワークピースへの後続のボンディングについての問題をもたらし得る。
開示される実施例は、ワークピース（例えば、有機基板）へのＴＣボンディングの間の損傷を低減するか又はなくすためにＴＳＶダイの底部側の突出するＴＳＶティップの上に保護層を付加することにより上述のティップ損傷の問題を解決し、これにより、ＴＣボンディングの間ＴＣボンドヘッドにより印加される圧力が一層均一となる。このような保護層は、ＴＳＶダイのボンディングされた頂部側、及びＴＳＶダイの底部側ＴＳＶティップへのその後ボンディングされるデバイス上の、ＴＣボンディング誘発開路（TC-bonding induced opens）をなくすか又は少なくとも著しく低減することが分かってきている。開示される保護層はＴＳＶダイの底部側にあるため、アクティブダイエリアは失われない。
図１は、例示の実施例に従って、突出するＴＳＶティップの間及びその上に保護層を付加することにより、ＴＳＶダイの底部側に突出するＴＳＶティップを含むＴＳＶダイをボンディング損傷から保護する例示の方法における工程を示すフローチャートである。
図２は、例示の実施例に従った、ＴＳＶダイの底部側の突出するＴＳＶティップの間及びその上に保護層を有する突出するＴＳＶティップを含む複数のＴＳＶを含むＴＳＶダイの簡略化した断面図である。
図３は、例示の実施例に従った、ワークピースにボンディングされて図２に示されるＴＳＶダイを含む例示の保護されたスタックされたダイ前駆物質を示す。
図１は、例示の実施例に従って、突出するＴＳＶティップの間及びその上に保護層を付加することにより、ＴＳＶダイの底部側に突出するＴＳＶティップを含むＴＳＶダイをボンディング損傷から保護する例示の方法１００における工程を示す。ステップ１０１が、アクティブ回路要素を含む頂部側と、底部側と、複数のＴＳＶとを有する複数のＴＳＶダイを含む基板（例えば、ウエハ）を提供することを含む。
ＴＳＶは各々が、内部金属コアと外側誘電体スリーブとを含む。外側誘電体スリーブは、頂部側表面（概して、コンタクトレベル、又はバックエンドオブライン（ＢＥＯＬ）金属層（例えば、Ｍ１、Ｍ２など）の一つに結合される）から、ＴＳＶダイの底部側から出現する突出するＴＳＶティップまで、ＴＳＶダイの全厚みを延びる。一実施例において、ＴＳＶダイの底部側から測定される突出するＴＳＶティップの長さは、２〜１５μｍである。一実施例において、ＴＳＶ直径は、一つの特定の実施例における４〜１０μｍなど、≦１２μｍである。
内部金属コアは、一実施例においてＣｕを含み得る。内部金属コアに他の電気的導電性材料を用いることもできる。外側誘電体スリーブは、シリコン酸化物、シリコンナイトライド、リンドープされた珪酸ガラス（ＰＳＧ）、シリコンオキシナイトライド、又何らかの化学気相成長された（ＣＶＤ）ポリマー（例えば、パリレン）を含み得る。外側誘電体スリーブは典型的に０．２μｍ〜５μｍの厚みである。
銅、及び内部金属コアのための何らかの他の金属の場合、本明細書において「ＴＳＶ障壁」と称する金属拡散障壁層（耐火性金属又は耐火性金属ナイトライドなど）が、概して付加され、誘電体スリーブ上に堆積される。例えば、ＴＳＶ障壁材料は、Ｔａ、Ｗ、Ｍｏ、Ｔｉ、ＴｉＷ、ＴｉＮ、ＴａＮ、ＷＮ、ＴｉＳｉＮ、又はＴａＳｉＮを含む材料を含み得、この材料は物理気相成長（ＰＶＤ）又はＣＶＤにより堆積され得る。ＴＳＶ障壁は典型的に１００〜５００Åの厚みである。
ＴＳＶティップは概してその上に金属キャップを含み、金属キャップは、内部金属コアにない金属を含む少なくとも第１の金属層を含む。キャップのための金属層は、はんだを含まず、突出するＴＳＶティップの末端部上に無電解で又は電解で（即ち、電気めっき）堆積され得る。第１の金属層は、ＴＳＶティップの内部金属コアの少なくとも最頂部表面との電気的コンタクトを形成する。
第１の金属層は概して１〜８μｍの厚みであり得る。第１の金属層は、ＩＭＣブロックを提供することができる。第１の金属層は、例えば、Ｎｉ、Ｐｄ、Ｔｉ、Ａｕ、Ｃｏ、Ｃｒ、Ｒｈ、ＮｉＰ、Ｂ、ＣｏＷＰ、又はＣｏＰを含む材料を含み得る。１つの特定の実施例において、第１の金属層は、３〜８μｍの厚みの電気めっきされたＣｕめっき層を含み得る。一実施例において、内部金属コアが銅を含み、ＴＳＶティップは、Ｔｉ、Ｎｉ、Ｐｄ、及びＡｕのうち少なくとも一つを含む金属キャップを含む。任意選択の金属障壁層が第１の金属層とＴＳＶティップの末端部との間に含まれてもよい。例えば、約１ｋÅ〜３ｋÅの層を含むＴｉ又はＴａが障壁層として用いられ得る。
金属キャップは、第１の金属層とは異なるはんだを含まない第２の金属層を含み得る。第１及び第２の金属層の組み合わされた厚みは、１μｍ〜１０μｍとし得る。１つの金属キャップ配置がＮｉ／Ａｕを含む。
ステップ１０１で提供される基板（例えば、ウエハ）は更に、金属キャップが形成される前にＴＳＶティップを露出させるように概して形成及びエッチバックされる、ＴＳＶティップ間の基板の底部側の第１の誘電体層を含み得る。例えば、一つの特定の実施例において、ＴＳＶティップはＴＳＶダイの底部側表面から約５μｍ外に延び、金属キャップ２４０はＴＳＶティップに高さ約５μｍを付加し、第１の誘電体層は約３μｍの厚みである。この特定の実施例において、金属キャップされたＴＳＶティップは、第１の誘電体層より上に約７μｍ突出する。
ステップ１０２が、突出するＴＳＶティップの間及びその上を含んでＴＳＶダイの底部側に保護層を形成する又はつけることを含む。保護層は、実質的に平坦な表面を提供するため突出するＴＳＶティップの上を平坦化することができる。本明細書で定義するように、「実質的に平坦な表面」は１μｍの範囲の最大高さを有する。
一実施例において、保護層は、金属キャップされたＴＳＶティップ及び上述のＴＳＶティップ間の第１の誘電体層の上を含んで、既存のトポグラフィーの頂部を覆うようにスピンオンされたブランケット層である。以下に説明するステップ１０５の後に保護層の一部がＴＳＶダイ上に残る実施例において、保護層は概して誘電性材料である。保護層のための幾つかの例示の誘電体材料は、ベンゾシクロブテン（ＢＣＢ）、ポリベンゾオキサゾール（ＰＢＯ）、及び感光性前駆物質材料から形成される何らかのポリイミド（ＰＩ）などのポリマーを含む。この実施例において、ステップ１０５で以下に説明するように、所望とされる場合、部分的エッチバックによりＴＳＶティップを露出させた後に保護層が基板（例えば、ウエハ）上に残され得るように、保護層は、第１の誘電体層に用いられるものと同じ誘電性材料を含み得る。この方法は、ボンディング（以下に説明するステップ１０４）前に保護層の剛性を増大させるための硬化可能な保護層材料の場合、任意選択で保護層を硬化させることを含み得る。
別の実施例において、保護層は、アルミニウムテープなどの金属テープを含む。適切な材料及び厚みの金属テープ（例えば、１５〜２０μｍの厚みのアルミニウムテープ）が、金属キャップされたＴＳＶティップの上で平坦化を提供するため容易に可鍛性であり、適切な接着剤により基板（例えば、ウエハ）上の全ＴＳＶダイを含む基板（例えば、ウエハ）の底部側につけられ得、固定され得る。
ステップ１０３が、基板（例えば、ウエハ）を複数のシンギュレートされたＴＳＶダイにシンギュレートすることを含む。従来のソーイング手法が用いられ得る。ステップ１０４が、シンギュレートされたＴＳＶダイを頂部側を下に、底部側を上にしたワークピース表面上に、且つ、ボンドヘッドに接して、ボンディングすることを含む。ワークピースは、一実施例において、基板ストリップなどの有機基板を含み得る。ボンディングは、ボンドヘッドにより印加される圧力（例えば、４０〜８０Ｎ／ｃｍ２）の利用に関与し得るＴＣボンディングを含み得る。上述のように、ＴＳＶティップに作用する圧力の大きさが、ＴＳＶティップのエリアのみではなく、ＴＳＶダイの全ダイ底部側まで「広がる」ボンドヘッドコンタクトエリアにより低減されるように、ＴＳＶティップの頂部上にある保護層は、突出するＴＳＶティップとボンドヘッドが直接接触しないようにする。
ステップ１０５が、後続のボンディングのためＴＳＶティップを露出させるように保護層を部分的に取り除くこと又は完全に取り除くことを含む。このステップのためにドライエッチング又はアッシングを用いることができる。ウェットエッチング処理も適切であり得る。ステップ１０５においてエッチングが用いられる場合、エッチングは、典型的にＴＳＶダイとワークピース（例えば、有機基板）との間にあるアンダーフィルが、ステップ１０５の間その露出された周辺で損傷されないように、高度に選択性であるように処理される。保護層が金属テープを含む実施例において、金属テープは、ＴＳＶダイとワークピースとの間のアンダーフィルを劣化させない適切な接着剤除去プロセスにより完全に取り除かれ得る。
重要なことに、開示される保護層がＴＳＶダイに適用され、ボンドヘッドには適用されないため、方法１００は任意のＴＣボンダー装置に適用可能である。また、開示される保護層によって提供される、ボンドヘッド圧力の広がりは、ＴＳＶダイのＴＣボンディング誘発歪みを低減し、ＴＳＶの誘電体スリーブのクラックをなくし得るか又は少なくとも著しく低減し得る。
図２は、例示の実施例に従ったＴＳＶダイ２００の簡略化した断面図であり、ＴＳＶダイ２００は、ＴＳＶダイの底部側２１０の突出するＴＳＶティップ２１７の間及びその上の第１の誘電体層２３１の上（ａ）に保護層２３１（ｂ）を有する突出するＴＳＶティップ２１７を含む複数のＴＳＶ２１６を含む。突出するＴＳＶティップ２１７は、末端ティップ端２１７（ａ）上の金属キャップ２４０を有して示されている。
ＴＳＶダイ２００は、アクティブ回路要素２０９を含む頂部側表面２０７と底部側表面２１０とを含む基板２０５を含む。ＴＳＶダイ２００上のアクティブ回路要素２０９は、例えばロジック機能などの、ＩＣ回路機能を提供するように構成される。図示されるコネクタ２０８は、頂部側表面２０７上のＴＳＶ２１６間のアクティブ回路要素２０９への結合を示す。ＴＳＶは、アクティブ回路要素２０９への（例えば、ＴＳＶダイ２００の底部側２１０に取り付けられるデバイスへの）接続なしに基板２０５を介して単にダイ貫通接続を提供し得るため、アクティブ回路要素２０９への接続は任意選択である。
ＴＳＶ２１６は、外側誘電体スリーブ２２１、内部金属コア２２０、及び外側誘電体スリーブ２２１と内部金属コア２２０との間の金属拡散ＴＳＶ障壁層２２２を含む。ＴＳＶ２１６は、頂部側表面２０７から、底部側表面２１０から出現する突出するＴＳＶティップ２１７まで延びる。保護層２３１（ｂ）は、突出するＴＳＶティップ２１７の上の平坦化層として示されている。例えば、一つの特定の実施例において、ＴＳＶティップ端２１７（ａ）は底部側表面２１０から約５μｍ外に延び、金属キャップ２４０はＴＳＶティップ２１７に高さ約５μｍを付加し、保護層２３１（ｂ）は厚みが１０〜１５μｍの範囲であり、第１の誘電体層２３１（ａ）は約３μｍの厚みである。この特定の実施例において、保護層２３１（ｂ）は、ＴＳＶティップ２１７上の金属キャップ２４０より約３〜８μｍ上にある。
図３は、例示の実施例に従った、例示の保護されたスタックされたダイ前駆物質３００を示し、保護されたスタックされたダイ前駆物質３００は、基板３３０として示すワークピースにボンディングされた図２に示すＴＳＶダイ２００を含む。封止されたＴＳＶティップを有する保護されたスタックされたダイ前駆物質３００は、ＴＳＶティップの損傷のリスクが低減されたこのようなユニットの出荷を可能にする。ＴＳＶダイ２００は、頂部側２０７を下にしてパッケージ基板（例えば、有機基板）として示す基板３３０上のパッド３３７にボンディングされる。パッケージ基板は、薄くされ得る（例えば、＜３５０μｍ）セラミック又は有機基板を含み得る。パッケージ基板は概して、基板パネル（又はストリップ）として提供される。アセンブリはＴＣボンディングを含み得る。
ＴＳＶダイ２００は、はんだ３２６でキャップされるピラー３２５を含んで示されている。アンダーフィル３２８が、ＴＳＶダイ２００とパッケージ基板３３０との間に示されている。パッケージ基板３３０は、複数のはんだボール３３１を含むボールグリッドアレイ（ＢＧＡ）を含んで示されている。
図３に示す保護されたスタックされたダイ前駆物質３００は、スタックされたダイ前駆物質３００のワークピースへのＴＣボンディングを含むスタックされたダイデバイス（例えば、システムインパッケージ（ＳＩＰ））を形成するために用いることができる。ＴＳＶダイ２００の底部側２１０の保護層２３１（ｂ）は、後続のボンディングのためにＴＳＶティップ２１７を露出させるように部分的に又は完全に取り除かれる。頂部ＩＣダイが、ＴＳＶダイ２００の露出されたＴＳＶティップ２１７上に組み立てられてもよい。一実施例において、頂部ＩＣダイはメモリダイを含み、ＴＳＶダイ２００はロジックダイを含む。
別の実施例において、頂部ダイは、互いにボンディングされる複数のスタックされたＩＣダイを含むＩＣダイスタックを含む。上述のように、上述の保護層により提供されるＴＣボンディング後のＴＳＶダイ２００の低減された歪みは、平坦性の喪失に起因して突出するＴＳＶティップ上への頂部ダイアッセンブリに関する欠陥を低減することもできる。オーバーモールディングが続き得、その後、複数のスタックされたダイデバイスを形成するためのシンギュレーションが続き得る。ワークピースがパッケージ基板を含むとき、この方法は、シンギュレーション前にワークピースの底部にはんだボールのＢＧＡを取り付けることを更に含み得る。
半導体表面を有する基板上に形成されるアクティブ回路要素は、トランジスタ、ダイオード、コンデンサ、及びレジスタを概して含む回路要素だけでなく、ＩＣ回路機能を提供するためにこれらの種々の回路要素を相互接続する信号線及び他の導体を含む。本明細書において用いられるような「ＩＣ回路機能を提供する」とは、例えば、特定用途向け集積回路（ＡＳＩＣ）、デジタルシグナルプロセッサ、無線周波数チップ、メモリ、マイクロコントローラ及びシステムオンチップ、又はそれらの組み合わせを含み得るＩＣからの回路機能を指す。開示される実施例は、種々のデバイス及び関連する製品を形成するための種々のプロセス・フローに統合することが可能である。半導体基板は、その中に種々の要素を及び／その又は上に層を含み得る。これらは、障壁層、他の誘電体層、デバイス構造、アクティブ要素、及びソース領域、ドレイン領域、ビットライン、ベース、エミッタ、コレクタ、導電性ライン、導電性ビアなどを含むパッシブ要素を含み得る。また、バイポーラ、ＣＭＯＳ、ＢｉＣＭＯＳ、及びＭＥＭＳを含む種々の半導体デバイス製造プロセスにおいて、開示される実施例を用いることができる。
当業者であれば、本発明の特許請求の範囲内で、説明した例示の実施例に変形が成され得ること、及び多くの他の実施例が可能であることが分かるであろう。

Claims (15)

  1. 基板貫通ビア（ＴＳＶ）ダイをボンディング損傷から保護する方法であって、
    アクティブ回路要素を含む頂部側と、底部側と、複数の基板貫通ビア（ＴＳＶ）とを有する複数のＴＳＶダイを含む基板を提供することであって、前記複数のＴＳＶの各々が、前記頂部側から、前記底部側から外に延びる突出するＴＳＶティップまで達する内部金属コアを含むこと、
    前記突出するＴＳＶティップの間及び前記突出するＴＳＶティップの上を含んで、前記底部側に保護層を形成すること又はつけること、及び
    前記頂部側を下にした前記ＴＳＶダイを、ワークピース表面を有するワークピース上に、前記底部側を上にし、且つ、ボンドヘッドに接して、ボンディングすることであって、前記保護層が、前記ボンドヘッドが前記突出するＴＳＶティップと直接接触しないようにすること、
    を含む、方法。
  2. 請求項１に記載の方法であって、前記ボンディング前に前記基板を複数の前記ＴＳＶダイにシンギュレートすることを更に含む、方法。
  3. 請求項１に記載の方法であって、前記ＴＳＶティップが、前記内部金属コアにない金属を含む少なくとも一つの金属層をその上に含む金属キャップを含む、方法。
  4. 請求項１に記載の方法であって、前記ワークピースが有機基板を含む、方法。
  5. 請求項１に記載の方法であって、前記保護層が前記ＴＳＶダイの前記底部側を実質的に平坦化するブランケット層である、方法。
  6. 請求項１に記載の方法であって、
    前記ボンディングの後、前記複数のＴＳＶティップを露出させるように前記保護層の少なくとも一部を取り除くこと、及び
    前記露出の後、ボンディング特徴を有する頂部ダイを前記ＴＳＶダイ上の前記複数のＴＳＶティップにボンディングすること、
    を更に含む、方法。
  7. 請求項６に記載の方法であって、前記取り除くことがドライエッチを含む、方法。
  8. 請求項１に記載の方法であって、前記前記保護層を形成することが、スピンオンプロセス、及び前記スピンオンプロセスに続く少なくとも１つの硬化プロセスを含む、方法。
  9. 請求項１に記載の方法であって、前記ボンディングの間前記ワークピースがキャリアウエハに搭載される、方法。
  10. 請求項１に記載の方法であって、前記内部金属コアが銅を含み、前記ＴＳＶティップが、チタン、ニッケル、パラジウム、及び金のうち少なくとも一つを含む金属キャップをその上に含む、方法。
  11. 保護されたスタックされたダイ前駆物質であって、
    その上に複数のコンタクトパッドを有するワークピース表面を含むワークピース、
    アクティブ回路要素を含む頂部側及び前記頂部側のボンディング特徴と、底部側と、複数の基板貫通ビア（ＴＳＶ）とを有する基板を含むＴＳＶダイであって、前記複数のＴＳＶが、前記頂部側から、前記底部側から外に延びる突出するＴＳＶティップまで達する金属内部コアを含む、前記ＴＳＶダイ、及び
    前記突出するＴＳＶティップの上に延びる前記ＴＳＶダイの前記底部側上の保護層、
    を含み、
    前記ＴＳＶダイの前記ボンディング特徴が前記ワークピース表面上の前記複数のコンタクトパッドにボンディングされる、
    ダイ前駆物質。
  12. 請求項１１に記載の保護されたスタックされたダイ前駆物質であって、前記ＴＳＶティップが、前記内部金属コアにない金属を含む少なくとも一つの金属層をその上に含む金属キャップを含む、ダイ前駆物質。
  13. 請求項１１に記載の保護されたスタックされたダイ前駆物質であって、前記ワークピースが有機基板を含む、ダイ前駆物質。
  14. 請求項１１に記載の保護されたスタックされたダイ前駆物質であって、前記保護層が、前記ＴＳＶダイの前記底部側を実質的に平坦化するブランケット層である、ダイ前駆物質。
  15. 請求項１１に記載の保護されたスタックされたダイ前駆物質であって、前記内部金属コアが銅を含み、ＴＳＶティップが、チタン、ニッケル、パラジウム、及び金のうち少なくとも一つを含む金属キャップをその上に含む、ダイ前駆物質。
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