JP2014239082A - Semiconductor device and manufacturing method of the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an art to achieve performance improvement of a semiconductor device by providing an ohmic electrode which can support a decrease in contact resistance and inhibition of deterioration in surface morphology (surface roughness) at the same time in an ohmic electrode which forms ohmic contact with a nitride semiconductor layer.SOLUTION: In a semiconductor device, when assuming that a film thickness of a first molybdenum (Mo) film MF1 inserted between an AlGaN layer AGNL and an aluminum (Al) film ALF is X nm, relation represented as 2nm≤X≤10nm is satisfied. By performing a heat treatment at 650°C-850°C on a laminate LAB composed as above, an ohmic electrode which supports improvement in surface morphology and a decrease in contact resistance at the same time can be formed on the AlGaN layer AGNL.

Description

  The present invention relates to a semiconductor device and a manufacturing technique thereof, and more particularly to a semiconductor device having an ohmic electrode in ohmic contact with a nitride semiconductor layer and a technique effective when applied to the manufacturing technique thereof.

  In Japanese Patent No. 3154364 (Patent Document 1), on the n-type GaN layer, in order from the bottom, titanium (Ti), aluminum (Al), refractory metal (nickel (Ni) or titanium (Ti)), gold ( An ohmic electrode laminated with Au) is described. And, it is said that a good ohmic electrode with low contact resistance can be obtained by heat-treating this ohmic electrode at a high temperature of 800 ° C. or higher.

  Japanese Unexamined Patent Application Publication No. 2009-200260 (Patent Document 2) has a structure in which a niobium (Nb) film is inserted between an aluminum (Al) film and a platinum (Pt) film (or molybdenum (Mo) film). An ohmic electrode is described. The niobium (Nb) film introduced into this ohmic electrode has a function of preventing the aluminum (Al) film from forming a eutectic with another metal film and preventing an increase in contact resistance. It is going to be.

  In Non-Patent Document 1, molybdenum (Mo) (15 nm), aluminum (Al) (60 nm), molybdenum (Mo) (35 nm), and gold (Au) (50 nm) are stacked in this order from the bottom on the AlGaN layer. It is described that a good ohmic electrode is formed by heat treatment at a high temperature of 650 ° C. or higher.

Japanese Patent No. 3154364 JP 2009-200200 A

Journal of Vacuum Science B22 (5), 2004, pp.2409-2416

  In a semiconductor device having a nitride semiconductor layer typified by a GaN layer or an AlGaN layer, an ohmic electrode for making ohmic contact with the nitride semiconductor layer is usually formed. For example, a laminated structure of titanium (Ti) and aluminum (Al) or a laminated structure of molybdenum (Mo) and aluminum (Al) is used for an ohmic electrode that makes ohmic contact with an n-type nitride semiconductor layer. . Such an ohmic electrode not only reduces the contact resistance (contact resistance) between the ohmic electrode and the nitride semiconductor layer, but also improves the performance (including reliability improvement) of the semiconductor device. It is required to suppress the deterioration of the surface morphology (surface roughness) at the interface with the physical semiconductor layer.

  However, as a result of studying the ohmic electrode having such a laminated structure by the present inventor, the contact resistance (contact resistance) between the ohmic electrode and the nitride semiconductor layer is reduced, and the interface between the ohmic electrode and the nitride semiconductor layer is reduced. It has become clear that it is difficult to achieve both the suppression of deterioration of the surface morphology (surface roughness) in the current ohmic electrode structure.

  Of the means for solving the problems disclosed in the present application, the outline of typical ones will be briefly described as follows.

  (1) A semiconductor device and a manufacturing method thereof according to an embodiment include an electrode formed by performing heat treatment on a stacked body. The stacked body includes a first molybdenum film formed on the nitride semiconductor layer, an aluminum film formed on the first molybdenum film, a second molybdenum film formed on the aluminum film, and a second molybdenum film. And the film thickness of the first molybdenum film is X, the relationship of 2 nm ≦ X ≦ 10 nm is satisfied.

  (2) A semiconductor device and a manufacturing method thereof according to an embodiment include an electrode formed by performing heat treatment on a stacked body. The stacked body includes a first molybdenum film formed on the nitride semiconductor layer, an aluminum film formed on the first molybdenum film, a second molybdenum film formed on the aluminum film, and a second molybdenum film. When the thickness of the aluminum film is Y and the thickness of the gold film is Z, the relationship of Y ≦ Z ≦ 2Y is satisfied.

  (3) A semiconductor device according to an embodiment is formed on a nitride semiconductor layer, has a structure in which aluminum, molybdenum, and gold are interdiffused, and has an ohmic contact with the nitride semiconductor layer. An ohmic electrode is provided. At this time, the atomic% of aluminum is the largest among aluminum, molybdenum, and gold at the interface between the nitride semiconductor layer and the ohmic electrode.

  According to one embodiment, in an ohmic electrode that is in ohmic contact with a nitride semiconductor layer, both reduction of contact resistance (contact resistance) and suppression of deterioration of surface morphology (surface roughness) can be achieved. As a result, the performance of the semiconductor device can be improved.

It is a figure which shows each band structure before making the metal which comprises a Schottky contact, and an n-type semiconductor contact. It is a figure which shows the band structure of an equilibrium state in Schottky contact. It is a figure which shows the band structure of a forward direction state in Schottky contact. It is a figure which shows the band structure of a reverse direction state in Schottky contact. It is the graph which showed the current-voltage characteristic in a Schottky contact. It is a figure which shows each band structure before making the metal which comprises ohmic contact, and an n-type semiconductor contact. It is a figure which shows the band structure of an equilibrium state in ohmic contact. It is a figure which shows the band structure of a forward direction state in ohmic contact. It is a figure which shows the band structure of a reverse direction state in ohmic contact. It is the graph which showed the current-voltage characteristic in ohmic contact. It is a schematic diagram which shows the structure of the ohmic electrode described in the examination technique 1. It is a schematic diagram which shows the structure of the ohmic electrode described in the examination technique 2. 3 is a schematic diagram illustrating a configuration of a stacked body according to Embodiment 1. FIG. 3 is a schematic diagram illustrating a configuration of a stacked body according to Embodiment 1. FIG. It is a graph which shows the relationship between the film thickness of a 1st molybdenum (Mo) film | membrane, and the contact resistance of an ohmic electrode and a semiconductor layer. It is a graph which shows the relationship between the film thickness of a 1st molybdenum (Mo) film | membrane, and the surface roughness (RMS) in the interface of an ohmic electrode and a semiconductor layer. 5 is a cross-sectional view showing a manufacturing process of the ohmic electrode in the first embodiment. FIG. FIG. 18 is a cross-sectional view showing a manufacturing process of the ohmic electrode following FIG. 17. It is sectional drawing which shows the manufacturing process of the ohmic electrode following FIG. FIG. 20 is a cross-sectional view showing a manufacturing step of the ohmic electrode following FIG. 19. FIG. 21 is a cross-sectional view showing a manufacturing step of the ohmic electrode following FIG. 20. FIG. 22 is a cross-sectional view showing a manufacturing step of the ohmic electrode following FIG. 21. 6 is a schematic diagram illustrating a configuration of a stacked body in a second embodiment. FIG. 6 is a schematic diagram illustrating a configuration of a stacked body in a second embodiment. FIG. It is a graph which shows the relationship between Au / Al film thickness ratio and the contact resistance of an ohmic electrode and a semiconductor layer. It is a graph which shows the relationship between Au / Al film thickness ratio and the surface roughness (RMS) in the interface of an ohmic electrode and a semiconductor layer. FIG. 10 is a cross-sectional view showing a manufacturing process of the ohmic electrode in the second embodiment. FIG. 28 is a cross-sectional view showing a manufacturing step of the ohmic electrode following FIG. 27. FIG. 29 is a cross-sectional view showing a manufacturing step of the ohmic electrode following FIG. 28. FIG. 30 is a cross-sectional view showing a manufacturing step of the ohmic electrode following FIG. 29. 6 is a cross-sectional view showing a configuration of a HEMT according to Embodiment 3. FIG. It is a band figure for demonstrating the OFF operation | movement of HEMT. It is a band figure for demonstrating the ON operation of HEMT. 12 is a cross-sectional view showing a manufacturing process of the HEMT in Embodiment 3. FIG. FIG. 35 is a cross-sectional view showing the manufacturing process of the HEMT that follows FIG. FIG. 36 is a cross-sectional view showing the manufacturing process of the HEMT that follows FIG. FIG. 37 is a cross-sectional view showing a manufacturing step of the HEMT that follows FIG. FIG. 38 is a cross-sectional view showing a manufacturing step of the HEMT following FIG. FIG. 39 is a cross-sectional view showing a manufacturing step of the HEMT that follows FIG. FIG. 40 is a cross-sectional view showing a manufacturing step of the HEMT that follows FIG. FIG. 41 is a cross-sectional view showing a manufacturing step of the HEMT following FIG. FIG. 42 is a cross-sectional view showing a manufacturing step of the HEMT that follows FIG. FIG. 6 is a cross-sectional view showing a configuration of a MISFET in a fourth embodiment. It is a schematic diagram for demonstrating the OFF operation | movement of MISFET. It is a schematic diagram for demonstrating ON operation | movement of MISFET. FIG. 10 is a cross-sectional view showing a configuration of a blue light emitting diode in a fifth embodiment. It is a band figure for demonstrating the OFF operation | movement of a blue light emitting diode. It is a band figure for demonstrating ON operation of a blue light emitting diode.

  In the following embodiments, when it is necessary for the sake of convenience, the description will be divided into a plurality of sections or embodiments. However, unless otherwise specified, they are not irrelevant to each other. There are some or all of the modifications, details, supplementary explanations, and the like.

  Further, in the following embodiments, when referring to the number of elements (including the number, numerical value, quantity, range, etc.), especially when clearly indicated and when clearly limited to a specific number in principle, etc. Except, it is not limited to the specific number, and may be more or less than the specific number.

  Further, in the following embodiments, the constituent elements (including element steps and the like) are not necessarily indispensable unless otherwise specified and apparently essential in principle. Needless to say.

  Similarly, in the following embodiments, when referring to the shape, positional relationship, etc., of components, etc., unless otherwise specified, and in principle, it is considered that this is not clearly the case, it is substantially the same. Including those that are approximate or similar to the shape. The same applies to the above numerical values and ranges.

  In all the drawings for explaining the embodiments, the same members are denoted by the same reference symbols in principle, and the repeated explanation thereof is omitted. In order to make the drawings easy to understand, even a plan view may be hatched.

(Embodiment 1)
<Schottky contact>
In a semiconductor device, for example, a semiconductor layer is formed in a semiconductor device, and a metal film is used for wiring (including electrodes), so the circuit is configured by electrically connecting the semiconductor device and wiring. In order to achieve this, it is necessary to bring the semiconductor layer and the metal film into contact with each other. Generally, when the semiconductor layer and the metal film are brought into contact with each other, there are cases where a Schottky contact or an ohmic contact occurs. When the semiconductor layer and the metal film are simply electrically connected, it is necessary to make ohmic contact instead of Schottky contact. In the following, Schottky contact and ohmic contact will be described first, and the point that it is necessary to make ohmic contact simply when the semiconductor layer and the metal film are electrically connected will be described.

FIG. 1 is a diagram showing each band structure before a metal and an n-type semiconductor are brought into contact with each other. A metal band structure is shown on the left side of FIG. 1, and an n-type semiconductor band structure is shown on the right side of FIG. What is indicated by a broken line in FIG. 1 is a vacuum level, and this vacuum level indicates a vacuum energy level. In the metal band structure shown on the left side of FIG. 1, the Fermi level ε _FM of the metal is shown, and the difference between the Fermi level ε _FM of the metal and the vacuum level is the work function Φ _m . This work function Φ _m has the meaning of energy necessary for taking out electrons having Fermi energy in the metal from the metal into the vacuum. On the other hand, in the band structure of the n-type semiconductor shown on the right side of FIG. 1, the valence band E _v and the conduction band E _c are shown, and the Fermi level ε _FS of the n-type semiconductor is in the vicinity of the conduction band E _c . Exists. The difference between the Fermi level ε _FS of the n-type semiconductor and the vacuum level becomes the work function Φ _s . This work function Φ _s has the meaning of energy necessary for extracting electrons having Fermi energy in an n-type semiconductor into a vacuum.

Here, in FIG. 1, the work function Φ _m of the metal is larger than the work function Φ _s of the n-type semiconductor. In this case, when the metal and the n-type semiconductor are brought into contact with each other, the metal and the n-type semiconductor are brought into contact. This contact becomes a Schottky contact. In other words, when the position of the Fermi level ε _FM of the metal before contacting the metal and the n-type semiconductor is lower than the Fermi level ε _FS of the n-type semiconductor when viewed from the electron energy, the metal and the n-type semiconductor This contact becomes a Schottky contact.

Below, the mechanism by which the Schottky contact is formed will be described. For example, when a metal and an n-type semiconductor are brought into contact with each other from the state shown in FIG. 1, the position of the Fermi level ε _FM of the metal is lower than the Fermi level ε _{FS of} the n-type semiconductor. electrons present many near the bottom of the E _c would be better than being in the n-type semiconductor was present in the metal, the energy is lowered. From this, when a metal and an n-type semiconductor are brought into contact, a large number of electrons existing near the bottom of the conduction band E _c of the n-type semiconductor flow from the n-type semiconductor toward the metal. As a result, positively charged donor ions are left behind in the surface region of the n-type semiconductor in contact with the metal, and negative charges (electrons) of the same amount are induced on the metal side. Then, an electric field is generated in a direction from the n-type semiconductor to the metal, and this electric field suppresses inflow of a large number of electrons existing near the bottom of the conduction band E _c of the n-type semiconductor from the n-type semiconductor to the metal. . That is, after a certain amount of electrons flow from the n-type semiconductor into the metal, the electrons no longer flow into the metal, and an equilibrium state is realized.

FIG. 2 is a diagram showing the band structure in this equilibrium state. That is, as shown in FIG. 2, in the equilibrium state, the Fermi level ε _FM of the metal and the Fermi level ε _FS of the n-type semiconductor match. At this time, since the electron density does not change from the state before the contact sufficiently inside the n-type semiconductor, the energy difference between the Fermi level ε _FS and the bottom of the conduction band E _c of the n-type semiconductor does not change, and the n-type semiconductor does not change. The semiconductor band is bent upward as shown in FIG. As a result, in the contact area with the n-type semiconductor of metal, the bottom energy of the conduction band E _c is, to become higher than the bottom energy of the n-type semiconductor inside the conduction band E _c, a metal of the n-type semiconductor Electrons do not exist in the contact region with, and a depletion layer is formed. Thus, when the work function Φ _m of the metal is larger than the work function Φ _s of the n-type semiconductor, when the metal and the n-type semiconductor are brought into contact with each other, the contact between the metal and the n-type semiconductor becomes the Schottky contact. Become. At this time, the height Φ _B of the Schottky barrier is defined as the difference between the energy at the bottom of the conduction band E _c in the contact region with the metal of the n-type semiconductor and the Fermi level ε _FM of the metal.

  Here, consider a case where a forward voltage is applied between the metal forming the Schottky contact and the n-type semiconductor. That is, consider a case where a voltage is applied so that the metal side is positive with respect to the n-type semiconductor side. In this case, since most of the forward voltage is applied to the depletion layer having a high resistance, the external electric field due to the forward voltage causes the electric field in the depletion layer that suppresses the inflow of electrons from the n-type semiconductor to the metal. It will weaken. As a result, electrons flow from the n-type semiconductor to the metal, and current flows from the metal to the n-type semiconductor. This is the forward direction.

FIG. 3 is a diagram illustrating the band structure in the forward direction. As shown in FIG. 3, when a forward voltage V is applied between the metal and the n-type semiconductor, the n-type semiconductor is higher in energy than the metal for the n-type semiconductor. the Fermi level ε _FS of, qV only be higher than the Fermi level ε _FM of metal. Then, the energy barrier viewed from the electrons in the n-type semiconductor is lower by qV than the equilibrium energy barrier (Schottky barrier height Φ _B ) where no voltage is applied. As a result, electrons flow from the n-type semiconductor into the metal, and a current (forward current) flows from the metal toward the n-type semiconductor.

  On the other hand, consider a case where a reverse voltage is applied between a metal forming a Schottky contact and an n-type semiconductor. That is, consider a case where a voltage is applied so that the metal side has a negative potential with respect to the n-type semiconductor side. In this case, most of the reverse voltage is applied to the depletion layer having a high resistance, and an external electric field due to the reverse voltage is generated in a direction that strengthens the electric field in the depletion layer. As a result, no inflow of electrons from the n-type semiconductor to the metal occurs, and almost no current flows. This is the reverse direction.

FIG. 4 is a diagram showing a band structure in the reverse direction. As shown in FIG. 4, when a reverse voltage V is applied between the metal and the n-type semiconductor, the n-type semiconductor is lower in energy than the metal for the n-type semiconductor. The Fermi level ε _FS is lower than the Fermi level ε _FM of the metal by qV. Then, the energy barrier viewed from the electrons in the n-type semiconductor becomes qV higher than the energy barrier in an equilibrium state where no voltage is applied (the height Φ _{B of the} Schottky barrier). As a result, it becomes difficult for electrons to flow into the metal from the n-type semiconductor, and current hardly flows from the metal toward the n-type semiconductor. Here, it is said that almost no current flows. In the reverse state, a slight amount of electrons flow from the metal to the n-type semiconductor. As a result, a slight reverse current flows from the n-type semiconductor to the metal. . That is, when the reverse voltage V is applied, the Fermi level ε _FM of the metal becomes higher by qV than the Fermi level ε _FS of the n-type semiconductor as shown in FIG. , Flowing from metal to n-type semiconductor. That is, in the reverse state, the Fermi level ε _FM of the metal is higher than the Fermi level ε _FS of the n-type semiconductor by qV, so that the Schottky barrier height Φ _B from the Fermi level ε _FM in the metal The number of electrons having larger energy becomes larger than the number of electrons having energy larger than (Φ _B −qV) from the Fermi level ε _FS in the n-type semiconductor. For this reason, electrons flow from the metal into the n-type semiconductor due to the diffusion phenomenon caused by the difference in electron concentration. As a result, a reverse current flows slightly from the n-type semiconductor to the metal.

  The above is the characteristics of the Schottky contact. FIG. 5 is a graph showing current-voltage characteristics in Schottky contact. In FIG. 5, the horizontal axis indicates the voltage applied between the Schottky contacts, and the vertical axis indicates the current flowing between the Schottky contacts. As shown in FIG. 5, when a forward voltage is applied to the Schottky contact, the forward current increases exponentially as the forward voltage increases. On the other hand, when a reverse voltage is applied to the Schottky contact, the reverse current is almost constant at a small value even if the reverse voltage increases. From this, it can be seen that the current-voltage characteristic of the Schottky contact is completely different from the current-voltage characteristic in the forward direction and the current-voltage characteristic in the reverse direction. That is, it can be seen that the Schottky contact has a rectifying characteristic that a sufficient amount of current flows in the forward direction, but almost no current flows in the reverse direction.

  Here, in the case where a circuit is configured by electrically connecting a semiconductor device having a semiconductor layer and a wiring formed from a metal film, it is inconvenient if the contact between the semiconductor layer and the metal film becomes a Schottky contact. Arise. This is because even when the semiconductor layer and the metal film are electrically connected, when the contact between the semiconductor layer and the metal film becomes a Schottky contact, the Schottky contact has a rectifying characteristic like a diode. This is because a diode is additionally connected between the semiconductor layer and the metal film, which is different from the target circuit configuration. For this reason, a resistive ohmic contact without a rectifying characteristic is required for the contact between the semiconductor layer and the metal film.

<Omic contact>
Below, this ohmic contact is demonstrated. FIG. 6 is a diagram showing each band structure before the metal and the n-type semiconductor are brought into contact with each other. A metal band structure is shown on the left side of FIG. 6, and an n-type semiconductor band structure is shown on the right side of FIG. In FIG. 6, the work function Φ _m of the metal is smaller than the work function Φ _s of the n-type semiconductor. In this case, when the metal and the n-type semiconductor are brought into contact, the contact between the metal and the n-type semiconductor is reduced. Ohmic contact. In other words, when the position of the Fermi level ε _FM of the metal before contacting the metal and the n-type semiconductor is higher than the Fermi level ε _FS of the n-type semiconductor when viewed from the electron energy, the metal and the n-type semiconductor The contact becomes an ohmic contact.

Next, the mechanism by which ohmic contact is formed will be described. For example, when a metal and an n-type semiconductor are brought into contact with each other from the state shown in FIG. 6, the position of the Fermi level ε _FM of the metal is higher than the Fermi level ε _FS of the n-type semiconductor. Is lower in energy when present in an n-type semiconductor than in metal. From this, when a metal and an n-type semiconductor are brought into contact, electrons existing in the metal flow from the metal toward the n-type semiconductor. As a result, the electron concentration in the surface region of the n-type semiconductor in contact with the metal increases, and the same amount of positive charge is induced on the metal side. Then, an electric field is generated in a direction from the metal toward the n-type semiconductor, and this electric field suppresses inflow of electrons existing in the metal from the metal to the n-type semiconductor. That is, after a certain amount of electrons flow from the metal into the n-type semiconductor, the electrons no longer flow into the n-type semiconductor, and an equilibrium state is realized.

FIG. 7 is a diagram showing the band structure in this equilibrium state. That is, as shown in FIG. 7, in the equilibrium state, the Fermi level ε _FM of the metal and the Fermi level ε _FS of the n-type semiconductor match. At this time, since the electron density does not change from the state before the contact sufficiently inside the n-type semiconductor, the energy difference between the Fermi level ε _FS and the bottom of the conduction band E _c of the n-type semiconductor does not change, and the n-type semiconductor does not change. As shown in FIG. 7, the semiconductor band is bent downward. As a result, in the contact area with the n-type semiconductor of metal, the bottom energy of the conduction band E _c is, becomes lower than the bottom energy of the n-type semiconductor inside the conduction band E _c, a metal of the n-type semiconductor There are many electrons in the contact area. Thus, when the work function Φ _m of the metal is smaller than the work function Φ _s of the n-type semiconductor, when the metal and the n-type semiconductor are brought into contact, the contact between the metal and the n-type semiconductor becomes an ohmic contact. . At this time, it is understood that no Schottky barrier is formed in the ohmic contact, which is different from the Schottky contact.

Here, consider a case where a first voltage is applied between the metal forming the ohmic contact and the n-type semiconductor so that the metal side has a positive potential relative to the n-type semiconductor side. FIG. 8 is a diagram showing a band structure when the first voltage is applied so that the metal side has a positive potential with respect to the n-type semiconductor side. As shown in FIG. 8, when the first voltage V described above is applied between the metal and the n-type semiconductor, the metal is lower in energy than the n-type semiconductor with respect to electrons. is the Fermi level ε _FM, qV only be lower than the n-type semiconductor of the Fermi level ε _FS. Then, a large number of electrons existing near the conduction band in the n-type semiconductor flow into the metal from the n-type semiconductor, and current flows from the metal toward the n-type semiconductor.

On the other hand, consider a case where a second voltage is applied between the metal forming the ohmic contact and the n-type semiconductor so that the metal side has a negative potential relative to the n-type semiconductor side. FIG. 9 is a diagram showing a band structure when the second voltage is applied so that the metal side has a negative potential with respect to the n-type semiconductor side. As shown in FIG. 9, when the above-described second voltage V is applied between a metal and an n-type semiconductor, the metal is higher in energy than the n-type semiconductor for electrons. It is the Fermi level ε _FM, qV only higher than that of the n-type semiconductor of the Fermi level ε _FS. Then, electrons existing in the metal flow into the n-type semiconductor from the metal, and a current flows from the n-type semiconductor toward the metal.

  The above is the characteristic of ohmic contact. FIG. 10 is a graph showing current-voltage characteristics in ohmic contact. In FIG. 10, the horizontal axis indicates the voltage applied between the ohmic contacts, and the vertical axis indicates the current flowing between the ohmic contacts. As shown in FIG. 10, when the first voltage is applied to the ohmic contact, the current in the positive direction increases in a linear line as the first voltage increases. On the other hand, when the second voltage is applied to the ohmic contact, the current in the negative direction increases in a linear line as the second voltage increases. From this, it can be seen that the current-voltage characteristic of the ohmic contact is exactly the same as the current-voltage characteristic in the first voltage polarity and the current-voltage characteristic in the second voltage polarity. That is, it can be seen that the ohmic contact is a resistive contact and does not have a rectifying characteristic like a Schottky contact.

  Therefore, in the case where a circuit is configured by electrically connecting a semiconductor device having a semiconductor layer and a wiring formed from a metal film, the contact between the semiconductor layer and the metal film is an ohmic contact. It can be seen that there is no rectification characteristic like contact, which is advantageous. That is, it can be seen that when the semiconductor layer and the metal film are in ohmic contact, the semiconductor layer and the metal film are in resistive contact without rectification characteristics, and the intended circuit configuration can be realized.

<Necessity of improving the characteristics of ohmic electrodes>
As described above, in a device having a semiconductor layer, in many cases, it is necessary to electrically connect the semiconductor layer and the metal film in order to form an integrated circuit. At this time, an integrated circuit using a device having a semiconductor layer is realized by ohmic contact between the semiconductor layer and the metal film. The ohmic electrode is used as, for example, a source electrode or a drain electrode in a transistor, an electrode when a semiconductor layer is used as a resistance element, or the like. Therefore, in order to realize an integrated circuit using a device having a semiconductor layer, it is necessary to form an ohmic electrode in ohmic contact with the semiconductor layer. From the viewpoint of improving the performance of integrated circuits (including improving reliability), not only can the contact resistance (contact resistance) between the ohmic electrode and the semiconductor layer be reduced as much as possible, but also the surface morphology at the interface between the ohmic electrode and the semiconductor layer. It is required to suppress the deterioration of (surface roughness). This is because it is needless to reduce the contact resistance of the ohmic electrode from the viewpoint of improving the characteristics of the integrated circuit, but the deterioration of the surface morphology leads to a decrease in the adhesion between the ohmic electrode and the semiconductor layer, This is because device breakdown due to peeling of the ohmic electrode, generation of unnecessary leakage current, and the like are caused, which is considered to be a problem from the viewpoint of improving the reliability of the semiconductor device.

  Here, a device having a nitride semiconductor which is a kind of compound semiconductor is no exception, and in order to realize an integrated circuit using a device having a nitride semiconductor layer, an ohmic electrode in ohmic contact with the nitride semiconductor layer is required. Need to form. From the viewpoint of improving the performance (including improving reliability) of the integrated circuit, not only the contact resistance (contact resistance) between the ohmic electrode and the nitride semiconductor layer is reduced, but also the interface between the ohmic electrode and the nitride semiconductor layer. It is also necessary to suppress the deterioration of the surface morphology (surface roughness). In particular, in the present invention, in an ohmic electrode that is in ohmic contact with an intrinsic nitride semiconductor layer (non-doped nitride semiconductor layer) or an n-type nitride semiconductor layer, contact resistance (contact resistance) is reduced, and surface morphology (surface roughness). An object of the present invention is to provide an ohmic electrode that can simultaneously suppress deterioration of the material. The present invention is a technical idea that aims at improving the characteristics of an ohmic electrode particularly in a nitride semiconductor. At this time, the reason why attention is focused on the nitride semiconductor in the present invention is that many of the compound semiconductors have excellent characteristics of the nitride semiconductor. Below, the advantage when the nitride semiconductor which is 1 type of a compound semiconductor is compared with the compound semiconductor represented by GaAs is demonstrated.

<Advantages of using nitride semiconductor>
For example, compound semiconductors typified by GaAs and AlGaAs generally have higher electron mobility than silicon (Si), while hole mobility is similar to silicon (Si) or silicon. It is smaller than (Si). For this reason, for example, when a compound semiconductor is used as a component of a device (semiconductor element), a device using electrons as majority carriers can take advantage of the characteristics of the compound semiconductor.

  Although it is a compound semiconductor having such characteristics, in recent years, nitride semiconductors typified by GaN and AlGaN have attracted attention among compound semiconductors. This is because a nitride semiconductor typified by GaN or AlGaN (an example of a compound semiconductor) has a larger band gap than a compound semiconductor typified by GaAs or AlGaAs, and as a result, the dielectric breakdown voltage is increased. Because. Therefore, in recent years, nitride semiconductors typified by GaN and AlGaN are used, for example, in the fields of high-frequency devices and power devices.

Furthermore, it is known that when a heterojunction between an AlGaN layer and a GaN layer is formed, a triangular well-type potential is formed near the interface due to the difference in the band structure, and electrons are concentrated in this well-type potential. (Two-dimensional electron gas). Since the mobility of the two-dimensional electron gas is very high, the field effect transistor using the two-dimensional electron gas generated in the well-type potential formed near both interfaces as a carrier operates at high speed. A field effect transistor is realized. A field effect transistor using this two-dimensional electron gas is called a high electron mobility transistor (HEMT). Some HEMTs use a heterojunction between an AlGaAs layer and a GaAs layer. The surface charge of a two-dimensional electron gas based on the heterojunction between an AlGaN layer and a GaN layer (for example, 1 × 10 ¹³ / cm ² ). Is sufficiently larger (for example, 10 times) than the surface charge (for example, 1 × 10 ¹² / cm ² ) of the two-dimensional electron gas based on the heterojunction of the AlGaAs layer and the GaAs layer. This conduction band discontinuity Delta] E _c of the AlGaN layer and the GaN layer is, with greater than the conduction band discontinuity Delta] E _c of the AlGaAs layer and the GaAs layer, a heterojunction AlGaN layer and the GaN layer, the piezoelectric effect due to spontaneous polarization This is because the bottom of the well-type potential is lowered to the lower side (valence band side). As a result, the magnitude of the well-type potential formed at the heterojunction between the AlGaN layer and the GaN layer is larger than the magnitude of the well-type potential formed at the heterojunction between the AlGaAs layer and the GaAs layer. The surface charge of the two-dimensional electron gas based on the heterojunction between the AlGaN layer and the GaN layer is sufficiently larger than the surface charge of the two-dimensional electron gas based on the heterojunction between the AlGaAs layer and the GaAs layer. For this reason, the HEMT using a heterojunction of an AlGaN layer and a GaN layer has an advantage that a large current can be easily obtained as compared with a HEMT using a heterojunction of an AlGaAs layer and a GaAs layer.

  As described above, nitride semiconductors typified by GaN and AlGaN are used in the fields of high-frequency devices and power devices. In particular, according to HEMTs using nitride semiconductors, the above-described advantages can be obtained. it can. Furthermore, in recent years, the field of use of nitride semiconductors has expanded to the field of optical devices. For example, a nitride semiconductor typified by InGaN is used as a light emitting layer of a blue light emitting diode. As described above, the present invention focuses on the advantages of the nitride semiconductor and aims to improve the performance of the semiconductor device using the nitride semiconductor. In particular, the present invention focuses on improving the characteristics of the ohmic electrode that is in ohmic contact with the nitride semiconductor layer. In the following, first, a study technique and problems regarding an ohmic electrode in ohmic contact with the nitride semiconductor layer will be described, and then the technical idea of the present invention will be described.

<Technology 1>
FIG. 11 is a schematic diagram created by the present inventor with reference to the ohmic electrode described in Study Technique 1 (Japanese Patent No. 3154364). As shown in FIG. 11, the ohmic electrode OE in the study technique 1 is formed in the n-type GaN layer nGNL. The ohmic electrode OE includes an alloy film (or multilayer film) TAF made of titanium (Ti) and aluminum (Al) formed on the n-type GaN layer nGNL, and a refractory metal formed on the alloy film TAF. The film HMF and a gold film AUF formed on the refractory metal film HMF. In the examination technique 1, it is said that a good ohmic electrode OE having a low contact resistance can be obtained by heat-treating the laminated structure at a high temperature of 800 ° C. or higher.

  As a result of examination by the present inventor, it has been found that this examination technique 1 has the following problems. The first problem of the study technique 1 is that the surface morphology (surface roughness) of the ohmic electrode OE is poor. This is because aluminum (Al) and a refractory metal such as nickel (Ni) easily form an alloy at a low temperature, and this alloy is formed unevenly in a plane. Deterioration of the surface morphology promotes peeling of the ohmic electrode OE from the n-type GaN layer nGNL, and causes device destruction (element destruction) due to peeling of the ohmic electrode OE. Alternatively, device breakdown due to local concentration of the electric field at a portion where the electrode edge is not uniform, generation of unnecessary leakage current, and the like are caused. As a result, the reliability of the semiconductor device is reduced.

  In addition, as a second problem newly found by the study of the present inventors, when titanium (Ti) is used so as to be in direct contact with the n-type GaN layer nGNL, it is usually between the substrate and the n-type GaN layer nGNL. There is a problem in that unnecessary leakage current is generated in the high resistance buffer layer provided in FIG. This is because when titanium (Ti) is heat-treated at a high temperature, titanium (Ti) penetrates into the n-type GaN layer nGNL through crystal transition existing on the surface of the n-type GaN layer nGNL. This is considered to diffuse into the resistance buffer layer. That is, when titanium (Ti) diffuses to the high resistance buffer layer, unnecessary leakage current increases due to the titanium diffused in the high resistance buffer layer. As described above, the ohmic electrode OE described in the examination technique 1 has a problem that the characteristics of the ohmic electrode OE cannot be sufficiently improved.

<Technology 2>
Subsequently, the study technique 2 will be described. FIG. 12 is a schematic diagram created by the present inventor with reference to the ohmic electrode described in Study Technique 2 (Non-Patent Document 1). As shown in FIG. 12, the ohmic electrode OE in the study technique 2 has an AlGaN layer AGNL formed on the GaN layer GNL, and is formed on the AlGaN layer AGNL. Specifically, the ohmic electrode OE in the study technique 2 includes a first molybdenum (Mo) film MF1 formed on the AlGaN layer AGNL and an aluminum (Al) film formed on the first molybdenum (Mo) film MF1. It is composed of ALF, a second molybdenum (Mo) film MF2 formed on the aluminum (Al) film ALF, and a gold film AUF formed on the second molybdenum (Mo) film MF2. In the examination technique 2, it is said that a good ohmic electrode OE can be obtained by heat-treating this laminated structure at a high temperature of 650 ° C. or higher.

  In the study technique 2 configured as described above, the first molybdenum (Mo) film is formed in the lowermost layer of the ohmic electrode OE. Molybdenum (Mo) has a higher melting point than titanium (Ti). Therefore, the problem that molybdenum (Mo) diffuses into, for example, the high-resistance buffer layer through the crystal transition is avoided. However, as a result of the study by the present inventors, it has been found that the ohmic electrode OE in the study technique 2 has a problem in that the contact resistance and the surface morphology are not necessarily good. For example, in the study technique 2, the film thickness of the first molybdenum (Mo) film MF1 is 15 nm, the film thickness of the aluminum (Al) film ALF is 60 nm, the film thickness of the second molybdenum (Mo) film MF2 is 35 nm, and the gold film AUF. However, the contact resistance and the surface morphology are not always compatible with each other. That is, in order to achieve both contact resistance and surface morphology, it is necessary to adjust the film thickness of each layer constituting the ohmic electrode OE, and depending on the film thickness condition, contact resistance may increase or surface morphology may deteriorate. There is.

  As described above, in the study technique 1 and the study technique 2, in the ohmic electrode that is in ohmic contact with the nitride semiconductor layer, both reduction of contact resistance (contact resistance) and suppression of deterioration of surface morphology (surface roughness) are achieved. It is in the current situation that is not done. Therefore, in the present invention, in the ohmic electrode that is in ohmic contact with the nitride semiconductor layer, a contrivance that can achieve both reduction of contact resistance (contact resistance) and suppression of deterioration of surface morphology (surface roughness) is provided. The technical idea of the present invention to which this device has been applied will be described below.

<Configuration of laminate in the present invention>
FIG. 13 is a schematic diagram showing the configuration of the stacked body LAB in the first embodiment. In this Embodiment 1, the ohmic electrode in this Embodiment 1 is formed by heat-processing the laminated body LAB shown in FIG. That is, the stacked body LAB shown in FIG. 13 has a structure before the ohmic electrode is formed by performing the heat treatment. As shown in FIG. 13, the stacked body LAB in the first embodiment is formed on the AlGaN layer AGNL formed on the GaN layer GNL. The stacked body LAB includes a first molybdenum (Mo) film MF1 formed on the AlGaN layer AGNL, an aluminum (Al) film ALF formed on the first molybdenum (Mo) film MF1, and an aluminum (Al ) A second molybdenum (Mo) film MF2 formed on the film ALF and a gold (Au) film AUF formed on the second molybdenum (Mo) film MF2.

  Here, an aluminum (Al) film is mentioned as a metal film in ohmic contact with the AlGaN layer AGNL. That is, the aluminum (Al) film ALF used in the stacked body LAB shown in FIG. 13 is a film having a function of ensuring ohmic contact with the AlGaN layer AGNL. At this time, from the viewpoint of ensuring ohmic contact with the AlGaN layer AGNL, it is conceivable to form the aluminum (Al) film ALF directly on the AlGaN layer AGNL. However, the adhesion between the aluminum (Al) film ALF and the AlGaN layer AGNL is poor. Therefore, in the structure in which the aluminum (Al) film ALF is in direct contact with the AlGaN layer AGNL, when the ohmic electrode is formed by performing the heat treatment, the phenomenon that the aluminum (Al) film ALF swells due to surface tension (ball up phenomenon and The surface morphology at the interface between the AlGaN layer AGNL and the aluminum (Al) film ALF is deteriorated. Deterioration of the surface morphology leads to a decrease in the adhesion between the ohmic electrode and the semiconductor layer, causing device breakdown due to peeling of the ohmic electrode, generation of unnecessary leakage current, and so on, from the viewpoint of improving the reliability of the semiconductor device. .

  Therefore, in the first embodiment, the first molybdenum (Mo) film MF1 is inserted between the AlGaN layer AGNL and the aluminum (Al) film ALF. That is, the first molybdenum (Mo) film MF1 has a function of improving the adhesion between the AlGaN layer AGNL and the aluminum (Al) film ALF. By forming the first molybdenum (Mo) film MF1, The surface morphology at the interface between the AlGaN layer AGNL and the aluminum (Al) film ALF can be improved.

  Subsequently, the surface of the aluminum (Al) film ALF is oxidized when the gold (Au) film AUF formed in the stacked body LAB is subjected to a heat treatment to form the ohmic electrode. It has a function to prevent. That is, when heat treatment is performed on the aluminum (Al) film ALF, the surface of the aluminum (Al) film ALF is easily oxidized. When the aluminum (Al) film ALF is oxidized, since the aluminum oxide is an insulator, the resistance of the ohmic electrode is increased, and the electrical characteristics of the ohmic electrode are deteriorated. Therefore, the gold (Au) film AUF is formed on the aluminum (Al) film ALF in order to prevent oxidation of the aluminum film (Al) ALF during the heat treatment. However, when the gold (Au) film AUF is formed so as to be in direct contact with the aluminum (Al) film ALF, the heat treatment is performed between the aluminum (Al) film ALF and the gold (Au) film AUF. Rapid alloy reaction occurs. Since this alloy reaction also becomes a factor of deteriorating the surface morphology, it is necessary to suppress the alloy reaction as much as possible. From this viewpoint, a second molybdenum (Mo) film MF2 that is a refractory metal is formed as an intermediate layer between the aluminum (Al) film ALF and the gold (Au) film AUF. That is, the second molybdenum (Mo) film MF2 has a function of suppressing a rapid alloy reaction between the aluminum (Al) film ALF and the gold (Au) film AUF.

  From the above, the stacked body LAB in the first embodiment includes the first molybdenum (Mo) film, the aluminum (Al) film ALF, the second molybdenum (Mo) film MF2, and the gold (Au) film AUF. It is comprised from the laminated film. And the function of each film which comprises the laminated body LAB in this Embodiment 1 is put together as follows.

  (1) First, the lowermost first molybdenum (Mo) film MF1 is a film functioning as an adhesion film, and the first molybdenum (Mo) film is interposed between the AlGaN layer AGNL and the aluminum (Al) film ALF. By inserting MF1, the adhesion between the AlGaN layer AGNL and the aluminum (Al) film ALF can be improved. Thereby, the surface morphology at the interface between the AlGaN layer AGNL and the aluminum (Al) film ALF can be improved.

  (2) The aluminum (Al) film ALF is a film that functions as an ohmic metal for realizing an ohmic contact with the AlGaN layer AGNL. The aluminum (Al) film ALF forms a gap between the AlGaN layer AGNL and the AlGaN layer AGNL. An ohmic electrode that is in ohmic contact can be formed. Since the resistance of the aluminum (Al) film ALF is relatively small, the contact resistance (contact resistance) between the ohmic electrode and the AlGaN layer AGNL can be reduced.

  (3) The second molybdenum (Mo) film MF2 suppresses a rapid alloy reaction between the aluminum (Al) film ALF and the gold (Au) film AUF when the laminated body LAB is subjected to heat treatment. It is a film | membrane which has a function to do. In this way, by inserting the second molybdenum (Mo) film MF2 which is a refractory metal between the aluminum (Al) film ALF and the gold (Au) film AUF, the aluminum (Al) film ALF and the gold ( The rapid alloy reaction that occurs with the Au) film AUF can be suppressed.

  (4) The gold (Au) film AUF has a function of preventing the surface of the aluminum (Al) film ALF from being oxidized when the laminated body LAB is subjected to heat treatment. Thus, by forming the gold (Au) film AUF on the aluminum (Al) film ALF, the oxidation of the aluminum (Al) film can be prevented, and the resistance increase of the ohmic electrode can be suppressed.

  According to the laminated body LAB in the first embodiment configured as described above, first, as an adhesion film that improves the adhesion between the AlGaN layer AGNL and the aluminum (Al) film ALF, a titanium (Ti) film Instead, the first molybdenum (Mo) film MF1 is used. At this time, since molybdenum (Mo) has a higher melting point than titanium (Ti), metal can be prevented from diffusing into the semiconductor layer (for example, the high-resistance buffer layer) through crystal transition. That is, an ohmic electrode is formed by performing heat treatment on the stacked body LAB in the first embodiment, but at this time, molybdenum (Mo) has a higher melting point than titanium (Ti). It is possible to suppress diffusion of molybdenum into the semiconductor layer (for example, the high resistance buffer layer) through the crystal transition. As a result, generation of unnecessary leakage current in the semiconductor layer (for example, high resistance buffer layer) can be suppressed.

  Further, in the stacked body LAB in the first embodiment, the first molybdenum (Mo) film formed in the lowermost layer as an intermediate layer inserted between the aluminum (Al) film ALF and the gold (Au) film AUF. A second molybdenum (Mo) film MF2, which is the same type of film as MF1, is used. For this reason, by carrying out heat treatment on the laminate LAB, there is also an advantage that an unnecessary alloy film is hardly formed when the ohmic electrode is formed.

<New problem found by the present inventor>
As described above, in the stacked body LAB in the first embodiment, the first molybdenum (Mo) film MF1 functioning as an adhesion film is inserted between the AlGaN layer AGNL and the aluminum (Al) film ALF. Thereby, the adhesiveness between the AlGaN layer AGNL and the aluminum (Al) film ALF is improved, and the surface morphology can be improved. Thus, from the viewpoint of improving the surface morphology, it is desirable to insert the first molybdenum (Mo) film MF1 between the AlGaN layer AGNL and the aluminum (Al) film ALF. However, the present inventor has found that the contact resistance increases when the first molybdenum (Mo) film MF1 is too thick. That is, from the viewpoint of reducing the contact resistance (contact resistance), it has been found that the film thickness of the first molybdenum (Mo) film MF1 is too thick. Here, when the laminated body LAB is subjected to heat treatment to form an ohmic electrode, atoms are diffused from each layer constituting the laminated body LAB. At this time, at the interface between the ohmic electrode and the AlGaN layer AGNL, for example, when the atomic% of aluminum atoms is larger than the atomic% of molybdenum atoms, the influence of contact with the aluminum atoms is increased. It is considered that contact between AGNL and the ohmic electrode becomes ohmic contact, and contact resistance can be reduced. However, if the film thickness of the first molybdenum (Mo) film MF1 becomes too thick, even if atoms are diffused from each layer constituting the stacked body LAB, aluminum is formed at the interface between the ohmic electrode and the AlGaN layer AGNL. It is considered that the atomic% of atoms often becomes smaller than the atomic% of molybdenum atoms. In this case, the contact between the AlGaN layer AGNL and the ohmic electrode is greatly affected by the contact with the molybdenum constituting the Schottky contact, and it is considered that the contact resistance increases.

  As described above, since the adhesion between the AlGaN layer AGNL and the aluminum (Al) film ALF is poor, the first molybdenum (between the AlGaN layer AGNL and the aluminum (Al) film ALF is used to improve the adhesion. Mo) It is necessary to insert the film MF1. However, the present inventor has found that the contact resistance (contact resistance) between the AlGaN layer AGNL and the ohmic electrode increases if the thickness of the first molybdenum (Mo) film MF1 is excessively increased. is there. That is, from the viewpoint of achieving both improvement in surface morphology and reduction in contact resistance, the thickness of the first molybdenum (Mo) film MF1 inserted between the AlGaN layer AGNL and the aluminum (Al) film ALF is devised. There is a need. Therefore, in the first embodiment, the film thickness of the first molybdenum (Mo) film MF1 inserted between the AlGaN layer AGNL and the aluminum (Al) film ALF is devised. Below, the technical idea in this Embodiment 1 which gave this device is demonstrated.

<Characteristics in Embodiment 1>
As shown in FIG. 13, the stacked body LAB in the first embodiment is formed on the AlGaN layer AGNL formed on the GaN layer GNL. The stacked body LAB includes a first molybdenum (Mo) film MF1 formed on the AlGaN layer AGNL, an aluminum (Al) film ALF formed on the first molybdenum (Mo) film MF1, and an aluminum (Al ) A second molybdenum (Mo) film MF2 formed on the film ALF and a gold (Au) film AUF formed on the second molybdenum (Mo) film MF2.

  Here, the feature of the first embodiment is that when the film thickness of the first molybdenum (Mo) film MF1 inserted between the AlGaN layer AGNL and the aluminum (Al) film ALF is Xnm, 2 nm ≦ X ≦ It is characterized in that the 10 nm relationship is satisfied. In the first embodiment, the laminated body LAB configured in this manner is subjected to heat treatment at a high temperature of, for example, 650 ° C. to 850 ° C., thereby forming an ohmic electrode that achieves both improved surface morphology and reduced contact resistance. It can be formed on the layer AGNL.

  Here, for example, in the first embodiment, the thicknesses of the films (aluminum (Al) film ALF, second molybdenum (Mo) film MF2, gold (Au) film AUF)) other than the first molybdenum (Mo) film MF1. Is not particularly limited as long as the function of each film is exhibited. For example, as an example, the film thickness of the aluminum (Al) film ALF is 70 nm, the film thickness of the second molybdenum (Mo) film MF2 is 30 nm, and the film thickness of the gold (Au) film AUF is 50 nm. ing.

  FIG. 13 illustrates an example in which the stacked body LAB is formed on the AlGaN layer AGNL. However, for example, as illustrated in FIG. 14, the stacked body LAB may be formed on the n-type GaN layer nGNL. The technical idea in the first embodiment can be applied. Specifically, when the film thickness of the first molybdenum (Mo) film MF1 inserted between the n-type GaN layer nGNL and the aluminum (Al) film ALF is X nm, the relationship of 2 nm ≦ X ≦ 10 nm is satisfied. The laminate LAB is configured as described above. Then, the laminated body LAB is heat-treated at a high temperature of, for example, 650 ° C. to 850 ° C. to form an ohmic electrode on the n-type GaN layer nGNL that achieves both improved surface morphology and reduced contact resistance. it can.

  As described above, in the structure in which the aluminum (Al) film ALF is in direct contact with the AlGaN layer AGNL or the n-type GaN layer nGNL, the AlGaN layer AGNL, the n-type GaN layer nGNL, and the aluminum (Al) film ALF Adhesion is poor. In this case, when the laminated body LAB is subjected to heat treatment to form an ohmic electrode, a phenomenon that the aluminum (Al) film ALF swells due to surface tension (referred to as a ball-up phenomenon) occurs, and the AlGaN layer AGNL or the n-type GaN layer nGNL The problem is that the surface morphology at the interface with the aluminum (Al) film ALF deteriorates. As a countermeasure, it is effective to insert a first molybdenum (Mo) film MF1 that functions as an adhesion film between the AlGaN layer AGNL or the n-type GaN layer nGNL and the aluminum (Al) film ALF. However, if the thickness of the first molybdenum (Mo) film MF1 is too large, the contact resistance (contact resistance) increases. Therefore, from the viewpoint of achieving both improvement in surface morphology and reduction in contact resistance, the first molybdenum (Mo) film MF1 inserted between the AlGaN layer AGNL or the n-type GaN layer nGNL and the aluminum (Al) film ALF. Therefore, it is necessary to devise the film thickness.

  Therefore, in the first embodiment, the film thickness of the first molybdenum (Mo) film MF1 inserted between the AlGaN layer AGNL or the n-type GaN layer nGNL and the aluminum (Al) film ALF is devised. . Specifically, in the first embodiment, the film thickness of the first molybdenum (Mo) film MF1 inserted between the AlGaN layer AGNL or the n-type GaN layer nGNL and the aluminum (Al) film ALF is set to X nm. In this case, the stacked body LAB is configured so as to satisfy the relationship of 2 nm ≦ X ≦ 10 nm. In the first embodiment, the laminated body LAB configured in this manner is subjected to a heat treatment at a high temperature of, for example, 650 ° C. to 850 ° C., thereby providing an ohmic electrode that achieves both improved surface morphology and reduced contact resistance. It can be formed on the AlGaN layer AGNL or the n-type GaN layer nGNL.

  FIG. 15 shows the relationship between the film thickness of the first molybdenum (Mo) film and the contact resistance between the ohmic electrode and the semiconductor layer (hereinafter, the AlGaN layer and the n-type GaN layer are collectively referred to as a semiconductor layer). It is a graph which shows. In FIG. 15, the horizontal axis indicates the thickness (nm) of the first molybdenum (Mo) film, and the vertical axis indicates the contact resistance (Ωmm) between the ohmic electrode and the semiconductor layer.

  Here, the film thickness of the first molybdenum (Mo) film indicates the film thickness when the stacked body is formed before the ohmic electrode is formed. Then, by applying a heat treatment to the laminate, the atoms of each film constituting the laminate are mutually diffused, whereby an ohmic electrode is formed. At this time, the contact resistance shown in FIG. 15 indicates the contact resistance between the ohmic electrode and the semiconductor layer. This contact resistance is measured using a normal TLM method (Transmission Line Method).

  As shown in FIG. 15, when the thickness of the first molybdenum (Mo) film is between 0 nm and 2 nm, the contact resistance between the ohmic electrode and the semiconductor layer is reduced from 0.3 Ωmm to 0.2 Ωmm. I understand. When the first molybdenum (Mo) film thickness is 2 nm or more and 7 nm or less, the contact resistance is low. Thereafter, it can be seen that the contact resistance between the ohmic electrode and the semiconductor layer increases as the thickness of the first molybdenum (Mo) film increases. In particular, it can be seen that when the thickness of the first molybdenum (Mo) film exceeds 10 nm, the contact resistance between the ohmic electrode and the semiconductor layer significantly increases.

  The mechanism showing such behavior can be considered as follows. That is, first, when the first molybdenum (Mo) film is not formed, since the adhesion between the aluminum (Al) film and the semiconductor layer is poor, the contact resistance between the ohmic electrode and the semiconductor layer is large. It is thought that it will become. When the first molybdenum (Mo) film is formed, the adhesion between the aluminum (Al) film and the semiconductor layer is improved, and the contact resistance between the ohmic electrode and the semiconductor layer is reduced. This phenomenon is considered to occur when the thickness of the first molybdenum (Mo) film is between 0 nm and 2 nm. Thereafter, as the film thickness of the first molybdenum (Mo) film increases, the contact resistance between the ohmic electrode and the semiconductor layer increases. This phenomenon can be considered as follows. That is, when the laminated body is subjected to heat treatment to form an ohmic electrode, atoms are interdiffused from each layer constituting the laminated body. At this time, for example, when the film thickness of the first molybdenum (Mo) film is small, atomic% of aluminum atoms diffusing from the aluminum (Al) film to the interface between the ohmic electrode and the semiconductor layer is reduced between the ohmic electrode and the semiconductor layer. In many cases, it is considered that the atomic percentage is larger than atomic% of molybdenum atoms existing at the interface. In this case, as a result of increasing the influence of contact with aluminum atoms, it is considered that the contact between the semiconductor layer and the ohmic electrode becomes ohmic contact, and the contact resistance can be reduced.

  On the other hand, if the film thickness of the first molybdenum (Mo) film becomes too thick, even if atoms are diffused from each layer constituting the stacked body, atoms of aluminum atoms are formed at the interface between the ohmic electrode and the semiconductor layer. % Is likely to be less than the atomic% of molybdenum atoms. In this case, the contact between the semiconductor layer and the ohmic electrode is greatly affected by the contact with molybdenum constituting the Schottky contact, and it is considered that the contact resistance increases.

  In particular, from FIG. 15, it is considered that the contact resistance between the ohmic electrode and the semiconductor layer can be reduced if the thickness of the first molybdenum (Mo) film is 0 nm or more and 10 nm or less. Specifically, when the thickness of the first molybdenum (Mo) film is 0 nm or more and 10 nm or less, the contact resistance between the ohmic electrode and the semiconductor layer can be 0.4 Ωmm or less. In this case, the atomic% of aluminum atoms diffusing from the aluminum (Al) film to the interface between the ohmic electrode and the semiconductor layer is often larger than the atomic% of molybdenum atoms existing on the surface of the semiconductor layer. It is guessed.

  FIG. 16 is a graph showing the relationship between the film thickness of the first molybdenum (Mo) film and the surface roughness (RMS) at the interface between the ohmic electrode and the semiconductor layer. In FIG. 16, the horizontal axis indicates the film thickness (nm) of the first molybdenum (Mo) film, and the vertical axis indicates the surface roughness (μm) at the interface between the ohmic electrode and the semiconductor layer.

  Here, the film thickness of the first molybdenum (Mo) film indicates the film thickness when the stacked body is formed before the ohmic electrode is formed. Then, by applying a heat treatment to the laminate, the atoms of each film constituting the laminate are mutually diffused, whereby an ohmic electrode is formed. At this time, the surface roughness shown in FIG. 16 indicates the surface roughness at the interface between the ohmic electrode and the semiconductor layer. That is, in the first embodiment, surface roughness is used as an index of surface morphology. This surface roughness is evaluated by using, for example, a surface roughness meter, a laser microscope, an atomic force microscope, or the like. In FIG. 16, the result of having evaluated surface roughness using the laser microscope is shown.

  As shown in FIG. 16, when the thickness of the first molybdenum (Mo) film is 0 nm (when the aluminum (Al) film is in direct contact with the semiconductor layer), the surface roughness is 0.3 μm. On the other hand, when the film thickness of the first molybdenum (Mo) film is 2 nm or more, the surface roughness is smaller than 0.1 μm. Therefore, as apparent from FIG. 16, when the thickness of the first molybdenum (Mo) film is 0 nm (when the aluminum (Al) film is in direct contact with the semiconductor layer), the surface roughness is extremely deteriorated. However, it is shown that if the thickness of the first molybdenum (Mo) film is 2 nm or more, the surface roughness can be sufficiently improved. This is because the first molybdenum (Mo) film contributes to improving the adhesion between the aluminum (Al) film and the semiconductor layer, and suppresses the ball-up phenomenon of the aluminum (Al) film due to the heat treatment. It is because it is thought that it is acting. In other words, when the first molybdenum (Mo) film is not formed, the adhesion between the aluminum (Al) film and the semiconductor layer deteriorates. It is considered that this occurs remarkably, which causes a significant deterioration of the surface roughness.

  From the above, from the viewpoint of reducing the contact resistance between the ohmic electrode and the semiconductor layer, the thickness of the first molybdenum (Mo) film is preferably 0 nm or more and 10 nm or less as shown in FIG. . On the other hand, from the viewpoint of improving the surface morphology (surface roughness) at the interface between the ohmic electrode and the semiconductor layer, there is no problem if the thickness of the first molybdenum (Mo) film is 2 nm or more as shown in FIG. . Therefore, in consideration of FIGS. 15 and 16, in the first embodiment, the thickness of the first molybdenum (Mo) film inserted between the aluminum (Al) film and the semiconductor layer is set to X nm. The laminated body is configured to satisfy the relationship of 2 nm ≦ X ≦ 10 nm. In the first embodiment, an ohmic electrode that achieves both improvement in surface morphology and reduction in contact resistance by heat-treating the laminated body thus configured at a high temperature of, for example, 650 ° C. to 850 ° C. Can be formed on the layer.

  As can be seen from FIG. 15, when 2 nm ≦ X ≦ 7 nm, the contact resistance is about 0.2 Ωmm, and an ohmic electrode having a very low contact resistance can be formed.

<Method for Producing Ohmic Electrode in First Embodiment>
Next, a method for manufacturing the ohmic electrode in the first embodiment will be described with reference to the drawings. First, as shown in FIG. 17, a substrate 1S is prepared. The substrate 1S is composed of, for example, a sapphire substrate, a SiC (silicon carbide) substrate, or a silicon (Si) substrate. Then, the buffer layer BUF, which is an epitaxial layer, is formed on the substrate 1S by using, for example, a metal organic chemical vapor deposition (MOCVD) method. The buffer layer BUF is formed, for example, for the purpose of relaxing mismatch between the crystal lattice constituting the substrate and the crystal lattice constituting the GaN layer formed on the buffer layer BUF. Thereafter, a GaN layer GNL, which is a non-doped epitaxial layer to which no conductive impurities are added, is formed on the buffer layer BUF, for example, by using MOCVD, and the conductive impurities are formed on the GaN layer GNL. An AlGaN layer AGNL which is a non-doped epitaxial layer not added is formed.

  In the above description, an example in which the substrate 1S is composed of a nitride semiconductor substrate has not been shown, but the substrate 1S may be a nitride semiconductor substrate such as GaN or AlGaN. In this case, since the substrate 1S is lattice-matched with GaN, the buffer layer BUF can be thin or eliminated.

  Next, as shown in FIG. 18, after a resist film FR1 is formed on the AlGaN layer AGNL, the resist film FR1 is subjected to exposure / development processing to pattern the resist film FR1. The patterning of the resist film FR1 is performed so that the opening OP1 is formed in the ohmic electrode formation region.

  Then, as shown in FIG. 19, a stacked film is formed on the substrate 1S (AlGaN layer AGNL) on which the patterned resist film FR1 is formed, for example, by using an electron beam evaporation method or the like. Specifically, the laminated film is formed on the first molybdenum (Mo) film MF1, the aluminum (Al) film ALF formed on the first molybdenum (Mo) film MF1, and the aluminum (Al) film ALF. The second molybdenum (Mo) film MF2 formed and the gold (Au) film AUF formed on the second molybdenum (Mo) film MF2. Specifically, as shown in FIG. 19, this laminated film is formed in the opening OP1 formed in the resist film FR1 and on the resist film FR1. At this time, in the first embodiment, when the film thickness of the first molybdenum (Mo) film MF1 inserted between the aluminum (Al) film ALF and the AlGaN layer AGNL is X nm, 2 nm ≦ X ≦ 10 nm The laminated film is configured to satisfy this relationship. For example, the film thicknesses of the films other than the first molybdenum (Mo) film MF1 (aluminum (Al) film ALF, second molybdenum (Mo) film MF2, gold (Au) film AUF)) are not particularly limited. If it is in the range where the function which it has is demonstrated, it will not specifically limit. For example, as an example, the film thickness of the aluminum (Al) film ALF is 70 nm, the film thickness of the second molybdenum (Mo) film MF2 is 30 nm, and the film thickness of the gold (Au) film AUF is 50 nm. ing.

  Subsequently, as shown in FIG. 20, the resist film FR1 is removed. When the resist film FR1 is removed, the laminated film formed on the resist film FR1 is also removed by lift-off. Therefore, after removing the resist film FR1, only the laminated film formed in the opening OP1 of the resist film FR1 remains, thereby forming the laminated body LAB made of the laminated film in the ohmic electrode formation region. Can do.

  Thereafter, as shown in FIG. 21, for example, heat treatment is performed for 1 minute to 10 minutes on the substrate 1S on which the stacked body LAB is formed in a nitrogen atmosphere and at a temperature of 650 ° C. to 850 ° C. . This heat treatment can be performed, for example, by RTA (Rapid Thermal Anneal) or furnace annealing using a heat treatment furnace. In addition, although the heat processing mentioned above is implemented in the temperature range of 650 degreeC-850 degreeC, desirably, it implements in the temperature range of 700 degreeC-800 degreeC. At low temperatures, the surface morphology improves, while the contact resistance tends to increase, while at higher temperatures, the surface morphology tends to deteriorate while the contact resistance tends to decrease. For this reason, the temperature of the heat treatment described above is determined in consideration of the balance between the improvement of the surface morphology and the reduction of the contact resistance. For example, when priority is given to improving the surface morphology, it is performed in a relatively low temperature region of the above-mentioned temperature range, whereas when priority is given to reducing contact resistance, it is relatively low of the above-mentioned temperature range. It is conceivable to carry out in a high temperature region.

  By performing the heat treatment as described above, aluminum (Al), molybdenum (Mo), and gold (Au) constituting each film constituting the laminated body LAB are interdiffused, and the ohmic electrode OE shown in FIG. It is formed. At this time, in the first embodiment, since the film thickness of the first molybdenum (Mo) film is small at the interface between the ohmic electrode OE and the AlGaN layer AGNL, the ohmic electrode OE and the AlGaN layer AGNL are formed from the aluminum (Al) film. It is considered that the atomic percent of aluminum atoms diffusing at the interface with the GaN layer is often larger than the atomic percent of molybdenum atoms existing at the interface between the ohmic electrode OE and the AlGaN layer AGNL. That is, the average amount (atomic%) of aluminum atoms at the interface between the ohmic electrode OE and the AlGaN layer AGNL is larger than the average amount (atomic%) of molybdenum atoms. At this time, as a result of increasing the influence of the contact with the aluminum atoms, the contact between the AlGaN layer AGNL and the ohmic electrode OE becomes an ohmic contact, and the contact resistance can be reduced. That is, in the first embodiment, when the film thickness of the first molybdenum (Mo) film MF1 inserted between the aluminum (Al) film and the AlGaN layer AGNL is X nm, the relationship of 2 nm ≦ X ≦ 10 nm. The laminate LAB is configured to satisfy the above. And in this Embodiment 1, the laminated body LAB comprised in this way is heat-processed by high temperature of 650 degreeC-850 degreeC, for example, and the ohmic electrode which made the improvement of surface morphology and reduction of contact resistance compatible, for example OE can be formed on the AlGaN layer AGNL.

(Embodiment 2)
In the first embodiment, focusing on the film thickness of the first molybdenum (Mo) film inserted between the semiconductor layer and the aluminum (Al) film, both improvement in surface morphology and reduction in contact resistance are achieved. The technical idea of forming the ohmic electrode OE on the semiconductor layer has been described. In the second embodiment, focusing on the relationship between the thickness of the aluminum (Al) film and the thickness of the gold (Au) film constituting the laminate, both improvement of surface morphology and reduction of contact resistance are achieved. A technical idea of forming the ohmic electrode OE formed on the semiconductor layer will be described.

<Characteristics in Embodiment 2>
As shown in FIG. 23, the stacked body LAB in the second embodiment is formed on the AlGaN layer AGNL formed on the GaN layer GNL. The stacked body LAB includes a first molybdenum (Mo) film MF1 formed on the AlGaN layer AGNL, an aluminum (Al) film ALF formed on the first molybdenum (Mo) film MF1, and an aluminum (Al ) A second molybdenum (Mo) film MF2 formed on the film ALF and a gold (Au) film AUF formed on the second molybdenum (Mo) film MF2.

  Here, the feature of the second embodiment is that when the film thickness of the aluminum (Al) film ALF is Y (nm) and the film thickness of the gold (Au) film AUF is Z (nm), Y ≦ Z ≦ The 2Y relationship is satisfied. In other words, in the second embodiment, in order to achieve both improvement in surface morphology and reduction in contact resistance, a constant is provided between the film thickness of the aluminum (Al) film ALF and the film thickness of the gold (Au) film AUF. The technical idea in the second embodiment is that the knowledge that it is necessary to satisfy this correlation is found and the knowledge is embodied. In the second embodiment, the laminated body LAB configured in this manner is subjected to heat treatment at a high temperature of, for example, 650 ° C. to 850 ° C., thereby forming an ohmic electrode that achieves both improved surface morphology and reduced contact resistance. It can be formed on the layer AGNL.

  Here, for example, in the second embodiment, the film thickness of the aluminum (Al) film ALF and the film thickness of the gold (Au) film AUF may be within the above-described correlation range, and further, the first molybdenum. The thickness of the (Mo) film MF1 and the thickness of the second molybdenum (Mo) film MF2 are not particularly limited as long as the functions of the respective films are exhibited. For example, as an example, the film thickness of the first molybdenum (Mo) film MF1 is 7 nm, the film thickness of the aluminum (Al) film ALF is 50 nm to 75 nm, the film thickness of the second molybdenum (Mo) film MF2 is 30 nm to 50 nm, gold The film thickness of the (Au) film AUF can be 75 nm to 150 nm.

  FIG. 23 illustrates an example in which the stacked body LAB is formed on the AlGaN layer AGNL. However, for example, as illustrated in FIG. 24, the stacked body LAB may be formed on the n-type GaN layer nGNL. The technical idea in the second embodiment can be applied. Specifically, in the stacked body LAB formed on the n-type GaN layer nGNL, the thickness of the aluminum (Al) film ALF is Y (nm) and the thickness of the gold (Au) film AUF is Z (nm). In this case, it is configured so that the relationship of Y ≦ Z ≦ 2Y is satisfied. Then, the laminated body LAB is heat-treated at a high temperature of, for example, 650 ° C. to 850 ° C. to form an ohmic electrode on the n-type GaN layer nGNL that achieves both improved surface morphology and reduced contact resistance. it can.

  Thus, in the second embodiment, when the film thickness of the aluminum (Al) film ALF is Y (nm) and the film thickness of the gold (Au) film AUF is Z (nm), Y ≦ Z ≦ 2Y There is a feature in that the relationship is satisfied, but the qualitative reason for introducing the above-described correlation between the film thickness of the aluminum (Al) film ALF and the film thickness of the gold (Au) film AUF will be described. To do.

  For example, when the film thickness of the aluminum (Al) film ALF is sufficiently larger than the film thickness of the gold (Au) film AUF, aluminum (Al) is excessively present relative to the gold (Au). In this case, when the laminated body is heat-treated, excess aluminum (Al) causes a local alloy reaction with molybdenum (Mo) or gold (Au). As a result, the surface morphology is locally deteriorated. That is, when aluminum (Ai) is excessively present relative to gold (Au), excessive aluminum (Al) causes an extra alloy reaction with molybdenum (Mo) or gold (Au). The surface morphology is deteriorated. For this reason, from the viewpoint of improving the surface morphology, it is desirable that the amount of aluminum (Al) does not exist in excess of gold (Au). From this viewpoint, the film thickness of the aluminum (Al) film ALF is set to gold ( It is necessary to make the film thickness of the Au) film AUF or less.

  On the other hand, for example, when the film thickness of the gold (Au) film AUF is sufficiently larger than the film thickness of the aluminum (Al) film ALF, the gold (Au) is excessively present with respect to the aluminum (Al). become. In this case, when the laminated body is heat-treated, excessive gold (Au) diffuses and reaches the interface between the laminated body and the semiconductor layer. At this time, when the amount of gold (Au) reaching the interface between the stacked body and the semiconductor layer increases, the atomic% of aluminum (Al) that diffuses into the interface between the stacked body and the semiconductor layer is larger than the atomic% of the stacked body and the semiconductor layer. It is considered that there are cases where the atomic percentage of gold (Au) reaching the interface increases. At this time, aluminum (Al) that diffuses at the interface between the stacked body and the semiconductor layer forms an ohmic contact with the semiconductor layer, whereas gold (Au) that diffuses at the interface between the stacked body and the semiconductor layer. Forms a Schottky contact with the semiconductor layer. For this reason, when the atomic% of gold (Au) reaching the interface between the stacked body and the semiconductor layer increases, the contact between the semiconductor layer and the ohmic electrode is affected by the contact with the gold (Au) constituting the Schottky contact. Therefore, it is considered that the contact resistance increases. Therefore, from the viewpoint of reducing the contact resistance of the ohmic electrode, it is not desirable that gold (Au) is excessively present with respect to aluminum (Al). It is necessary to prevent the film thickness of the (Au) film AUF from becoming too large. From this, in the second embodiment, it is found that it is necessary to avoid making the thickness of the gold (Au) film AUF sufficiently larger than the thickness of the aluminum (Al) film ALF.

  From the above, in order to obtain an ohmic electrode that achieves both improved surface morphology and reduced contact resistance, an appropriate ratio between the thickness of the aluminum (Al) film ALF and the thickness of the gold (Au) film AUF is obtained. It turns out that it is necessary to set to.

  Next, the reason why the above-described correlation is introduced between the film thickness of the aluminum (Al) film ALF and the film thickness of the gold (Au) film AUF will be described from a quantitative viewpoint.

  FIG. 25 shows a film thickness ratio between an aluminum (Al) film and a gold (Au) film (hereinafter referred to as an Au / Al film thickness ratio) (Au film thickness / Al film thickness), an ohmic electrode and a semiconductor layer ( In the following, the relationship between the contact resistance and the AlGaN layer and the n-type GaN layer will be collectively referred to as a semiconductor layer. In FIG. 25, the horizontal axis represents the Au / Al film thickness ratio, and the vertical axis represents the contact resistance (Ωmm) between the ohmic electrode and the semiconductor layer.

  Here, the Au / Al film thickness ratio indicates the film thickness ratio when the laminated body is formed before the ohmic electrode is formed. Then, by applying a heat treatment to the laminate, the atoms of each film constituting the laminate are mutually diffused, whereby an ohmic electrode is formed. At this time, the contact resistance shown in FIG. 25 indicates the contact resistance between the ohmic electrode and the semiconductor layer. This contact resistance is measured using a normal TLM method (Transmission Line Method).

  As shown in FIG. 25, it can be seen that when the Au / Al film thickness ratio is in the range of 0.5 to 2.0, the contact resistance is 0.3 Ωmm or less, and the contact resistance can be sufficiently reduced. However, it can be seen that when the Au / Al film thickness ratio exceeds 2.0, the contact resistance rapidly increases. The reason for this is considered as follows. That is, the Au / Al film thickness ratio exceeding 2.0 means that the film thickness of the gold (Au) film AUF is sufficiently larger than the film thickness of the aluminum (Al) film ALF. Thereby, gold (Au) exists excessively with respect to aluminum (Al). In this case, when the laminated body is heat-treated, excessive gold (Au) diffuses and reaches the interface between the laminated body and the semiconductor layer. At this time, when the amount of gold (Au) reaching the interface between the stacked body and the semiconductor layer increases, the atomic% of aluminum (Al) that diffuses into the interface between the stacked body and the semiconductor layer is larger than the atomic% of the stacked body and the semiconductor layer. It is considered that there are cases where the atomic percentage of gold (Au) reaching the interface increases. For this reason, when the atomic% of gold (Au) reaching the interface between the stacked body and the semiconductor layer increases, the contact between the semiconductor layer and the ohmic electrode is affected by the contact with the gold (Au) constituting the Schottky contact. Therefore, it is considered that a sudden increase in contact resistance occurs. From this, it can be seen that the Au / Al film thickness ratio is desirably in the range of 0.5 to 2.0 from the viewpoint of reducing the contact resistance of the ohmic electrode.

  Next, FIG. 26 is a graph showing the relationship between the Au / Al film thickness ratio and the surface roughness (RMS) at the interface between the ohmic electrode and the semiconductor layer. In FIG. 26, the horizontal axis represents the Au / Al film thickness ratio, and the vertical axis represents the surface roughness (μm) at the interface between the ohmic electrode and the semiconductor layer.

  Here, the Au / Al film thickness ratio indicates the film thickness when the laminated body is formed before the ohmic electrode is formed. Then, by applying a heat treatment to the laminate, the atoms of each film constituting the laminate are mutually diffused, whereby an ohmic electrode is formed. At this time, the surface roughness shown in FIG. 26 indicates the surface roughness at the interface between the ohmic electrode and the semiconductor layer. That is, in the second embodiment, surface roughness is used as an index of surface morphology. This surface roughness is evaluated by using, for example, a surface roughness meter, a laser microscope, an atomic force microscope, or the like. In FIG. 26, the result of having evaluated surface roughness using the laser microscope is shown.

  As shown in FIG. 26, when the Au / Al film thickness ratio is in the range of 1 or more, the surface roughness is 0.1 μm or less, and it can be seen that the surface morphology can be sufficiently improved. However, it can be seen that when the Au / Al film thickness ratio is less than 1, the surface roughness increases rapidly. That is, FIG. 26 shows that when the Au / Al film thickness ratio is smaller than 1, the surface morphology is rapidly deteriorated. The reason for this is considered as follows. That is, the fact that the Au / Al film thickness ratio is smaller than 1 means that the film thickness of the aluminum (Al) film is sufficiently larger than the film thickness of the gold (Au) film. Al) is present in excess relative to gold (Au). In this case, when the laminated body is heat-treated, it is considered that excess aluminum (Al) causes a local alloy reaction with molybdenum (Mo) or gold (Au), and thereby the surface morphology is locally increased. It is thought that it will get worse. This shows that the Au / Al film thickness ratio is preferably in the range of 1 or more from the viewpoint of improving the surface morphology at the interface between the ohmic electrode and the semiconductor layer. More preferably, the Au / Al film thickness ratio is 1.3 or more.

  From the above, from the viewpoint of reducing the contact resistance between the ohmic electrode and the semiconductor layer, the Au / Al film thickness ratio is desirably in the range of 0.5 to 2, as shown in FIG. . On the other hand, from the viewpoint of improving the surface morphology (surface roughness) at the interface between the ohmic electrode and the semiconductor layer, the Au / Al film thickness ratio is preferably in the range of 1 or more, as shown in FIG. Therefore, in consideration of FIGS. 25 and 26, the second embodiment is configured such that the Au / Al film thickness ratio is in the range of 1-2. In other words, when the film thickness of the aluminum (Al) film is Y (nm) and the film thickness of the gold (Au) film is Z (nm), the relationship Y ≦ Z ≦ 2Y is satisfied. . In the second embodiment, the laminated body thus configured is heat-treated at a high temperature of, for example, 650 ° C. to 850 ° C., thereby forming an ohmic electrode that achieves both improved surface morphology and reduced contact resistance. Can be formed on the layer. From FIG. 26, since the surface roughness can be further reduced if the Au / Al film thickness ratio is 1.3 or more, the film thickness Z of gold (Au) further increases if the surface thickness is 1.3Y ≦ Z ≦ 2Y. Can be made flat, which is preferable.

<Method for Manufacturing Ohmic Electrode in Second Embodiment>
Next, a method for manufacturing an ohmic electrode in the second embodiment will be described with reference to the drawings. First, similarly to the first embodiment shown in FIG. 17, a substrate 1S is prepared. The substrate 1S is composed of, for example, a sapphire substrate, a SiC (silicon carbide) substrate, a silicon (Si) substrate, or a GaN substrate. Then, the buffer layer BUF, which is an epitaxial layer, is formed on the substrate 1S by using, for example, a metal organic chemical vapor deposition (MOCVD) method. The buffer layer BUF is formed, for example, for the purpose of relaxing mismatch between the crystal lattice constituting the substrate and the crystal lattice constituting the GaN layer formed on the buffer layer BUF. Thereafter, a GaN layer GNL, which is a non-doped epitaxial layer to which no conductive impurities are added, is formed on the buffer layer BUF, for example, by using MOCVD, and the conductive impurities are formed on the GaN layer GNL. An AlGaN layer AGNL which is a non-doped epitaxial layer not added is formed.

  Next, as in the first embodiment shown in FIG. 18, after forming a resist film FR1 on the AlGaN layer AGNL, the resist film FR1 is subjected to exposure / development treatment, thereby forming the resist film FR1. Pattern. The patterning of the resist film FR1 is performed so that the opening OP1 is formed in the ohmic electrode formation region.

  Then, as shown in FIG. 27, for example, by using an electron beam evaporation method or the like, a laminated film is formed on the substrate 1S on which the patterned resist film FR1 is formed. Specifically, the laminated film is formed on the first molybdenum (Mo) film MF1, the aluminum (Al) film ALF formed on the first molybdenum (Mo) film MF1, and the aluminum (Al) film ALF. The second molybdenum (Mo) film MF2 formed and the gold (Au) film AUF formed on the second molybdenum (Mo) film MF2. Specifically, as shown in FIG. 27, this laminated film is formed in the opening OP1 formed in the resist film FR1 and on the resist film FR1. At this time, in the second embodiment, for example, the film thickness of the first molybdenum (Mo) film MF1 is 7 nm. In addition, when the film thickness of the aluminum (Al) film ALF is Y (nm) and the film thickness of the gold (Au) film AUF is Z (nm), each satisfies the relationship of Y ≦ Z ≦ 2Y. The film thickness is adjusted. For example, the film thickness of the aluminum (Al) film ALF is set to 75 nm, and the film thickness of the gold (Au) film AUF is set to 120 nm. Further, the thickness of the second molybdenum (Mo) film MF2 is not particularly limited, but is formed within a range of 30 nm to 50 nm, for example.

  Subsequently, as shown in FIG. 28, the resist film FR1 is removed. When the resist film FR1 is removed, the laminated film formed on the resist film FR1 is also removed by lift-off. Therefore, after removing the resist film FR1, only the laminated film formed in the opening OP1 of the resist film FR1 remains, thereby forming the laminated body LAB made of the laminated film in the ohmic electrode formation region. Can do.

  After that, as shown in FIG. 29, for example, heat treatment is performed for 1 minute to 10 minutes on the substrate 1S on which the stacked body LAB is formed in a nitrogen atmosphere at a temperature of 650 ° C. to 850 ° C. . This heat treatment can be performed, for example, by RTA (Rapid Thermal Anneal) or furnace annealing using a heat treatment furnace. In addition, although the heat processing mentioned above is implemented in the temperature range of 650 degreeC-850 degreeC, desirably, it implements in the temperature range of 700 degreeC-800 degreeC. At low temperatures, the surface morphology improves, while the contact resistance tends to increase, while at higher temperatures, the surface morphology tends to deteriorate while the contact resistance tends to decrease. For this reason, the temperature of the heat treatment described above is determined in consideration of the balance between the improvement of the surface morphology and the reduction of the contact resistance. For example, when priority is given to improving the surface morphology, it is performed in a relatively low temperature region of the above-mentioned temperature range, whereas when priority is given to reducing contact resistance, it is relatively low of the above-mentioned temperature range. It is conceivable to carry out in a high temperature region.

  By performing the heat treatment as described above, aluminum (Al), molybdenum (Mo), and gold (Au) constituting each film constituting the laminated body LAB are interdiffused, and the ohmic electrode OE shown in FIG. It is formed. At this time, at the interface between the ohmic electrode OE and the AlGaN layer AGNL, in the second embodiment, the thickness of the aluminum (Al) film ALF is Y (nm) and the thickness of the gold (Au) film AUF is Z ( nm), the relationship of Y ≦ Z ≦ 2Y is satisfied. Therefore, the atomic% of aluminum atoms diffusing from the aluminum (Al) film to the interface between the ohmic electrode OE and the AlGaN layer AGNL is more than the atomic% of gold atoms diffusing to the interface between the ohmic electrode OE and the AlGaN layer AGNL. It is considered that the number of cases will increase. At this time, as a result of increasing the influence of the contact with the aluminum atoms, the contact between the AlGaN layer AGNL and the ohmic electrode OE becomes an ohmic contact, and the contact resistance can be reduced. That is, in this Embodiment 2, it is comprised so that Au / Al film thickness ratio may exist in the range of 1-2. And in this Embodiment 2, the laminated body LAB comprised in this way is heat-processed by the high temperature of 650 degreeC-850 degreeC, for example, and the ohmic electrode which made the improvement of surface morphology and the reduction of contact resistance compatible. OE can be formed on the AlGaN layer AGNL.

  In the second embodiment, when the film thickness of the aluminum (Al) film ALF is Y (nm) and the film thickness of the gold (Au) film AUF is Z (nm), the relationship of Y ≦ Z ≦ 2Y is satisfied. Is characterized in that the laminate LAB is configured so that In addition, due to this characteristic point, it is possible to provide an ohmic electrode OE that achieves both improved surface morphology and reduced contact resistance. For this reason, in the second embodiment, the thickness of the first molybdenum (Mo) film MF1 formed in the lowermost layer of the stacked body LAB is not particularly limited. However, also in the second embodiment, similarly to the first embodiment, when the film thickness of the first molybdenum (Mo) film MF1 is set to X nm, the stacked body LAB satisfies the relationship of 2 nm ≦ X ≦ 10 nm. By configuring the above, the surface morphology of the ohmic electrode OE can be further improved and the contact resistance can be reduced by the synergistic effect of the features of the first embodiment and the features of the second embodiment. In this case, at the interface between the ohmic electrode OE and the AlGaN layer AGNL, the atomic percentage of aluminum atoms diffusing from the aluminum (Al) film to the interface between the ohmic electrode OE and the AlGaN layer AGNL is In many cases, it becomes larger than the atomic% of gold atoms diffusing at the interface, and more often than the atomic% of molybdenum atoms. That is, at the interface between the semiconductor layer and the ohmic electrode OE, it is considered that the atomic percentage of aluminum among aluminum, molybdenum, and gold is the largest.

(Embodiment 3)
<Configuration of high electron mobility transistor>
In the third embodiment, an example in which the ohmic electrode OE described in the first embodiment or the second embodiment is used for a high electron mobility transistor (HEMT) will be described.

  FIG. 31 is a cross-sectional view showing the device structure of the HEMT according to the third embodiment. As shown in FIG. 31, for example, a buffer layer BUF made of a GaN layer is formed on a sapphire substrate, a SiC (silicon carbide) substrate, a silicon (Si) substrate, or a substrate 1S made of a GaN substrate. . A non-doped GaN layer GNL not introduced with a conductive impurity is formed on the buffer layer BUF, and a non-doped AlGaN layer AGNL without a conductive impurity is formed on the GaN layer GNL. Has been. That is, in the HEMT according to the third embodiment, a heterojunction composed of the GaN layer GNL and the AlGaN layer AGNL is formed on the substrate 1S.

  Next, on the AlGaN layer AGNL, a source electrode SE and a drain electrode DE are formed that are spaced apart from each other. The source electrode SE and the drain electrode DE are composed of an ohmic electrode OE, and the ohmic electrode OE has the characteristics described in the first embodiment and the second embodiment. Therefore, according to the HEMT in the third embodiment, the ohmic electrode OE to which the technical idea of the present invention is applied is used for the source electrode SE and the drain electrode DE. It is possible to improve the morphology and reduce the contact resistance. Specifically, the source electrode SE and the drain electrode DE are formed of an ohmic electrode OE in which aluminum, molybdenum, and gold are interdiffused, and in particular, at the interface between the ohmic electrode OE and the AlGaN layer AGNL, It is considered that atomic% is often larger than atomic% of molybdenum atoms and atomic% of gold atoms.

  A gate electrode GE is formed on the AlGaN layer AGNL between the source electrode SE and the drain electrode DE. The gate electrode GE is formed of a laminated film of a nickel film NIF and a gold film AUF2, and the contact between the gate electrode GE and the AlGaN layer AGNL is a Schottky contact. In the HEMT according to the third embodiment, a surface protective film PRF made of, for example, a silicon nitride film is formed on the surface of the AlGaN layer AGNL.

<Operation of high electron mobility transistor>
The HEMT according to the third embodiment is configured as described above, and the operation thereof will be described below. In particular, in the third embodiment, the operation will be described using a normally-on type HEMT as an example.

FIG. 32 is a diagram showing a band structure when the HEMT is turned off by applying a negative voltage lower than the threshold voltage to the gate electrode. The band structure of the metal constituting the gate electrode is shown on the left side of FIG. 32, and the band structure of the AlGaN layer is shown in the center of FIG. The band structure of the GaN layer is shown on the right side of FIG. Here, since a negative voltage is applied to the gate electrode with respect to the GaN layer, the Fermi level ε _FM of the gate electrode (metal) is equal to the applied voltage than the Fermi level ε _FS2 of the GaN layer. Get higher. The conduction band of the AlGaN layer at the interface with the gate electrode is increased by a predetermined Schottky barrier height Φ _B , and there is a predetermined conduction band discontinuity ΔE _c at the interface between the AlGaN layer and the GaN layer. As the Fermi level ε _{FM of the} electrode increases, the conduction band is dragged and raised. As a result, since a two-dimensional electron gas is not formed at the interface between the AlGaN layer and the GaN layer, a channel that electrically connects the source electrode SE and the drain electrode DE is not formed. As a result, the HEMT in the third embodiment is turned off when a negative voltage equal to or lower than the threshold voltage is applied to the gate electrode. Note that, due to the energy difference between the conduction band of the AlGaN layer and the conduction band of the GaN layer, a predetermined conduction band discontinuity ΔE _c is formed between the conduction band of the AlGaN layer and the conduction band of the GaN layer.

Next, FIG. 33 is a diagram showing a band structure when a voltage of 0 V is applied to the gate electrode and the HEMT is turned on. The metal band structure constituting the gate electrode is shown on the left side of FIG. 33, and the AlGaN layer band structure is shown in the center of FIG. The band structure of the GaN layer is shown on the right side of FIG. Here, since 0 V is applied to the gate electrode, the Fermi level ε _FM of the metal constituting the gate electrode is equal to the Fermi level ε _FS2 of the GaN layer. At this time, due to the conduction band discontinuity ΔE _c formed between the conduction band of the AlGaN layer and the conduction band of the GaN layer, the interface between the AlGaN layer and the GaN layer is positioned lower than the Fermi level. A well-type potential is formed. As a result, electrons are accumulated in the well-type potential and a two-dimensional electron gas is formed. Thus, when a voltage of 0 V is applied to the gate electrode, a two-dimensional electron gas is formed at the interface between the AlGaN layer and the GaN layer, and a channel that electrically connects the source electrode SE and the drain electrode DE is formed. Will be. As a result, the HEMT according to the third embodiment is turned on when a voltage of 0 V is applied to the gate electrode. As described above, it can be seen that the HEMT according to the third embodiment can realize the on / off operation of the HEMT by controlling the voltage applied to the gate electrode.

<Manufacturing method of high mobility transistor>
Next, a method for manufacturing the HEMT according to the third embodiment will be described. First, as shown in FIG. 34, a substrate 1S is prepared. The substrate 1S is composed of, for example, a sapphire substrate, a SiC (silicon carbide) substrate, or a silicon (Si) substrate. Then, the buffer layer BUF, which is an epitaxial layer, is formed on the substrate 1S by using, for example, a metal organic chemical vapor deposition (MOCVD) method. The buffer layer BUF is formed, for example, for the purpose of relaxing mismatch between the crystal lattice constituting the substrate and the crystal lattice constituting the GaN layer formed on the buffer layer BUF. Thereafter, a GaN layer GNL, which is a non-doped epitaxial layer to which no conductive impurities are added, is formed on the buffer layer BUF, for example, by using MOCVD, and the conductive impurities are formed on the GaN layer GNL. An AlGaN layer AGNL which is a non-doped epitaxial layer not added is formed.

  Next, as shown in FIG. 35, after a resist film FR2 is formed on the AlGaN layer AGNL, the resist film FR2 is subjected to exposure / development processing to pattern the resist film FR2. The patterning of the resist film FR2 is performed so that the opening OP2 is formed in the source electrode formation region and the drain electrode formation region.

  Then, as shown in FIG. 36, for example, by using an electron beam evaporation method or the like, a laminated film is formed on the substrate 1S on which the patterned resist film FR2 is formed. Specifically, the laminated film is formed on the first molybdenum (Mo) film MF1, the aluminum (Al) film ALF formed on the first molybdenum (Mo) film MF1, and the aluminum (Al) film ALF. The second molybdenum (Mo) film MF2 formed and the gold (Au) film AUF formed on the second molybdenum (Mo) film MF2. Specifically, as shown in FIG. 36, this laminated film is formed in the opening OP2 formed in the resist film FR2 and on the resist film FR2. At this time, in the third embodiment, for example, when the film thickness of the first molybdenum (Mo) film MF1 inserted between the aluminum (Al) film ALF and the AlGaN layer AGNL is X nm, 2 nm ≦ X A first molybdenum (Mo) film MF1 is formed so as to satisfy the relationship of ≦ 10 nm. In addition, when the film thickness of the aluminum (Al) film ALF is Y (nm) and the film thickness of the gold (Au) film AUF is Z (nm), each satisfies the relationship of Y ≦ Z ≦ 2Y. The film thickness is adjusted.

  Subsequently, as shown in FIG. 37, the resist film FR2 is removed. When removing the resist film FR2, the laminated film formed on the resist film FR2 is also removed by lift-off. Therefore, after removing the resist film FR2, only the laminated film formed in the opening OP2 of the resist film FR2 remains, thereby forming the laminated body LAB1 made of the laminated film in the drain electrode formation region. In addition, the stacked body LAB2 made of a stacked film can be formed in the source electrode formation region.

  Thereafter, for example, heat treatment for 1 minute to 10 minutes is performed on the substrate 1S on which the stacked body LAB is formed in a nitrogen atmosphere and at a temperature of 650 ° C. to 850 ° C. This heat treatment can be performed, for example, by RTA (Rapid Thermal Anneal) or furnace annealing using a heat treatment furnace. In addition, although the heat processing mentioned above is implemented in the temperature range of 650 degreeC-850 degreeC, desirably, it implements in the temperature range of 700 degreeC-800 degreeC. At low temperatures, the surface morphology improves, while the contact resistance tends to increase, while at higher temperatures, the surface morphology tends to deteriorate while the contact resistance tends to decrease. For this reason, the temperature of the heat treatment described above is determined in consideration of the balance between the improvement of the surface morphology and the reduction of the contact resistance. For example, when priority is given to improving the surface morphology, it is performed in a relatively low temperature region of the above-mentioned temperature range, whereas when priority is given to reducing contact resistance, it is relatively low of the above-mentioned temperature range. It is conceivable to carry out in a high temperature region.

  By performing the heat treatment as described above, aluminum (Al), molybdenum (Mo), and gold (Au) constituting each film constituting the laminated body LAB are interdiffused, and the ohmic electrode OE shown in FIG. It is formed. That is, it is possible to form the source electrode SE and the drain electrode DE composed of the ohmic electrode OE. At this time, at the interface between the ohmic electrode OE and the AlGaN layer AGNL, in Embodiment 3, the thickness of the aluminum (Al) film ALF is Y (nm) and the thickness of the gold (Au) film AUF is Z ( nm), the relationship of Y ≦ Z ≦ 2Y is satisfied. Therefore, the atomic% of aluminum atoms diffusing from the aluminum (Al) film to the interface between the ohmic electrode OE and the AlGaN layer AGNL is more than the atomic% of gold atoms diffusing to the interface between the ohmic electrode OE and the AlGaN layer AGNL. It is considered that the number of cases will increase. At this time, as a result of increasing the influence of the contact with the aluminum atoms, the contact between the AlGaN layer AGNL and the ohmic electrode OE becomes an ohmic contact, and the contact resistance can be reduced. That is, the third embodiment is configured such that the Au / Al film thickness ratio is in the range of 1 to 2. And in this Embodiment 3, the laminated body LAB comprised in this way is heat-processed by the high temperature of 650 degreeC-850 degreeC, for example, and the source electrode which made the improvement of surface morphology and reduction of contact resistance compatible. SE (ohmic electrode OE) and drain electrode DE (ohmic electrode OE) can be formed on the AlGaN layer AGNL.

  In the third embodiment, when the thickness of the first molybdenum (Mo) film MF1 is X nm, the stacked body LAB is configured to satisfy the relationship of 2 nm ≦ X ≦ 10 nm. As a result, in the third embodiment, the surface morphology of the source electrode SE and the drain electrode DE is further improved and the contact resistance is reduced by the synergistic effect of the features of the first embodiment and the features of the second embodiment. Can be achieved. In this case, at the interface between the ohmic electrode OE (source electrode SE and drain electrode DE) and the AlGaN layer AGNL, atomic% of aluminum atoms diffusing from the aluminum (Al) film to the interface between the ohmic electrode OE and the AlGaN layer AGNL is In many cases, the atomic percentage is larger than the atomic% of gold atoms diffusing at the interface between the ohmic electrode OE and the AlGaN layer AGNL, and is larger than the atomic percentage of molybdenum atoms. That is, at the interface between the semiconductor layer and the ohmic electrode OE, it is considered that the atomic percentage of aluminum among aluminum, molybdenum, and gold is the largest.

  Next, as shown in FIG. 39, a surface protective film PRF made of, for example, a silicon nitride film is formed on the surface of the AlGaN layer AGNL. Thereafter, as shown in FIG. 40, a resist film FR3 is applied on the substrate 1S, and the resist film FR3 is subjected to exposure / development processing and patterned. The patterning of the resist film FR3 is performed so that the element formation region is covered with the resist film FR3 while the insulating formation region between the element formation regions is opened. Then, for example, boron (boron), nitrogen, or helium is introduced by an ion implantation method using the patterned resist film FR3 as a mask to form an insulating region.

  Subsequently, as shown in FIG. 41, after removing the patterned resist film FR3, a new resist film FR4 is applied on the substrate 1S. The resist film FR4 is subjected to exposure / development processing and patterned. The patterning of the resist film FR4 is performed so as to form the opening OP3 in the gate electrode formation region. Thereafter, the surface protective film PRF exposed from the opening OP3 is removed by etching using the patterned resist film FR4 as a mask. As a result, the AlGaN layer AGNL is exposed at the bottom of the opening OP3.

  Next, as shown in FIG. 42, for example, by using an electron beam evaporation method or the like, a laminated film is formed on the substrate 1S on which the patterned resist film FR4 is formed. Specifically, the laminated film is composed of a nickel film NIF and a gold film AUF2. As shown in FIG. 42, this laminated film is formed in the opening OP3 formed in the resist film FR4 and on the resist film FR4.

  Subsequently, the resist film FR4 is removed. When removing the resist film FR4, the laminated film formed on the resist film FR4 is also removed by lift-off. Therefore, after the resist film FR4 is removed, only the laminated film formed in the opening OP3 of the resist film FR4 remains, whereby the gate electrode GE made of the nickel film NIF and the gold film AUF shown in FIG. Can be formed. As described above, the HEMT according to the third embodiment can be manufactured.

(Embodiment 4)
<Configuration of field effect transistor>
In the fourth embodiment, an example in which the ohmic electrode OE described in the first embodiment or the second embodiment is used for an insulated gate field effect transistor (MISFET (Metal Insulator Semiconductor Field Effect Transistor)) will be described.

  FIG. 43 is a cross-sectional view showing the device structure of the MISFET according to the fourth embodiment. As shown in FIG. 43, for example, a buffer layer BUF made of a GaN layer is formed on a substrate 1S formed of a sapphire substrate, a SiC (silicon carbide) substrate, a GaN substrate, or a silicon (Si) substrate. . An n-type GaN layer nGNL into which an n-type impurity is introduced is formed on the buffer layer BUF.

  Next, on the n-type GaN layer nGNL, a source electrode SE and a drain electrode DE that are spaced apart from each other are formed. The source electrode SE and the drain electrode DE are composed of an ohmic electrode OE, and the ohmic electrode OE has the characteristics described in the first embodiment and the second embodiment. Therefore, according to the MISFET in the fourth embodiment, since the ohmic electrode OE to which the technical idea of the present invention is applied is used for the source electrode SE and the drain electrode DE, the surface of the source electrode SE and the drain electrode DE is used. It is possible to improve the morphology and reduce the contact resistance. Specifically, the source electrode SE and the drain electrode DE are formed of an ohmic electrode OE in which aluminum, molybdenum, and gold are interdiffused, and in particular, at the interface between the ohmic electrode OE and the n-type GaN layer nGNL, It is considered that the atomic% of atoms is often larger than the atomic% of molybdenum atoms and the atomic% of gold atoms.

  A gate electrode GE is formed on the n-type GaN layer nGNL between the source electrode SE and the drain electrode DE via a gate insulating film GOX. The gate insulating film GOX is formed from, for example, an aluminum oxide film or a silicon oxide film. Further, the gate electrode GE is composed of a polysilicon film or a metal film. Furthermore, in the MISFET according to the fourth embodiment, a surface protective film PRF made of, for example, a silicon nitride film is formed on the surface of the n-type GaN layer nGNL.

<Operation of field effect transistor>
The MISFET in the fourth embodiment is configured as described above, and its operation will be described below. In particular, in the fourth embodiment, the operation will be described using a normally-on MISFET as an example.

  FIG. 44 is a schematic diagram showing a state in which a negative voltage equal to or lower than the threshold voltage is applied to the gate electrode GE and the MISFET is turned off. As shown in FIG. 44, when a negative voltage is applied to the gate electrode GE, the depletion layer DPL formed in the n-type GaN layer nGNL immediately below the gate electrode GE extends. As a result, the depletion layer DPL reaches the bottom surface of the n-type GaN layer nGNL. Since the depletion layer DPL functions as an insulating region, the electrical connection between the source electrode SE and the drain electrode DE is blocked by the depletion layer DPL. For this reason, when a negative voltage lower than the threshold voltage is applied to the gate electrode GE, the MISFET is turned off.

  Subsequently, FIG. 45 is a schematic diagram showing a state in which a voltage of 0 V is applied to the gate electrode and the MISFET is turned on. As shown in FIG. 45, when 0 V is applied to the gate electrode GE, the depletion layer DPL does not extend more than when a negative voltage is applied to the gate electrode GE. A channel composed of the n-type GaN layer nGNL is formed. Thereby, the source electrode SE and the drain electrode DE are electrically connected. That is, electrons flow from the source electrode SE toward the drain electrode DE. In other words, a current flows from the drain electrode DE toward the source electrode SE. For this reason, when 0 V is applied to the gate electrode GE, the MISFET is turned on. As described above, in the MISFET according to the fourth embodiment, it can be seen that the on / off operation of the MISFET can be realized by controlling the voltage applied to the gate electrode GE.

(Embodiment 5)
<Configuration of blue light emitting diode>
In the fifth embodiment, an example in which the ohmic electrode OE described in the first embodiment or the second embodiment is used for a blue light emitting diode will be described.

  FIG. 46 is a cross-sectional view showing the device structure of the blue light-emitting diode according to the fifth embodiment. As shown in FIG. 46, a buffer layer BUF made of, for example, a GaN layer is formed on the sapphire substrate SS, and an n-type GaN layer nGNL is formed on the buffer layer BUF. An n-type ohmic electrode OE (n) that is in ohmic contact with the n-type GaN layer nGNL is formed on the n-type GaN layer nGNL. An n-type AlGaN layer nAGNL is formed in another region on the n-type GaN layer nGNL, and an InGaN layer IGNL doped with zinc (Zn) is formed on the n-type AlGaN layer nAGNL. A p-type AlGaN layer pAGNL is formed on the InGaN layer IGNL, and a p-type GaN layer pGNL is formed on the p-type AlGaN layer pAGNL. Furthermore, a p-type ohmic electrode OE (p) that is in ohmic contact with the p-type GaN layer pGNL is formed on the p-type GaN layer pGNL.

  The blue light emitting diode having the above-described configuration has a p-type GaN layer pGNL and an n-type GaN layer nGNL sandwiching a double heterostructure consisting of a p-type AlGaN layer pAGNL / InGaN layer IGNL / n-type AlGaN layer nAGNL. It is a blue LED with extremely high brightness.

  Here, the n-type ohmic electrode OE (n) has the characteristics described in the first embodiment and the second embodiment. Therefore, according to the blue light emitting diode in the fifth embodiment, since the n-type ohmic electrode OE (n) to which the technical idea of the present invention is applied is used, the surface of the n-type ohmic electrode OE (n) It is possible to improve the morphology and reduce the contact resistance. Specifically, the n-type ohmic electrode OE (n) is formed from an electrode in which aluminum, molybdenum, and gold are interdiffused, and particularly at the interface between the ohmic electrode OE (n) and the n-type GaN layer nGNL. In many cases, the atomic percent of aluminum atoms is larger than the atomic percent of molybdenum atoms and atomic percent of gold atoms.

<Operation of blue light emitting diode>
The blue light-emitting diode in the fifth embodiment is configured as described above, and the operation thereof will be described below.

  FIG. 47 is a diagram showing a band structure of a double hetero structure when the blue light emitting diode is off. In FIG. 47, the structure in which the InGaN layer is sandwiched between the p-type AlGaN layer and the n-type AlGaN layer from both sides is a double heterostructure. As shown in FIG. 47, when the blue light emitting diode is off, the Fermi levels of the respective layers are the same.

  Next, FIG. 48 is a diagram showing a band structure of a double hetero structure when the blue light emitting diode is turned on. As shown in FIG. 48, a forward voltage (a positive voltage is applied to the p-type AlGaN layer and a negative voltage is applied to the n-type AlGaN layer) is applied to the blue light emitting diode. Then, electrons are injected at a high density from the n-type AlGaN layer having a large band gap into the InGaN layer having a small band gap. Similarly, holes are injected at high density from a p-type AlGaN layer with a large band gap into an InGaN layer with a small band gap. As a result, in the InGaN layer, the density of electrons and holes is much higher than the density in the thermal equilibrium state, and the probability of recombination increases. Then, in the InGaN layer, electrons existing in the conduction band and holes existing in the valence band recombine, and light (hν) having energy corresponding to the band gap is emitted. As described above, the blue light-emitting diode in the fifth embodiment operates.

  As mentioned above, the invention made by the present inventor has been specifically described based on the embodiment. However, the invention is not limited to the embodiment, and various modifications can be made without departing from the scope of the invention. Needless to say.

  In the above embodiment, an example in which the technical idea of the present invention is applied to an ohmic electrode that is in ohmic contact with a nitride semiconductor will be described. In particular, a nitride semiconductor containing gallium will be described as an example of a nitride semiconductor. ing. As a specific example of a nitride semiconductor containing gallium, AlGaN or GaN has been described as an example. However, the technical idea of the present invention is not limited to this, for example, a nitride semiconductor such as InGaN or AlInGaN. It can also be widely applied to ohmic electrodes that are in ohmic contact with each other.

  The present invention can be widely used in the manufacturing industry for manufacturing semiconductor devices.

1S substrate AGNL AlGaN layer ALF aluminum film AUF gold film AUF2 gold film BUF buffer layer DE drain electrode DPL depletion layer E _c conduction band E _v valence band FR1 resist film FR2 resist film FR3 resist film FR4 resist film GE gate electrode GE gate layer GOX Gate insulating film HMF refractory metal film IGNL InGaN layer LAB laminated body LAB1 laminated body LAB2 laminated body MF1 first molybdenum film MF2 second molybdenum film nAGNL n-type AlGaN layer nGNL n-type GaN layer NIF nickel film OE ohmic electrode OE ( ) N-type ohmic electrode OE (p) p-type ohmic electrode OP1 opening OP2 opening OP3 opening pAGNL p-type AlGaN layer pGNL p-type GaN layer PRF surface protective film SE source electrode S sapphire substrate TAF alloy film ε _FM Fermi level ε _FS Fermi level ε _FS2 Fermi level Φ _m work function Φ _s work function

Claims (23)

(A) forming a laminate on the nitride semiconductor layer;
(B) After the step (a), the laminate is subjected to a heat treatment to form an electrode, and
The laminate is
A first molybdenum film formed on the nitride semiconductor layer;
An aluminum film formed on the first molybdenum film;
A second molybdenum film formed on the aluminum film;
A gold film formed on the second molybdenum film,
A method of manufacturing a semiconductor device satisfying a relationship of 2 nm ≦ X ≦ 10 nm, where X is a thickness of the first molybdenum film. A method of manufacturing a semiconductor device according to claim 1,
A method of manufacturing a semiconductor device satisfying a relationship of Y ≦ Z ≦ 2Y, where Y is a thickness of the aluminum film and Z is a thickness of the gold film. A method of manufacturing a semiconductor device according to claim 1,
The step (a)
(A1) forming a resist film having an opening on the nitride semiconductor layer;
(A2) forming the first molybdenum film on the resist film including the inside of the opening;
(A3) forming the aluminum film on the first molybdenum film;
(A4) forming a second molybdenum film on the aluminum film;
(A5) forming a gold film on the second molybdenum film;
(A6) After the step (a5), the resist film is removed to lift off the first molybdenum film, the aluminum film, the second molybdenum film, and the gold film formed on the resist film. And a step of forming the laminated body. A method of manufacturing a semiconductor device according to claim 1,
Before the step (a), further comprising the step of forming the nitride semiconductor layer on the substrate;
The method for manufacturing a semiconductor device, wherein the substrate is formed of any one of a sapphire substrate, a silicon carbide substrate, and a silicon substrate. A method of manufacturing a semiconductor device according to claim 1,
The method for manufacturing a semiconductor device, wherein the nitride semiconductor layer is a nitride semiconductor layer containing gallium. A method of manufacturing a semiconductor device according to claim 1,
The method for manufacturing a semiconductor device, wherein the nitride semiconductor layer is a GaN layer or an AlGaN layer. A method of manufacturing a semiconductor device according to claim 1,
The method for manufacturing a semiconductor device, wherein the temperature of the heat treatment performed in the step (b) is 650 ° C. or higher and 850 ° C. or lower. A method of manufacturing a semiconductor device according to claim 7,
The method for manufacturing a semiconductor device, wherein a temperature of the heat treatment performed in the step (b) is 700 ° C. or higher and 800 ° C. or lower. A method of manufacturing a semiconductor device according to claim 1,
The method for manufacturing a semiconductor device, wherein the electrode is subjected to the heat treatment to make ohmic contact with the nitride semiconductor layer. (A) forming a laminate on the nitride semiconductor layer;
(B) After the step (a), the laminate is subjected to a heat treatment to form an electrode, and
The laminate is
A first molybdenum film formed on the nitride semiconductor layer;
An aluminum film formed on the first molybdenum film;
A second molybdenum film formed on the aluminum film;
A gold film formed on the second molybdenum film,
A method of manufacturing a semiconductor device satisfying a relationship of Y ≦ Z ≦ 2Y, where Y is a thickness of the aluminum film and Z is a thickness of the gold film. A method of manufacturing a semiconductor device according to claim 10,
The step (a)
(A1) forming a resist film having an opening on the nitride semiconductor layer;
(A2) forming the first molybdenum film on the resist film including the inside of the opening;
(A3) forming the aluminum film on the first molybdenum film;
(A4) forming a second molybdenum film on the aluminum film;
(A5) forming a gold film on the second molybdenum film;
(A6) After the step (a5), the resist film is removed to lift off the first molybdenum film, the aluminum film, the second molybdenum film, and the gold film formed on the resist film. And a step of forming the laminated body. A method of manufacturing a semiconductor device according to claim 10,
Before the step (c), further comprising a step of forming a nitride semiconductor layer on the substrate;
The method for manufacturing a semiconductor device, wherein the substrate is formed of any one of a sapphire substrate, a silicon carbide substrate, and a silicon substrate. A method of manufacturing a semiconductor device according to claim 10,
The method for manufacturing a semiconductor device, wherein the nitride semiconductor layer is a nitride semiconductor layer containing gallium. A method of manufacturing a semiconductor device according to claim 10,
The method for manufacturing a semiconductor device, wherein the nitride semiconductor layer is a GaN layer or an AlGaN layer. A method of manufacturing a semiconductor device according to claim 10,
The method for manufacturing a semiconductor device, wherein the temperature of the heat treatment performed in the step (b) is 650 ° C. or higher and 850 ° C. or lower. A method of manufacturing a semiconductor device according to claim 15,
The method for manufacturing a semiconductor device, wherein a temperature of the heat treatment performed in the step (b) is 700 ° C. or higher and 800 ° C. or lower. (A) a nitride semiconductor layer;
(B) an electrode formed on the nitride semiconductor layer and having a structure in which aluminum, molybdenum, and gold are interdiffused, and
The electrode is formed by performing a heat treatment on the stacked body formed on the nitride semiconductor layer,
The laminate is
(C1) a first molybdenum film formed on the nitride semiconductor layer;
(C2) an aluminum film formed on the first molybdenum film;
(C3) a second molybdenum film formed on the aluminum film;
(C4) a gold film formed on the second molybdenum film,
A semiconductor device satisfying a relationship of 2 nm ≦ X ≦ 10 nm, where X is a thickness of the first molybdenum film. The semiconductor device according to claim 17,
A semiconductor device satisfying a relationship of Y ≦ Z ≦ 2Y, where Y is a thickness of the aluminum film and Z is a thickness of the gold film. (A) a nitride semiconductor layer;
(B) an electrode formed on the nitride semiconductor layer and having a structure in which aluminum, molybdenum, and gold are interdiffused, and
The electrode is formed by performing a heat treatment on the stacked body formed on the nitride semiconductor layer,
The laminate is
(C1) a first molybdenum film formed on the nitride semiconductor layer;
(C2) an aluminum film formed on the first molybdenum film;
(C3) a second molybdenum film formed on the aluminum film;
(C4) a gold film formed on the second molybdenum film,
A semiconductor device satisfying a relationship of Y ≦ Z ≦ 2Y, where Y is a thickness of the aluminum film and Z is a thickness of the gold film. The semiconductor device according to any one of claims 17 to 19, wherein
The semiconductor device in which the electrode is in ohmic contact with the nitride semiconductor layer. (A) a nitride semiconductor layer;
(B) an ohmic electrode formed on the nitride semiconductor layer, having an interdiffused structure of aluminum, molybdenum, and gold, and in ohmic contact with the nitride semiconductor layer; With
A semiconductor device in which atomic% of the aluminum is larger than atomic% of the molybdenum at an interface between the nitride semiconductor layer and the ohmic electrode. The semiconductor device according to claim 21, wherein
A semiconductor device having the largest atomic% of aluminum among aluminum, molybdenum, and gold at the interface between the nitride semiconductor layer and the ohmic electrode. (A) a nitride semiconductor layer;
(B) an ohmic electrode formed on the nitride semiconductor layer, having an interdiffused structure of aluminum, molybdenum, and gold, and in ohmic contact with the nitride semiconductor layer; With
A semiconductor device in which atomic% of the aluminum is larger than atomic% of the gold at an interface between the nitride semiconductor layer and the ohmic electrode.

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