JP5526470B2 - Nitride compound semiconductor devices - Google Patents

Description

  The present invention relates to a nitride compound semiconductor device, and more particularly to a nitride compound semiconductor device using a conductive substrate.

Since nitride-based compound semiconductors such as gallium nitride have a high dielectric breakdown electric field, they are expected to be applied to low-loss high-voltage power devices. Therefore, it is desired not only to have good characteristics but also to produce a device at low cost. In view of these points, it is desirable to use a silicon (Si) substrate that is easy to manufacture a large-diameter substrate and inexpensive, not a sapphire substrate or a silicon carbide (SiC) substrate, as a growth substrate for a nitride-based compound semiconductor. (For example, refer to Patent Document 1). In recent years, the crystal growth technique of a gallium nitride compound semiconductor on a silicon substrate has been improved, and a crystal comparable to a gallium nitride compound semiconductor grown on a sapphire substrate or SiC substrate has been obtained.
JP 2006-5005 A

  However, since the silicon substrate is a conductive substrate, a field effect transistor (FET) such as a heterojunction field effect transistor (HFET) or a metal semiconductor field effect transistor (MESFET) of a gallium nitride compound semiconductor is used by using the silicon substrate. If the gallium nitride compound semiconductor layer is thinner than the electrode spacing, the drain electrode end on the gate electrode side in a state where the gate electrode and the drain electrode are reverse-biased (the FET is off) − The electric field concentrates near the interface of the gallium nitride compound semiconductor layer, and current leakage from the drain electrode to the source electrode via the buffer layer and the silicon substrate is likely to occur.

  In addition, since gallium nitride compound semiconductors are chemically stable, dry etching is adopted to form a mesa shape. However, the crystal on the end face of the gallium nitride compound semiconductor is damaged by defects such as dry etching. As a result, the damaged end face has a lower resistance than that of the non-damaged part, so that a leakage current path from the buffer layer or the silicon substrate to the source electrode passes through the damaged end face, and nitride. There has been a problem that the breakdown voltage of the semiconductor compound semiconductor device is reduced or destroyed.

  Furthermore, a device using a gallium nitride-based compound semiconductor has a problem that an on-resistance after applying a reverse bias increases due to a current collapse phenomenon. The “current collapse phenomenon” is a phenomenon in which the ON resistance increases after reverse bias application (OFF state) between the gate electrode and the drain electrode. This increase in on-resistance is said to be caused by a decrease in the charge stored in the two-dimensional carrier gas layer or semiconductor layer by electrons trapped in the defects in the semiconductor layer during reverse bias. Usually, the increase in on-resistance increases in proportion to the reverse bias applied voltage.

  In view of the above problems, a nitride-based compound semiconductor device that can suppress an increase in leakage current and an increase in on-resistance due to a current collapse phenomenon is provided.

According to one aspect of the present invention, (b) a semiconductor layer having a carrier traveling layer made of a nitride-based compound semiconductor, and (b) a main current that is disposed on the main surface of the semiconductor layer and flows through the carrier traveling layer. First and second main electrodes as end portions of the path, and (c) arranged on the main surface so as to surround the first and second main electrodes by forming a Schottky junction with the main surface, and immediately below the main surface And an outer peripheral electrode for controlling the charge in the semiconductor layer in the vicinity thereof, and (d) a carrier traveling layer between the first and second main electrodes disposed on the main surface between the first and second main electrodes. A nitride-based compound semiconductor device that controls a main current that flows and includes a semiconductor layer and a third electrode that forms a Schottky junction or a MIS junction, and generates a depletion layer immediately below the outer peripheral electrode when the main current is not flowing. Provided.

According to another aspect of the present invention, (a) a carrier supply layer made of the first nitride-based compound semiconductor and a band gap energy different from that of the first nitride-based compound semiconductor, A semiconductor layer having a carrier traveling layer made of a second nitride-based compound semiconductor having a two-dimensional carrier gas layer in the vicinity of the interface; and (b) a main current disposed on the main surface of the semiconductor layer and flowing through the carrier traveling layer. First and second main electrodes that are ends of the current path; and (c) a main surface disposed on the main surface so as to surround the first and second main electrodes in a Schottky junction with the main surface. An outer peripheral electrode for controlling the charge accumulated in the two-dimensional carrier gas layer immediately below and in the vicinity thereof, and (d) the first and second main electrodes disposed on the main surface between the first and second main electrodes. Control the main current flowing in the carrier travel layer between, Provided is a nitride-based compound semiconductor device that includes a conductor layer and a third electrode that forms a Schottky junction or a MIS junction, and has a depletion layer that extends to a two-dimensional carrier gas layer immediately below the outer peripheral electrode when the main current is not flowing. Is done.

  According to the present invention, it is possible to provide a nitride-based compound semiconductor device that can suppress an increase in leakage current and an increase in on-resistance due to a current collapse phenomenon.

  Next, first to sixth embodiments of the present invention will be described with reference to the drawings. In the following description of the drawings, the same or similar parts are denoted by the same or similar reference numerals. However, it should be noted that the drawings are schematic, and the relationship between the thickness and the planar dimensions, the ratio of the thickness of each layer, and the like are different from the actual ones. Therefore, specific thicknesses and dimensions should be determined in consideration of the following description. Moreover, it is a matter of course that portions having different dimensional relationships and ratios are included between the drawings.

  Also, the following first to sixth embodiments exemplify devices and methods for embodying the technical idea of the present invention, and the technical idea of the present invention is the component parts. The material, shape, structure, arrangement, etc. are not specified below. The technical idea of the present invention can be variously modified within the scope of the claims.

(First embodiment)
As shown in FIGS. 1 and 2, the nitride-based compound semiconductor device according to the first embodiment of the present invention includes a semiconductor layer 10 having a carrier traveling layer 3 made of a nitride-based compound semiconductor, and a semiconductor layer 10. 1st main electrode 21 and 2nd main electrode 22 which are arrange | positioned on the main surface 100 of this, and are the edge part of the electric current path | route of the main current which flows through the carrier running layer 3, and the 1st main electrode 21 and 2nd An outer peripheral electrode 30 that is disposed on the main surface 100 so as to surround the main electrode 22 and controls charges in the semiconductor layer 10 immediately below and near the main surface 100 is provided. FIG. 2 is a cross-sectional view taken along the II direction of FIG.

  As shown in FIG. 1, the outer peripheral electrode 30 is more than the electrode disposed closest to the end (outside) of the semiconductor layer 10 among the first main electrode 21 and the second main electrode 22 as viewed from above. Is further disposed on the main surface 100 near the end of the semiconductor layer 10. The outer peripheral electrode 30 is desirably arranged so as to surround the first main electrode 21 and the second main electrode 22 along the edge portion of the main surface 100 of the semiconductor layer 10.

  The nitride compound semiconductor device shown in FIG. 1 further includes a third electrode (control electrode) 23 disposed on the main surface 100 between the first main electrode 21 and the second main electrode 22. The control electrode (gate electrode) 23 controls the main current that flows between the first main electrode 21 and the second main electrode 22 through the carrier traveling layer 3. Hereinafter, the case where the first main electrode 21 is the source electrode 21 and the second main electrode 22 is the drain electrode 22 will be described as an example. However, the first main electrode 21 is the drain electrode, Of course, the two main electrodes 22 may be source electrodes.

  As shown in FIG. 1, the source electrode 21 and the drain electrode 22 have a comb shape having a plurality of tooth portions extending in the vertical direction toward the paper surface, and comb teeth of the source electrode 21 and the drain electrode 22. The parts are arranged in a cross finger shape. The entire drain electrode 22 is surrounded by the source electrode 21 including the pattern resistor 211 that is physically connected to the source electrode 21. Further, the gate electrode 23 is disposed between the source electrode 21 and the drain electrode 22 that are disposed in a cross finger shape. Further, the source electrode 21 is surrounded by the outer peripheral electrode 30. The gate electrode 23 and the outer peripheral electrode 30 are electrically connected by a metal that connects each other in the region A via an insulating film 40 formed on the source electrode 21.

  The source electrode 21 and the drain electrode 22 disposed on the semiconductor layer 10 form an ohmic contact (low resistance contact) with the electron (carrier) supply layer 4. The source electrode 21 and the drain electrode 22 can be formed as a laminated body of titanium (Ti) and aluminum (Al), for example.

  The gate electrode 23 can employ, for example, a metal film made of a laminate of nickel (Ni), gold (Au), and titanium (Ti), and is in Schottky contact with the carrier supply layer 4. The outer peripheral electrode 30 can be formed by the same process as the gate electrode 23. However, the outer peripheral electrode 30 may be formed by a different process and different material from the gate electrode 23. The gate electrode 23 and the outer peripheral electrode 30 are formed of a material that forms a Schottky junction with the gallium nitride compound semiconductor, for example, Ni, platinum (Pt ), Palladium (Pd), rhodium (Rh), copper (Cu) and the like can be employed.

  As shown in FIG. 2, the semiconductor layer 10 is disposed on the substrate 1. However, in order to reduce the manufacturing cost of the nitride-based compound semiconductor device, the substrate 1 is a silicon substrate that can be easily increased in diameter. preferable. The silicon substrate may be a conductive substrate by adding impurities. The substrate 1 may be a ceramic semiconductor or a SiC substrate.

  The main surface 100 of the semiconductor layer 10 is covered with an insulating film 40. The upper surfaces of the source electrode 21 and the drain electrode 22 are covered with the insulating film 40, but the gate electrode 23 and the outer peripheral electrode 30 are also provided so as to extend on the insulating film 40 and also serve as field plate electrodes. The gate electrode 23 and the outer peripheral electrode 30 can be electrically connected also by a metal wiring or the like (not shown) disposed on the insulating film 40. Further, the connection between the gate electrodes 23 at the intersection with the source electrode 21 is also made by a metal or the like disposed on the insulating film 40. Although illustration is omitted, in the power application region such as the bonding pads of the source electrode 21 and the drain electrode 22, an opening is provided in the insulating film 40, and a part of the upper surface of the source electrode 21 and the drain electrode 22 is formed. Exposed.

  The semiconductor layer 10 shown in FIG. 2 has a structure in which a buffer layer 2, an electron (carrier) traveling layer 3, and a carrier supply layer 4 each made of a nitride compound semiconductor are stacked in this order. Hereinafter, an example in which the carrier supplied from the carrier supply layer 4 to the carrier traveling layer 3 is an electron will be described. That is, the two-dimensional carrier gas layer 31 is a two-dimensional electron gas layer (2DEG layer), and electrons flow from the source electrode 21 to the drain electrode 22 through the 2DEG layer 31.

  The buffer layer 2 can be formed by an epitaxial growth method such as a well-known metal organic chemical vapor deposition (MOCVD) method. In FIG. 2, the buffer layer 2 is illustrated as one layer, but the buffer layer 2 may be formed of a plurality of layers. For example, the buffer layer 2 is formed by alternately stacking first sublayers (first sublayers) made of aluminum nitride (AlN) and second sublayers (second sublayers) made of gallium nitride (GaN). A multilayered structure buffer may be used. Further, when the nitride-based compound semiconductor device shown in FIG. 1 operates as a high electron mobility transistor (HEMT), the buffer layer 2 may be omitted because the buffer layer 2 is not directly related to the operation of the HEMT. Further, as a material of the buffer layer 2, a III-V group compound semiconductor other than AlN and GaN may be adopted. A structure in which the substrate 1 and the buffer layer 2 are combined can be regarded as a substrate.

  The carrier traveling layer 3 disposed on the buffer layer 2 is a layer for obtaining a 2DEG layer 31 as a current path (channel) in the vicinity of the heterojunction surface with the carrier supply layer 4. The carrier traveling layer 3 is formed, for example, by epitaxially growing undoped GaN to which impurities are not added to a thickness of about 0.5 to 10 μm by the MOCVD method or the like.

The carrier supply layer 4 disposed on the carrier traveling layer 3 is made of a nitride semiconductor having a band gap larger than that of the carrier traveling layer 3 and having a different lattice constant. Carrier supply layer 4, Al _x M _y Ga represented by _{1-xy N (0 ≦ x} <1,0 ≦ y <1,0 ≦ x + y ≦ 1), wherein M is indium (In) or boron (B ) Etc. The composition ratio x is preferably 0.1 to 0.5, and more preferably 0.3. As the carrier supply layer 4, undoped Al _x Ga _1-x N can be used, but a nitride semiconductor made of Al _x Ga _1-x N doped with an n-type impurity can also be used.

  The carrier supply layer 4 is formed by epitaxial growth on the carrier running layer 3 by MOCVD or the like. The film thickness of the carrier supply layer 4 is set so that a well-known 2DEG layer 31 is generated in a normal state based on the heterojunction between the carrier running layer 3 and the carrier supply layer 4. Specifically, the film thickness of the carrier supply layer 4 is thinner than the carrier traveling layer 3, for example, about 5 to 50 nm, and more preferably about 5 to 30 nm.

Note that Al _x Ga _1-x N to which an n-type impurity is added may be employed as the carrier supply layer 4. A spacer layer made of undoped AlN may be disposed between the carrier supply layer 4 and the carrier running layer 3 made of GaN. Further, a contact layer made of, for example, n-type AlGaN may be disposed between the source electrode 21 and the drain electrode 22 and the carrier supply layer 4. The spacer layer has an effect of reducing the Coulomb interaction acting between the 2DEG layer 31 and the positive charge caused by the ionized donors left in the carrier supply layer 4, and impurities in the carrier supply layer 4 diffuse into the carrier travel layer 3. There is an effect to prevent. The contact layer contributes to a reduction in contact resistance between the source electrode 21 and the drain electrode 22 and the semiconductor layer 10.

  Usually, when a nitride compound semiconductor device is reverse-biased (that is, the FET is off), an electric field concentrates in the vicinity of the interface between the end of the drain electrode 22 to which a high voltage is applied and the semiconductor layer 10. A leak current is generated from the drain electrode 22 to the buffer layer 2 and the substrate 1, the end face of the semiconductor layer 10 that has been formed into a mesa shape by dry etching, and the 2DEG layer 31 to the source electrode 21. For example, in the structure in which the source electrode 21 is disposed on the outermost periphery of the main surface 100, the potential of the substrate 1 is intermediate between the source electrode 21 and the drain electrode 22 in a state in which the nitride-based compound semiconductor device is reverse-biased (off). It cannot be prevented that the leak current flows from the drain electrode 22 to the source electrode 21 via the substrate 1, the end face of the semiconductor layer 10, and the 2DEG layer 31 due to the potential.

  However, in the nitride-based compound semiconductor device of the present invention shown in FIGS. 1 and 2, a reverse bias is applied to the gate electrode 23 and the drain electrode 22, and the buffer layer 2 and the substrate 1 are dry-etched from the drain electrode 22. Even if a bias state in which a leak current that tends to flow to the source electrode 21 through the end face of the mesa-shaped semiconductor layer 10 and the 2DEG layer 31 is generated, the leak current is applied to the outer peripheral electrode 30. This is suppressed by the depletion of at least the 2DEG layer 31 immediately below the outer peripheral electrode 30 by the applied voltage.

  Further, in the nitride-based compound semiconductor device shown in FIGS. 1 and 2, an increase in on-resistance due to a so-called current collapse phenomenon can be suppressed. The current collapse phenomenon is a phenomenon in which on-resistance increases after reverse bias application (off) between the gate electrode 23 and the drain electrode 22. This increase in on-resistance is said to be caused by a decrease in the charge stored in the 2DEG layer 31 and the semiconductor layer 10 by electrons trapped in defects inside the semiconductor layer 10 during reverse bias (off). In the nitride-based compound semiconductor device shown in FIGS. 1 and 2, the semiconductor layer 10 has a relatively low resistance because electrons trapped in defects in the semiconductor layer 10 are damaged in the on state. Therefore, it is possible to suppress an increase in on-resistance after reverse bias application (off).

  A method for manufacturing a nitride-based compound semiconductor device according to the first embodiment of the present invention will be described below. The nitride compound semiconductor device manufacturing method described below is merely an example, and it is needless to say that the present invention can be realized by various other manufacturing methods including this modification.

  (A) First, the buffer layer 2, the carrier traveling layer 3, and the carrier supply layer 4 are epitaxially grown in this order on the substrate 1 by the MOCVD method or the like to form the semiconductor layer 10. The buffer layer 2 has a structure in which, for example, AlN layers and GaN layers are alternately stacked. For example, an undoped GaN layer having a thickness of 0.5 to 10 μm is formed by MOCVD, and the carrier supply layer 4 formed thereon has a larger band gap than the carrier traveling layer 3. For example, an undoped AlGaN layer is formed by MOCVD using nitride semiconductors having different lattice constants.

  (B) Next, a first conductor layer to be the source electrode 21 and the drain electrode 22 is deposited on the semiconductor layer 10. For example, a laminated structure of Ti and Al can be employed for the first conductor layer. Next, using the photoresist film patterned by photolithography as a mask, the first conductor layer is wet etched to form the source electrode 21 and the drain electrode 22.

(C) Next, an insulating film 40 is formed on the semiconductor layer 10, the source electrode 21, and the drain electrode 22. For example, a silicon oxide (SiO ₂ ) film having a thickness of 500 nm is formed as the insulating film 40 by a plasma chemical vapor deposition (p-CVD) method. Thereafter, ohmic annealing is performed, for example, at 500 ° C. for 30 minutes so that the semiconductor layer 10 and the source electrode 21 and the drain electrode 22 are in ohmic contact.

  (D) Next, the insulating film 40 where the gate electrode 23 and the peripheral electrode 30 are in contact with the semiconductor layer 10 is removed by wet etching using a photoresist film patterned by photolithography as a mask, and the opening is removed. Form.

  (E) Next, after a photoresist film is applied to the entire surface, the photoresist film in a portion where the gate electrode 23 and the outer peripheral electrode 30 are formed is removed by a photolithography technique. Next, a second conductor layer to be the gate electrode 23 and the outer peripheral electrode 30 is formed on the photoresist film and the insulating film 40 by a sputtering method or the like. At this time, the second conductor layer is formed so as to fill the opening of the insulating film 40, and after the second conductor layer is deposited so as to form a Schottky junction with the semiconductor layer 10 in the opening, a lift-off method is performed. To form a second conductor layer. As the second conductor layer, for example, a laminate of Ni, Au, and Ti can be employed.

  (F) Further, using the photoresist film patterned by the photolithography technique as a mask, the semiconductor layer 10 is formed into a mesa shape by dry etching using a chlorine (Cl) -based gas.

  In the above description, the example in which the outer peripheral electrode 30 is formed in the same process as the gate electrode 23 has been shown. That is, the outer peripheral electrode 30 has the same structure as the gate electrode 23. However, any material that forms a Schottky junction with the semiconductor layer 10 can employ a material different from that of the gate electrode 23 as the outer peripheral electrode 30.

<Modification>
FIG. 3 shows a nitride compound semiconductor device according to a modification of the first embodiment of the present invention. The nitride-based compound semiconductor device shown in FIG. 3 is a region outside the region where the outer peripheral electrode 30 is arranged on the semiconductor layer 10, and is formed on the end surface of the mesa-shaped semiconductor layer 10 or on the inside thereof. The shape of the first embodiment of the present invention shown in FIG. 2 is that the step or groove is etched from the main surface 100 to the position closer to the substrate 1 than the position where the 2DEG layer 31 is formed. Different. Other configurations are the same as those of the nitride-based compound semiconductor device according to the first embodiment of the present invention shown in FIG.

  According to the nitride-based compound semiconductor device according to the modification of the first embodiment of the present invention, the parasitic capacitance between the source electrode 21 and the drain electrode 22 and the substrate 1 can be reduced.

  The nitride-based compound semiconductor device shown in FIG. 3 includes, for example, a semiconductor layer 10 that forms a mesa shape with a photoresist film patterned by photolithography as a mask outside the semiconductor layer 10 and the main semiconductor layer 10 inside the semiconductor layer 10. The portion of the surface 100 is dry-etched and etched to a depth closer to the substrate 1 than the region where the 2DEG layer 31 of the carrier traveling layer 3 is formed, and then the end of the semiconductor layer 10 is formed in a mesa shape. Therefore, the leakage current and the current collapse phenomenon can be suppressed as in the first embodiment shown in FIG.

(Second Embodiment)
In the nitride-based compound semiconductor device according to the second embodiment of the present invention, the gate electrode 23 and the outer peripheral electrode 30 are not electrically connected in the nitride-based compound semiconductor device, as shown in FIG. However, this is different from the first embodiment of the present invention shown in FIG. Other configurations are the same as those of the first embodiment shown in FIG.

  The control electrode (gate electrode) 23 and the outer peripheral electrode 30 shown in FIG. 4 can be electrically connected, for example, by a wire or the like outside the nitride-based compound semiconductor device.

  The peripheral electrode 30 does not need to control the amount of drain current flowing through the FET in the ON state by changing the bias state unlike the gate electrode 23, so the gate electrode 23 and the peripheral electrode 30 are not connected by a wire or the like. A negative voltage different from the voltage applied to the gate electrode 23 may be applied to the outer peripheral electrode 30. In this case, in a state where the gate electrode 23 and the second main electrode (drain electrode) 22 are reverse-biased, a voltage set so that the 2DEG layer 31 immediately below the outer peripheral electrode 30 is at least depleted is applied to the gate electrode 23. The voltage can be applied to the outer peripheral electrode 30 without depending on the voltage to be applied.

  As a result, according to the nitride-based compound semiconductor device shown in FIG. 4, the leakage current flowing through the first main electrode (source electrode) 21 is suppressed, thereby preventing a decrease in breakdown voltage or destruction of the nitride-based compound semiconductor device. In addition, an increase in on-resistance due to the current collapse phenomenon can be more effectively suppressed, and the degree of design freedom can be increased. Others are substantially the same as those in the first embodiment, and redundant description is omitted.

(Third embodiment)
In the nitride-based compound semiconductor device according to the third embodiment of the present invention, as shown in FIG. 5, the nearest electrode disposed immediately inside the outer peripheral electrode 30 is the first main electrode (source electrode). The second main electrode (drain electrode) 22 instead of 21 is different from the first embodiment of the present invention shown in FIG. Other configurations are the same as those of the first embodiment shown in FIG.

  Even when the drain electrode 22 is disposed adjacent to the outer peripheral electrode 30, as in the case where the source electrode 21 is disposed adjacent to the outer peripheral electrode 30 as in the nitride-based compound semiconductor device illustrated in FIG. Leakage current flowing through the source electrode 21 is suppressed by depleting at least the 2DEG layer 31 by the outer peripheral electrode 30, so that the breakdown voltage of the nitride-based compound semiconductor device can be prevented from being lowered or broken, and the on-resistance is increased by the current collapse phenomenon. Can be suppressed.

  5 shows an example in which the outer peripheral electrode 30 and the control electrode (gate electrode) 23 are physically connected in the nitride-based compound semiconductor device, but the nitride-based compound semiconductor shown in FIG. Similarly to the device, the gate electrode 23 and the outer peripheral electrode 30 may be disposed without being connected and electrically connected outside the nitride-based compound semiconductor device. Alternatively, different voltages may be applied to the gate electrode 23 and the outer peripheral electrode 30. Others are substantially the same as those in the first embodiment, and redundant description is omitted.

(Fourth embodiment)
In the nitride-based compound semiconductor device according to the fourth embodiment of the present invention, an insulating film 231 serving as a gate insulating film is arranged between the carrier supply layer 4 and the gate electrode 23 as shown in FIG. The configuration in which the insulating film 301 is disposed between the carrier supply layer 4 and the outer peripheral electrode 30 is different from the first embodiment of the present invention shown in FIG. That is, the nitride compound semiconductor device shown in FIG. 6 includes an FET having a MIS structure. Other configurations are the same as those of the first embodiment shown in FIG.

  In the nitride-based compound semiconductor device shown in FIG. 1, the outer peripheral electrode 30 and the semiconductor layer 10 are Schottky junctions, but as shown in FIG. 6, the semiconductor layer 10 has an MIS structure configured with an insulating film 231 interposed therebetween. Even if it is a case, the effect similar to the said 1st Embodiment can be acquired. Even if the outer peripheral electrode 30 has the MIS structure with the insulating film 301 interposed therebetween, the control electrode (gate electrode) 23 and the second main electrode (drain electrode) 22 are in the reverse biased state and are directly below the outer peripheral electrode 30. By applying a voltage that is set so that the 2DEG layer 31 is at least depleted to the outer peripheral electrode 30, at least the 2DEG layer 31 is depleted, thereby suppressing a leakage current flowing through the first main electrode (source electrode) 21. Is done. In addition, leakage current flowing through the control electrode (gate electrode) 23 can also be suppressed. As a result, it is possible to prevent a decrease in breakdown voltage and breakdown of the nitride-based compound semiconductor device shown in FIG.

  In the nitride-based compound semiconductor device shown in FIG. 6, the outer peripheral electrode 30 and the gate electrode 23 may be electrically connected outside or inside the nitride-based compound semiconductor device, or applied to the gate electrode 23. A voltage different from the voltage may be applied to the outer peripheral electrode 30. Further, the electrode arranged immediately inside the outer peripheral electrode 30 may be the source electrode 21 or the drain electrode 22. Others are substantially the same as those in the first embodiment, and redundant description is omitted.

(Fifth embodiment)
As shown in FIGS. 7 and 8, the nitride compound semiconductor device according to the fifth embodiment of the present invention has a first main electrode 21 as an anode electrode and a second main electrode 22 as a cathode electrode. This is adapted to a Schottky barrier diode (SBD). FIG. 8 is a cross-sectional view taken along the direction II-II in FIG.

  As shown in FIG. 7, the first main electrode 21 and the second main electrode 22 have a comb shape having a plurality of tooth portions respectively extending in the vertical direction toward the paper surface, and the first main electrode 21. And the comb teeth of the second main electrode 22 are arranged in a cross finger shape. The first main electrode 21 and the outer peripheral electrode 30 are physically connected. The outer electrode 30 and the first main electrode 21 surround the entire second main electrode 22.

  In the nitride-based compound semiconductor device according to the fifth embodiment of the present invention, the 2DEG layer 31 immediately below the outer peripheral electrode 30 is set to be depleted while the anode electrode and the cathode electrode are reverse-biased. By applying the applied voltage to the outer peripheral electrode 30, the leakage current between the anode electrode and the cathode electrode is suppressed by the depletion layer extending from the main surface 100 to at least the 2DEG layer 31. That is, an SBD is provided in which a breakdown voltage is prevented from being lowered or broken due to a leak current flowing through the damaged end face of the semiconductor layer 10 and an increase in on-resistance due to a current collapse phenomenon is suppressed.

  In the nitride-based compound semiconductor device shown in FIG. 7, the outer peripheral electrode 30 and the first main electrode 21 that is an anode electrode may be electrically connected outside or inside the nitride-based compound semiconductor device, Alternatively, a voltage different from the voltage applied to the first main electrode 21 may be applied to the outer peripheral electrode 30. Others are substantially the same as those in the first embodiment, and redundant description is omitted.

(Sixth embodiment)
As shown in FIG. 9, the nitride compound semiconductor device according to the sixth embodiment of the present invention is that the semiconductor layer 10 does not include the carrier supply layer 4 according to the first embodiment of the present invention shown in FIG. This is different from the embodiment. Other configurations are the same as those of the first embodiment shown in FIG.

  As shown in FIG. 9, even in the case of the MESFET structure in which the outer peripheral electrode 30 and the semiconductor layer 10 are arranged on the carrier traveling layer 3, the control electrode (gate electrode) 23 and the second main electrode (drain electrode) 22. Is applied to the outer peripheral electrode 30 with a voltage set so as to be depleted from the main surface 100 immediately below the outer peripheral electrode 30 to the region where the current channel in the carrier traveling layer 3 is formed. As a result, the leak current flowing from the drain electrode 22 to the first main electrode (source electrode) 21 through the end face of the damaged semiconductor layer 10 is suppressed. As a result, it is possible to prevent a decrease in breakdown voltage and breakdown of the nitride-based compound semiconductor device shown in FIG.

  In the nitride-based compound semiconductor device shown in FIG. 9, the outer peripheral electrode 30 and the gate electrode 23 may be electrically connected outside or inside the nitride-based compound semiconductor device, or applied to the gate electrode 23. A voltage different from the voltage may be applied to the outer peripheral electrode 30. Further, the electrode arranged immediately inside the outer peripheral electrode 30 may be the source electrode 21 or the drain electrode 22. Others are substantially the same as those in the first embodiment, and redundant description is omitted.

(Other embodiments)
As described above, the present invention has been described according to the first to sixth embodiments. However, it should not be understood that the description and drawings constituting a part of this disclosure limit the present invention. From this disclosure, various alternative embodiments, examples and operational techniques will be apparent to those skilled in the art.

  For example, the carrier running layer 3 and the carrier supply layer 4 include GaN, InGaN other than AlGaN, AlInGaN, AlN, AlP, GaP, AlInP, GaInP, AlGaP, AlGaAs, GaAs, AlAs, InAs, InP, InN, and GaAsP. III-V compound semiconductors, II-VI compound semiconductors such as zinc oxide (ZnO), or other compound semiconductors can be employed.

  The carrier supply layer 4 can be replaced with a hole supply layer made of a p-type semiconductor. In this case, a two-dimensional hole gas layer is generated as a two-dimensional carrier gas layer in a region corresponding to the 2DEG layer 31.

  Furthermore, the present invention can also be applied when the substrate 1 is a conductive substrate other than a silicon substrate, or when a low-insulating layer is present under the gallium nitride compound semiconductor. Further, a back electrode may be provided on the lower surface of the substrate 1.

  As described above, the present invention naturally includes various embodiments not described herein. Therefore, the technical scope of the present invention is defined only by the invention specifying matters according to the scope of claims reasonable from the above description.

1 is a schematic diagram showing a configuration of a nitride-based compound semiconductor device according to a first embodiment of the present invention. It is typical sectional structure drawing along the II direction of FIG. FIG. 6 is a schematic cross-sectional structure diagram of a nitride-based compound semiconductor device according to a modification of the first embodiment of the present invention. It is a schematic diagram which shows the structure of the nitride type compound semiconductor device which concerns on the 2nd Embodiment of this invention. It is a schematic diagram which shows the structure of the nitride type compound semiconductor device which concerns on the 3rd Embodiment of this invention. It is a typical sectional structure figure of a nitride system compound semiconductor device concerning a 4th embodiment of the present invention. It is a schematic diagram which shows the structure of the nitride type compound semiconductor device which concerns on the 5th Embodiment of this invention. It is typical sectional structure drawing along the II-II direction of FIG. FIG. 9 is a schematic cross-sectional structure diagram of a nitride-based compound semiconductor device according to a sixth embodiment of the present invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 ... Semiconductor layer 21 ... 1st main electrode 22 ... 2nd main electrode 23 ... Control electrode 30 ... Outer peripheral electrode 31 ... Two-dimensional carrier gas layer 40 ... Insulating film 100 ... Main surface 211 of a semiconductor layer 211 ... Pattern resistance part 231 301: Insulating film

Claims (4)

A semiconductor layer having a carrier traveling layer made of a nitride compound semiconductor;
A first main electrode and a second main electrode disposed on a main surface of the semiconductor layer, which are ends of a current path of a main current flowing through the carrier travel layer;
An outer peripheral electrode which is disposed on the main surface so as to surround the first and second main electrodes by forming a Schottky junction with the main surface, and which controls charges in the semiconductor layer immediately below and near the main surface When,
Disposed on the main surface between the first and second main electrodes and controlling a main current flowing in the carrier travel layer between the first and second main electrodes, and the semiconductor layer and a Schottky junction or And a third electrode forming a MIS junction, wherein a depletion layer is formed immediately below the outer peripheral electrode when the main current is not flowing. A carrier supply layer made of a first nitride-based compound semiconductor, and a band gap energy different from that of the first nitride-based compound semiconductor, and a two-dimensional carrier gas layer in the vicinity of the interface with the carrier supply layer. A semiconductor layer having a carrier traveling layer made of two nitride-based compound semiconductors;
A first main electrode and a second main electrode disposed on a main surface of the semiconductor layer, which are ends of a current path of a main current flowing through the carrier travel layer;
Charges that are arranged on the main surface so as to surround the first and second main electrodes in a Schottky junction with the main surface, and are accumulated in the two-dimensional carrier gas layer immediately below and in the vicinity of the main surface An outer peripheral electrode for controlling,
Disposed on the main surface between the first and second main electrodes and controlling a main current flowing in the carrier travel layer between the first and second main electrodes, and the semiconductor layer and a Schottky junction or And a third electrode forming a MIS junction, and having a depletion layer extending to the two-dimensional carrier gas layer immediately below the outer peripheral electrode when the main current is not flowing. The third electrode and the peripheral electrode is nitride-based compound semiconductor device according to claim 1 or 2, characterized in that it is electrically connected. The semiconductor layer has a shape obtained by etching an end portion having a mesa shape outside the region where the outer peripheral electrode is disposed or a region inside the end portion from the main surface to a position deeper than the carrier traveling layer. The nitride-based compound semiconductor device according to any one of claims 1 to 3 , wherein the nitride-based compound semiconductor device is provided.

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