JP2014158261A - 差動電荷低減 - Google Patents
差動電荷低減 Download PDFInfo
- Publication number
- JP2014158261A JP2014158261A JP2014006579A JP2014006579A JP2014158261A JP 2014158261 A JP2014158261 A JP 2014158261A JP 2014006579 A JP2014006579 A JP 2014006579A JP 2014006579 A JP2014006579 A JP 2014006579A JP 2014158261 A JP2014158261 A JP 2014158261A
- Authority
- JP
- Japan
- Prior art keywords
- switch
- input
- node
- amplifier
- differential
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
- H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
- H03F3/45179—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using MOSFET transistors as the active amplifying circuit
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/32—Modifications of amplifiers to reduce non-linear distortion
- H03F1/3211—Modifications of amplifiers to reduce non-linear distortion in differential amplifiers
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/002—Switching arrangements with several input- or output terminals
- H03K17/005—Switching arrangements with several input- or output terminals with several inputs only
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
- H03M1/08—Continuously compensating for, or preventing, undesired influence of physical parameters of noise
- H03M1/0863—Continuously compensating for, or preventing, undesired influence of physical parameters of noise of switching transients, e.g. glitches
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/1205—Multiplexed conversion systems
- H03M1/122—Shared using a single converter or a part thereof for multiple channels, e.g. a residue amplifier for multiple stages
- H03M1/1225—Shared using a single converter or a part thereof for multiple channels, e.g. a residue amplifier for multiple stages using time-division multiplexing
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Theoretical Computer Science (AREA)
- Amplifiers (AREA)
- Analogue/Digital Conversion (AREA)
- Electronic Switches (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US13/769,096 | 2013-02-15 | ||
| US13/769,096 US8941439B2 (en) | 2013-02-15 | 2013-02-15 | Differential charge reduction |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2018072426A Division JP2018121364A (ja) | 2013-02-15 | 2018-04-04 | 差動電荷低減 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2014158261A true JP2014158261A (ja) | 2014-08-28 |
| JP2014158261A5 JP2014158261A5 (enExample) | 2016-03-31 |
Family
ID=50033340
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2014006579A Pending JP2014158261A (ja) | 2013-02-15 | 2014-01-17 | 差動電荷低減 |
| JP2018072426A Pending JP2018121364A (ja) | 2013-02-15 | 2018-04-04 | 差動電荷低減 |
Family Applications After (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2018072426A Pending JP2018121364A (ja) | 2013-02-15 | 2018-04-04 | 差動電荷低減 |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US8941439B2 (enExample) |
| EP (1) | EP2768142A1 (enExample) |
| JP (2) | JP2014158261A (enExample) |
| CN (1) | CN103997345B (enExample) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20150372844A1 (en) * | 2014-06-18 | 2015-12-24 | Texas Instruments Incorporated | Wideband Parasitic Capacitance Cancellation for High Speed Switches in Serial Communication |
| CN104601118B (zh) * | 2014-12-30 | 2017-12-12 | 中国科学院电子学研究所 | 斩波稳零运算放大器中注入电荷的抑制方法 |
| US10396766B2 (en) * | 2017-12-26 | 2019-08-27 | Texas Instruments Incorporated | Parasitic capacitance cancellation using dummy transistors |
| WO2020173918A1 (en) * | 2019-02-25 | 2020-09-03 | Ams International Ag | Circuit for reduced charge-injection errors |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2000132989A (ja) * | 1998-10-22 | 2000-05-12 | Haruo Kobayashi | トラックホールド回路 |
| US20050035810A1 (en) * | 2002-05-31 | 2005-02-17 | Broadcom Corporation | Multiplexer with low parasitic capacitance effects |
| JP2008125046A (ja) * | 2006-10-19 | 2008-05-29 | Denso Corp | マルチチャネルサンプルホールド回路およびマルチチャネルa/d変換器 |
| JP2008219527A (ja) * | 2007-03-05 | 2008-09-18 | Fujitsu Ltd | アナログスイッチ |
| US20120274497A1 (en) * | 2011-04-27 | 2012-11-01 | Analog Devices, Inc. | Pipelined analog-to-digital converter |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5703589A (en) | 1996-03-08 | 1997-12-30 | Burr-Brown Corporation | Switched capacitor input sampling circuit and method for delta sigma modulator |
| US6201835B1 (en) | 1999-03-05 | 2001-03-13 | Burr-Brown Corporation | Frequency-shaped pseudo-random chopper stabilization circuit and method for delta-sigma modulator |
| US20030146786A1 (en) | 2002-02-04 | 2003-08-07 | Kush Gulati | ADC having chopper offset cancellation |
| US7167029B2 (en) | 2005-01-19 | 2007-01-23 | Atmel Corporation | Sampling and level shifting circuit |
| US7764215B2 (en) * | 2008-12-31 | 2010-07-27 | Hong Kong Applied Science And Technology Research Institute Co., Ltd. | Multi-stage comparator with offset canceling capacitor across secondary differential inputs for high-speed low-gain compare and high-gain auto-zeroing |
| US8026760B1 (en) * | 2010-07-29 | 2011-09-27 | Freescale Semiconductor, Inc. | Gain enhanced switched capacitor circuit and method of operation |
| CN102158229A (zh) * | 2011-03-30 | 2011-08-17 | 上海北京大学微电子研究院 | Adc失调电压和电荷注入消除技术 |
| CN102394650B (zh) * | 2011-10-11 | 2013-11-13 | 中国电子科技集团公司第五十八研究所 | 用于电荷耦合流水线adc的反馈增强型电荷传输电路 |
| US8604861B1 (en) * | 2012-06-19 | 2013-12-10 | Infineon Technologies Ag | System and method for a switched capacitor circuit |
-
2013
- 2013-02-15 US US13/769,096 patent/US8941439B2/en active Active
-
2014
- 2014-01-17 JP JP2014006579A patent/JP2014158261A/ja active Pending
- 2014-01-28 EP EP14152953.7A patent/EP2768142A1/en not_active Withdrawn
- 2014-02-14 CN CN201410050586.2A patent/CN103997345B/zh active Active
-
2018
- 2018-04-04 JP JP2018072426A patent/JP2018121364A/ja active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2000132989A (ja) * | 1998-10-22 | 2000-05-12 | Haruo Kobayashi | トラックホールド回路 |
| US20050035810A1 (en) * | 2002-05-31 | 2005-02-17 | Broadcom Corporation | Multiplexer with low parasitic capacitance effects |
| JP2008125046A (ja) * | 2006-10-19 | 2008-05-29 | Denso Corp | マルチチャネルサンプルホールド回路およびマルチチャネルa/d変換器 |
| JP2008219527A (ja) * | 2007-03-05 | 2008-09-18 | Fujitsu Ltd | アナログスイッチ |
| US20120274497A1 (en) * | 2011-04-27 | 2012-11-01 | Analog Devices, Inc. | Pipelined analog-to-digital converter |
Also Published As
| Publication number | Publication date |
|---|---|
| CN103997345B (zh) | 2017-09-12 |
| CN103997345A (zh) | 2014-08-20 |
| EP2768142A1 (en) | 2014-08-20 |
| US8941439B2 (en) | 2015-01-27 |
| JP2018121364A (ja) | 2018-08-02 |
| US20140232460A1 (en) | 2014-08-21 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US11152931B2 (en) | Input buffer | |
| US8810282B2 (en) | Apparatus and methods for voltage comparison | |
| US9735736B2 (en) | Apparatus and methods for reducing input bias current of an electronic circuit | |
| JPH10312698A (ja) | Mosサンプル・アンド・ホールド回路 | |
| US20090206885A1 (en) | Track and hold circuit | |
| JP2018121364A (ja) | 差動電荷低減 | |
| CN104321968B (zh) | Cmos晶体管的线性化方法 | |
| US11863165B2 (en) | Input buffer | |
| US7274222B2 (en) | Control method for an analogue switch | |
| US7279940B1 (en) | Switched-capacitor circuit with time-shifted switching scheme | |
| US8841962B1 (en) | Leakage compensation for switched capacitor integrators | |
| US8471630B2 (en) | Fast settling reference voltage buffer and method thereof | |
| US8232904B2 (en) | Folding analog-to-digital converter | |
| US8354887B1 (en) | Charge compensation for operational transconductance amplifier based circuits | |
| CN106506006A (zh) | 一种生物电传感器的专用采样误差校准电路及其校准方法 | |
| TWI780914B (zh) | 輸入緩衝器以及緩衝電壓輸入訊號之方法 | |
| Pelgrom | Sample-and-hold circuits | |
| CN120415402A (zh) | Cmos互补采样开关及cmos互补采样开关控制方法 | |
| CN115913201A (zh) | 一种基于三路径的高线性度栅压自举开关 | |
| KR20100074499A (ko) | 스위치드 캐패시터 | |
| Ren et al. | A 0.5‐V 5.9‐fJ/conversion‐step SAR ADC in 0.18‐μm CMOS | |
| Sin et al. | Challenges in Low-Voltage Circuit Designs | |
| 朱旭斌 et al. | A 10-bit 50-MS/s sample-and-hold circuit with low distortion sampling switches | |
| KR20070089506A (ko) | 샘플링 스위치의 온-저항을 최소화하는 방법 및 아날로그스위치 회로 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20160210 |
|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20160210 |
|
| A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20160810 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20160905 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20170404 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20170626 |
|
| RD03 | Notification of appointment of power of attorney |
Free format text: JAPANESE INTERMEDIATE CODE: A7423 Effective date: 20170726 |
|
| RD04 | Notification of resignation of power of attorney |
Free format text: JAPANESE INTERMEDIATE CODE: A7424 Effective date: 20170816 |
|
| A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20171204 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20180404 |
|
| A911 | Transfer to examiner for re-examination before appeal (zenchi) |
Free format text: JAPANESE INTERMEDIATE CODE: A911 Effective date: 20180411 |
|
| A912 | Re-examination (zenchi) completed and case transferred to appeal board |
Free format text: JAPANESE INTERMEDIATE CODE: A912 Effective date: 20180615 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20190704 |