JP2014022685A - Semiconductor laminate structure and semiconductor element using the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce warpage of a semiconductor laminate including a buffer layer, a strained superlattice layer or a graded composition layer, and a semiconductor device layer which are composed of AlGaN-based semiconductors and sequentially provided on a substrate of Si and the like.SOLUTION: In a semiconductor laminate, a heat expansion coefficient of a substrate at temperatures from room temperature to 1200°C is smaller than a heat expansion coefficient of each of semiconductor layers, and a relation among a film thickness (t) of a strained superlattice layer, a film thickness (t) of a channel layer and a total thickness (t) of the semiconductor layers is represented as 0.75≤t/t≤0.90 or 0.75≤t/t+t≤0.90. Further, a relation among a film thickness (t) of a composition graded layer, the film thickness (t) of the channel layer and the total thickness (t) of the semiconductor layers is represented as 0.75≤t/t≤0.90 or 0.75≤t/t+t≤0.90.

Description

  The present invention is a semiconductor multilayer structure used for semiconductor elements such as field effect transistors (FETs), light emitting diodes (LEDs), etc., and particularly uses a Si substrate with excellent crystal quality that suppresses the occurrence of warpage and cracks. The present invention relates to a semiconductor laminated structure and a semiconductor element using the same.

BACKGROUND ART Nitride semiconductors have been actively researched and developed in recent years as active materials for electronic devices such as field effect transistors or light receiving and emitting devices in the short wavelength band from the visible light region to the ultraviolet light region.

  Generally, the nitride semiconductor is formed on a substrate made of sapphire, SiC, Si, or the like. In particular, a Si single crystal substrate (hereinafter referred to as “Si substrate”) has a large area and is available at a low price, is excellent in crystallinity and heat dissipation, is easy to cleave and etch, and has a mature process technology. Has many advantages.

  However, since the nitride semiconductor and the Si substrate have greatly different lattice constants and thermal expansion coefficients, when the nitride semiconductor is grown on the Si substrate, the grown nitride semiconductor warps as a wafer or cracks. And pits (point defects) occur. In particular, when the warpage is large, the process becomes difficult as device processing, and the breakdown voltage as an element is low, which is a big problem.

As a means for solving the above problem, a technique for suppressing warpage or cracking by forming a buffer layer between the Si substrate and the nitride semiconductor layer is known. For example, in Patent Document 1, a transition layer (buffer layer) made of a nitride semiconductor and made of compositionally graded Al _x Ga _1-X N or the like is formed on a Si substrate. A semiconductor material having gallium nitride formed thereon is disclosed.

In Patent Document 2, an AlN-based superlattice composite layer formed by alternately laminating a plurality of high Al-containing layers and low Al-containing layers on a Si substrate is formed, and the AlN-based superlattice composite buffer layer is formed. A nitride semiconductor device having a nitride semiconductor layer formed thereon is disclosed.

However, none of the semiconductor materials described in Patent Documents 1 and 2 is sufficient for suppressing warpage or cracks generated in the nitride semiconductor layer.

On the other hand, in Patent Documents 3 and 4, a GaN buffer layer having a thickness of 30 nm is provided on a sapphire substrate having a diameter of 2 inches and a thickness of 330 μm in order to obtain a semiconductor multilayer substrate with little warpage. It is disclosed that the warp of a semiconductor multilayer structure in which an intermediate layer composed of an InGaN layer substituted with In is provided and an AlGaN-based film is formed with a thickness of 20 to 30 nm is 10 to 25 μm.

However, the Young's modulus of the sapphire substrate used in Patent Documents 3 and 4 is 2 to 3 times the Young's modulus of the Si substrate, so that the warpage is relatively small, and the diameter of the substrate is changed from 2 inches to 4 inches. If it is larger, the warpage is expected to be about 4 times larger. Further, the film thickness of AlGaN on the intermediate layer for strain relaxation is small, and the strain relaxation effect of the intermediate layer has not been sufficiently confirmed.

Special table 2004-524250 gazette JP 2007-67077 A JP 2008-211246 A JP 2007-60140 A

  An object of the present invention is a semiconductor laminated structure in which a buffer layer is provided on a Si substrate, a strained superlattice layer or a composition gradient layer is provided on the buffer layer, and a GaN-based device layer is further provided. It is an object of the present invention to provide a reduced semiconductor multilayer structure and a semiconductor element using the same.

  In the semiconductor stacked structure, the inventors have a specific relationship between the thickness of the strained superlattice layer and the total thickness of the semiconductor layer, or the thickness of the composition gradient layer and the total thickness of the semiconductor layer. It has been found that the above problems can be solved. That is, according to the present invention, the following semiconductor multilayer structure and a semiconductor element using the same are provided.

[1] A semiconductor laminated structure in which an AlGaN-based semiconductor layer as a buffer layer, a strained superlattice layer, a channel layer, and a barrier layer is sequentially provided on a substrate, and the thermal expansion coefficient of the substrate at room temperature to 1200 ° C. The relationship between the thermal expansion coefficient smaller than any of the layers, the thickness of the strained superlattice layer (t _SL ), the thickness of the channel layer (t _CH ), and the total thickness of the semiconductor layer (t _TOTAL ) is 0.75 ≦ t _SL / t _TOTAL ≦ 0.90 or 0.75 ≦ t _SL / (t _SL + t _CH ) ≦ 0.90

[2] The strained superlattice layer is a layer in which a combination of Al _X1 Ga _1-X1 N and Al _X2 Ga _1-X2 N is alternately repeated, and the total thickness is 1.0 μm to 6.0 μm The semiconductor multilayer structure according to [1].

[3] The semiconductor multilayer structure according to [2], wherein the pair composition of the strained superlattice layer is 0.9 ≦ X1 ≦ 1.0 and X2 + 0.65 ≦ X1 ≦ X2 + 0.75.

[4] A semiconductor laminated structure in which a buffer layer, a strained superlattice layer, and an AlGaN-based semiconductor layer as a light-emitting layer are sequentially provided on a substrate, and the thermal expansion coefficient of the substrate at room temperature to 1200 ° C. is any of the semiconductor layers. The relationship between the thickness of the strained superlattice layer (t _SL ), the thickness of the light emitting layer (t _LE ), and the total thickness of the semiconductor layer (t _TOTAL ) is 0.75 ≦ t _SL. / T _TOTAL ≦ 0.90, or 0.75 ≦ t _SL / (t _SL + t _LE ) ≦ 0.90.

[5] The semiconductor stacked structure according to [4], wherein the light emitting layer is formed by sequentially stacking a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer opposite to the first conductive type. .

[6] The strained superlattice layer is a layer in which a combination of Al _X1 Ga _1-X1 N and Al _X2 Ga _1-X2 N is alternately repeated, and the total thickness thereof is 1.0 μm to 6.0 μm. The semiconductor multilayer structure according to [4] or [5].

[7] The semiconductor multilayer structure according to [6], wherein a pair composition of the strained superlattice layer is 0.9 ≦ X1 ≦ 1.0 and X2 + 0.65 ≦ X1 ≦ X2 + 0.75.

[8] The above [1] to [7], wherein the ratio of the thickness (t _SL ) of the strained superlattice layer to the thickness of the substrate (t _SUB ) (t _SL / t _SUB ) is 0.001 to 0.014. The semiconductor laminated structure in any one of.

[9] A semiconductor multilayer structure in which a buffer layer, a composition gradient layer, a channel layer, and a barrier layer are sequentially provided on a substrate, and the substrate has a thermal expansion coefficient of room temperature to 1200 ° C. Less than any thermal expansion coefficient of the semiconductor layer, the Al composition of the composition gradient layer decreases in the film growth direction, the film thickness of the composition gradient layer (t _CG ), the film thickness of the channel layer (t _CH ), and the semiconductor layer A semiconductor stacked structure in which the relationship with the total thickness (t _TOTAL ) is 0.75 ≦ t _CG / t _TOTAL ≦ 0.90 or 0.75 ≦ t _CG / t _CG + t _CH ≦ 0.90.

[10] The semiconductor multilayer structure according to [9], wherein the composition gradient layer has a thickness of 0.7 μm to 2.5 μm.

[11] The semiconductor according to [9] or [10], wherein the composition gradient layer has a composition of Al _X3 Ga _1-X3 N, and X3 decreases stepwise in the film growth direction every 10 nm to 100 nm in film thickness. Laminated structure.

[12] A semiconductor laminated structure in which a buffer layer, a composition gradient layer, and an AlGaN-based semiconductor layer as a light emitting layer are sequentially provided on a substrate, and the thermal expansion coefficient of the substrate at room temperature to 1200 ° C. is any of the semiconductor layers. The relationship between the thickness of the composition gradient layer (t _CG ), the thickness of the light emitting layer (t _LE ), and the total thickness of the semiconductor layer (t _TOTAL ), which is smaller than the thermal expansion coefficient, is 0.75 ≦ t _CG / t _A semiconductor stacked structure in which _TOTAL ≦ 0.90 or 0.75 ≦ t _CG / (t _CG + t _LE ) ≦ 0.90.

[13] The semiconductor stacked structure according to [12], wherein the light emitting layer is formed by sequentially stacking a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer opposite to the first conductive type. .

[14] The semiconductor multilayer structure according to [12] or [13], wherein the thickness of the composition gradient layer is 0.7 μm to 2.5 μm.

[15] The composition gradient layer has a composition of Al _X3 Ga _1-X3 N, and X3 decreases stepwise in the film growth direction every 10 nm to 100 nm in film thickness. The semiconductor laminated structure as described.

[16] In the above [9] to [15], the ratio of the thickness (t _CG ) of the composition gradient layer to the thickness of the substrate (t _SUB ) (t _CG / t _SUB ) is 0.0007 to 0.0060. The semiconductor laminated structure in any one.

[17] The [1] to [3], [8], wherein the channel layer is a layer made of Al _X4 Ga _1-X4 N (0 ≦ X4 ≦ 0.1) having a thickness of 0.2 μm to 5.0 μm. [9] to [11], and a semiconductor multilayer structure according to any one of [16].

[18] The semiconductor multilayer structure according to any one of [1] to [17], wherein the substrate is a Si substrate.

 [19] A HEMT device using the semiconductor multilayer structure according to any one of [1] to [3], [8], [9] to [11], and [16].

[20] A light emitting device using the semiconductor multilayer structure according to any one of [4] to [8] and [12] to [16].

It is a conceptual diagram of the semiconductor laminated structure of this invention Example 1. FIG. It is a conceptual diagram of the semiconductor laminated structure of this invention Example 2. FIG. It is a figure which shows the curvature amount of the wafer which has a semiconductor laminated structure of this invention. It is a figure which shows the curvature amount of Example 1 and Example 2 of this invention. It is a figure which shows the curvature amount of Example 1 and Example 2 of this invention.

Hereinafter, embodiments of the present invention will be described with reference to the drawings. The present invention is not limited to the following embodiments, and changes, modifications, and improvements can be added without departing from the scope of the invention.

FIG. 1 is a conceptual diagram of a semiconductor laminated structure of Example 1 of the present invention. For convenience of illustration, the ratio of the thickness of each layer in FIG. 1 does not reflect the actual ratio. In the semiconductor multilayer structure 1 shown in FIG. 1, an AlN layer 3 and an AlGaN layer 4 are formed as a buffer layer on a Si substrate 2, and then a strained superlattice layer 5, and further a GaN layer 6 and Al _x Ga as a device layer. _{The 1-} XN layer 7 is sequentially laminated. Since the semiconductor multilayer structure 1 is formed by epitaxially growing the buffer layers 3 and 4, the strained superlattice layer 5, and the device layers 6 and 7 on the substrate 2 in order, the semiconductor multilayer structure is a semiconductor epitaxial substrate ( Alternatively, it may be referred to as a semiconductor epi substrate.

For example, a HEMT element can be formed by forming a source electrode, a gate electrode, and a drain electrode in the semiconductor multilayer structure.

The substrate is appropriately selected according to the buffer layer, strained superlattice, device layer composition and structure formed thereon, and the formation method of each layer. For example, as a substrate, silicon, germanium, sapphire, silicon carbide, oxide (ZnO, LiAlO ₂ , LiGaO ₂ , MgAl ₂ O ₄ , (LaSr) (AlTa) O ₃ , NdGaO ₃ , MgO, etc.), Si—Ge An alloy, a Group 3 to Group 5 compound of the periodic table (GaAs, AlN, GaN, AlGaN, AlInN), boride (such as ZrB2), and the like can be used. However, the thermal expansion coefficient of the substrate at room temperature to 1200 ° C. is preferably smaller than the thermal expansion coefficient of the film made of Al _X Ga _1-X N formed on the substrate, and in particular, the Si substrate is in terms of quality and cost. Preferably, the thickness of the Si substrate is 0.42 to 1.00 mm.

The buffer layer is formed from a single layer or a plurality of layers made of various Group III nitride semiconductors depending on the strained superlattice formed thereon, the composition and structure of the device layer, or the formation method of each layer. In the present invention, the buffer layer is made of _{Al X Ga 1-X} N, consists of one or two layers of X ≧ 0.2, 30 to 500 nm is preferred as the thickness of the total. This buffer layer is formed by a known film formation method such as MOCVD method or MBE method. It is preferable that the film structure has as little strain and dislocation density as possible, and the dislocation density is preferably 1 × 10 ¹¹ / cm ³ or less in order to affect the quality of a film to be formed later.

A strained superlattice layer is formed next to the buffer layer. The strained superlattice layer is a layer in which a combination (pair) of _one Al _X1 Ga _1-X1 N and the other Al _X2 Ga _1-X2 N is alternately repeated, one having a thickness of 2 nm to 10 nm and the other having a thickness of It is preferable that the pair composition of this strained superlattice layer is 0.9 ≦ X1 ≦ 1.0, X2 + 0.65 ≦ X1 ≦ X2 + 0.75, and this pair is repeated 20 to 200 cycles. The total thickness of the strained superlattice layer is particularly preferably 1.0 μm to 6.0 μm. The composition difference of the pair is selected from the relationship of the critical film thickness of each strained superlattice layer. That is, when the thickness of each strained superlattice layer is increased, it is preferable that the difference in the composition of the pair is not large. Furthermore, the thickness ratio (t _SL / t _SUB ) between the thickness (t _SL ) of the strained superlattice layer and the substrate (t _SUB ) is preferably 0.001 to 0.014. The strained superlattice layer is also formed by a known film formation method such as MOCVD method or MBE method.

Instead of the strained superlattice layer, a composition gradient layer whose composition changes continuously or discontinuously in the film growth direction may be used. FIG. 2 shows a conceptual diagram of the semiconductor laminated structure of Example 2 of the present invention using the composition gradient layer. The composition gradient layer is _{Al X3} Ga _1-X3 N having a composition, decreases in the direction of film growth for each film thickness 10 nm to 100 nm X3 is changed stepwise, the total thickness 0.7Myuemu～2. 5 micrometers is preferable and 1.5 micrometers-2.5 micrometers are more preferable. The thickness (t _CG ) of the composition gradient layer and the thickness (ratio _CG / t _SUB ) of the substrate (t _SUB ) are preferably 0.0007 to 0.0060. The composition gradient layer is also formed by a known film forming method such as MOCVD method or MBE method.

A device layer is formed subsequently to the strained lattice layer or the composition gradient layer. For example, when the semiconductor laminated structure of the present invention is used for a HEMT element, this device layer is made of Al _X4 Ga _1-X4 N (0 ≦ X4 ≦ 0.1) having a channel layer thickness of 0.2 μm to 5.0 μm. It consists of a channel layer and a barrier layer made of Al _X5 Ga _1-X5 N (0 <X5 <1). Here, the composition difference between the channel layer and the barrier layer preferably satisfies X4 + 0.2 ≦ X5 ≦ X4 + 0.4. The channel layer is particularly preferably GaN (X4 = 0). The thickness of the channel layer is preferably 0.2 μm to 5.0 μm, and the barrier layer is preferably 10 to 100 nm. An electron supply layer is formed in the vicinity of the interface between the channel layer and the barrier layer. This device layer is also formed by a known film formation method such as MOCVD or MBE.

As described above, the semiconductor multilayer structure of the present invention is a semiconductor multilayer structure in which a buffer layer, a strained superlattice layer, a channel layer, and an AlGaN-based semiconductor layer as a barrier layer are sequentially provided on a substrate. The relationship between the film thickness (t _SL ), the channel layer thickness (t _CH ), and the total thickness (t _TOTAL ) of the semiconductor layer is 0.75 ≦ t _SL / t _TOTAL ≦ 0.90, or It is preferable that 75 ≦ t _SL / t _SL + t _CH ≦ 0.90, and this relationship can reduce the warpage of the semiconductor stacked structure. Then, the HEMT device can be manufactured by providing source, gate, and drain electrodes in the semiconductor stacked structure.

Similarly, the semiconductor multilayer structure of the present invention is a semiconductor multilayer structure in which an AlGaN-based semiconductor layer as a buffer layer, a composition gradient layer, a channel layer, and a barrier layer is sequentially provided on a substrate, and the Al composition of the composition gradient layer is Decreases in the film growth direction, and the relationship between the thickness of the composition gradient layer (t _CG ), the thickness of the channel layer (t _CH ), and the total thickness of the semiconductor layer (t _TOTAL ) is 0.75 ≦ t _CG It is preferable that / t _TOTAL ≦ 0.90 or 0.75 ≦ t _CG / t _CG + t _CH ≦ 0.90, and this relationship can reduce the warp of the present semiconductor stacked structure. The HEMT device can be manufactured by providing source, gate, and drain electrodes in the semiconductor multilayer structure.

  On the other hand, in the semiconductor laminated structure of the present invention, after providing a buffer layer, a strained superlattice layer or a composition gradient layer on a substrate, a light emitting layer is provided instead of a channel layer and a barrier layer, and a light emitting element with small warpage A semiconductor laminated structure can be produced. In this case, the light emitting layer includes a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer opposite to the first conductive type. For example, an n-type semiconductor layer having a thickness of 0.1 μm to 1.0 μm, an active layer having a thickness of 2 nm to 20 nm, and a p-type semiconductor layer having a thickness of 0.1 μm to 1.0 μm are sequentially formed. Preferably, GaN can be used as the n-type semiconductor layer and p-type semiconductor layer, and InGaN can be used as the active layer. Thereafter, a cathode electrode and an anode electrode are provided on the light emitting layer, or one electrode is formed on the other surface of the substrate (opposite to the laminated film), whereby a light emitting element can be manufactured.

(Example 1: Semiconductor laminated structure using strained superlattice layer)
In this example, the semiconductor multilayer structure according to the above-described embodiment was produced, and the warpage of the wafer was measured. First, a (111) plane silicon (Si) single crystal having a 4 inch diameter and a thickness of 525 μm was used and placed in a reaction vessel of a predetermined MOCVD apparatus. In the MOCVD apparatus, at least H ₂ , N ₂ , TMG (trimethyl gallium), TMA (trimethyl aluminum), and NH ₃ can be supplied into the reaction tube as a carrier gas or a reaction gas. While flowing hydrogen as a carrier gas at a flow rate of 20 SLM and nitrogen at a flow rate of 10 SLM, while maintaining the pressure in the reaction tube at 100 Torr, the substrate was heated to 1210 ° C. and held for 10 minutes to perform thermal cleaning of the substrate.

Thereafter, while the substrate temperature is lowered and maintained at 1030 ° C., TMA and hydrogen as its carrier gas are supplied, and NH ₃ and hydrogen as its carrier gas are supplied to thereby form AlN having a film thickness of 100 nm as a buffer layer. A layer was first formed. The molar ratio of the supplied reaction gas, that is, the ratio of Group 5 gas / Group 3 gas (NH ₃ / TMA) was 5600, and the pressure in the reaction tube was 100 Torr.

Then, the substrate temperature was set to 1130 ° C., and the reaction gas molar ratio (Group 5 gas / Group 3 gas) to be supplied was set to 4,000 to form Al _0.30 Ga _0.70 N having a thickness of 40 nm. As described above, an AlN layer and a buffer layer made of Al _0.3 Ga _0.7 N were formed.

Next, a strained superlattice layer was formed while maintaining the substrate temperature at 1130 ° C. As with the buffer layer, the supply amounts of TMA, TMG, and NH ₃ are adjusted as supply gases, and AlN and Al _0.26 Ga _0.74 N are alternately stacked with a thickness of 6 nm and 15 nm, respectively. Three types of 50 cycles, 160 cycles, and 200 cycles were formed.

  Further, while maintaining the substrate temperature at 1130 ° C., the pressure is 100 Torr, the reaction gas molar ratio (Group 5 gas / Group 3 gas) to be supplied is 2800, and the channel layer has a thickness of 0 to 2. A GaN layer having a thickness of 13 μm (6 kinds of film thickness) was formed.

After the formation of the GaN layer as the channel layer, while maintaining the substrate temperature 1130 ° C., and supplies for supplying reaction gas molar ratio (group 5 gas / Group 3 gas) like Ibitsucho grating layer, Al _{0 A} barrier layer of _.26 Ga _0.74 N was formed to a thickness of 25 nm. Thus, a semiconductor multilayer structure (Example 1) was obtained.

  As described above, the amount of warpage of the semiconductor multilayer structure was measured by changing the total thickness (number of periods) of the strained superlattice layer and the thickness of the channel layer. The results are shown in Table 1. The amount of warpage of the semiconductor laminated structure was measured as shown in FIG. 3, and the average of the orientation flat direction of the substrate and the direction perpendicular thereto was taken.

(Example 2: Semiconductor laminated structure using composition gradient layer)
In this example, a composition gradient layer was formed in place of the strained superlattice layer of Example 1. The layer composed of Al _X3 Ga _1-X3 N as the composition gradient layer maintains the substrate temperature at 1130 ° C., the pressure is 100 Torr, and the reaction gas molar ratio (Group 5 gas / Group 3 gas) is increased from 5600 to 2800. While decreasing stepwise, the Al composition ratio X3 was decreased from 1 to 0 to form a composition gradient layer having a thickness of 2.1 μm. The Al composition was decreased stepwise every 50 nm. In addition, the substrate including the substrate is formed except that an AlN layer of 140 nm is formed at a substrate temperature of 1130 ° C. as a buffer layer under the composition gradient layer, and six types of GaN layers having a film thickness of 0 to 1.7 μm are formed as a channel layer. A semiconductor multilayer structure was formed under the same film formation conditions as in No. 1.

  As described above, the warpage amount of the semiconductor multilayer structure was measured by changing the thickness of the channel layer. The results are shown in Table 2.

Based on the results of Table 1 and Table 2, the ratio of the thickness of the strained superlattice layer (t _SL ) to the total thickness (t _TOTAL ) of the semiconductor layer, and the thickness of the composition gradient layer (t _CG ) of the semiconductor layer FIG. 4 shows the relationship between the ratio of the total thickness (t _TOTAL ) and the amount of warpage.

Based on the results of Table 1 and Table 2, the thickness of the strained superlattice layer _{(t SL),} the ratio to the sum of the thickness of the film thickness of the strained superlattice layer _{(t SL)} and the channel layer _{(t CH),} and the thickness of the composition gradient layer (t _CG), obtains the ratio of the sum of the thickness of the film thickness of the composition gradient layer (t _CG) and channel layer (t _CH), relationship between these ratios and warpage Is shown in FIG.

Than 4, it can be seen that the warp amount is small in the case of _{0.75 ≦ t SL / t TOTAL ≦} 0.90,0.75 ≦ t CG / t TOTAL ≦ 0.90. On the other hand, as shown in FIG. 5, the amount of warpage decreases when 0.75 ≦ t _SL / (t _SL + t _CH ) ≦ 0.90 and 0.75 ≦ t _CG / (t _CG + t _CH ) ≦ 0.90. I understand. That is, it can be seen that the warp is small when the strained superlattice layer or the composition gradient layer is relatively thick with respect to the device layer formed thereon.

Next, HEMT devices were prototyped using the semiconductor epitaxial substrates of Examples 1-12, 1-13, and 1-14 shown in Table 1, and changes in threshold voltage before and after stress application were examined. The dimensions of the fabricated device are a gate length of 1.5 μm, a gate width of 200 μm, a source-drain distance of 9.5 μm, and a gate-drain distance of 4.0 μm. Pb (40 nm) / Ti (20 nm) / Au (60 nm) was used for the gate electrode. Ti (15 nm) / Al (80 nm) / Ni (12 nm) / Au (40 nm) were used for the source electrode and the drain electrode. The stress was applied by applying a constant voltage of -10V between the source and gate electrodes, applying a voltage of 5V to 40V in 5V steps between the source and drain, and holding each state for 600 seconds, and applying stress. . Table 3 shows changes in threshold voltage (V _th ) and transconductance (g _m ) before and after stress application. Each threshold voltage and transconductance value represents an average value of five elements.

In the epitaxial substrates of Examples 1-12 and 1-14 with a large amount of warpage, the threshold voltage and the mutual conductance fluctuate before and after stress application. On the other hand, in the epitaxial substrate of Example 1-13 whose warpage amount is smaller than that of the other examples, there is no change in the threshold voltage and the mutual conductance before and after the stress application.

In addition, the amount of warpage of the semiconductor multilayer structure in the case of using a composition gradient layer with a film thickness of 1.1 μm instead of the composition gradient layer with a film thickness of 2.1 μm in Example 2 is the same as that of the strained superlattice layer in FIGS. The curve approximates the curve of the warp amount, and the difference is ± 10 μm or less with respect to the warp amount in the case of a strained superlattice layer having a total film thickness of 1.05 μm.

In Example 1 and Example 2, a (111) plane Si single crystal having a 4 inch diameter and a thickness of 525 μm was used as the substrate, but the same 4 inch diameter and a (111) plane Si single crystal having a thickness of 900 μm was used as the substrate. The warpage of the semiconductor multilayer structure using the strained superlattice layer was investigated. Although the warpage was relatively small as compared with the Si single crystal substrate having a thickness of 525 μm, the total thickness of the semiconductor layer of the strained superlattice layer (ratio to t _TOTAL , and further the thickness of the strained superlattice layer, The warp is small when the ratio of the film thickness of the strained superlattice layer and the film thickness of the channel layer is the same as in Example 1, so the ratio of the film thickness of the strained superlattice layer to the thickness of the substrate is also implemented. It turned out that it is good to be 0.001-0.014 similarly to Example 1.

The semiconductor laminated structure of the present invention is used for a semiconductor element such as a field effect transistor (FET, HEMT) or a light emitting element.

Claims (20)

A semiconductor multilayer structure in which a buffer layer, a strained superlattice layer, a channel layer, and an AlGaN-based semiconductor layer as a barrier layer are sequentially provided on a substrate, and the thermal expansion coefficient of the substrate at room temperature to 1200 ° C. is any of the semiconductor layers The relationship between the thickness of the strained superlattice layer (t _SL ), the thickness of the channel layer (t _CH ), and the total thickness of the semiconductor layer (t _TOTAL ) is 0.75 ≦ t _SL. / T _TOTAL ≦ 0.90, or 0.75 ≦ t _SL / (t _SL + t _CH ) ≦ 0.90. The strained superlattice layer is a layer in which a combination of Al _X1 Ga _1-X1 N and Al _X2 Ga _1-X2 N is alternately repeated, and the total thickness thereof is 1.0 μm to 6.0 μm. The semiconductor laminated structure as described. 3. The semiconductor multilayer structure according to claim 2, wherein a pair composition of the strained superlattice layer is 0.9 ≦ X1 ≦ 1.0 and X2 + 0.65 ≦ X1 ≦ X2 + 0.75. A semiconductor laminated structure in which a buffer layer, a strained superlattice layer, and an AlGaN-based semiconductor layer as a light emitting layer are sequentially provided on a substrate, wherein the thermal expansion coefficient of the substrate at room temperature to 1200 ° C. is any thermal expansion of the semiconductor layer The relationship between the thickness of the strained superlattice layer (t _SL ), the thickness of the light emitting layer (t _LE ), and the total thickness of the semiconductor layer (t _TOTAL ) is smaller than 0.75 ≦ t _SL / t _TOTAL ≦ 0.90, or 0.75 ≦ t _SL / (t _SL + t _LE ) ≦ 0.90. 5. The semiconductor stacked structure according to claim 4, wherein the light emitting layer is formed by sequentially stacking a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer opposite to the first conductive type. The strained superlattice layer is a layer in which a combination of Al _X1 Ga _1-X1 N and Al _X2 Ga _1-X2 N is alternately repeated, and the total thickness thereof is 1.0 μm to 6.0 μm. 6. The semiconductor laminated structure according to 5. 7. The semiconductor multilayer structure according to claim 6, wherein the pair composition of the strained superlattice layer is 0.9 ≦ X1 ≦ 1.0 and X2 + 0.65 ≦ X1 ≦ X2 + 0.75. The ratio of the thickness of the thickness of the strained superlattice layer _{(t SL)} and the substrate _{(t SUB) (t SL /} t SUB) is according to any one of claims 1 to 7 is 0.001 to 0.014 Semiconductor stacked structure. A semiconductor laminated structure in which a buffer layer, a composition gradient layer, a channel layer, and an AlGaN semiconductor layer as a barrier layer are sequentially provided on a substrate, and the thermal expansion coefficient of the substrate at room temperature to 1200 ° C. is that of the AlGaN semiconductor layer It is smaller than any of the thermal expansion coefficients, the Al composition of the composition gradient layer decreases in the film growth direction, the film thickness of the composition gradient layer (t _CG ), the film thickness of the channel layer (t _CH ), and the total thickness of the semiconductor layer ( t _TOTAL ) is a semiconductor stacked structure in which 0.75 ≦ t _CG / t _TOTAL ≦ 0.90 or 0.75 ≦ t _CG / t _CG + t _CH ≦ 0.90. The semiconductor multilayer structure according to claim 9, wherein the composition gradient layer has a thickness of 0.7 μm to 2.5 μm. 11. The semiconductor multilayer structure according to claim 9, wherein the composition gradient layer has a composition of Al _X3 Ga _1-X3 N, and X3 decreases stepwise in the film growth direction every 10 nm to 100 nm in film thickness. A semiconductor laminated structure in which a buffer layer, a composition gradient layer, and an AlGaN-based semiconductor layer as a light emitting layer are sequentially provided on a substrate, and the thermal expansion coefficient of the substrate at room temperature to 1200 ° C. is any thermal expansion coefficient of the semiconductor layer The relationship between the thickness of the composition gradient layer (t _CG ), the thickness of the light emitting layer (t _LE ), and the total thickness of the semiconductor layer (t _TOTAL ) is 0.75 ≦ t _CG / t _TOTAL ≦ 0. .90, or 0.75 ≦ t _CG / (t _CG + t _LE ) ≦ 0.90. The semiconductor stacked structure according to claim 12, wherein the light emitting layer is formed by sequentially stacking a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer opposite to the first conductive type. 14. The semiconductor multilayer structure according to claim 12, wherein a thickness of the composition gradient layer is 0.7 μm to 2.5 μm. 15. The semiconductor multilayer structure according to claim 12, wherein the composition gradient layer has a composition of Al _X3 Ga _1-X3 N, and X3 decreases stepwise in the film growth direction every 10 nm to 100 nm in film thickness. The ratio of the thickness of the composition thickness of the graded layer and the _{(t CG)} substrate _{(t SUB) (t CG /} t SUB) The semiconductor according to any one of claims 9 to 15 is from 0.0007 to 0.0060 Laminated structure. The channel layer is a layer made of Al _X4 Ga _1-X4 N (0 ≦ X4 ≦ 0.1) having a thickness of 0.2 μm to 5.0 μm, and any one of claims 1 to 3, 8, 9 to 11, and 16 A semiconductor laminated structure according to claim 1. The semiconductor multilayer structure according to claim 1, wherein the substrate is a Si substrate. The HEMT element using the semiconductor laminated structure in any one of Claims 1-3, 8, 9-11, and 16. The light emitting element using the semiconductor laminated structure in any one of Claims 4-8 and 12-16.