JP2013545303A - Ｂｊｔ電流利得を改善するための低温インプラント - Google Patents

Ｂｊｔ電流利得を改善するための低温インプラント Download PDF

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Publication number
JP2013545303A
JP2013545303A JP2013536721A JP2013536721A JP2013545303A JP 2013545303 A JP2013545303 A JP 2013545303A JP 2013536721 A JP2013536721 A JP 2013536721A JP 2013536721 A JP2013536721 A JP 2013536721A JP 2013545303 A JP2013545303 A JP 2013545303A
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JP
Japan
Prior art keywords
dose
substrate
atoms
implant
integrated circuit
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Pending
Application number
JP2013536721A
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English (en)
Japanese (ja)
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JP2013545303A5 (https=
Inventor
チュアン ミンイエ
Original Assignee
日本テキサス・インスツルメンツ株式会社
テキサス インスツルメンツ インコーポレイテッド
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Application filed by 日本テキサス・インスツルメンツ株式会社, テキサス インスツルメンツ インコーポレイテッド filed Critical 日本テキサス・インスツルメンツ株式会社
Publication of JP2013545303A publication Critical patent/JP2013545303A/ja
Publication of JP2013545303A5 publication Critical patent/JP2013545303A5/ja
Pending legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/226—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping at a temperature lower than room temperature
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D10/00—Bipolar junction transistors [BJT]
    • H10D10/01—Manufacture or treatment
    • H10D10/051—Manufacture or treatment of vertical BJTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0107—Integrating at least one component covered by H10D12/00 or H10D30/00 with at least one component covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating IGFETs with BJTs
    • H10D84/0109—Integrating at least one component covered by H10D12/00 or H10D30/00 with at least one component covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating IGFETs with BJTs the at least one component covered by H10D12/00 or H10D30/00 being a MOS device
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/40—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00 with at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of IGFETs with BJTs
    • H10D84/401—Combinations of FETs or IGBTs with BJTs

Landscapes

  • Bipolar Integrated Circuits (AREA)
  • Bipolar Transistors (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Amplifiers (AREA)
JP2013536721A 2010-10-25 2011-10-25 Ｂｊｔ電流利得を改善するための低温インプラント Pending JP2013545303A (ja)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US40636410P 2010-10-25 2010-10-25
US61/406,364 2010-10-25
US13/246,362 US8772103B2 (en) 2010-10-25 2011-09-27 Low temperature implant scheme to improve BJT current gain
US13/246,362 2011-09-27
PCT/US2011/057679 WO2012061130A2 (en) 2010-10-25 2011-10-25 Low temperature implant to improve bjt current gain

Publications (2)

Publication Number Publication Date
JP2013545303A true JP2013545303A (ja) 2013-12-19
JP2013545303A5 JP2013545303A5 (https=) 2014-12-11

Family

ID=45973373

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2013536721A Pending JP2013545303A (ja) 2010-10-25 2011-10-25 Ｂｊｔ電流利得を改善するための低温インプラント

Country Status (4)

Country Link
US (1) US8772103B2 (https=)
JP (1) JP2013545303A (https=)
CN (1) CN103180934A (https=)
WO (1) WO2012061130A2 (https=)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9299698B2 (en) * 2012-06-27 2016-03-29 Mie Fujitsu Semiconductor Limited Semiconductor structure with multiple transistors having various threshold voltages
US10128113B2 (en) * 2016-01-12 2018-11-13 Taiwan Semiconductor Manufacturing Company Ltd. Semiconductor structure and manufacturing method thereof
US9923083B1 (en) 2016-09-09 2018-03-20 International Business Machines Corporation Embedded endpoint fin reveal
US10243048B2 (en) * 2017-04-27 2019-03-26 Texas Instruments Incorporated High dose antimony implant through screen layer for n-type buried layer integration

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH027422A (ja) * 1988-06-24 1990-01-11 Ricoh Co Ltd レーザによる高温熱処理方法
JPH10261593A (ja) * 1997-01-20 1998-09-29 Toshiba Corp 半導体装置の製造方法、半導体製造装置、および半導体装置
JP2001068427A (ja) * 1999-08-26 2001-03-16 Ulvac Japan Ltd 基板冷却装置
JP2001210735A (ja) * 2000-01-27 2001-08-03 Mitsumi Electric Co Ltd Ｃｍｏｓデバイス及びｃｍｏｓデバイスの製造方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5244820A (en) * 1990-03-09 1993-09-14 Tadashi Kamata Semiconductor integrated circuit device, method for producing the same, and ion implanter for use in the method
JPH1032274A (ja) 1996-04-12 1998-02-03 Texas Instr Inc <Ti> Ｃｍｏｓプロセスによるバイポーラートランジスタ作製方法
US7993698B2 (en) * 2006-09-23 2011-08-09 Varian Semiconductor Equipment Associates, Inc. Techniques for temperature controlled ion implantation
KR20100103627A (ko) * 2007-12-21 2010-09-27 어플라이드 머티어리얼스, 인코포레이티드 기판의 온도를 제어하기 위한 방법 및 장치
KR20100074625A (ko) 2008-12-24 2010-07-02 주식회사 하이닉스반도체 반도체 소자의 채널 정션 형성 방법

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH027422A (ja) * 1988-06-24 1990-01-11 Ricoh Co Ltd レーザによる高温熱処理方法
JPH10261593A (ja) * 1997-01-20 1998-09-29 Toshiba Corp 半導体装置の製造方法、半導体製造装置、および半導体装置
JP2001068427A (ja) * 1999-08-26 2001-03-16 Ulvac Japan Ltd 基板冷却装置
JP2001210735A (ja) * 2000-01-27 2001-08-03 Mitsumi Electric Co Ltd Ｃｍｏｓデバイス及びｃｍｏｓデバイスの製造方法

Also Published As

Publication number Publication date
WO2012061130A2 (en) 2012-05-10
US20120100680A1 (en) 2012-04-26
WO2012061130A3 (en) 2012-06-28
US8772103B2 (en) 2014-07-08
CN103180934A (zh) 2013-06-26

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