JP2013504195A - パッケージ壁用フィードスルー - Google Patents
パッケージ壁用フィードスルー Download PDFInfo
- Publication number
- JP2013504195A JP2013504195A JP2012527316A JP2012527316A JP2013504195A JP 2013504195 A JP2013504195 A JP 2013504195A JP 2012527316 A JP2012527316 A JP 2012527316A JP 2012527316 A JP2012527316 A JP 2012527316A JP 2013504195 A JP2013504195 A JP 2013504195A
- Authority
- JP
- Japan
- Prior art keywords
- signal line
- package
- line portion
- feedthrough
- wall
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
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Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K5/00—Casings, cabinets or drawers for electric apparatus
- H05K5/02—Details
- H05K5/0247—Electrical details of casings, e.g. terminals, passages for cables or wiring
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K5/00—Casings, cabinets or drawers for electric apparatus
- H05K5/06—Hermetically-sealed casings
- H05K5/069—Other details of the casing, e.g. wall structure, passage for a connector, a cable, a shaft
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1517—Multilayer substrate
- H01L2924/15192—Resurf arrangement of the internal vias
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Installation Of Indoor Wiring (AREA)
- Casings For Electric Apparatus (AREA)
- Waveguides (AREA)
Abstract
【選択図】 図4
Description
Claims (10)
- 信号を伝達するためのデバイスであって、前記デバイスは、信号が基台(204)を含む電力用パッケージの壁(203)を貫通して伝達するために、前記壁(203)と接する前記基台(204)上に配置されることにより利用可能であって、前記壁(203)は内部部位と外部部位との境界を定め、前記密閉デバイスは、前記パッケージ外側の第1の信号線路部分(202a’)、前記パッケージ内側の第2の信号線路部分(202b’)、ならびに、前記第1の信号線路部分(202a’)と前記第2の信号線路部分(202b’)とを接続する第3の信号線路部分(202c’)を含み、前記フィードスルーは第1の予め定められた保安距離を配慮するよう、前記第1の信号線路部分(202a’)が前記壁(203)からシフトされることと、前記第3の信号線路部分(202c’)がその全長を覆うようデバイス内に埋設されていることとを特徴とするデバイス。
- 前記第1の信号線路部分(202a’)と前記第2の信号線路部分(202b’)とが高さをシフトすることを特徴とし、前記高さが前記壁(203)と平行になるよう考慮される、請求項1に記載の信号伝達デバイス。
- 前記第2の信号線路部分(202b’)が第2の予め定められた保安距離を考慮するよう壁からシフトされることを特徴とする、請求項1に記載の信号伝達デバイス。
- 前記パッケージが密閉であることと、前記第2の保安距離が前記パッケージ内側でのコロナ形成を防ぐように意図されることとを特徴とする、請求項1〜3に記載の信号伝達デバイス。
- 前記パッケージが非密閉であることと、前記第2の保安距離が前記パッケージの内側でのマルチパクティングを防ぐように意図されることとを特徴とする、請求項1〜3に記載の信号伝達デバイス。
- 密閉絶縁材で作られ高温焼結により得られることを特徴とする、請求項1〜5に記載の信号伝達デバイス。
- 有機材料で作られていることを特徴とする、請求項5に記載の信号伝達デバイス。
- 前記基台(204)を基準にして凹部(r)を形成するよう、前記フィードスルーが前記基台(204)上に配置されることを特徴とする、請求項1〜7に記載の信号伝達デバイス。
- 前記第1の信号線路部分(202a’)を覆う樹脂をさらに含むことを特徴とする、請求項1〜8に記載の信号伝達デバイス。
- 前記第2の信号線路部分(202b’)を覆う樹脂をさらに含むことを特徴とする、請求項1〜9に記載の信号伝達デバイス。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0904214A FR2949939A1 (fr) | 2009-09-04 | 2009-09-04 | Traversee d'une paroi d'un boitier |
FR09/04214 | 2009-09-04 | ||
PCT/EP2010/062857 WO2011026889A1 (fr) | 2009-09-04 | 2010-09-02 | Traversée d'une paroi d'un boîtier |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2013504195A true JP2013504195A (ja) | 2013-02-04 |
JP5754032B2 JP5754032B2 (ja) | 2015-07-22 |
Family
ID=42049505
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2012527316A Active JP5754032B2 (ja) | 2009-09-04 | 2010-09-02 | 信号を伝達するためのデバイス |
Country Status (8)
Country | Link |
---|---|
US (1) | US20120152612A1 (ja) |
EP (1) | EP2474214B1 (ja) |
JP (1) | JP5754032B2 (ja) |
CN (1) | CN102484954B (ja) |
ES (1) | ES2558938T3 (ja) |
FR (1) | FR2949939A1 (ja) |
RU (1) | RU2549886C2 (ja) |
WO (1) | WO2011026889A1 (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2015195237A (ja) * | 2014-03-31 | 2015-11-05 | 住友電工デバイス・イノベーション株式会社 | 電子部品搭載用パッケージ |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0855926A (ja) * | 1994-08-16 | 1996-02-27 | Nippon Avionics Co Ltd | 集積回路パッケージおよびその実装方法 |
JP2006140538A (ja) * | 2006-02-10 | 2006-06-01 | Kyocera Corp | 配線基板 |
WO2007077144A1 (de) * | 2005-12-30 | 2007-07-12 | Robert Bosch Gmbh | Hermetisch dichtes elektronik-gehäuse sowie trägerplatte |
JP2007529888A (ja) * | 2004-03-16 | 2007-10-25 | ローベルト ボツシユ ゲゼルシヤフト ミツト ベシユレンクテル ハフツング | 電子回路のためのケーシングおよび該ケーシングをシールするための方法 |
JP2009231556A (ja) * | 2008-03-24 | 2009-10-08 | Nippon Telegr & Teleph Corp <Ntt> | 半導体素子の実装構造および半導体素子の実装方法 |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2816691C2 (de) * | 1978-04-18 | 1983-03-31 | Brown, Boveri & Cie Ag, 6800 Mannheim | Druckfestes Gehäuse für elektrische Geräte in schlagwetter- und/oder explosionsgeschützter Ausführung |
US4751611A (en) * | 1986-07-24 | 1988-06-14 | Hitachi Chemical Co., Ltd. | Semiconductor package structure |
US4873615A (en) * | 1986-10-09 | 1989-10-10 | Amp Incorporated | Semiconductor chip carrier system |
SU1758918A1 (ru) * | 1989-08-29 | 1992-08-30 | Конструкторское бюро приборостроения Научно-производственного объединения "Точность" | Объемный высокочастотный интегральный модуль |
US5434745A (en) * | 1994-07-26 | 1995-07-18 | White Microelectronics Div. Of Bowmar Instrument Corp. | Stacked silicon die carrier assembly |
RU2155462C1 (ru) * | 1999-06-03 | 2000-08-27 | Государственное унитарное предприятие Центральный научно-исследовательский институт "Гранит" | Микроэлектронный блок с общей герметизацией |
-
2009
- 2009-09-04 FR FR0904214A patent/FR2949939A1/fr active Pending
-
2010
- 2010-09-02 JP JP2012527316A patent/JP5754032B2/ja active Active
- 2010-09-02 CN CN201080038676.XA patent/CN102484954B/zh active Active
- 2010-09-02 US US13/393,771 patent/US20120152612A1/en not_active Abandoned
- 2010-09-02 EP EP10751649.4A patent/EP2474214B1/fr active Active
- 2010-09-02 ES ES10751649.4T patent/ES2558938T3/es active Active
- 2010-09-02 RU RU2012104625/07A patent/RU2549886C2/ru not_active IP Right Cessation
- 2010-09-02 WO PCT/EP2010/062857 patent/WO2011026889A1/fr active Application Filing
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0855926A (ja) * | 1994-08-16 | 1996-02-27 | Nippon Avionics Co Ltd | 集積回路パッケージおよびその実装方法 |
JP2007529888A (ja) * | 2004-03-16 | 2007-10-25 | ローベルト ボツシユ ゲゼルシヤフト ミツト ベシユレンクテル ハフツング | 電子回路のためのケーシングおよび該ケーシングをシールするための方法 |
WO2007077144A1 (de) * | 2005-12-30 | 2007-07-12 | Robert Bosch Gmbh | Hermetisch dichtes elektronik-gehäuse sowie trägerplatte |
JP2006140538A (ja) * | 2006-02-10 | 2006-06-01 | Kyocera Corp | 配線基板 |
JP2009231556A (ja) * | 2008-03-24 | 2009-10-08 | Nippon Telegr & Teleph Corp <Ntt> | 半導体素子の実装構造および半導体素子の実装方法 |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2015195237A (ja) * | 2014-03-31 | 2015-11-05 | 住友電工デバイス・イノベーション株式会社 | 電子部品搭載用パッケージ |
Also Published As
Publication number | Publication date |
---|---|
EP2474214A1 (fr) | 2012-07-11 |
US20120152612A1 (en) | 2012-06-21 |
RU2549886C2 (ru) | 2015-05-10 |
FR2949939A1 (fr) | 2011-03-11 |
WO2011026889A1 (fr) | 2011-03-10 |
RU2012104625A (ru) | 2013-10-10 |
JP5754032B2 (ja) | 2015-07-22 |
CN102484954A (zh) | 2012-05-30 |
EP2474214B1 (fr) | 2015-11-11 |
CN102484954B (zh) | 2016-01-20 |
ES2558938T3 (es) | 2016-02-09 |
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